JP4450921B2 - IC chip mounting substrate for IC card - Google Patents

IC chip mounting substrate for IC card Download PDF

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Publication number
JP4450921B2
JP4450921B2 JP2000009788A JP2000009788A JP4450921B2 JP 4450921 B2 JP4450921 B2 JP 4450921B2 JP 2000009788 A JP2000009788 A JP 2000009788A JP 2000009788 A JP2000009788 A JP 2000009788A JP 4450921 B2 JP4450921 B2 JP 4450921B2
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Prior art keywords
card
chip
metal layer
terminal
insulating
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JP2001203296A (en
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俊二 滑
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Dai Nippon Printing Co Ltd
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Dai Nippon Printing Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

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  • Wire Bonding (AREA)
  • Credit Cards Or The Like (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、ＩＣカード用ＩＣチップ実装基板に関し、更に詳しくは接触、非接触両方式に動作する通称コンビチップ用のＩＣカードに搭載するＩＣチップ実装基板に関する。
【０００２】
【従来の技術】
図面を参照して従来技術について説明する。ＩＣカード用のＩＣチップ実装基板には、片側、又は、両側に電気回路を形成した絶縁層を複数積層した多層基板と、一枚の絶縁層の片側に電気回路を形成した一層基板がある。通常の接触型ＩＣカードは絶縁層の片面に金属層が図３のように形成され、その裏側には図２に示すようにチップが接着剤で固定され、チップ面に形成された接続端子とＩＣカードの外部端子を形成する金属層Ａの裏側が図２、図３に示すスルーホール２２を通してボンディングワイヤで配線されている。一方接触・非接触両方式で動作する通称コンビカードにおいては、前記接触型ＩＣカードとして機能すると同時にカード本体側に形成されたアンテナからの信号を受信して動作しなければならずしたがってカード本体側に形成されたアンテナと基板に搭載されたＩＣチップに配線された端子を接続するための接続端子を基板上に形成する必要が生じる。
【０００３】
前記のような機能を満たすコンビチップ用基板は、通常図１に示すような形状をしている。まず、接触型ＩＣカードとして機能させるために、チップ側の接触端子４２から絶縁層２に開けられたスルーホール２２を通して直接金属層Ａに金属製のボンディングワイヤ５で接続するが、前記コンビチップ上に形成されたアンテナ端子４１の位置は、チップメーカーによって一定していないために、アンテナ端子４１から配線されたボンディングワイヤが、前記接触型ＩＣカードのための複数のボンディングワイヤと交差したり、接触することなく極力距離が近いところに接地する必要である。そのために、ＩＣチップの端子が形成されているチップの両サイドに平行に、非接触端子３を帯状に形成している。一方従来のコンビチップ用基板は図１の非接触端子３が、図４に示すように、絶縁層のスルーホールのエッジまで非接触端子の金属が形成されているために接触型として機能させるための外部端子とチップ上の端子を接続するボンディングワイヤがアンテナ接続用の非接触端子に接触し、製品の不良率が高かった。
【０００４】
【発明が解決しようとする課題】
そこで本発明はコンビカード用ＩＣチップ実装基板１においてチップ上の各接触端子４２と基板の外部端子を接続するボンディングワイヤが非接触端子３と接触することが無く、不良率が極めて低いＩＣカード実装基板を提供するものである。
【０００５】
【課題を解決するための手段】
上記課題を解決するために、本発明の請求項１の発明のＩＣカード用ＩＣチップ実装基板は、絶縁層の一方の面に，ＩＣカード外部端子がパターニングされた薄板形状の金属層Ａが設けられ、前記絶縁層の他方の面に，帯状の非接触端子とアンテナ端子が電気的に導通するようにパターニングされた薄板形状の金属層Ｂが設けられ、前記絶縁層と前記金属層Ｂにパターニングされた前記非接触端子とに開けられた複数のスルーホールを通して、前記金属層Ｂ側の絶縁層上に接着されたＩＣチップの接触端子と前記金属層Ａの前記ＩＣカード外部端子の絶縁層側とがワイヤボンディングされるＩＣカード用ＩＣチップ実装基板において、前記絶縁層に開けられた複数のスルーホールの前記金属層Ｂ側周辺部が絶縁部になっていることを特徴とするものである。
【０００６】
また、本発明の請求項２の発明のＩＣカード用ＩＣチップ実装基板は、請求項１において、前記スルーホールを通して，前記接触端子と前記ＩＣカード外部端子の絶縁層側とをワイヤボンディングした際，ボンディングワイヤの下にあたる前記スルーホールの前記金属層Ｂ側の周辺部全てを絶縁部としたことを特徴とするものである。
【０００７】
【発明の実施の形態】
以下図面を参照して、本発明の実施形態について説明する。
【０００８】
図１はコンビチップ型ＩＣカードのＩＣチップ実装基板の裏面の一実施例を説明するための裏面平面図である。図２は接触型ＩＣカードのＩＣチップ実装基板の裏面の一実施例を説明するための裏面平面図である。図３は、ＩＣチップ実装基板の表面の一実施例を示す表面平面図である。図４は、金属層Ｂの一部で従来の非接触端子の形状を説明するための平面図である。図５は、金属層Ｂの一部で本発明のスルーホール周辺に絶縁部を設けた一例を説明するための平面図である。図６は、図４のＢ−Ｂ線断面図である。図７は、図５のＣ−Ｃ線断面図である。図８は、図１のＡ−Ａ線断面図である。図９は、本発明の内容を説明するために図８のＥの部分を拡大した図である。図１０は、金属層Ｂの一部で本発明のスルーホール周辺の絶縁部の形状の他の一例を示す平面図である。図１１は、金属層Ｂの一部で本発明のスルーホール周辺の絶縁部の形状の更に他の一例を示す平面図である。
【０００９】
図１、図２、及び図３において、ＩＣチップ実装基板１は、図３に示すＩＣカード実装基板表面の外部接続端子６（金属層Ａ）、事前にスルーホール２２が開けられた絶縁層２、及び、非接触端子３およびアンテナ端子３１（金属層Ｂ）からなる３層構成でできている。
【００１０】
ここで、前記の基板の作製方法について説明する。絶縁フィルム２の片面全面に銅箔を接着した後、パンチング等の方法によりスルーホール２２を開け、絶縁フィルムの残った片側に前記同様銅箔を貼り合わせる。絶縁フィルムには、ガラスエポキシ、ガラスＢＴレジン、ポリイミド等、物理的、化学的に強く、耐熱性の材料が一般的に使用される。前記銅箔の上に印刷法により前記両側にパターン状のレジストを形成して、レジスト以外の部分を腐食(エッチング)し、残った銅箔の表面からレジストを除去した後、金属層Ａに（必要ならば金属層Ｂにも）ニッケル、又は、金メッキが施され、基板ができあがる。前記の他に、基板の作製方法として、やはり前記同様絶縁フィルムの片側全面に銅箔を接着した後、パンチングによりスルーホール２２を開け、その後で絶縁フィルムの別の片側に銅箔を貼り合わせる。両面に感光材料が塗布され、所定のパターンが焼き付けられ、現像、腐食（エッチング）、レジスト除去の工程を経て金属層Ａに（必要ならば金属層Ｂにも）ニッケル、金メッキを施し図１及び図２のパターンを形成する。
【００１１】
ＩＣカード実装基板は、同一のパターンを複数列帯状に並べ、ロール状に仕上げる場合と、同一の基板を縦横に複数個並べ、シート状に仕上げる場合があり、これを使用する後工程の要求によって決められる。
【００１２】
次に、図１のＩＣチップ４の裏側にダイボンディング用の接着剤が部分塗布され（図示せず）その上にＩＣチップ４が固定される。チップ４が固定されると、ワイヤボンダーでチップ側のアンテナ端子４１、接触端子４２と、スルーホール奥の外部接続用の端子６の絶縁層側金属面が金、又は、アルミニウム等金属製のボンディングワイヤ５で配線される。図３に示すようにＩＣチップ搭載基板１の表面は、接点の機能別に絶縁溝６１によって、６ないし８の独立した部分に分割されている。
【００１３】
ＩＣカードの製造手順として、まずＩＣカード基材であるポリ塩化ビニル、ポリエステル、ＡＢＳ等のプラスチックフィルムに印刷を施し、これら印刷された基材フィルムの間にアンテナ又はコイルを挟みこみ、透明な保護フィルムで印刷面を被覆した後、全体に熱、圧を加えながら積層する。積層された中間製品から１枚１枚のカードに型抜きされた後、ＩＣチップ実装基板を埋めこむための凹部がカードの表面に形成される。前記凹部にはカード基材の間に埋めこまれたアンテナ又はコイルの端子が所定の位置に形成されていて、前記図１のアンテナ端子３１の位置と前記アンテナまたはコイルの端子がＩＣチップ実装基板をカード本体に実装する際に対向するようになっていて実装時に導電性の接着剤などで固定される。樹脂による射出成型の場合は、カードの成型時にアンテナ又はコイルを封入し、ＩＣチップ実装基板を実装するための凹部も同時に形成する。前記積層方式でカードを作製したときと同様ＩＣチップ実装基板のアンテナ端子に対向した位置にカード本体側のアンテナ端子が形成されている。成型時に印刷パターンを転写しても、ＩＣチップ実装基板を実装した後で、表裏印刷しても良い。
【００１４】
図１では非接触端子３及びアンテナ端子３１がＨ状の形状でつながっているが、前記非接触端子３及びアンテナ端子３１は電気的に導通していれば良いので前記Ｈ状の形状にこだわるものではない。
【００１５】
図１により、チップの接触端子４２に向かって伸びているボンディングワイヤの方向に本発明の絶縁部が形成されていることによって、ボンディングされたボンディングワイヤが非接触端子に接触する危険が無いことが明確に理解できる。また、非接触端子３が図１のように形成されていれば、アンテナ端子４１がＩＣチップ４の縦ライン上のどの位置に形成されていても、最も近くに在る非接触端子３にボンディングワイヤを飛ばすことができ、非接触端子はスルーホール２２が並ぶライン上付近に在ることが好ましい事がわかる。
【００１６】
図４、及び、図６は非接触端子３のスルーホールの周辺に絶縁層を設けない従来の基板の一例を図示したものであり、図５、及び、図７は本発明の非接触端子３のスルーホールの周辺に絶縁層を設けた場合の一例を図示したものである。前記従来例の問題点については、図９で詳しく説明する。図４、図５、図６、図７において３は非接触端子で、２は絶縁層、６はＩＣカード外部端子、２２はスルーホール、２３はスルーホール周辺絶縁部である。
【００１７】
図９は、図８のＥの部分の拡大図で、スルーホールの周辺に絶縁部が在る場合と無い場合について、ボンディングワイヤを配線した時にどのような状態になるかを判りやすく説明した図である。図９において従来の非接触端子の形状では、ＩＣチップ４から導かれたボンディングワイヤ５ａは金属層ＡのＩＣカード外部端子裏側に接地する際に非接触端子のエッジ、すなわち金属層Ｂのエッジ３ａに接触してしまう可能性がある。更に前記接触を避けようとすると図９で判るように、ボンディングワイヤの高さが高くなってしまう。然るにＩＳＯの規格に基づいて造られたＩＣカードはカードの厚さが最大０．７６ｍｍプラス１０％、最小０．７６ｍｍマイナス１０％と決まっているために前記ワイヤボンディングの際のボンディングワイヤの高さをできるだけ低く抑えることが要求される。実際には絶縁フィルム（絶縁層）の厚さ、金属層Ｂの厚さは極めて薄いので、ＤａとＤｂの差はさほど無くても効果は得られるがＤａ＝Ｄｂの場合と較べれば格段の違いが現れる。
【００１８】
また、最近チップを低コストで薄くできるようになったためにボンディングワイヤの高さが極めて低く設定できるようになったが、このような傾向の中で後述、図１１のようにボンディングワイヤの下側全部を絶縁部にすることの効果はきわめて大きいことが判る。また、チップ及びボンディングワイヤを保護するために樹脂で封止するが、このような際にもボンディングワイヤの下側は絶縁されている方がより安全で都合が良い。
【００１９】
図１０は、スルーホール周辺絶縁部が四角形の場合、図１１は、非接触端子３の絶縁部スルーホール２２からチップの各端子まで配線されたボンディングワイヤの下に当たるスルーホール周辺部分を、全て絶縁部２３にした場合について説明するための平面図である。
【００２０】
【実施例】
（実施例）次に図面を参照して、本発明の実施例について説明する。
【００２１】
図１に示すパターンにしたがってＩＣチップ実装基板を試作しボンディングボンディングワイヤの非接触端子３への接触トラブルによる不良率を確認した。スルーホールの直径を０．７ｍｍとし、スルーホール周辺絶縁部の直径を１．０ｍｍとした。まず、絶縁フィルムとして厚さ１００μｍのポリイミドフィルムを選定して、エポキシ系の接着剤を使用して片側に３５μｍの銅箔を接着した。シルクスクリーン印刷機によって水溶性のレジストをパターン印刷し、非印刷面を塩化第二鉄水溶液でエッチングした。このようにして図１のパターンを形成し、パンチングによってスルーホール２２を開けた。次に表側に前記同様銅箔を全面に貼りつけ、前記同様図３に示すメッキのためのリード６１を伴ったパターンを印刷した後エッチングを行い、表面のレジストを除去しニッケル、及びその上に金メッキを施し、裏面のレジストの除去を行った。このようにして得た試作品を５００ヶ作製し、チップボンディング、ワイヤボンディングを行い、図１の非接触端子３のスルーホールが隠れる程度に封止樹脂を流し込み、チップ及びボンディングワイヤを固定した。
【００２２】
比較のために図１の非接触端子３のパターンを図４のパターンに変えた基板を同様の方法で５００ヶ作製し、チップボンディング、ワイヤボンディングを行い、図１の非接触端子３のスルーホールが隠れる程度に封止樹脂を流し込み、チップ及びボンディングワイヤを固定した。
【００２３】
チップ動作テスターによってボンディングワイヤと非接触端子の短絡状況を調査した結果、不良枚数は、従来方式が５０枚で、本発明方式は０枚であった。
【発明の効果】
【００２４】
本発明のＩＣチップ実装基板によれば、実施例によっても明らかな如くコンビチップ対応汎用ＩＣチップ実装基板において裏面の非接触端子部分のスルーホール周辺部を絶縁部とすることによって、ＩＣチップ実装時の収率を格段に高めることができることが判明した。
【図面の簡単な説明】
【図１】コンビチップ型ＩＣカードのＩＣチップ実装基板の裏面の一実施例を説明するための裏面平面図である。
【図２】接触型ＩＣカードのＩＣチップ実装基板の裏面の一実施例を説明するための裏面平面図である。
【図３】図１、または、図２に示すＩＣチップ実装基板の表面の一実施例を示す表面平面図である。
【図４】金属層Ｂの一部で従来の非接触端子の形状を説明するための平面図である。
【図５】金属層Ｂの一部で本発明のスルーホール周辺に絶縁部を設けた一例を説明するための平面図である。
【図６】図４のＢ−Ｂ線断面図である。
【図７】図５のＣ−Ｃ線断面図である。
【図８】図１のＡ−Ａ線断面図である。
【図９】本発明の内容を説明するために図８のＥの部分を拡大した図である。
【図１０】金属層Ｂの一部で本発明のスルーホール周辺の絶縁部の形状の他の一例を示す平面図である。
【図１１】金属層Ｂの一部で本発明のスルーホール周辺の絶縁部の形状の更に他の一例を示す平面図である。
【符号の説明】
１ ＩＣチップ実装基板
２ 絶縁層
２２ 絶縁層スルーホール
２３ 本発明のスルーホール周辺絶縁部
３ 基板側の非接触端子
３１ 基板側のアンテナ端子
３ａ 金属層Ｂと絶縁層のスルーホールの孔がＤａで、同じ大きさである場合の金属層Ｂのエッジの位置
３ｂ 絶縁層のスルーホールの孔の大きさがＤａで金属層Ｂのスルーホールの孔の大きさがＤｂの場合の金属層Ｂのエッジの位置
４ ＩＣ（コンビ）チップ
４１ チップ側（非接触カード）のアンテナ端子
４２ チップ側（接触カード）の接触端子
５、５ａ、５ｂ ボンディングワイヤ
６ 金属層Ａ（ＩＣカード外部端子）
６１ 外部端子溝
６２ メッキリード
７ チップボンディング用接着剤[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an IC chip mounting substrate for an IC card, and more particularly to an IC chip mounting substrate mounted on an IC card for a so-called combination chip that operates in both a contact and non-contact manner.
[0002]
[Prior art]
Prior art will be described with reference to the drawings. An IC chip mounting substrate for an IC card includes a multilayer substrate in which a plurality of insulating layers having an electric circuit formed on one side or both sides are stacked, and a single-layer substrate in which an electric circuit is formed on one side of one insulating layer. In a normal contact IC card, a metal layer is formed on one side of an insulating layer as shown in FIG. 3, and on the back side, a chip is fixed with an adhesive as shown in FIG. The back side of the metal layer A forming the external terminal of the IC card is wired with a bonding wire through the through hole 22 shown in FIGS. On the other hand, in a so-called combination card that operates in both contact and non-contact systems, it must operate while receiving a signal from an antenna formed on the card body side as well as functioning as the contact IC card. Therefore, it is necessary to form connection terminals on the substrate for connecting the antennas formed on the substrate and terminals wired to the IC chip mounted on the substrate.
[0003]
A combination chip substrate that satisfies the above-described functions usually has a shape as shown in FIG. First, in order to function as a contact type IC card, a metal bonding wire 5 is directly connected to the metal layer A through a through hole 22 opened in the insulating layer 2 from the contact terminal 42 on the chip side. Since the positions of the antenna terminals 41 formed on the antenna terminal 41 are not constant depending on the chip manufacturer, the bonding wires wired from the antenna terminals 41 intersect or contact the plurality of bonding wires for the contact type IC card. It is necessary to ground to a place where the distance is as close as possible. For this purpose, the non-contact terminals 3 are formed in a strip shape parallel to both sides of the chip on which the IC chip terminals are formed. On the other hand, in the conventional combination chip substrate, the non-contact terminal 3 in FIG. 1 functions as a contact type because the metal of the non-contact terminal is formed up to the edge of the through hole of the insulating layer as shown in FIG. The bonding wire connecting the external terminal of the IC and the terminal on the chip contacted the non-contact terminal for antenna connection, and the defect rate of the product was high.
[0004]
[Problems to be solved by the invention]
Therefore, the present invention provides an IC card mounting with an extremely low defect rate, in which bonding wires connecting the contact terminals 42 on the chip and the external terminals of the substrate do not contact the non-contact terminals 3 in the IC chip mounting substrate 1 for combination cards. A substrate is provided.
[0005]
[Means for Solving the Problems]
In order to solve the above problems, the IC chip mounting substrate for an IC card according to claim 1 of the present invention is provided with a thin plate-shaped metal layer A in which IC card external terminals are patterned on one surface of the insulating layer. And a thin plate-like metal layer B patterned so that the band-shaped non-contact terminal and the antenna terminal are electrically connected to each other on the other surface of the insulating layer, and patterned on the insulating layer and the metal layer B. through a plurality of through holes in which the bored in the non-contact terminal is, the insulating layer side of the IC card external terminal of the metal layer a and the contact terminals of glued IC chip to the metal layer B side of the insulating layer And an IC chip mounting substrate for an IC card that is wire-bonded to the metal layer B side peripheral portion of a plurality of through-holes opened in the insulating layer. It is intended.
[0006]
An IC chip mounting substrate for an IC card according to claim 2 of the present invention is the method according to claim 1 , wherein the contact terminal and the insulating layer side of the IC card external terminal are wire-bonded through the through hole. All of the peripheral part on the metal layer B side of the through hole, which is under the bonding wire, is an insulating part .
[0007]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0008]
FIG. 1 is a back plan view for explaining an embodiment of the back surface of an IC chip mounting substrate of a combination chip IC card. FIG. 2 is a plan view of the back surface for explaining one embodiment of the back surface of the IC chip mounting substrate of the contact IC card. FIG. 3 is a surface plan view showing an example of the surface of the IC chip mounting substrate. FIG. 4 is a plan view for explaining the shape of a conventional non-contact terminal in a part of the metal layer B. FIG. FIG. 5 is a plan view for explaining an example in which an insulating portion is provided around the through hole of the present invention in a part of the metal layer B. FIG. 6 is a cross-sectional view taken along line BB in FIG. 7 is a cross-sectional view taken along the line CC of FIG. 8 is a cross-sectional view taken along line AA in FIG. FIG. 9 is an enlarged view of a portion E in FIG. 8 for explaining the contents of the present invention. FIG. 10 is a plan view showing another example of the shape of the insulating part around the through hole of the present invention in a part of the metal layer B. FIG. FIG. 11 is a plan view showing still another example of the shape of the insulating portion around the through hole of the present invention in a part of the metal layer B. FIG.
[0009]
1, 2, and 3, the IC chip mounting substrate 1 includes an external connection terminal 6 (metal layer A) on the surface of the IC card mounting substrate shown in FIG. 3, and an insulating layer 2 in which a through hole 22 has been opened in advance. , And a three-layer structure comprising a non-contact terminal 3 and an antenna terminal 31 (metal layer B).
[0010]
Here, a method for manufacturing the substrate will be described. After a copper foil is bonded to the entire surface of one side of the insulating film 2, a through hole 22 is opened by a method such as punching, and the copper foil is bonded to the other side of the insulating film as described above. As the insulating film, a physically and chemically strong and heat-resistant material such as glass epoxy, glass BT resin, and polyimide is generally used. A patterned resist is formed on both sides of the copper foil by a printing method, portions other than the resist are corroded (etched), and the resist is removed from the surface of the remaining copper foil. If necessary, the metal layer B is also plated with nickel or gold to complete the substrate. In addition to the above, as a method for producing the substrate, a copper foil is bonded to the entire surface of one side of the insulating film, and then a through hole 22 is opened by punching, and then the copper foil is bonded to another side of the insulating film. A photosensitive material is applied to both sides, a predetermined pattern is baked, nickel, gold plating is applied to the metal layer A (and also to the metal layer B if necessary) through development, corrosion (etching), and resist removal steps, as shown in FIG. The pattern of FIG. 2 is formed.
[0011]
The IC card mounting board has the same pattern arranged in multiple rows of strips and finished in a roll shape, and the same board is arranged in a plurality of lengths and widths and finished in a sheet shape. It is decided.
[0012]
Next, an adhesive for die bonding is partially applied to the back side of the IC chip 4 in FIG. 1 (not shown), and the IC chip 4 is fixed thereon. When the chip 4 is fixed, the metal side of the insulating layer side metal surface of the antenna terminal 41 and the contact terminal 42 on the chip side and the terminal 6 for external connection at the back of the through hole is bonded with a metal such as gold or aluminum. Wired with wire 5. As shown in FIG. 3, the surface of the IC chip mounting substrate 1 is divided into 6 to 8 independent portions by insulating grooves 61 according to the function of the contacts.
[0013]
The IC card manufacturing procedure is as follows: First, a plastic film such as polyvinyl chloride, polyester, or ABS, which is the base material of the IC card, is printed, and an antenna or coil is sandwiched between the printed base material films to provide transparent protection. After coating the printing surface with a film, the whole is laminated while applying heat and pressure. After the laminated intermediate product is die-cut one by one, a recess for embedding the IC chip mounting substrate is formed on the surface of the card. An antenna or coil terminal buried between card bases is formed at a predetermined position in the recess, and the position of the antenna terminal 31 and the antenna or coil terminal of FIG. Is mounted on the card body and is fixed with a conductive adhesive or the like at the time of mounting. In the case of resin injection molding, an antenna or a coil is enclosed when molding a card, and a recess for mounting an IC chip mounting substrate is also formed at the same time. The antenna terminal on the card body side is formed at a position facing the antenna terminal of the IC chip mounting substrate as in the case where the card is manufactured by the lamination method. The printed pattern may be transferred at the time of molding, or the front and back may be printed after the IC chip mounting substrate is mounted.
[0014]
In FIG. 1, the non-contact terminal 3 and the antenna terminal 31 are connected in an H shape, but the non-contact terminal 3 and the antenna terminal 31 are only required to be electrically connected, so that they stick to the H shape. is not.
[0015]
According to FIG. 1, since the insulating portion of the present invention is formed in the direction of the bonding wire extending toward the contact terminal 42 of the chip, there is no risk that the bonded bonding wire contacts the non-contact terminal. Understand clearly. Further, if the non-contact terminal 3 is formed as shown in FIG. 1, the antenna terminal 41 is bonded to the nearest non-contact terminal 3 regardless of the position on the vertical line of the IC chip 4. It can be seen that the wire can be skipped and the non-contact terminals are preferably located near the line where the through holes 22 are arranged.
[0016]
4 and 6 show an example of a conventional substrate in which an insulating layer is not provided around the through hole of the non-contact terminal 3, and FIGS. 5 and 7 show the non-contact terminal 3 of the present invention. An example in the case of providing an insulating layer around the through hole is illustrated. The problems of the conventional example will be described in detail with reference to FIG. 4, 5, 6, and 7, 3 is a non-contact terminal, 2 is an insulating layer, 6 is an IC card external terminal, 22 is a through hole, and 23 is a through hole peripheral insulating portion.
[0017]
FIG. 9 is an enlarged view of a portion E in FIG. 8, which is an easy-to-understand description of what a bonding wire is in when an insulating portion is present around a through hole and when an insulating portion is not present. It is. In the conventional non-contact terminal shape in FIG. 9, the bonding wire 5a led from the IC chip 4 is contacted with the edge of the non-contact terminal, that is, the edge 3a of the metal layer B when grounding the back side of the external terminal of the metal layer A. There is a possibility of touching. Further, if the contact is to be avoided, the height of the bonding wire is increased as shown in FIG. However, since the thickness of the IC card manufactured based on the ISO standard is determined to be a maximum of 0.76 mm plus 10% and a minimum of 0.76 mm minus 10%, the height of the bonding wire at the time of the wire bonding is described above. Is required to be kept as low as possible. Actually, since the thickness of the insulating film (insulating layer) and the thickness of the metal layer B are extremely thin, the effect can be obtained even if there is not much difference between Da and Db, but it is much different from the case of Da = Db. Appears.
[0018]
Further, since the chip can be thinned at a low cost recently, the height of the bonding wire can be set very low. Under such a tendency, the lower side of the bonding wire will be described later as shown in FIG. It can be seen that the effect of making all the insulating parts is extremely large. In addition, the chip and the bonding wire are sealed with resin in order to protect the chip and the bonding wire. Even in such a case, it is safer and more convenient to insulate the lower side of the bonding wire.
[0019]
10 shows that when the through hole peripheral insulating portion is a square, FIG. 11 shows that all the through hole peripheral portions corresponding to the bonding wires wired from the insulating through hole 22 of the non-contact terminal 3 to each terminal of the chip are insulated. It is a top view for demonstrating the case where it is set as the part 23. FIG.
[0020]
【Example】
(Embodiments) Next, embodiments of the present invention will be described with reference to the drawings.
[0021]
An IC chip mounting substrate was prototyped according to the pattern shown in FIG. 1, and the defect rate due to contact trouble of the bonding bonding wire to the non-contact terminal 3 was confirmed. The diameter of the through hole was 0.7 mm, and the diameter of the through hole peripheral insulating portion was 1.0 mm. First, a polyimide film having a thickness of 100 μm was selected as an insulating film, and a 35 μm copper foil was bonded to one side using an epoxy adhesive. A water-soluble resist was pattern-printed with a silk screen printer, and the non-printed surface was etched with a ferric chloride aqueous solution. Thus, the pattern of FIG. 1 was formed, and the through hole 22 was opened by punching. Next, the same copper foil as above is applied to the entire surface, and after the pattern with the lead 61 for plating shown in FIG. 3 is printed, etching is performed to remove the resist on the surface, and nickel is formed thereon. Gold plating was applied, and the resist on the back surface was removed. 500 prototypes thus obtained were produced, chip bonding and wire bonding were performed, and sealing resin was poured to such an extent that the through holes of the non-contact terminals 3 in FIG. 1 were hidden, and the chips and bonding wires were fixed.
[0022]
For comparison, 500 substrates in which the pattern of the non-contact terminal 3 in FIG. 1 is changed to the pattern in FIG. 4 are manufactured by the same method, chip bonding and wire bonding are performed, and the through hole of the non-contact terminal 3 in FIG. The sealing resin was poured to such an extent that the chip was hidden, and the chip and the bonding wire were fixed.
[0023]
As a result of investigating the short-circuit state of the bonding wire and the non-contact terminal by the chip operation tester, the number of defectives was 50 in the conventional method and 0 in the present invention.
【The invention's effect】
[0024]
According to the IC chip mounting substrate of the present invention, as apparent from the embodiments, the peripheral portion of the non-contact terminal portion on the back surface of the combination chip compatible general-purpose IC chip mounting substrate is used as an insulating portion, so that the IC chip mounting substrate can be mounted. It was found that the yield of can be significantly increased.
[Brief description of the drawings]
FIG. 1 is a back plan view for explaining one embodiment of a back surface of an IC chip mounting substrate of a combination chip IC card.
FIG. 2 is a back plan view for explaining one embodiment of the back surface of the IC chip mounting substrate of the contact type IC card.
3 is a surface plan view showing an example of the surface of the IC chip mounting substrate shown in FIG. 1 or FIG. 2. FIG.
FIG. 4 is a plan view for explaining the shape of a conventional non-contact terminal in a part of a metal layer B. FIG.
FIG. 5 is a plan view for explaining an example in which an insulating portion is provided around a through hole according to the present invention in a part of a metal layer B;
6 is a cross-sectional view taken along line BB in FIG.
7 is a cross-sectional view taken along line CC in FIG.
FIG. 8 is a cross-sectional view taken along line AA in FIG.
FIG. 9 is an enlarged view of a portion E in FIG. 8 for explaining the contents of the present invention.
FIG. 10 is a plan view showing another example of the shape of the insulating part around the through hole of the present invention in a part of the metal layer B.
FIG. 11 is a plan view showing still another example of the shape of the insulating portion around the through hole of the present invention in a part of the metal layer B.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 IC chip mounting board | substrate 2 Insulating layer 22 Insulating layer through-hole 23 Non-contact terminal 31 in the through-hole peripheral insulating part 3 board | substrate side antenna terminal 3a board | substrate side antenna terminal 3a Metal layer B and the through-hole of an insulating layer are Da The position 3b of the edge of the metal layer B when they are the same size The edge of the metal layer B when the size of the through hole of the insulating layer is Da and the size of the through hole of the metal layer B is Db position 4 IC of (combi) chip 41 chip-side contact terminals 5,5a antenna terminal 42 chip side (contactless card) (contactless card), 5b bonding wires 6 metal layer a (IC card external terminal)
61 External terminal groove 62 Plating lead 7 Chip bonding adhesive

Claims (2)

絶縁層の一方の面に，ＩＣカード外部端子がパターニングされた薄板形状の金属層Ａが設けられ、前記絶縁層の他方の面に，接触端子が設けられたＩＣチップの両サイドと平行になるように形成された帯状の非接触端子とアンテナ端子が電気的に導通するようにパターニングされた薄板形状の金属層Ｂが設けられ、前記絶縁層と前記金属層Ｂにパターニングされた前記非接触端子とに開けられた複数のスルーホールを通して、前記金属層Ｂ側の前記絶縁層上に接着された前記ＩＣチップの前記接触端子と前記金属層Ａの前記ＩＣカード外部端子の前記絶縁層側とがワイヤボンディングされるＩＣカード用ＩＣチップ実装基板において、前記絶縁層に開けられた複数の前記スルーホールの前記金属層Ｂ側の周辺部が絶縁部になっていることを特徴とするＩＣカード用ＩＣチップ実装基板。A thin-plate-shaped metal layer A in which IC card external terminals are patterned is provided on one surface of the insulating layer, and parallel to both sides of the IC chip provided with contact terminals on the other surface of the insulating layer. non-contact terminal and the antenna terminal of the formed strip is a metal layer B of the patterned thin plate so as to be electrically conductive is provided as, patterned the contactless terminal to the metal layer B and the insulating layer through a plurality of through holes bored in bets, and the said insulating layer side of the IC card external terminal of the contact terminal and the metal layer a of the IC chip bonded on the insulating layer of the metal layer B-side In the IC card IC chip mounting substrate to be wire-bonded, the peripheral part on the metal layer B side of the plurality of through holes opened in the insulating layer is an insulating part. IC chip mounting board for the IC card to be. 前記スルーホールを通して，前記接触端子と前記ＩＣカード外部端子の絶縁層側とをワイヤボンディングした際，ボンディングワイヤの下にあたる前記スルーホールの前記金属層Ｂ側の周辺部全てを絶縁部としたことを特徴とする請求項１に記載のＩＣカード用ＩＣチップ実装基板。When the contact terminal and the insulating layer side of the IC card external terminal are wire-bonded through the through-hole, all the peripheral parts on the metal layer B side of the through-hole under the bonding wire are used as insulating parts. The IC chip mounting substrate for an IC card according to claim 1.
JP2000009788A 2000-01-19 2000-01-19 IC chip mounting substrate for IC card Expired - Lifetime JP4450921B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000009788A JP4450921B2 (en) 2000-01-19 2000-01-19 IC chip mounting substrate for IC card

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DE102006019925B4 (en) * 2006-04-28 2010-09-16 Infineon Technologies Ag Chip module, smart card and method of making this
JP2010074621A (en) * 2008-09-19 2010-04-02 Nitto Denko Corp Circuit board for isolator, isolator, and method for manufacturing isolator
CN102446868A (en) * 2011-12-28 2012-05-09 上海长丰智能卡有限公司 Novel dual-interface smart card module and implementation method thereof
JP5932470B2 (en) * 2012-05-08 2016-06-08 株式会社東芝 IC card
CN114334875A (en) * 2020-09-30 2022-04-12 华为技术有限公司 Packaging structure and electronic device

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