JP4449420B2 - Manufacturing method of semiconductor device - Google Patents

Description

The present invention is for example a color filter and on-chip filter method for manufacturing a suitable semiconductor equipment to an imaging device provided on the semiconductor element.

  For example, when producing a CMOS (Complementary Metal Oxide Semiconductor) image sensor, a CCD (Charge Coupled Device) imaging device, etc., on one surface (this is the front surface) of the front and back surfaces of a semiconductor substrate such as a Si wafer, After forming an element structure necessary for an image sensor or an image sensor, grinding (polishing) is performed from a surface opposite to the surface on which the element structure is formed (this is a back surface) by, for example, a CMP (Chemical Mechanical Polishing) method. The semiconductor substrate is thinned.

When such thinning is performed by, for example, a CMP method which is a typical technique in recent years, a dedicated support substrate for thinning is prepared, and the wafer is maintained while maintaining high parallelism with respect to the support substrate. The semiconductor substrate in a state is bonded together, and the semiconductor substrate is mechanically (physically) supported on the supporting substrate, and grinding and polishing by CMP is performed to realize thinning of the semiconductor substrate.
JP-A-8-70079

  However, it is not easy in practice to bond the support substrate and the semiconductor substrate while maintaining a high level of accuracy over the entire surface of the semiconductor substrate in the wafer state with respect to the support substrate, and cannot be ignored. There is a possibility that an error of degree occurs. That is, even if an extremely slight inclination θ occurs in the attitude of the semiconductor substrate with respect to the support substrate, the angle increases at Ltan θ in proportion to the distance L between one end and the other end of the semiconductor substrate. Even if a slight tilt is allowed, the thickness after grinding of each element of the semiconductor substrate in the subsequent CMP process or the like may cause a variation that cannot be ignored and must be evaluated as a defective product. Become. Alternatively, an element that is partially thinly ground excessively can be obtained. As a result of the occurrence of such an inconvenient situation, there has been a problem that a manufacturing yield as a semiconductor device is lowered, and a problem occurs in that the operation characteristics of the device are deteriorated or deteriorated.

  In addition, since a plurality of elements formed on a semiconductor substrate such as a single Si (silicon) wafer are not necessarily all non-defective products, a single semiconductor substrate as described above is used. In order to produce an image sensor and an imaging device without defects, only good semiconductor substrates can be used across all elements, so only such semiconductor substrates with no defects are selected over the entire surface. However, including that one defective semiconductor substrate cannot be used, the overall manufacturing yield tends to be low.

The present invention has been made in view of such problems, and its purpose is to manufacture a high-quality semiconductor device in which errors and variations in the thickness, parallelism, and operating characteristics of a semiconductor element are suppressed with high yield. It is to provide a manufacturing how that can be.

The method for manufacturing a semiconductor device of the present invention includes a plurality of semiconductor elements divided into individual chips on a surface of a substrate having an alignment mark on the surface , using a transparent adhesive, and an element structure as the semiconductor element a step of thinning the back surface opposite to the Chakusu Ru step bonded to face to the surface of the substrate is built surface, the total number was crafted the device structure surface of the semiconductor element In the step of attaching the semiconductor element, the semiconductor element is aligned on the substrate surface while optically grasping the alignment mark through the transparent adhesive, and then the semiconductor element After the semiconductor element is thinned, an optical member is formed or attached on the surface on which the semiconductor element has been thinned while optically grasping the alignment mark. .

The semiconductor equipment manufacturing method of the present invention, a semiconductor device which is divided into individual chip-like, a plurality, such that the surface of the device structure is fabricated as the semiconductor element facing to the surface of the substrate It is stuck wearing. Thereafter, all the semiconductor elements are sliced from the back surface opposite to the surface on which the element structure is formed. Thus, the individual semiconductor elements, individually independently, is accurately bonded wear to the surface of the substrate.

In addition , the semiconductor element is attached to the surface of the substrate with a transparent adhesive, and an alignment mark is provided on the substrate, and the surface of the substrate is optically grasped through the transparent adhesive. than was to perform alignment of the semiconductor element above Ri reliably and easily good, that Do possible Chakusu Rukoto accurately bonded individual semiconductor devices on the surface of the substrate.

According to the semiconductor equipment manufacturing method of the present invention, a semiconductor device which is divided into individual chip-like, multiple, surface of the device structure is fabricated as the semiconductor element facing to the surface of the substrate bonded to wear as, then, a total number of the semiconductor elements, by thinning the back surface opposite to the incorporated surface make the device structure, the substrate individually individual semiconductor elements are each independently surfaces since to be accurately bonded worn respect, manufacturing errors and variations in the thickness and the mounting posture and the operational characteristics of the semiconductor element is suppressed, a good semiconductor device quality, easily at a high yield Is possible.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 shows a configuration of a main part of a semiconductor device according to an embodiment of the present invention. This semiconductor device includes a substrate 1, a plurality of semiconductor elements 2, and an optical member 3 as main parts.

  More specifically, in this semiconductor device, a plurality of semiconductor elements 2 divided into individual chips are formed on the surface of the substrate 1, and the surface on which the element structure 21 as the semiconductor element 2 is formed is the substrate. 1 is bonded so as to face the surface of 1, and is thinned by performing a grinding process or the like from the back surface opposite to the surface on which the element structures 21 of all of the semiconductor elements 2 are formed. An optical member (or optical element) 3 such as a color filter or a second element or wiring is provided on the rear surface 31 to constitute the main part.

  With this configuration, this semiconductor device can be manufactured with good quality and high yield, in which errors and variations in the thickness and operating characteristics of each semiconductor element 2 are suppressed. Moreover, since it can test | inspect beforehand about the semiconductor element which has a defect, and all the semiconductor elements 2 mounted or affixed on the one board | substrate 1 can be made into a non-defective product, the defect incidence rate of the completed semiconductor device can be increased. Thus, the manufacturing cost can be reduced.

  The substrate 1 can be, for example, a Si substrate, a ceramic substrate, a glass substrate, or a resin substrate such as an epoxy substrate or a polyimide substrate. Further, circuit elements, wirings, and the like may be formed in the substrate 1 itself, or a simple support substrate without such a structure may be used.

  Each of the plurality of semiconductor elements 2 is a semiconductor chip in which, for example, a Si wafer having an element structure 21 formed on the surface thereof is cut, and only non-defective products are selected therefrom. All these semiconductor elements 2 are bonded by a bonding resin so that the surface on which the element structure 21 is formed faces the surface of the substrate 1, and mechanical grinding is performed from the back surface, which is the opposite surface, for example. It is formed by thinning by grinding, polishing or etching by the method, CMP method or wet etching method. The semiconductor element 2 can be a CCD, a semiconductor light receiving element or the like when the semiconductor device is a color imaging device or a color image sensor, for example.

  As the bonding resin 5, for example, a resin having high transparency and certain adhesive properties such as an ultraviolet curable epoxy resin adhesive is desirable. By making this bonding resin 5 highly transparent, it becomes possible to optically grasp the alignment mark 4 provided on the surface of the substrate 1, and by extension, individual semiconductor elements using the alignment mark 4 This is because accurate alignment of the second substrate 1 with respect to the substrate 1 can be ensured and simple. Further, the alignment of the optical member 3 and the like can be similarly made sure and simple.

  However, here, it is not limited only to the bonding between the substrate 1 and the semiconductor element 2 using the bonding resin 5, and in addition to this, for example, a flip-chip mounting method such as a ball bonding method Thus, it is possible to surface-mount the semiconductor element 2 on the substrate 1.

  The optical member 3 can be a color filter, a dichroic filter, an on-chip lens, or the like when the semiconductor device is, for example, a color imaging device or a color image sensor.

  Alternatively, as an element that can be attached on the back surface 31 of the semiconductor element 2, in addition to the optical member 3, for example, as shown in FIGS. 2 and 3, as a second element 6 different from the semiconductor element 2. It is also possible to provide one or more passive elements, active elements, or dedicated wiring chips (not shown) each having only wiring or a wiring structure for each semiconductor element 2. FIG. 3 is an enlarged view of a portion A shown in FIG.

  Note that the second element 6 and the optical member 3 attached on the back surface 31 of the semiconductor element 2 can also be thinned by a grinding process or smoothed by a polishing process.

  Next, a method for manufacturing this semiconductor device will be described. 4 to 8 show the main flow of the manufacturing process.

  First, as shown in FIG. 4, a substrate 1 having an alignment mark 4 provided on the surface for aligning each chip is prepared.

  Then, as shown in FIG. 5, alignment is performed on the surface of the substrate 1 using the alignment mark 4, and the parallelism of the surface of the semiconductor element 2 with respect to the surface of the substrate 1 is kept within a predetermined accuracy. As shown in FIG. 6, each semiconductor element 2 is mounted or adhered (in the present embodiment, the bonding resin 5 is used for adhesion as described above). Is).

  At this time, even if the overall area of the substrate 1 is large, the surface area of each individual semiconductor element 2 is small, and alignment control can be performed independently for each individual semiconductor element 2. Thus, accurate alignment of both the parallelism and the position can be easily performed for each individual semiconductor element 2 having the small area.

  Subsequently, all the semiconductor elements 2 mounted or adhered are sliced as shown in FIG. 7 from the back surface by, for example, grinding, polishing, or etching by mechanical grinding, CMP, wet etching, or the like. Turn into.

  At this time, the individual semiconductor elements 2 have already been mounted or adhered to each other with the exact parallelism and the exact height in the steps shown in FIG. 5 and FIG. The precondition that the element 2 can be ground or polished to a uniform thickness and smoothness is in place. As a result, it is possible to easily manufacture a semiconductor device of good quality in which errors and variations in the thickness, parallelism, and operating characteristics of the semiconductor element 2 are suppressed or eliminated with a high yield.

  For example, as shown in FIG. 8, the second element 6 is mounted on the back surface 31 of each semiconductor element 2 thinned in this way. Alternatively, instead of the second element 6, an optical member 3 such as a color filter or an on-chip lens, or the wiring board 1 is attached or mounted.

  The alignment of the second element 6 and the optical member 3 with respect to the substrate 1 at this time can also be accurately and easily performed using the alignment mark 4 provided on the substrate 1. That is, the alignment mark 4 is provided between the semiconductor elements 2 arranged on the surface of the substrate 1 (a gap portion for mounting each semiconductor element 2), and the alignment mark 4 is an individual semiconductor element. 2 is not obstructed by the mounting or sticking of 2 (the alignment mark 4 should not be covered by the semiconductor element 2 because it is originally provided for alignment of the semiconductor element 2), and is bonded. Since the resin 5 is transparent, after the individual semiconductor elements 2 are mounted or adhered, the second element 6 or the like is mounted or adhered to the back surface 31 of the individual semiconductor element 2. Even in the alignment process, the alignment mark 4 can be used optically.

  As described above, according to the semiconductor device and the manufacturing method thereof according to the present embodiment, a semiconductor device with good quality in which errors and variations in the thickness, mounting orientation, and operation characteristics of the semiconductor element 2 are suppressed, A simple manufacturing process can achieve a high yield. Although not shown, after the semiconductor elements 2 are mounted or bonded as described above, the individual semiconductor elements are separated by cutting the substrate 1 or the like, and the respective semiconductor elements 2 are individually independent. Needless to say, it may be a semiconductor device.

Comparative example

  9 to 13 show a flow of main manufacturing steps of a semiconductor device in which a semiconductor substrate 901 is thinned by a general CMP method or the like conventionally performed as a comparative example.

  First, an element structure 921 such as a CCD or an image sensor is formed on a semiconductor substrate 901 such as a general Si substrate as shown in FIG.

  Subsequently, as shown in FIG. 10, the surface of the semiconductor substrate 901 on which the element structure 921 is formed is arranged so as to face the surface of the substrate 1, and as shown in FIG. to paste together.

  Then, in a state where the semiconductor substrate 901 is bonded to the substrate 1, the semiconductor substrate 901 is thinned from the back side as shown in FIG.

  On the rear surface 931 of the thinned semiconductor substrate 901, for example, as shown in FIG. 13, the second element 6 or the optical member 3 or wiring is mounted, attached, or attached.

  In the semiconductor device of this comparative example and the manufacturing method thereof, it is required to perform bonding while controlling the relative posture between the substrate 1 and the semiconductor substrate 901 so that the parallelism between the substrate 1 and the semiconductor substrate 901 has a predetermined accuracy. However, since both the substrate 1 and the semiconductor substrate 901 have substantially the same large area (obviously a considerably large area as compared with individual semiconductor elements), it is desirable to maintain a good parallelism over such a large area. However, there is a tendency that significant errors that cannot be ignored are likely to occur in the parallelism between the substrate 1 and the semiconductor substrate 901 and the height of the back surface 31 of the semiconductor substrate 901 from the surface of the substrate 1. .

  Therefore, in the thinning process performed after the bonding process, a part of the entire surface of the semiconductor substrate 901 that is excessively thinned due to partial shaving or a part that is too thick may be generated. As a result, the element structure 921 may be partly shaved and an element defect or the like may occur.

  Further, if an element having a substantial defect is present in advance in one semiconductor substrate 901, only that element cannot be removed from one semiconductor substrate 901. However, there is also a disadvantage that it becomes impossible to use, which is extremely wasteful and causes an increase in manufacturing cost.

  Further, when the second element 6 or the optical member 3 or the like is actually measured or attached to the back surface 931 of the semiconductor substrate 901, the alignment mark 4 is not present on the back surface 931 of the semiconductor substrate 901 (or the semiconductor before thinning). (Even if an alignment mark is provided on the back side of the substrate, it will be ground away from the back side and will be lost.) In other words, the alignment must be performed by another complicated method without an alignment mark, and the process becomes complicated.

  However, according to the semiconductor device and the manufacturing method thereof according to the present embodiment, since each individual semiconductor element 2 is independently attached or mounted on the substrate 1 and then thinned, All such disadvantages are eliminated or avoided, and errors and variations in the thickness, mounting orientation, and operating characteristics of the semiconductor element 2 are suppressed, and a high-quality semiconductor device is realized with a high yield by a simple manufacturing process. It becomes possible.

  The semiconductor device and the manufacturing method thereof according to the present invention can be applied to, for example, a semiconductor imaging device or a semiconductor device provided with an individual semiconductor element 2 including a color filter, an on-chip filter, or a second element 6 (passive element or the like). It is.

It is a figure showing the structure of the principal part of the semiconductor device which concerns on one embodiment of this invention. It is a figure showing the structure of the principal part of the semiconductor device formed by attaching the 2nd element to the back surface of a semiconductor element. FIG. 3 is an enlarged view of a portion provided with a second element in the semiconductor device shown in FIG. 2. It is a figure showing the main flow of the manufacturing process of the semiconductor device which concerns on one embodiment of this invention. FIG. 5 is a process diagram following FIG. 4. FIG. 6 is a process diagram following FIG. 5. FIG. 7 is a process drawing following FIG. 6. FIG. 8 is a process diagram following FIG. 7. It is a figure for demonstrating the manufacturing process by the general CMP method etc. which were performed conventionally as a comparative example. It is a figure for demonstrating the manufacturing process by the general CMP method etc. which are performed conventionally from FIG. It is a figure for demonstrating the manufacturing process by the general CMP method etc. performed conventionally from FIG. FIG. 12 is a diagram for explaining a conventional manufacturing process by a general CMP method or the like continued from FIG. 11. FIG. 13 is a diagram for explaining a conventional manufacturing process by a general CMP method or the like following FIG. 12.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Board | substrate, 2 ... Semiconductor element, 3 ... Optical member, 4 ... Alignment mark, 5 ... Bonding resin, 6 ... 2nd element, 21 ... Element structure, 31 ... Back surface of semiconductor element

Claims (5)

On the surface of the substrate having an alignment mark on the surface , a plurality of semiconductor elements divided into individual chips are formed using a transparent adhesive, and the surface on which the element structure as the semiconductor element is formed is the surface of the substrate. and Chakusu Ru step bonded to face to the surface,
A step of slicing all of the semiconductor elements from the back surface opposite to the surface on which the device structure is formed ,
In the step of attaching the semiconductor element, while performing alignment on the surface of the substrate of the plurality of semiconductor elements while optically grasping the alignment mark through the transparent adhesive, Paste the semiconductor element,
After the semiconductor element is thinned, an optical member is formed or attached on the surface on which the semiconductor element is thinned while optically grasping the alignment mark.
Method of manufacturing a semi-conductor device. The alignment of the plurality of semiconductor elements is performed independently for each element.
A method for manufacturing a semiconductor device according to claim 1. The thinning is performed using at least one of a mechanical grinding method, a CMP method, and an etching method.
A method for manufacturing a semiconductor device according to claim 1 . A color filter is formed or attached as the optical member.
A method for manufacturing a semiconductor device according to claim 1 . An on-chip lens is formed or attached as the optical member.
A method for manufacturing a semiconductor device according to claim 1 .

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