JP4421394B2 - Silver alloy material, circuit board, electronic device, and method of manufacturing circuit board - Google Patents

Description

  The present invention relates to a silver alloy material, and in particular, a silver alloy material constituting a wiring and / or an electrode on a circuit board using an insulating substrate, and a circuit board and a circuit board in which the wiring and / or electrode is formed of the material. And a display device using a circuit board, a liquid crystal display device, an image input device, and other electronic devices.

  A liquid crystal display device, which is one of electronic devices, includes a TFT array substrate having a number of TFTs (thin film transistors), wirings, and the like as a circuit substrate.

  Conventionally, a TFT array substrate has been manufactured by a series of processes as shown in Non-Patent Document 1 (Flat Panel Display 1999 (page 129 of Nikkei Microdevices, Nikkei BP)). About 5 times of photolithography were required.

  In such a conventional TFT array substrate manufacturing method using photolithography, many vacuum apparatuses such as a film forming apparatus used in each film forming process and a processing apparatus such as a dry etching apparatus are used. Therefore, enormous equipment costs are required to manufacture a TFT array substrate that has been demanded for further enlargement in recent years.

  In order to solve such a problem, a technique for forming a wiring or the like by an inkjet method has been proposed. In this technique, for example, as disclosed in Patent Document 1 (Japanese Patent Laid-Open No. 11-204529), an affinity region and a non-affinity region for a wiring forming material are formed on a substrate on which a wiring is formed, and the affinity region is formed. Wiring is formed by dropping droplets of wiring material on the ink jet method.

  Similarly, in Patent Document 2 (Japanese Patent Application Laid-Open No. 2000-353594), in the wiring formation technique based on the inkjet method, banks are formed on both sides of the wiring formation region in order to suppress the protrusion of the wiring material from the wiring formation region. It is disclosed that the upper part of the bank is made non-lyophilic and the wiring formation region is made lyophilic.

  As shown in Non-Patent Document 2 (pages 67-78 of the Nikkei Electronics June 17, 2002 issue (Nikkei BP)) as a material for forming the wiring by the inkjet method as described above, A fluid metal-containing material (ink) in which silver or gold nanoparticles are dispersed in a solvent is used. These are dropped on a predetermined location on the substrate and then subjected to a treatment such as firing, and the contained metal appears and becomes a wiring or the like. As metals that can be processed into a fluid metal-containing material, palladium, platinum, and the like are listed in addition to silver and gold. However, considering the price of raw materials, only silver is realistic in this.

  For these reasons, it is considered to use silver that can be used in the ink jet method as a material for forming wiring on the TFT array substrate and as a wiring material for forming other circuit boards.

Also, aluminum has often been used as a wiring material and light reflecting film material on a circuit board such as a conventional TFT array substrate, but silver has a low electrical resistivity and a high reflectance in the visible light region. It is known that it has properties superior to aluminum in that respect.
Japanese Patent Laid-Open No. 11-204529 (published July 30, 1999) JP 2000-353594 A (published on December 19, 2000) Flat Panel Display 1999 (Nikkei Microdevices, Nikkei Business Publications, Inc.), page 129, 1998 Nikkei Electronics, June 17, 2002 (Nikkei Business Publications, Inc.), pages 67-78, 2002

  As described above, silver is a material that attracts attention as a wiring material on a circuit board, but its use range is limited due to its nature. For example, when silver is formed on a glass substrate by vapor deposition, sputtering, or the like, it has a remarkable lack of heat resistance, such as grain growth and surface turbidity even when firing at about 250 ° C. Furthermore, the adhesion to the glass substrate is also weak.

  In particular, in the manufacture of a TFT array substrate, dry etching is frequently used for etching an insulating film or the like. Resistance to this environment (plasma resistance) is remarkably low in the case of silver. Therefore, silver is a material that cannot be used as it is as a material constituting the wiring on the TFT array substrate.

  Further, conventional silver has a low heat resistance, and there is a problem that the reflectance is significantly lowered even by baking at 200 ° C., for example. For this reason, conventional silver cannot be used when heat resistance is required during the manufacturing process. For example, in a reflective liquid crystal display device, it has been difficult to use it as a material for a light reflecting film provided on a TFT array substrate.

  The present invention has been made in view of the above problems, and its purpose is to provide a material having heat resistance, strong adhesion to a glass substrate, and having high plasma resistance and visible light reflectance. An object of the present invention is to provide a silver alloy material that can be realized, and to provide a circuit board and an electronic device using the silver alloy material.

  In order to solve the above-mentioned problems, the inventors of the present application have made intensive studies, and as a result, when wiring or electrodes are formed on an insulating substrate using fine particles of an alloy containing silver as a main component and indium added thereto as a material. Compared to the case where wiring or electrodes are formed on an insulating substrate using silver fine particles as a material, the adhesion of the wiring and electrodes to the insulating substrate is improved and the heat resistance and plasma resistance of the wiring and electrodes are improved. I found it to improve. Moreover, it discovered that the same effect was acquired even if it was an alloy which added not only said indium but tin, zinc, lead, bismuth, and gallium to silver.

  Further, it has been found that if an appropriate amount of indium is added to silver to form a film, a silver alloy film having a high visible light reflectivity can be obtained even when firing at 200 ° C. or 300 ° C. Such a silver alloy film has a higher overall reflectance as compared with the case of using a conventional aluminum light reflecting film, and thus, for example, when used for a light reflecting electrode of a reflective liquid crystal display device, it is brighter. It was found that display is possible.

  That is, the silver alloy material of the present invention is a material constituting wirings and / or electrodes formed on an insulating substrate, and is mainly composed of silver and selected from tin, zinc, lead, bismuth, indium and gallium. It is characterized by containing one or more kinds of elements.

  According to the material having the above structure, it is possible to form a wiring and / or an electrode having low electrical resistance and high process resistance such as heat resistance, adhesion to a glass substrate, and plasma resistance.

  The element may contain at least zinc.

  In this case, if wiring, electrodes, etc. are formed of a silver alloy material mainly containing silver and containing at least zinc, heat resistance, adhesion, chlorine gas, without greatly losing low electrical resistance, Alternatively, the plasma resistance can be improved under the condition where oxygen gas is introduced.

  The element may contain at least indium.

  In this case, if wiring, electrodes, etc. are formed of a silver alloy material mainly composed of silver and containing at least indium, heat resistance, adhesion, The plasma property can be greatly improved.

  In addition, when an appropriate amount of indium is added to silver to form a film, a silver alloy film that retains a high visible light reflectance even at baking at 200 ° C. or 300 ° C. can be obtained. Such a silver alloy film has a higher overall reflectance as compared with the case of using a conventional aluminum light reflecting film, and thus, for example, when used for a light reflecting electrode of a reflective liquid crystal display device, it is brighter. Display is possible.

  Further, the alloy material of silver and indium can be covered in a wide range in terms of heat resistance, adhesion, plasma resistance, high visible light reflectance, and the like by adjusting the content of indium with respect to silver.

  The indium content (indium / silver (wt%)) is preferably 0.5 wt% to 28 wt%. If the indium content is lowered, the plasma resistance is lowered, but the resistance can be reduced. However, if the indium content is less than 0.5% by weight, there arises a problem that the plasma resistance is lowered and the surface smoothness is extremely lowered. Further, if the indium content is increased, the resistance value is increased, but the plasma resistance is increased. However, if the indium content exceeds 28% by weight, there arises a problem that solid solution formation with silver cannot be performed. In this way, by simply adjusting the content of indium with respect to silver, it is possible to easily change the characteristics even if the required characteristics are different, such as wiring parts and terminal parts on the circuit board. It becomes possible.

  The composition range of the silver and the element may be set so that the electrical resistivity as a silver alloy is 10 μΩcm or less.

  In this case, in the conventional aluminum or aluminum alloy wiring technology, the electrical resistivity is in the range of about 4 μΩcm to 10 μΩcm. Therefore, such a silver alloy material of the present invention can obtain a predetermined electrical characteristic and can be introduced without changing the conventional wiring design.

  For the above silver alloy material, further, aluminum, copper, nickel, gold, platinum, palladium, cobalt, rhodium, iridium, ruthenium, osmium, titanium, zirconium, hafnium, vanadium, niobium, tantalum, chromium, molybdenum, tungsten, At least one type of element selected from neodymium may be included.

  Each of the above elements is useful as an auxiliary material for further improving heat resistance, adhesion, and plasma resistance with respect to the silver alloy material, so that at least one of these elements should be included. As a result, the heat resistance, adhesion, and plasma resistance can be further improved.

  The circuit board of the present invention is characterized by having a wiring and / or an electrode composed of the silver alloy material having the above-described configuration.

  Since the above circuit board can be configured to have low electrical resistance wiring, it is possible to manufacture a large circuit board equivalent to the case of conventional aluminum and aluminum alloy wiring technology.

  The electronic device of the present invention is characterized by using the above circuit board.

  Examples of the electronic device include a display device and a liquid crystal display device.

  In the case of a display device, since a large circuit board is particularly widely used, the circuit board having a low electrical resistance according to the present invention is particularly suitable.

  Further, in the manufacture of a TFT array substrate which is a circuit substrate constituting a liquid crystal display device, a dry etching method is often used. Therefore, as materials for wiring and / or electrodes, heat resistance, adhesion, plasma resistance Is required. For this reason, it is very useful for a liquid crystal display device to use a circuit board on which wirings and electrodes are formed using the silver alloy material of the present invention.

  The sputtering target of the present invention is characterized by comprising a silver alloy material mainly containing silver and containing at least one element selected from tin, zinc, lead, bismuth, indium, and gallium.

  If such a silver alloy material is used as a sputtering target, wiring with high process resistance can be obtained, and the circuit board, display device, etc. of the present invention can be manufactured with high productivity.

  The evaporation source of the present invention is characterized by comprising a silver alloy material mainly containing silver and containing at least one element selected from tin, zinc, lead, bismuth, indium, and gallium.

  If such a silver alloy material is used as an evaporation source, wiring with high process resistance can be obtained, and the circuit board, display device, etc. of the present invention can be manufactured with high productivity.

  The flowable metal-containing material of the present invention is characterized by containing a silver alloy material mainly containing silver and containing at least one element selected from tin, zinc, lead, bismuth, indium, and gallium. .

  By using the fluid metal-containing material having such a configuration, a wiring with high process resistance can be obtained, and the circuit board, the display device, and the like of the present invention can be formed or manufactured with high productivity.

  In addition, since the silver alloy of the present invention can be prepared in a primary solid solution forming region mainly composed of silver, in that case, it can be easily fluidized (inked) like silver, and a wiring forming process using an inkjet head Suitable as a material for.

  The silver alloy material of the present invention is a material constituting a wiring and / or an electrode or a light reflecting film formed on an insulating substrate, and is characterized by containing silver as a main component and at least indium.

  The indium content with respect to silver is preferably 0.5% by weight or less.

  In this case, if the indium content is less than 0.5% by weight, the plasma resistance is lowered and the surface smoothness is extremely lowered. However, in the silver alloy material, the indium content is 0%. In the case of 0.5 wt% or less, even after baking at 200 ° C., a visible light reflectance higher than that of aluminum is obtained in almost the entire visible light region.

  Further, when the content ratio of indium with respect to silver is 0.5% by weight or less, it is possible to form a low electrical resistance wiring that cannot be achieved by a conventional aluminum wiring. When it is particularly desired to reduce the electrical resistance of the wiring, for example, when used in a liquid crystal display device used for a liquid crystal TV or the like, it is preferable to make a circuit board using the silver alloy material of the present invention.

  Moreover, it is preferable that content of indium with respect to silver is 0.2 weight% or less.

  In this case, when the indium content is 0.2% by weight or less in the silver alloy material, a visible light reflectance higher than that of aluminum is obtained in almost the entire visible light region even after baking at 300 ° C.

  For this reason, it can be used for a light reflective electrode (electrode structure that serves as both an electrode and a reflective film), and a brighter display is possible than in the case of conventional aluminum.

  The circuit board manufacturing method of the present invention is characterized in that wirings and / or electrodes are formed on an insulating substrate using the sputtering target or the evaporation source.

  In such a manufacturing method, since wiring with high process resistance can be formed on the circuit board, the circuit board can be manufactured with high productivity.

  Wiring and / or electrodes may be formed on the insulating substrate using the fluid metal-containing material.

  In the manufacturing method using such a fluid metal-containing material, since a wiring having high process resistance can be formed on the circuit board, the circuit board can be manufactured with high productivity.

  Here, specific examples of the circuit board include a TFT array substrate used in a liquid crystal display device and the like, an electrode substrate used in a PDP (plasma display panel), a printed wiring board, a flexible wiring board, and the like.

  Specific examples of display devices and image input devices manufactured using these circuit boards include displays such as liquid crystal display devices, PDPs (plasma display panels), organic EL (electroluminescence) panels, and inorganic EL panels. A two-dimensional image input device represented by a device, a fingerprint sensor, an X-ray imaging device, and the like.

  The insulating substrate used in carrying out the present invention is an insulating substrate such as an alkali glass substrate, a non-alkali glass substrate, or a plastic substrate. For example, a metal substrate having an insulating layer coated on the surface side on which wiring or the like is formed And a substrate used in the same application as the insulating substrate.

  As described above, the silver alloy material of the present invention is composed of silver as a main component and includes one or more elements selected from tin, zinc, lead, bismuth, indium, and gallium, and thus has low electrical resistance. In addition, it is possible to form wiring and / or electrodes having high process resistance such as heat resistance, adhesion to a glass substrate, and plasma resistance.

  Since the circuit board of the present invention has a wiring and / or electrodes composed of the silver alloy material having the above-described structure, it is possible to manufacture a large circuit board equivalent to the case of conventional aluminum and aluminum alloy wiring technology. There is an effect.

[Embodiment 1]
The embodiment of the present invention will be described as follows.

  In this embodiment, first, the silver alloy material of the present invention will be described, and then a TFT array substrate and a liquid crystal display device using the silver alloy material will be described.

  The silver alloy material of the present invention is a material constituting wirings and / or electrodes formed on an insulating substrate such as a glass substrate, and is mainly composed of silver, at least tin, zinc, lead, bismuth, indium, It is characterized by containing one or more elements selected from gallium.

  By using the silver alloy material having the above structure, it is possible to form wirings and / or electrodes having low electrical resistance and high process resistance such as heat resistance, adhesion to a glass substrate, and plasma resistance.

  Hereinafter, the above-described advantages of the silver alloy material of the present invention will be demonstrated with reference to Examples 1 to 9 and Comparative Examples 1 and 2.

  The silver alloy material of the present invention was prepared by the following procedure, and formed on an insulating substrate to evaluate process resistance.

  The production of the silver alloy material of the present invention and the film formation of the silver alloy material on the insulating substrate were performed by an evaporation method using an electron beam evaporation machine (Japan Vacuum Technology Co., Ltd., high vacuum evaporation apparatus EBX-10D).

  First, silver, tin, zinc, lead, bismuth, indium, gallium lump or granular raw materials having a purity of 99.9% or more were mixed at a predetermined weight ratio as an evaporation source.

Next, the mixed raw materials were put into a crucible made of molybdenum, and melted in a vacuum better than 1 × 10 ⁻⁵ Torr to be alloyed.

  Finally, after confirming complete dissolution, a film was formed on an alkali-free glass substrate. In addition, the glass substrate temperature at the time of film-forming was set to 100 degreeC. The alloy films formed on the glass substrate all had a thickness of about 0.2 μm.

  In the present embodiment, such a method is used for forming an alloy and forming a film, but the present invention is not necessarily limited thereto. A sputtering method using a solid solution or a sintered body or other target may be used, or a coating method of a fluid liquid material containing a metal element at an appropriate concentration, or any other method may be used.

  The composition of the silver alloy film thus prepared was confirmed using an Auger electron spectrometer (Parking Elmer, SAM670). The composition distribution in the film thickness direction was uniform and uniform, but the overall composition ratio of the prepared silver alloy film was somewhat different from the mixing ratio of the raw materials. However, the deviation is such that it does not affect the object, means, effect, etc. of the present invention at all. The prepared silver alloy film is merely a representative example of the present invention.

  The alloy film made of silver and indium was quantitatively analyzed by ICP emission analysis in order to know a more accurate composition. The method is as follows.

  First, as a sample, a silver alloy film formed on an alkali-free glass substrate was peeled off with a metal spoon. Before peeling, the thickness of the silver alloy film on the glass substrate was about 0.2 μm, and the amount of the obtained sample was about 10 mg for each example. Subsequently, a solution obtained by dissolving this sample in 50 mL of 3N nitric acid was used as a measurement solution for ICP emission analysis. As a measuring device, SPS-1700HVR manufactured by SII Nano Technology was used, and argon was used as a plasma gas.

  In the present embodiment, adhesion, heat resistance, electrical resistivity, and plasma resistance were evaluated as process resistance of the silver alloy film. These items are the most basic items for wiring on the circuit board. Each item is described in detail below.

  The adhesion was examined by directly forming a film on an alkali-free glass substrate.

  When it is intended to be used for a circuit board as in the present invention, the adhesion to the glass substrate is a useful index.

  Here, the adhesion test was performed after firing at 200 ° C. for 1 hour in a nitrogen atmosphere. After firing, a method was used in which an adhesive tape was applied to the cut film surface, and the adhesive tape was peeled off so as to peel off the film surface. Judgment was judged to be good only when there was some peeling on the film surface and only when no peeling was seen.

  The heat resistance was evaluated by observing the film surface after baking at 300 ° C. for 1 hour in a nitrogen atmosphere with an electron microscope (Hitachi, S-4100). Judgment is good when there is no unevenness on the film surface, it is judged as good when a protrusion with a height less than the film thickness is partially formed on the film surface, and other cases are judged as defective. .

  The electrical resistivity was evaluated on the substrate after baking at 200 ° C. for 1 hour in a nitrogen atmosphere. The electrical resistivity was obtained from the sheet resistance value obtained by the four-probe method with a measuring instrument (Mitsubishi Chemical Corporation, Loresta-GP) and the film thickness measured separately.

  Evaluation of plasma resistance was performed using a dry etching apparatus (RIE, reactive ion etching method). Specifically, after carrying the substrate into the process chamber, discharge was performed while introducing various etching gases.

The evaluation conditions were three conditions for introducing chlorine (Cl ² ) gas, carbon tetrafluoride (CF ⁴ ) gas and oxygen (O ² ) gas mixed gas, and oxygen (O ² ) gas.

Hereinafter, these three conditions are referred to as Cl ² condition, CF ⁴ + O ² condition, and O ² condition, respectively. The discharge times were 180 seconds, 60 seconds, and 60 seconds, respectively. It should be noted that this discharge time is intentionally set to a strict condition in consideration of the five-mask process described later.

  In order to determine the plasma resistance, the surface resistance of the film was examined. The sheet resistance value was measured in the same manner as the electrical resistivity. As judgment criteria, the case where the sheet resistance value was 2.5 times or less, more than 2.5 times and 7 times or less than that before the treatment was judged as good and slightly good, and the others were judged as bad.

  These evaluation items are examples set only to show the properties of the silver alloy material of the present invention. In order to make the difference clear, each condition is intentionally set to be stricter than the assumed use condition. In carrying out the present invention, it is not always necessary to evaluate these items, and details of observation means, determination criteria, conditions, and the like are merely examples. The scope of application of the present invention is not limited by these evaluation items and individual conditions.

  Examples of evaluation results for the silver alloy material of the present invention are shown in Tables 1 and 2.

    In each table, Comparative Example 1 is an example of a metal film made of simple silver, and Comparative Example 2 is an example of a silver alloy film in which 2% by weight of aluminum is mixed in an evaporation source. In Examples 1 to 9, 10% by weight of tin, 10% by weight of zinc, 1% by weight of indium, 3% by weight of indium, 5% by weight of indium and 10% by weight of silver as an evaporation source Indium, 0.1% by weight of indium, 0.3% by weight of indium, and 20% by weight of indium are examples of silver alloy films, which are examples of the present invention. Each raw material should contain a very small amount of impurities, but since the amount does not affect the results, the description of the impurities is omitted.

  First, ICP emission analysis values, adhesion strength and heat resistance evaluation results are shown in Table 1 below.

  As a result of the quantitative analysis by the ICP emission analysis method described above, in each of Examples 3 to 8, the content of indium with respect to silver is 0.5 wt%, 1.6 wt%, and 3.4 wt%. %, 9.3 wt%, 0.05 wt%, and 0.2 wt%.

  As shown in Table 1, the film made of silver alone as Comparative Example 1 has poor adhesion and heat resistance. Silver also has a remarkable lack of heat resistance, such as clear surface turbidity, even in a baking test at 250 ° C. for 1 hour, which is gentler than this. Here are some of the reasons why it has traditionally been difficult to use silver as wiring.

  On the other hand, as shown in Examples 1 to 9 of the present invention, the silver alloy film in which tin, zinc, and indium are added to silver shows an improvement in adhesion to the glass substrate as a whole. Regarding the addition of indium, as in Example 3 and the like, when the content of indium with respect to silver is about 0.5% by weight or more, a clear improvement in adhesion is observed.

  Regarding heat resistance, Examples 1 to 9 of the present invention show an overall improvement in heat resistance. In particular, in Examples 7 and 8, although the indium content with respect to silver is an analytical value of 0.05% by weight and 0.2% by weight, respectively, the heat resistance is improved. . From this, it can be said that the addition of indium is very effective in improving heat resistance.

  The reason why the adhesion is improved is that the elements such as tin, zinc, and indium constituting the silver alloy of the present invention are diffused in a very small amount to the glass substrate and the interface disappears, so that the adhesion energy is close to the bulk cohesive energy. It is thought that it became value. This idea is supported by the fact that, in the silver alloy film of the present invention, the adhesive strength was greater in the state of being fired at 200 ° C. for 1 hour than in the state of being formed at a substrate temperature of 100 ° C. That is, the present invention is based on the principle that adhesion is obtained by diffusion of tin, zinc, indium and the like in the silver alloy film.

  Note that the scope of the present invention is not limited to obtaining adhesion by a method of baking after film formation as in this embodiment, and the adhesion can be obtained by sufficiently raising the substrate temperature during film formation. Including cases.

  On the other hand, the reason why the heat resistance is improved is that tin, zinc, and indium are contained in the film, so that a change occurs in the lattice constant of crystal and the size of crystal grains, and the movement of silver atoms in the film is suppressed, It is thought that grain growth is less likely to occur.

  Here, in the silver alloy material of this example, it is also important that the composition of the obtained film is set so as to enter a region where a mixed solid element dissolves in a silver crystal to form a primary solid solution (solid solution). . If it is set in the region where such a primary solid solution is made, even if the film is baked, an intermediate solid solution having a crystal structure different from that of silver crystals and intermetallic compounds are difficult to precipitate, and a new crystal on the film surface can be obtained. Grain growth is difficult to occur. Therefore, the surface property does not change even when baked, and as a result, the heat resistance is increased.

  The composition range for producing such a primary solid solution depends on the environmental temperature, but in the case of tin, zinc and indium, the respective contents are less than 11 to 14% by weight and less than 25 to 39% by weight with respect to silver. 27 to 28% by weight or less.

  Thus, from the evaluation results of Table 1, the silver alloy material of the present invention has improved heat resistance compared to silver, and particularly in the case of containing 0.5% by weight or more of indium in the case of an alloy with indium. Adhesion was improved.

  In addition, the silver alloy material of the present invention may be an alloy of gallium, which is the same group as indium in the periodic table, lead of the same group as tin, and bismuth which is similar in nature to lead, and has an excellent adhesion force. And heat resistance.

  Next, the evaluation results obtained by examining the electrical resistivity and the plasma resistance are shown in Table 2 below.

  From the evaluation results of Table 2, it was found that the electrical resistivity was about 7 μΩcm or less, except for Examples 6 and 9, which was the same as or lower than that of conventional aluminum alloys. Thereby, it turns out that the silver alloy material of this invention is suitable as materials, such as wiring with low electrical resistance. If the electrical resistivity is approximately 10 μΩcm or less, it can be practically used as a material for a large circuit board for a display device.

  Particularly in Examples 7, 8, and 3, the content ratio of indium with respect to silver is 0.5% by weight or less, but the respective electric resistances are very low values of 2.2 μΩcm, 2.3 μΩcm, and 2.7 μΩcm. is there. Since aluminum has an electric resistivity of 2.7 μΩcm even in a bulk state, it does not become 2.7 μΩcm or less in a thin film, and these are low electric resistances that cannot be achieved with aluminum.

  Therefore, among the silver alloy materials of the present invention, particularly when the content ratio of indium with respect to silver is 0.5% by weight or less, it is possible to form a low electrical resistance wiring that cannot be achieved by a conventional aluminum wiring. When it is particularly desired to reduce the electrical resistance of the wiring, for example, in a liquid crystal display device used for a liquid crystal TV or the like, a circuit board may be formed using the silver alloy material of the present invention.

  However, since the indium content is low, the plasma resistance is not sufficient, and it is generally necessary to stack another metal film. The adhesion to the substrate is not sufficient because the content of indium is low, so that a base treatment or the like may be necessary.

  The plasma resistance is improved in Examples 1 to 6 and 9 of the present invention. In particular, in the case of indium, an improvement in plasma resistance was observed when it contained approximately 0.5% by weight or more. Strictly speaking, however, some alloy materials may be defective depending on the plasma conditions.

For silver single Comparative Example 1, but if made of silver and aluminum of Comparative Example 2 it is all bad, Example somewhat good 1, with O ² conditions, good in Cl ² conditions in Example 2, O ² Slightly better under conditions. Particularly useful as the silver alloy is the case of Examples 3 to 6, and 9 characterized by containing indium. Under Cl ² conditions, the effect of improving the plasma resistance is great, such as being all good. Example 5 with a relatively high indium content is very useful because it has both low process resistance and low electrical resistance because it has a low electrical resistivity of 6.1 μΩcm, despite being good under all plasma resistance conditions. I found out. On the other hand, in Examples 6 and 9, the electrical resistivity was relatively high in the table, but the plasma resistance was further improved as compared with Example 5.

  Thus, the plasma resistance is improved because the vapor pressure of a compound of tin, zinc, indium, etc. in the silver alloy and chlorine, fluorine, oxygen, etc., supplied from the gas introduced into the chamber is silver. This is probably because these compounds served as a protective layer that delayed the erosion of the film surface.

  On the other hand, in the case of containing indium at a ratio of 0.5 wt% or less with respect to silver as in Examples 7 and 8, all the plasma resistance was poor.

  As described above, the silver alloy material of the present invention is a material having both low electrical resistance and plasma resistance, particularly when indium is contained in a proportion of 0.5% by weight or more. The wiring often requires plasma resistance, and the present invention is a particularly useful material. However, the constituent elements and ratios of tin, zinc, indium and the like of the silver alloy material of the present invention do not necessarily satisfy all the characteristics in the table, and satisfy the required resistance depending on the case. You can choose as you like.

  Further, the silver alloy material of the present invention has an electrical resistivity of 2.7 μΩcm or less and a very low electrical resistance, particularly when indium is contained at a ratio of 0.5 wt% or less. Therefore, it is suitable for use as a circuit board for a liquid crystal display device used for a liquid crystal TV.

  In addition, the silver alloy material of the present invention may be an alloy of gallium, which is the same group as indium in the periodic table, lead of the same group as tin, and bismuth, which is similar in nature to lead, and has excellent properties as well. Show.

  In summary, the silver alloy material of the present invention was found to be a very useful material that has adhesion, heat resistance, low electrical resistance, and plasma resistance as process resistance.

  In addition, these evaluation results are the results on the conditions set in order to show the property of the silver alloy material of this invention to the last. In order to clarify the difference between the materials, the individual conditions are set to stricter conditions intentionally than the assumed use conditions. The scope of application of the present invention is not limited by the results shown in Tables 1 and 2.

  The silver alloy material of the present invention further includes aluminum, copper, nickel, gold, platinum, palladium, cobalt, rhodium, iridium, ruthenium, osmium, titanium, zirconium, hafnium, vanadium, niobium, tantalum, chromium, molybdenum, tungsten, It may be characterized by containing an element selected from neodymium. By adding these elements, the heat resistance, plasma resistance, and adhesion can be further improved, and an optimal alloy material can be obtained.

  When the silver alloy material of the present invention is used as a constituent material for wiring of a TFT array substrate, a desirable material is a silver alloy material mainly composed of silver and containing zinc. Thus, when zinc is added to silver, the effects of improving heat resistance, adhesion and plasma resistance are obtained, and the material is suitable for the manufacturing process of the TFT array substrate.

  The silver alloy material of the present invention may contain other elements intentionally added in addition to silver and zinc. The present invention is based on the fact that adding zinc to silver is effective in improving heat resistance, adhesion and plasma resistance. Therefore, even when other elements other than these are included, a silver alloy material having a configuration capable of obtaining the effect of addition of zinc is included in the scope of the present invention.

  When the silver alloy material of the present invention is used as a constituent material for the wiring of the TFT array substrate, the most desirable material is a silver alloy material mainly composed of silver and containing indium. Thus, when indium is added to silver, when the ratio of indium to silver is 0.5% by weight or more, the effect of significantly improving plasma resistance can be obtained characteristically. The material is suitable for the process.

  When the silver alloy material of the present invention is used as a constituent material for wiring of a TFT array substrate, the most desirable material for low electrical resistance is a material containing indium at a ratio of 0.5% by weight or less, particularly with respect to silver. . At this time, the electrical resistivity is 2.7 μΩcm or less, and it is possible to form a low electrical resistance wiring that cannot be achieved by a conventional aluminum wiring. When it is particularly desired to reduce the electrical resistance of the wiring, for example, in a liquid crystal display device used for a liquid crystal TV or the like, a circuit board may be formed using the silver alloy material of the present invention.

  As a further excellent characteristic of the silver alloy material of the present invention, when it contains indium moderately, it has a high visible light reflectance, and maintains this even after firing at 200 ° C. or 300 ° C. This will be described below.

  As a measurement sample, a comparative example shown in Tables 1 and 2, a silver or silver alloy film equivalent to that in Example, and an aluminum film prepared in the same procedure as Comparative Example 3 for reference were used. All of these were formed on an alkali-free glass substrate, the glass substrate temperature at the time of film formation was set to 100 ° C., and the film thickness was set to about 0.2 μm. The visible light reflectance was measured using a spectrophotometer (Hitachi Instrument Service, U-4100) over the entire visible light region from 380 nm to 780 nm.

  The visible light reflectance of the silver alloy film of the present invention will be described with reference to FIGS. In these figures, the horizontal axis represents the wavelength of light applied to the metal film sample, and the vertical axis represents visible light reflectance as the reflectance of the light. Each figure shows the reflectivity after film formation is complete, after baking at 200 ° C. and after baking at 300 ° C., and the change in reflectivity due to baking can also be seen. Note that these firing treatment conditions were such that a clean oven was used for firing for 1 hour in a nitrogen atmosphere.

  The results will be described in detail. First, in the case of Comparative Example 1 (silver) as shown in FIG. 20, the heat resistance is extremely poor as described above. Despite the high reflectivity when the film is formed at 100 ° C., the reflectivity is remarkably lowered after baking at 200 ° C. and 300 ° C. For this reason, it cannot withstand a manufacturing process involving a baking process at about 200 ° C., and it has been difficult to use it as a light reflection film for a reflective liquid crystal display device, for example.

  Next, in Comparative Example 3 (aluminum) as shown in FIG. 21, the light reflectance is almost the same after film formation is complete, after baking at 200 ° C., and after baking at 300 ° C. Aluminum is a material that is often used in the past as a light reflection film application in a reflective liquid crystal display device.

  FIG. 22 shows an example of the silver alloy film of the present invention, which is an example of a silver alloy film containing 0.05% by weight of indium with respect to silver. In this case, unlike the result of silver in FIG. 20, the decrease in reflectance is significantly small even by thermal baking at 200 ° C. and 300 ° C. Furthermore, compared with the case of the aluminum film in FIG. 21, the reflectivity is high in almost all wavelength regions after baking at 200 ° C., and even after baking at 300 ° C., it is totally reflected except for a very narrow region on the short wavelength side. The rate is high. Thereby, it turns out that the silver alloy film of a present Example has a high visible light reflectance, and is excellent as a light reflection film.

  FIG. 23 is also an example of the silver alloy film of the present invention, which is an example of a silver alloy film containing 0.2% by weight of indium with respect to silver. In this case, the result is almost the same as in the case of Example 7 in FIG. Even when the baking is performed at 200 ° C. and 300 ° C., the decrease in reflectance is small, and the visible light reflectance is higher than the aluminum film as a whole, so that it is excellent as a light reflecting film.

  FIG. 24 shows a case where indium is contained at a ratio of 0.5% by weight with respect to silver. By baking at 200 ° C., the reflectance is superior to the aluminum film as a whole except for a small part on the short wavelength side. However, after baking at 300 ° C., the reflectance decreases particularly on the short wavelength side, which is not superior to the aluminum film. As in this example, it is preferable to add an appropriate amount of indium to silver, and if the amount of indium is increased excessively, the reflectivity is lowered.

  FIG. 25 shows a case where indium is contained at a ratio of 1.6% by weight with respect to silver. In this case, since the content of indium is increased, the reflectance is lowered as a whole. Therefore, it cannot be said that it is superior to aluminum.

  In summary, in the present invention, when indium is contained at a ratio of 0.5% by weight or less, the reflectivity is slightly changed even after baking at 200.degree. Reflectance is high over almost the entire visible light region. For this reason, it is suitable for a light reflecting film application.

  In the present invention, when indium is contained at a ratio of 0.2% by weight or less, a decrease in reflectance is suppressed even by baking at 300 ° C., and the reflectance is high over the entire visible light region compared to aluminum. . For this reason, it is suitable for a light reflecting film application particularly when heat resistance is required.

  The silver alloy material of the present invention may contain other elements added intentionally in addition to silver and indium. The present invention is based on the fact that adding indium to silver is most effective in improving plasma resistance. Therefore, even when other elements other than these are included, a silver alloy material having a configuration capable of obtaining the effect of indium addition is included in the scope of the present invention.

  The scope of the present invention extends to a case where the material includes silver, zinc and indium, a case where the material includes silver, tin and indium, and a case where the material includes silver, zinc and tin.

  The silver alloy material of the present invention is suitably used as a material constituting wirings on the TFT array substrate. The TFT array substrate is suitably used for a liquid crystal display device which is one of electronic devices.

  A TFT array substrate and a liquid crystal display device according to the present embodiment will be described below with reference to FIGS.

  The liquid crystal display device according to the present embodiment has the pixel shown in FIG. This figure is a plan view showing a schematic configuration of one pixel in the TFT array substrate 11 of the liquid crystal display device. Further, FIG. 2 shows a cross-sectional view taken along line AA in FIG.

  As shown in FIGS. 1 and 2, in the TFT array substrate 11, gate wirings 13 and source wirings 14 are provided in a matrix on a glass substrate (insulating substrate) 12, and a switching element is located near the intersection between them. A TFT 15 is provided. Further, an auxiliary capacitance line 16 is provided between the adjacent gate lines 13.

  As shown in FIG. 2, on the glass substrate 12, a gate electrode 17 branched from the gate wiring 13 and an auxiliary capacitance wiring 16 are formed, and a gate insulating layer 18 is formed thereon.

  On the gate electrode 17, an amorphous silicon layer 19, an n + -type silicon layer 20, a source electrode 21, and a drain electrode wiring 22 are formed via the gate insulating layer 18 to form a TFT 15. Here, the source electrode 21 is branched from the source line 14.

  The drain electrode wiring 22 extends from the TFT 15 to the contact hole 23, serves as a drain electrode of the TFT 15, serves to electrically connect the TFT 15 and the pixel electrode 24, and is electrically connected between the auxiliary capacitor wiring 16 through the contact hole 23. A role of forming a capacitor. Further, a protective layer 25 covering the TFT 15, an interlayer insulating layer 26 for flattening, and the like, and a pixel electrode 24 for applying a voltage to the liquid crystal and the like are formed on the upper layer.

  Hereinafter, an area on the glass substrate 12 in which such pixels are provided is referred to as a pixel formation area 61 and is shown in FIG. 4 later.

  Further, the liquid crystal display device according to the present embodiment has a terminal portion 28 shown in FIG. The terminal portion 28 is a connection portion for electrically connecting an external circuit substrate, a driving driver IC, and the like to the TFT array substrate 11. FIG. 2 is a plan view showing a schematic configuration of one terminal portion in the TFT array substrate 11 of the liquid crystal display device. Moreover, the BB arrow sectional drawing in the same figure is shown in FIG.3 (b).

  As illustrated in FIG. 3B, the terminal portion 28 is configured such that the terminal wiring 30, the gate insulating layer 18, and the terminal electrode 29 are arranged from the glass substrate 12 side. The terminal electrode 29 is disposed for the purpose of improving the electrical connection with the external circuit board and the driver IC for driving. The terminal wiring 30 is connected to the gate wiring 13, the source wiring 14, and the like in the pixel formation region 61.

  Hereinafter, the region on the glass substrate 12 where the terminal portion 28 is provided is referred to as a terminal portion forming region 62 and is shown in FIG.

  4 is a plan view of the TFT array substrate 11. The pixel formation region 61 and the terminal portion formation region 62 are arranged on the glass substrate 12 as shown in the figure. Each of the pixel formation region 61 and the terminal portion formation region 62 includes a large number of pixels and terminal portions as shown in FIGS.

  In the present embodiment, the TFT array substrate 11 is manufactured by using a pattern forming apparatus that discharges or drops the material of the layer to be formed, such as an inkjet method. As shown in FIG. 5, the pattern forming apparatus includes a mounting table 32 on which a substrate 31 (corresponding to the glass substrate 12) is mounted, and an X-direction drive that moves the inkjet head 33 and the inkjet head 33 in the X direction. A unit 34 and a Y-direction drive unit 35 that moves in the Y-direction are provided. The inkjet head 33 discharges fluid droplets including, for example, a wiring material onto the substrate 31 on the mounting table 32.

  The pattern forming apparatus performs various controls such as an ink supply system 36 that supplies ink to the ink jet head 33, ejection control of the ink jet head 33, and drive control of the X direction drive unit 34 and the Y direction drive unit 35. A control unit 37 is provided. From the control unit 37, application position information is output to the X and Y direction drive units 34 and 35, and ejection information is output to a head driver (not shown) of the inkjet head 33. As a result, the inkjet head 33 operates in conjunction with the X and Y direction drive units 34 and 35, and a target amount of droplets is supplied to a target position on the substrate 31.

  The inkjet head 33 may be a piezo type using a piezo actuator, a bubble type having a heater in the head, or another type. The amount of ink discharged from the inkjet head 33 can be controlled by controlling the applied voltage. The droplet discharge means may be of any type as long as it can supply droplets, such as a method of simply dropping droplets, instead of the inkjet head 33. Alternatively, a method such as application or immersion in which a predetermined pattern is obtained using a lyophilic region and a non-lyophilic region for a wiring forming material formed in advance on a substrate may be used.

  Next, a method for manufacturing the TFT array substrate 11 in the liquid crystal display device of the present embodiment will be described.

  In this embodiment, as shown in FIG. 6, the TFT array substrate 11 includes a gate wiring pretreatment process 101, a gate wiring forming process 102, a gate insulating film / semiconductor film forming process 103, and a gate insulating film / semiconductor film processing. From step 104, source / drain wiring pre-processing step 105, source / drain wiring forming step 106, channel portion processing step 107, protective film / interlayer insulating film forming step 108, protective film processing step 109, and pixel electrode forming step 110 Become.

(Gate wiring pretreatment step 101)
In the gate wiring pretreatment step 101, pretreatment for forming the gate wiring 13, the gate electrode 17, the auxiliary capacitance wiring 16 and the like is performed using the pattern forming apparatus described above. This will be described below with reference to FIGS. 7 (a) and 8 (a). FIGS. 7A and 8A are plan views of the glass substrate 12 included in the TFT array substrate 11.

  In the gate wiring pretreatment step 101, the fluidity from the pattern forming apparatus is added to the gate wiring forming region 41, the gate electrode forming region 42, the auxiliary capacitance wiring forming region 43, and the terminal wiring forming region 44 shown in these drawings. A process for appropriately applying a fluid wiring material by discharging (dropping) the wiring material is performed.

  This processing is roughly as follows.

  First, on the substrate (glass substrate 12), the fluid wiring material is imparted with the property of being easily wetted or repelled. A hydrophilic region (lyophilic region) for forming the gate wiring formation region 41, the gate electrode formation region 42, the auxiliary capacitance wiring formation region 43, and the terminal wiring formation region 44, and a water repellent region (repellent region) as a non-formation region thereof. A liquid repellent treatment (liquid repellent treatment).

  The second is a process of forming a guide for regulating the liquid flow, that is, a guide along the gate wiring formation region 41 and the like.

In the former, the lyophilic treatment with a photocatalyst using titanium dioxide is representative. In the latter, a resist material is used and guide formation is performed by photolithography. Further, in order to impart lyophobic properties to the guide or the substrate surface, there is a case where a treatment of exposing them to a plasma atmosphere into which CF ⁴ or O ² gas is introduced may be performed. The resist used here is peeled off after the wiring is formed.

Here, the photocatalytic treatment using titanium dioxide was performed as follows. That is, the glass substrate 12 of the TFT array substrate 11 was coated with a mixture of ZONYL FSN (trade name: manufactured by DuPont), which is a fluorine-based nonionic surfactant, in isopropyl alcohol. Further, a titanium dioxide fine particle dispersion and a mixture of ethanol were applied as a photocatalyst layer to a mask such as a gate wiring pattern by spin coating and baked at 150 ° C. Then, using the mask, the glass substrate 12 was exposed to UV light. As the exposure conditions, 365 nm ultraviolet light was used, and irradiation was performed at an intensity of 70 mW / cm ² for 2 minutes.

  Here, formation of the lyophobic region with titanium dioxide will be described below with reference to FIGS. 9 (a) to 9 (d).

  FIG. 9A shows a first film 2 in which ZONYL FSN (trade name, manufactured by DuPont), which is a fluorine-based nonionic surfactant, is mixed with isopropyl alcohol on a glass substrate 1 by using a spin coating method or the like. It shows a place where is applied.

  FIG. 9B shows that UV exposure is performed with a mask 4 such as a gate wiring pattern provided on the transparent glass substrate 3. The photocatalyst layer 5 is formed on the pattern surface of the mask 4 as the titanium dioxide. A mixture of fine particle dispersion and ethanol is applied and heat treated at 150 ° C.

  After the exposure under the above conditions, as shown in FIGS. 9C and 9D, only the UV-exposed portion 6 was improved in wettability and a lyophilic region was formed.

(Gate wiring formation process 102)
Next, the gate wiring formation step 102 will be described below with reference to FIGS. 7B and 7C and FIGS. 8B and 8C.

  FIGS. 7B and 8C and 8B and 8C are views showing a state where the gate wiring formation step 102 is completed. FIGS. 7B and 8B are plan views of the pixel formation region 61 and the terminal portion formation region 62 on the glass substrate 12, respectively. FIGS. 7C and 8C are a cross-sectional view taken along line CC and a cross-sectional view taken along line DD in FIGS. 7B and 8B, respectively.

  In this gate wiring forming step 102, a fluid wiring material is applied to a lyophilic region such as the gate wiring forming region 41. For this, a pattern forming apparatus was used, and the fluid wiring material used was an organic film-coated silver indium alloy fine particle dispersed in an organic solvent. Silver and indium contained in the fluid wiring material at this time were set so that the ratio of indium to silver was about 5% by weight. The wiring width was approximately 50 μm, and the amount of wiring material discharged from the inkjet head 33 was set to 40 pl.

  Note that the ratio of silver and indium contained in the fluid wiring material takes into account that dry etching is performed in the subsequent gate insulating film / semiconductor film processing step 104, channel portion processing step 107, and protective film processing step 109. Selected to have plasma resistance. However, the ratio can be appropriately selected according to the manufacturing process and the required performance of the TFT array substrate.

  On the surface subjected to the lyophilic treatment, the fluid wiring material discharged from the ink jet head 33 spreads along the gate wiring formation region 41, so that the discharge interval was appropriately adjusted at intervals of about 100 to 500 μm. . After coating, baking was performed at 300 ° C. for 1 hour to form a gate wiring 13, a gate electrode 17, an auxiliary capacitance wiring 16, and a terminal wiring 30 composed of silver and indium.

  Here, since the gate wiring 13 and the like are made of silver and indium, the gate wiring 13 has sufficient heat resistance with respect to the condition of 300 ° C., and the surface smoothness is not lost. In conventional silver, the surface smoothness is remarkably lost, and therefore leakage with the upper layer occurs, resulting in a failure.

  In addition, the gate wiring 13 and the like are in direct contact with the glass substrate 12, but in this embodiment, the gate wiring 13 and the like are composed of silver and indium, so that the adhesive force to the glass substrate is sufficient and can be peeled off in a later process. Absent. In conventional silver, since the adhesive force was small, peeling occurred in a later process, which was defective.

  The reason why the baking temperature is set to 300 ° C. is that processing heat of about 300 ° C. is applied in the subsequent gate insulating film / semiconductor film forming step 103. Therefore, the firing temperature is not limited to this temperature.

(Gate insulating film / semiconductor film forming step 103)
Subsequently, the gate insulating film / semiconductor film forming step 103 will be described below with reference to FIGS. 10 (a) and 10 (b) and FIGS. 11 (a) and 11 (b).

  FIGS. 10A and 10B and FIGS. 11A and 11B are views showing the glass substrate 12 in a state where the gate insulating film / semiconductor film forming step 103 is completed. 10A and 11A are plan views of the pixel formation region 61 and the terminal portion formation region 62 on the glass substrate 12, respectively. FIGS. 10B and 11B are a cross-sectional view taken along line EE and a cross-sectional view taken along line FF in FIGS. 10A and 11A, respectively.

  In the gate insulating film / semiconductor film forming step 103, the gate insulating film 45 to be the gate insulating layer 18 and the amorphous silicon film 46 to be the amorphous silicon layer 19 are formed on the glass substrate 12 after the gate wiring forming step 102. , And an n + type silicon film 47 to be the n + type silicon layer 20 is continuously formed. Here, the gate insulating film 45 is a film made of silicon nitride. All of these films were formed by the CVD method, and the respective film thicknesses were set to 0.3 μm, 0.15 μm, and 0.04 μm in order. The film forming temperature was 300 ° C.

  As described in the previous step, the gate wiring 13 has improved heat resistance due to indium added in addition to silver, and new crystal growth is suppressed. Therefore, the surface of the gate wiring 13 is not roughened even under a high temperature condition of 300 ° C., and the gate wiring 13 having a better surface property than that formed of silver alone can be obtained. For this reason, there is no leakage from the semiconductor layer 27 and the source electrode 21 formed thereon via the gate insulating layer 18, so that the yield is improved and the TFT characteristics are stabilized.

(Gate insulating film / semiconductor film processing step 104)
Next, the gate insulating film / semiconductor film processing step 104 will be described below with reference to FIGS. 12 (a) and 12 (b) and FIGS. 13 (a) and 13 (b).

  FIGS. 12A and 12B and FIGS. 13A and 13B are views showing a state where the gate insulating film / semiconductor film processing step 104 is completed. 12A and 13A are plan views of the pixel formation region 61 and the terminal portion formation region 62 on the glass substrate 12, respectively. FIGS. 12B and 13B are a cross-sectional view taken along line GG and a cross-sectional view taken along line HH in FIGS. 12A and 13A, respectively.

  In this gate insulating film / semiconductor film processing step 104, processing was performed using photolithography.

First, the amorphous silicon film 46 and the n + type silicon film 47 were processed by the first photolithography. These are processed so that they are left in the shape of islands above the gate electrode 17 in the pixel formation region 61 and not left in the terminal portion formation region 62. As a result, an amorphous silicon layer 19 and an n + type silicon processed film 48 which later becomes the n + type silicon layer 20 were obtained. Etching was performed by introducing a mixed gas of sulfur hexafluoride (SF ⁶ ) gas and hydrogen chloride (HCl) gas by a dry etching method. Up to this point, since the gate insulating film 45 covers the entire surface of the substrate, the terminal wiring 30 and the like are not exposed to the dry etching atmosphere.

Subsequently, the gate insulating film 45 was processed by second photolithography. In the terminal portion formation region 62, the gate insulating film 45 was partially etched to obtain the gate insulating layer 18 and the opening 49. Etching was performed by introducing a mixed gas of CF ⁴ gas and O ² gas by a dry etching method.

  In the dry etching of the gate insulating film 45, the terminal wiring 30 is exposed to the dry etching atmosphere at the opening 49 formed in the terminal portion forming region 62 and other portions for electrical connection (not shown). This is because the dry etching method is a method with good controllability, but overetching cannot be prevented in actual manufacturing.

  Here, if the terminal wiring 30 is formed of silver, which is a conventional technique, it does not have plasma resistance. Therefore, the terminal wiring 30 is greatly etched in the opening 49 and becomes defective. On the other hand, in the present embodiment, the terminal wiring 30 is made of silver and indium, and the ratio of indium to silver is set to be about 5% by weight. Therefore, it has plasma resistance and can withstand such a dry etching process.

(Source / drain wiring pretreatment step 105)
Next, the source / drain wiring pretreatment step 105 will be described below with reference to FIG. FIG. 14A is a plan view showing a state in which the wiring guide 52 for forming the source wiring 14, the source electrode 21, and the drain electrode wiring 22 is formed on the glass substrate 12 that has undergone the gate insulating film / semiconductor film processing step 104. FIG.

  In this source / drain wiring formation step 106, no wiring or the like is formed in the terminal portion formation region 62, so only the pixel formation region 61 will be described here.

  In this step, the wiring guide 52 is formed so as to exclude the region (source / drain formation region 53) in which the source wiring 14, the source electrode 21, and the drain electrode wiring 22 are formed. The wiring guide 52 was formed using a photoresist material. That is, a photoresist was applied on the glass substrate 12 that had undergone the gate insulating film / semiconductor film processing step 104, pre-baked, then exposed and developed using a photomask, and then post-baked. The wiring guide 52 formed here was formed so that the line width of the region forming the source wiring 14 and the source electrode 21 was 10 μm, and the line width of the region forming the drain electrode wiring 22 was 10 μm to 40 μm. The distance between the source electrode 21 and the drain electrode wiring 22, that is, the length of the channel portion 51 of the TFT was set to 4 μm.

In addition, the upper surface of the gate insulating layer 18 is subjected to lyophilic treatment with oxygen plasma so that the wiring material applied by the pattern forming apparatus is well adapted to the base surface, and the wiring guide 52 has CF ^4. Liquid repellent treatment may be performed by exposure to plasma.

  Further, in place of the formation of the wiring guide 52, the lyophobic treatment according to the wiring or electrode pattern may be performed by the lyophilic treatment method using the photocatalyst used for forming the gate electrode.

(Source / drain wiring forming step 106)
Next, the source / drain wiring forming step 106 will be described below with reference to FIGS. FIGS. 14B and 14C are views showing a state in which the source / drain wiring forming step 106 is completed. FIG. 14B is a plan view of the pixel formation region 61 on the glass substrate 12. FIG.14 (c) is the II sectional view taken on the line in FIG.14 (b).

  Even in the present source / drain wiring forming step 106, no wiring or the like is formed in the terminal portion forming region 62, so only the pixel forming region 61 will be described.

  This source / drain wiring formation step 106 is a step of forming the source wiring 14, the source electrode 21, and the drain electrode wiring 22 using the wiring guide 52 provided in the previous step. As the coating apparatus, a pattern forming apparatus as shown in FIG. 5 was used.

  At this time, the fluid wiring material used was an organic film-coated silver indium alloy fine particle dispersed in an organic solvent. The silver and indium contained in the fluid wiring material at this time were set so that the ratio of indium to silver was about 5% by weight.

  The ratio of silver and indium contained in the fluid wiring material is selected so as to have plasma resistance in consideration of dry etching performed in the subsequent channel portion processing step 107 and protective film processing step 109. It is out. However, the ratio can be appropriately selected according to the manufacturing process and the required performance of the TFT array substrate.

  Here, the discharge amount of the fluid wiring material from the inkjet head 33 is set to 2 pl. The formed film thickness was 0.3 μm. The firing temperature was set to 200 ° C., which is lower than the amorphous silicon film 46 and the like, which were formed at about 300 ° C. The wiring guide 52 was removed using an organic solvent.

(Channel processing step 107)
Next, the channel portion processing step 107 will be described below with reference to FIG. FIG. 15 is a diagram illustrating a state in which the channel part machining step 107 is completed, and is a cross-sectional view taken along the line corresponding to the position of the line II in FIG.

  In this channel portion processing step 107, the TFT channel portion 51 is processed. This processing is performed by dry etching using chlorine gas. At this time, new photolithography is not performed, and processing is performed using the pattern of the source electrode 21 and the drain electrode wiring 22.

  In this embodiment, a pattern forming apparatus such as an ink jet apparatus is used in the previous process. When the source wiring 14, the source electrode 21, and the drain electrode wiring 22 are formed in this way, it is impossible in the process to leave a resist on them. Therefore, in the channel portion processing step 107, the channel portion 51 is processed using the source wiring 14 and the like as a mask, so that the source wiring 14 and the like are in a dry etching atmosphere for a long time from the start to the end of etching. Exposed to.

  That is, particularly when a pattern forming apparatus such as an ink jet apparatus is used, the source wiring 14 and the like are required to have a high resistance to dry etching (plasma resistance).

  The conventional source wiring 14 composed of a single silver has no plasma resistance, so that most of the wiring is etched and the desired conductivity cannot be obtained, resulting in a failure. In contrast, in the present embodiment, the source wiring 14 and the like are made of silver and indium, and the ratio of indium to silver is set to be about 5% by weight. Therefore, it has plasma resistance and can withstand such a dry etching process.

  As described above, the wiring material composed of silver and indium according to the present invention has high plasma resistance, and thus facilitates a method of manufacturing a TFT array substrate using a pattern forming apparatus, which has been difficult in the past.

(Protective film / interlayer insulating layer film forming step 108)
Subsequently, the protective film / interlayer insulating layer forming step 108 will be described below with reference to FIGS. 16 (a) and 16 (b) and FIGS. 17 (a) and 17 (b). FIGS. 16A and 16B and FIGS. 17A and 17B are views showing a state where the protective film / interlayer insulating layer forming step 108 is completed. FIGS. 16A and 17A are plan views of the pixel formation region 61 and the terminal portion formation region 62 on the glass substrate 12, respectively. FIGS. 16B and 17B are a cross-sectional view taken along line JJ and a cross-sectional view taken along line KK in FIGS. 16A and 17A, respectively.

  In this protective film / interlayer insulating film forming step 108, first, a silicon nitride film 55 was formed on the glass substrate 12 that had undergone the previous step by a CVD method. The substrate temperature at this time is set to 200.degree.

  Next, a photosensitive acrylic resin material was applied on the silicon nitride film 55. Subsequently, an interlayer insulating layer 26 having a predetermined pattern was obtained by performing exposure using a mask, development, and baking. At this time, an opening 56 is provided in a portion where the drain electrode wiring 22 and the auxiliary capacitance wiring 16 overlap. On the other hand, in the terminal portion formation region 62, the interlayer insulating layer 26 is not formed on the entire surface.

(Protective film processing step 109)
Next, the protective film processing step 109 will be described below with reference to FIGS. 18 (a) and 18 (b). 18A and 18B are views showing a state in which the protective film processing step 109 is completed. 18A and 18B are cross-sectional views taken along the lines JJ and KK in FIGS. 16A and 17A, respectively.

In this protective film processing step 109, the silicon nitride film 55 formed in the protective film / interlayer insulating layer forming step 108 is processed with the pattern of the interlayer insulating layer 26. In the pixel formation region 61, the silicon nitride film 55 immediately below the opening 56 is etched to obtain the protective layer 25 and the contact hole 23. On the other hand, in the terminal portion forming region 62, the silicon nitride film 55 is etched and removed on the entire surface. Etching was performed by introducing a mixed gas of CF ⁴ gas and O ² gas by a dry etching method.

  In the dry etching of the silicon nitride film 55, the drain electrode wiring 22 and a part of the terminal wiring 30 are exposed to the dry etching atmosphere in the contact hole 23 and the opening 49 in the terminal portion 28. This is because the dry etching method is a method with good controllability, but overetching cannot be prevented in actual manufacturing.

  Silver, which is a conventional technique, does not have plasma resistance. Therefore, in this case, the drain electrode wiring 22 and a part of the terminal wiring 30 are largely etched, resulting in a defect. In contrast, in the present embodiment, the drain electrode wiring 22 and the terminal wiring 30 are made of silver and indium, and the ratio of indium to silver is set to be about 5% by weight. Therefore, it has plasma resistance and can withstand such a dry etching process.

(Pixel electrode forming step 110)
As the last step, an ITO (indium tin oxide) film that later becomes the pixel electrode 24 and the terminal electrode 29 was formed by sputtering. The substrate temperature at this time was 200 degreeC. Subsequently, this ITO film was patterned using photolithography, and the TFT array substrate 11 shown in FIGS. 1, 2, 3A, 3B and 4 was obtained.

  As described above, since the material of the present invention has an excellent adhesion to a glass substrate that is not found in conventional silver alone, it can withstand a series of manufacturing processes and does not cause defects due to peeling of the gate wiring and the like.

  In addition, since the material of the present invention has excellent heat resistance not found in conventional silver alone, the surface is not roughened even when the substrate is exposed to a high temperature condition of 300 ° C. as in this example, The gate wiring 13, the auxiliary capacitance wiring 16, the gate electrode 17 and the like with good surface smoothness can be obtained. For this reason, there is no leakage from the source wiring 14, the semiconductor layer 27, the source electrode 21, and the like formed thereon via the gate insulating layer 18, yield is improved, and TFT characteristics are stabilized.

  And above all, the material of the present invention has high plasma resistance, which enables such a manufacturing process.

  In the present embodiment, the gate insulating film 45 is etched in the gate insulating film / semiconductor film processing step 104, the n + -type silicon processing film 48 is etched in the channel portion processing step 107, and the silicon nitride film 55 is processed in the protective film processing step 109. Dry etching is used in a total of three steps of etching. At this time, in the case where wirings, electrodes, and the like are formed of conventional silver alone, they are etched during over-etching or when they are used as etching masks for other films, resulting in defects. However, since the wiring material of the present invention containing silver and indium has excellent plasma resistance as in the present embodiment, it does not become defective.

  As described above, in manufacturing a TFT array substrate, dry etching is frequently used, and accordingly, high dry etching resistance (plasma resistance) is required as a material constituting wiring, electrodes, and the like. The material mainly composed of silver and containing indium of the present invention has high plasma resistance, and is particularly excellent as a material constituting wirings, electrodes and the like on the TFT array substrate.

  Further, the material of the present invention is particularly effective when the source wiring 14, the source electrode 21 and the like are drawn and formed by a pattern forming apparatus such as an ink jet method as in the present embodiment. In such a case, since the source wiring 14 and the like are used as an etching mask for forming the n + -type silicon layer 20, the source wiring 14 is exposed to a dry etching atmosphere for a long time from the start to the end of etching. Therefore, this process was difficult when using conventional silver alone. However, the material of the present invention makes it possible to manufacture a TFT array substrate by such a pattern forming apparatus.

  As described above, the silver alloy material of the present invention is particularly suitable for a manufacturing process using a coating apparatus such as an ink jet apparatus, and is a material that is beneficially used by being included in a fluid wiring material. As will be described later, this material is also usefully used in a manufacturing method performed without using a pattern forming apparatus.

  In this embodiment, a six-mask process is performed in which a photomask is used a total of six times, and exposure and development steps are performed. In order to produce a TFT array substrate at a lower cost, a five-mask process in which this is reduced once is also widely used. In this case, the easiest method that does not use halftone exposure or the like is a method of forming the gate insulating layer 18 and the protective layer 25 by etching the gate insulating film 45 and the silicon nitride film 55 successively. However, in this case, in particular, the exposed portion formed in the drain electrode wiring 22 is exposed to a dry etching atmosphere for a long time, and it is necessary to endure severe use conditions.

  To consider this reason, the state of the substrate being etched is considered. First, since there is a film on the entire surface while the silicon nitride film 55 is being etched, there is no problem. However, during the continuous etching of the gate insulating film 45, for example, the exposed portion formed in the contact hole 23 of the drain electrode wiring is always directly exposed to the dry etching atmosphere from the start to the end of the etching. This is a very long time and a harsh process condition.

  Therefore, particularly in the case of such a five-mask process, the drain electrode wiring 22 is required to have high plasma resistance, but the silver alloy material of the present invention represented by a silver alloy material containing silver and indium is Since it has high plasma resistance, it can be used even in such a case, and the use range is wide.

  In this embodiment, the terminal wiring 30 is formed in the same process as the gate wiring 13 and the like in a six-mask process, but the scope of the present invention is not limited to this. In most of the current manufacturing methods in which a silicon nitride film to be the gate insulating layer 18 or the protective layer 25 is formed on the entire surface of the substrate and partially removed by dry etching, the portion to be removed for the electrical connection is necessarily present. In addition, the electrodes, wirings, and the like disposed below the substrate are required to have plasma resistance against over-etching. The present invention provides a material having excellent plasma resistance and exhibits an excellent effect on the manufacturing process of these TFT array substrates.

  In the present embodiment, as the fluid wiring material, a material in which silver indium alloy fine particles coated with an organic film are dispersed in an organic solvent is used. The silver and indium contained in the fluid wiring material at this time were set so that the ratio of indium to silver was about 5% by weight. However, the ratio of indium to silver can be appropriately selected so as to have an appropriate plasma resistance according to the manufacturing process, or according to the required performance of the TFT array substrate.

  The form of the fluid wiring material is not limited to a form containing silver and indium as fine particles of a silver indium alloy. Silver fine particles and indium fine particles may be prepared separately and dispersed independently in a solvent. Moreover, it is not necessarily limited to fine particles, and silver or indium may be included in the solvent in the form of a metal compound.

  In this embodiment, the wiring, electrodes, and the like of the source wiring 14 and the gate wiring 13 are formed of a silver alloy material containing silver and indium. However, the present invention is not limited to this, and a silver alloy material containing silver and zinc may be used. good. The gate wiring 13 and the like may be formed using silver and a silver alloy material containing at least one element selected from tin, zinc, lead, bismuth, indium, and gallium. In addition to these elements, at least aluminum, copper, nickel, gold, platinum, palladium, cobalt, rhodium, iridium, ruthenium, osmium, titanium, zirconium, hafnium, vanadium, niobium, tantalum, chromium, molybdenum, tungsten Further, it may be a silver alloy material characterized by containing an element selected from neodymium.

[Embodiment 2]
Another embodiment of the present invention will be described below with reference to FIGS. 6 and 19 (a) and 19 (b).

  In the first embodiment, a pattern forming apparatus such as an ink jet method is used in the gate wiring forming process 102 and the source / drain wiring forming process 106.

  Similar to the first embodiment, the TFT array substrate 71 according to the present embodiment is formed as shown in the manufacturing process diagram shown in FIG. A fluid wiring material is used to form wirings with different compositions at each part in the substrate (coating).

  In the following description, components having substantially the same functions as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted here.

  19A and 19B show a TFT array substrate 71 in the present embodiment. 19A is a plan view of the terminal portion formation region 62 of the TFT array substrate 71, and FIG. 19B is a cross-sectional view taken along line LL in FIG. 19A. Pixel portions formed in the pixel formation region 61 shown in FIG. 4 are configured in the same manner as in the first embodiment. As shown in FIGS. 19A and 19B, in the TFT array substrate 71 of this embodiment, the terminal wiring 72 is in contact with the terminal wiring connecting portion 73, and these have electrical continuity.

  Since the terminal wiring 72 is covered with the gate insulating layer 18, it may be selected so as to have heat resistance and adhesion to the glass substrate among the process resistances. Plasma resistance is not necessary because it is not exposed to a dry etching atmosphere. On the other hand, in order to produce a circuit board used for a particularly large liquid crystal display device, it is desirable to make the electrical resistance of the terminal wiring 72 as small as possible. For this reason, the terminal wiring 72 is configured so that the content of indium with respect to silver is 3% by weight. The electrical resistivity of this part is about 6 μΩcm. In addition, the gate wiring 13, the gate electrode 17, and the auxiliary capacitance wiring 16 in the pixel formation region 61 also have an indium content of 3 wt% with respect to silver so as to have a lower electrical resistance for the same reason as the terminal wiring 72. It comprised so that it might become.

  On the other hand, the terminal wiring connection portion 73 is exposed to a dry etching atmosphere by over-etching in an etching process for electrical connection. Therefore, emphasis was placed on plasma resistance, and the content of indium with respect to silver was set to 10% by weight. The terminal wiring connection portion 73 may be much shorter than the gate wiring 13, the source wiring 14, and the terminal wiring 72 on the TFT array substrate, and the electrical resistivity may be higher than that of other portions.

  Of course, as in the first embodiment, both the terminal wiring 72 and the terminal wiring connecting portion 73 may have the same configuration, that is, the indium content with respect to silver may be 5 wt%. However, by performing coating according to the performance required for each part as in this embodiment, it is possible to form wiring, electrodes, etc. with lower electrical resistance as a whole, so a larger circuit board, There is an advantage that a larger display device or the like can be realized.

  The manufacturing method of this embodiment will be described below.

  As described above, the TFT array substrate 71 in the present embodiment is formed in substantially the same manner as in the first embodiment, except that in the gate wiring forming step 102, the fluid wiring material is applied. It is a point to divide. This is realized by providing a pattern forming apparatus as shown in FIG. 5 with a function of discharging at least two kinds of fluid wiring materials. That is, at least two inkjet heads 33 are provided, or two kinds of fluid wiring materials can be handled in the same inkjet head 33, and the ink supply system 36, the control unit 37, the ejection position information, etc. It can be realized by making it correspond.

  Using such a pattern forming apparatus, two types of fluid wiring materials having different indium contents relative to silver were discharged in the same manner as in the first embodiment. In the region for forming the terminal wiring 72, a fluid wiring material was discharged so that when the terminal wiring 72 was formed, the indium content relative to silver was 3% by weight. On the other hand, in the region for forming the terminal wiring connection portion 73, a fluid wiring material was discharged such that when the terminal wiring connection portion 73 was formed, the indium content relative to silver was 10% by weight. On the other hand, the same fluid wiring material as that of the terminal wiring 72 was discharged into the area for forming the gate wiring 13, the gate electrode 17, and the auxiliary capacitance wiring 16 in the pixel formation region 61. After discharging, firing was performed at 300 ° C. for 1 hour in the same manner as in Embodiment 1 to obtain predetermined terminal wiring 72, terminal wiring connecting portion 73, and the like.

  In the present embodiment, a pattern forming apparatus such as an ink jet method can be applied separately within the substrate surface, wiring formed in the same process requires different plasma resistance or conductivity in each part, And it is important that the indium content of the material of the present invention, the relationship between conductivity and process resistance are well combined. As a result, a large TFT array substrate that is easy to manufacture and has good electrical characteristics can be manufactured.

  In the present embodiment, the terminal wiring 72 and the terminal wiring connecting portion 73 have the boundary 74 having different indium contents as shown in FIGS. 19A and 19B, but the present invention is not limited to this. The indium content may change gently near the boundary. As a forming method thereof, fluid wiring materials may be naturally mixed with each other, or may be mixed with the intention of alternately discharging two kinds of materials. Furthermore, the position of the boundary 74 is not necessarily limited to the position shown in the figure. It may be connected at a slightly different part so that the above effect can be obtained substantially.

  Of course, it is an important point of the present embodiment that wiring, electrodes, and the like having an increased indium content are provided in a portion necessary for the TFT array substrate 71 and exposed to a dry etching atmosphere during the manufacturing process.

  As described above, the silver alloy material of the present invention can be manufactured in many processes by performing coating even when the content of indium with respect to silver is relatively low, such as 1% by weight or 3% by weight. In particular, it can be appropriately used as a material having a particularly low electrical resistance, which constitutes wiring and electrodes such as the gate wiring 13.

  Further, the form of the fluid wiring material in the present embodiment is not limited to a form containing silver and indium as fine particles of a silver indium alloy. Silver fine particles and indium fine particles may be prepared separately and dispersed independently in a solvent. Moreover, it is not necessarily limited to fine particles, and silver or indium may be included in the solvent in the form of a metal compound.

  In this embodiment, the gate wiring 13 and the like are formed using a silver alloy material containing silver and indium. However, the present invention is not limited to this, and a silver alloy material containing silver and zinc may be used. The gate wiring 13 and the like may be formed using silver and a silver alloy material containing at least one element selected from tin, zinc, lead, bismuth, indium, and gallium. In addition to these elements, at least aluminum, copper, nickel, gold, platinum, palladium, cobalt, rhodium, iridium, ruthenium, osmium, titanium, zirconium, hafnium, vanadium, niobium, tantalum, chromium, molybdenum, tungsten Further, it may be a silver alloy material characterized by containing an element selected from neodymium.

  In addition, silver and indium, silver and zinc, and the like may be properly used depending on the location so that the configuration is different on the TFT array substrate 71.

[Embodiment 3]
The following will describe still another embodiment of the present invention.

  In the second embodiment, in the gate wiring forming step 102, a pattern forming apparatus typified by an ink jet method is used, and wiring materials having different configurations are separately applied on the TFT array substrate 71.

  In the following description, components having substantially the same functions as those in the first and second embodiments are denoted by the same reference numerals, and description thereof is omitted here.

  In the present embodiment, instead of the gate wiring forming step 102, the source / drain wiring forming step 106 separates wiring materials having different configurations. For example, this is configured such that the content of indium with respect to silver is 3 wt% in the case of the source electrode 21 and the source wiring 14 and 10 wt% in the case of the drain electrode wiring 22.

  Further, in the drain electrode wiring 22, it may be separately coated so that the content of indium with respect to silver is 3 wt% and 10 wt%, and the plasma resistance may be improved near the contact hole 23. In addition, such coating may be performed at an arbitrary place on the TFT array substrate of the present embodiment.

  Further, the form of the fluid wiring material in the present embodiment is not limited to a form containing silver and indium as fine particles of a silver indium alloy as in the second embodiment. Silver fine particles and indium fine particles may be prepared separately and dispersed independently in a solvent. Moreover, it is not necessarily limited to fine particles, and silver or indium may be included in the solvent in the form of a metal compound.

  Note that the wiring material used in the present embodiment is not limited to a material composed of silver and indium as in the second embodiment, but may be a silver alloy material containing silver and zinc. The source wiring 14 and the like may be formed using silver and a silver alloy material including at least one element selected from tin, zinc, lead, bismuth, indium, and gallium. In addition to these elements, at least aluminum, copper, nickel, gold, platinum, palladium, cobalt, rhodium, iridium, ruthenium, osmium, titanium, zirconium, hafnium, vanadium, niobium, tantalum, chromium, molybdenum, tungsten Further, it may be a silver alloy material characterized by containing an element selected from neodymium.

  In addition, silver and indium, silver and zinc, and the like may be properly used depending on the location so that the configuration is different on the TFT array substrate.

  Embodiments 2 and 3 can be implemented in combination. In other words, it is possible to perform coating separately in both the gate wiring forming step 102 and the source / drain wiring forming step 106.

  In the first to third embodiments of the present invention described above, a pattern forming apparatus that discharges droplets of fluid wiring material such as an ink jet method is used. However, the silver alloy material of the present invention can be used beneficially without using such a pattern forming apparatus. In this case, the TFT array substrate is manufactured by the most general method using a conventional sputtering method or vapor deposition method and photolithography in a corresponding process. However, wiring, electrodes, and the like formed by the silver alloy composition of the present invention are obtained using a sputtering target, a vapor deposition evaporation source, and the like instead of a fluid wiring material. Even in such a case, the silver alloy material of the present invention is beneficially used as a material having excellent process resistance such as heat resistance, adhesion, and plasma resistance and having low electric resistance.

  Note that the silver alloy material of the present invention can be beneficially used as a single layer in a multilayer wiring structure formed by superposing two or more layers of materials. For example, even when heat-fired at 300 ° C., the surface smoothness is not lost as in the case of silver alone, and particularly contains indium and the content thereof is, for example, 5% by weight or 10% by weight with respect to silver. In the case of a relatively large amount, it has sufficient plasma resistance and can be effectively used as a protective metal layer for protecting the underlying wiring. Further, it can be used as all or part of the source electrode 21 and the drain electrode wiring 22 for direct contact with the semiconductor layer 27 in Embodiment 1 to obtain electrical connection. Adhesive force is exerted, and it is beneficially used in the manufacturing process of the TFT array substrate.

  Alternatively, the silver alloy material of the present invention can also be used for a light reflective electrode on a TFT array substrate used in a reflective TFT liquid crystal display device or the like. In this case, due to the excellent heat resistance of the silver alloy material of the present invention, surface smoothness is not lost as in the case of single silver, even when heat-fired at 300 ° C., for example. Therefore, light scattering outside the design does not occur, and the characteristics as a TFT array substrate can be sufficiently exhibited, such as maintaining a sufficient light reflectance as a light reflective electrode.

  Further, among the silver alloy materials of the present invention, in particular, when the content ratio of indium with respect to silver is 0.5% by weight or less, the electrical resistivity is 2.7 μΩcm or less, which cannot be achieved by the conventional aluminum wiring. Low electrical resistance wiring can be formed and is beneficial. However, since the indium content is low, the plasma resistance is not sufficient, and it is generally necessary to stack another metal film. The adhesion to the substrate is not sufficient because the content of indium is low, so that a base treatment or the like may be necessary.

[Embodiment 4]
The following will describe still another embodiment of the present invention.

  In the following description, components having substantially the same functions as those in the first to third embodiments are denoted by the same reference numerals, and description thereof is omitted here.

  In the second embodiment, in the gate wiring forming step 102, a pattern forming apparatus typified by an ink jet method is used, and wiring materials having different configurations are separately applied on the TFT array substrate 71. On the other hand, in the third embodiment, in the source / drain wiring forming step 106, different wiring materials having different configurations were applied.

  In the present embodiment, in the gate wiring formation step 102, wiring and the like are formed using a sputtering method, and these wirings and the like are laminated with the silver alloy material of the present invention and titanium.

  FIGS. 26A, 26B, and 27A, 27B are views showing a state in which the gate wiring forming step 102 is completed in the present embodiment. FIGS. 26A and 27A are plan views of the pixel formation region 61 and the terminal portion formation region 62 on the glass substrate 12, respectively. FIGS. 26B and 27B are a cross-sectional view taken along line MM and a cross-sectional view taken along line NN in FIGS. 26A and 27A, respectively.

  In these drawings, the gate wiring 80, the gate electrode 81, the auxiliary capacitance line 82, and the terminal wiring 83 have the same laminated structure and are composed of two layers. Each layer 80a, 81a, 82a, 83a on the side close to the glass substrate 12 is made of the silver alloy of the present invention, and the content of indium with respect to silver is 0.2% by weight. Each of the upper layers 80b, 81b, 82b, and 83b is made of titanium. The film thickness was 0.2 μm for all of 80a, 81a, 82a, 83a, 80b, 81b, 82b, and 83b.

  In the present embodiment, the layers 80a, 81a, 82a, and 83a on the side close to the glass substrate 12 are formed of an alloy made of silver and indium, and thus have heat resistance, and are fired at about 300 ° C. in a later step. Even if this is performed, the gate wiring 80 and the like are not adversely affected. In the case where these are formed with conventional silver alone, there is a lack of heat resistance, resulting in significant surface irregularities and a leak failure with the upper layer.

  If the silver alloy has an indium content of 0.5% by weight or less, the electrical resistivity is 2.7 μΩcm or less as described above, and it is possible to form a low electrical resistance wiring that cannot be realized with aluminum. It is. In this example, the electrical resistivity is as low as about 2.3 μΩcm. Therefore, when it is particularly desired to reduce the electrical resistance of the wiring, the silver alloy material of the present invention is a useful material in a liquid crystal display device such as for a liquid crystal TV.

  In this embodiment, a method for forming the gate wiring 80 and the like will be described. Here, in the gate wiring formation process 102, since a pattern forming apparatus represented by an ink jet method is not used, a process corresponding to the gate wiring pretreatment process 101 is not performed.

  First, a silver alloy film containing 0.2% by weight of indium with respect to silver was formed to a thickness of 0.2 μm on the glass substrate 12 by sputtering. At this time, an alloy target in which indium was dissolved in silver was used as a sputtering target.

  Next, titanium was continuously formed in a vacuum by sputtering. The film thus obtained was processed by photolithography to obtain a gate wiring as shown in FIGS. 26A and 26B and FIGS. 27A and 27B. A dry etching method was used for the etching at this time.

  The terminal wiring 83 and the like are required to have plasma resistance in consideration of the subsequent process, but in the present embodiment, the terminal wiring 83 is obtained by upper layer titanium.

  As described above, the silver alloy material of the present invention may be used as one layer in a multilayer wiring structure, and cannot be realized with conventional aluminum by making indium 0.5% by weight or less with respect to silver. Low electrical resistance wiring is realized.

  In the above-described forming method, the silver alloy film of the present invention was formed directly on the glass substrate 12. However, when sufficient adhesion to the substrate cannot be obtained, an intermediate made of a metal or the like between the two is used. A layer may be provided, or the glass substrate may be surface-treated with plasma, chemicals, or the like to obtain adhesion.

  In the present invention, the material of each of the upper layers 80b, 81b, 82b and 83b is not limited to titanium, but is chromium, molybdenum, tantalum, tungsten, a material containing nitrogen or oxygen therein, or ITO (indium tin). It may be a metal oxide such as (oxide). As in the first embodiment, the gate wiring 80 and the like may be formed by applying a fluid wiring material and laminating, or by vapor deposition using an evaporation source composed of silver and indium. A film may be formed by processing.

  In the present embodiment, in the gate wiring forming step 102, the wiring is formed by the film made of the silver alloy and titanium of the present invention. However, in another embodiment of the present invention, in the source / drain wiring forming step 106, Similarly, a wiring made of a laminated film may be formed. Even in this case, since the alloy made of silver and indium has heat resistance, there is no adverse effect even if firing is performed in a later step.

  Even in this case, by setting the indium content to 0.5% by weight or less with respect to silver, it is possible to realize a low electrical resistance wiring that cannot be realized by conventional aluminum.

  Alternatively, the silver alloy material of the present invention can also be used for a light reflective electrode on a TFT array substrate used in a reflective TFT liquid crystal display device or the like. In this case, due to the excellent heat resistance of the silver alloy material of the present invention, surface smoothness is not lost as in the case of single silver, even when heat-fired at 300 ° C., for example. Therefore, light scattering outside the design does not occur, and the characteristics as a TFT array substrate can be sufficiently exhibited, such as maintaining a sufficient light reflectance as a light reflective electrode.

  In this case, a silver alloy material containing 0.5 wt% or less of indium with respect to silver is preferable, and a silver alloy material containing 0.2 wt% or less of indium with respect to silver is more preferable.

[Embodiment 5]
The following will describe still another embodiment of the present invention.

  In the following description, components having substantially the same functions as those in the first to fourth embodiments are denoted by the same reference numerals, and description thereof is omitted here.

  As shown in Embodiment Mode 1 of the present invention, among the silver alloy materials of the present invention, a film made of a silver alloy material containing 0.5 wt% or less of indium with respect to silver is formed after firing at 200 ° C. Also has high visible light reflectivity. More desirably, a film made of a silver alloy material containing 0.2% by weight or less of indium with respect to silver has a high visible light reflectance even after baking at 300 ° C. For this reason, it is suitable for a light reflecting film application.

  In this embodiment, the light reflective electrode is formed of a silver alloy material containing 0.2% by weight of indium with respect to silver. A large number of light reflecting electrodes are formed on the TFT array substrate. This will be described below.

  The reflective TFT liquid crystal display device according to the present embodiment has the pixel shown in FIG. This figure is a plan view showing a schematic configuration of one pixel in the TFT array substrate 11 of the reflective TFT liquid crystal display device. In addition, FIG. 29 shows a cross-sectional view taken along line OO in FIG. In the present embodiment, one of the differences from the liquid crystal display device according to the first embodiment of the present invention is that a light reflective electrode 84 is provided. The light reflective electrode 84 is an electrode for applying a voltage to a liquid crystal layer (not shown) provided in the liquid crystal display device, and at the same time, reflects or scatters external light incident on the liquid crystal display device to display an image. Has the role of

  Further, the liquid crystal display device according to the present embodiment has a terminal portion 28 shown in FIG. The terminal portion 28 is a connection portion for electrically connecting an external circuit substrate, a driving driver IC, and the like to the TFT array substrate 11. FIG. 2 is a plan view showing a schematic configuration of one terminal portion in the TFT array substrate 11 of the liquid crystal display device. In addition, FIG. 30B is a cross-sectional view taken along the line PP in FIG.

  As shown in FIG. 30B, the terminal portion 28 is configured such that the terminal wiring 30, the gate insulating layer 18, and the terminal electrode 85 are arranged from the glass substrate 12 side. The terminal electrode 85 is made of a silver alloy material containing 0.2% by weight of indium with respect to silver, unlike the first embodiment of the present invention.

  In the reflective TFT liquid crystal display device, an uneven shape may be provided in the interlayer insulating layer 26 to control reflection or scattering of external light, but this does not affect the contents of the present invention and is omitted here. is doing.

  In order to fabricate the reflective TFT liquid crystal display device, it is necessary to bake the substrate at about 160 ° C. to 200 ° C. after the formation of the light reflective electrode. For example, it is for forming a liquid crystal alignment film (not shown). For this reason, the light reflective electrode 84 needs to have heat resistance.

  Conventional silver was extremely inferior in heat resistance, so it became cloudy and could not be used at all. In the case of containing 0.2% by weight of indium with respect to silver, for example, the silver alloy material of the present invention can withstand these firings, and can obtain an overall higher visible light reflectivity than aluminum that is often used conventionally. . For this reason, by using the silver alloy material of the present invention for the reflective TFT liquid crystal display device, brighter display is possible than in the case of conventional aluminum, and the merit of improving the display performance can be obtained.

  A method for manufacturing the light reflective electrode 84 and the terminal electrode 85 according to this embodiment will be described below.

  In this embodiment mode, a film was formed on a substrate completed with the protective film processing step 109 as shown in FIGS. The film forming method was a sputtering method, the film forming temperature was 100 ° C., and an alloy target in which indium was dissolved in silver was used as a sputtering target. In this way, a silver alloy film containing 0.2% by weight of indium with respect to silver was formed to a thickness of 0.2 μm.

  The silver alloy film thus obtained was processed into a predetermined pattern by photolithography to obtain a light reflective electrode 84 and a terminal electrode 85 as shown in FIGS. The etching at this time was performed by a wet etching method using an etching solution containing acetic acid, phosphoric acid, and nitric acid.

  Thus, among the silver alloy materials of the present invention, a film made of a silver alloy material containing 0.5% by weight or less of indium with respect to silver has a high visible light reflectance even after firing at 200 ° C. Since the light reflectance is generally better than that of aluminum, it is very useful industrially. More desirably, a film made of a silver alloy material containing 0.2% by weight or less of indium with respect to silver has a high visible light reflectance even after firing at 300 ° C., and has the merit of being able to withstand more severe manufacturing conditions. .

  Note that the method for manufacturing the light-reflective electrode 84 and the terminal electrode 85 is not limited to these methods, and is formed after applying a fluid wiring material as in the first embodiment. Alternatively, the film may be formed and processed by a vapor deposition method using an evaporation source made of silver containing indium.

  Further, in the above formation method, the silver alloy film of the present invention is formed directly on the interlayer insulating layer 26. However, when sufficient adhesion cannot be obtained, an intermediate layer made of metal or the like is interposed between the two. It may be provided, or the surface of the interlayer insulating layer may be surface treated with plasma, chemicals, etc. to obtain adhesion.

  Furthermore, the silver alloy material of the present invention is also used as a bus electrode and a data electrode on a glass substrate constituting a PDP (plasma display panel). These electrodes are disposed on the front glass substrate or the rear glass substrate to drive the PDP, and conventionally have a silver, chrome / copper / chrome, or aluminum / chrome configuration. Since copper and aluminum have a weak adhesion to the glass substrate, they could not be used without a structure in which a chromium layer is sandwiched between the glass substrate and the like. On the other hand, conventional silver has a problem in heat resistance, and is a material that is difficult to use due to growth of crystal grains caused by high-temperature firing.

  On the other hand, the silver alloy material of the present invention has excellent heat resistance and adhesion to a glass substrate, so that it can be used beneficially as a bus electrode and a data electrode in place of these conventional materials such as silver. It is done.

  The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

  The present invention is a field that requires a material having heat resistance, strong adhesion to a glass substrate, and high plasma resistance, for example, a wiring material for a circuit board of a general electronic device, a reflective type It can be applied to a reflective film material for a liquid crystal display device.

It is a top view of the circuit board concerning one embodiment of the present invention. It is AA arrow sectional drawing of the circuit board of FIG. The terminal part vicinity of the circuit board shown in FIG. 1 is shown, (a) is a top view, (b) is a BB arrow directional cross-sectional view of (a). It is a top view of the TFT array substrate which shows an example of the circuit board shown in FIG. It is a schematic block diagram of the manufacturing apparatus for manufacturing the circuit board of this invention. It is process drawing which shows the manufacturing process of the circuit board of this invention. (A) is a plan view showing a pixel portion at the completion of the gate wiring pre-processing step, (b) is a plan view showing a pixel portion at the completion of the gate wiring formation step, and (c) is a CC line arrow in (b). FIG. (A) is a plan view showing a terminal part at the completion of the gate wiring pretreatment process, (b) is a plan view showing a terminal part at the completion of the gate wiring formation process, and (c) is a DD line arrow in (b). FIG. (A)-(d) is a figure which shows the formation process of the lyophilic region in a gate wiring pre-processing process. It is a figure which shows the pixel part by the gate insulating film and semiconductor film formation process completion, (a) is a top view, (b) is the EE arrow directional cross-sectional view of (a). It is a figure which shows the terminal part in the gate insulating film and semiconductor film formation process completion, (a) is a top view, (b) is a FF arrow directional cross-sectional view of (a). It is a figure which shows the pixel part by the gate insulating film and semiconductor film processing process completion, (a) is a top view, (b) is a GG arrow directional cross-sectional view of (a). It is a figure which shows the terminal part in a gate insulating film and semiconductor film processing process completion, (a) is a top view, (b) is a HH arrow directional cross-sectional view of (a). (A) is a plan view of the pixel portion after completion of the source / drain wiring pre-processing step, (b) is a plan view of the pixel portion after completion of the source / drain wiring formation step, and (c) is a line II of FIG. FIG. FIG. 15 is a cross-sectional view taken along an arrow corresponding to the position of the line I-I in FIG. The pixel part at the completion of the protective film / interlayer insulating layer forming process is shown, (a) is a plan view, and (b) is a cross-sectional view taken along line JJ of (a). The terminal part at the completion of the protective film / interlayer insulating layer forming step is shown, (a) is a plan view, and (b) is a sectional view taken along the line KK of (a). The pixel part and the terminal part after the protective film processing step are shown, (a) is a cross-sectional view taken along the line JJ in FIG. 16 (a), and (b) is K-- in FIG. 17 (a). It is arrow sectional drawing equivalent to the position of K line. The terminal part of the circuit board of another form of this invention is shown, (a) is a top view, (b) is LL sectional view taken on the line of (a). It is a graph of the visible light reflectance of the silver film of the comparative example 1 shown in Table 1. It is a graph of the visible light reflectance of the aluminum film of the comparative example 3 shown in Table 1. It is a graph of the visible light reflectance of the silver alloy film (indium 0.05 weight%) of Example 7 shown in Table 1. It is a graph of the visible light reflectance of the silver alloy film (indium 0.2 weight%) of Example 8 shown in Table 1. It is a graph of the visible light reflectance of the silver alloy film (indium 0.5 weight%) of Example 3 shown in Table 1. It is a graph of the visible light reflectance of the silver alloy film (indium 1.6 weight%) of Example 4 shown in Table 1. (A) is a top view which shows the pixel part by the completion of a gate wiring formation process, (b) is the MM arrow sectional drawing of (a). (A) is a top view which shows the terminal part by the completion of a gate wiring formation process, (b) is the NN arrow directional cross-sectional view of (a). It is a top view of the circuit board concerning other embodiments of the present invention. FIG. 29 is a cross-sectional view of the circuit board of FIG. 28 taken along the line OO. FIG. 28 shows a vicinity of a terminal portion of the circuit board shown in FIG. 28, (a) is a plan view, and (b) is a cross-sectional view taken along the line P-P in (a).

Explanation of symbols

11 TFT array substrate (circuit board)
12 Glass substrate (insulating substrate)
13 Gate wiring (wiring)
14 Source wiring (wiring)
16 Auxiliary capacity wiring (wiring)
17 Gate electrode 18 Gate insulating layer 19 Amorphous silicon layer (semiconductor layer)
DESCRIPTION OF SYMBOLS 21 Source electrode 22 Drain electrode wiring 23 Contact hole 24 Pixel electrode 25 Protective layer 26 Interlayer insulating layer 27 Semiconductor layer 28 Terminal part 29 Terminal electrode 30 Terminal wiring 31 Substrate 33 Inkjet head 41 Gate wiring formation area 42 Gate electrode formation area 43 Auxiliary capacity Wiring formation area 44 Terminal wiring formation area 45 Gate insulating film 46 Amorphous silicon film (semiconductor layer)
61 pixel formation area 62 terminal area formation area 71 TFT array substrate (circuit board)
72 Terminal wiring 73 Terminal wiring connection portion 74 Boundary 84 Light reflective electrode (light reflective film)
101 Gate wiring pre-processing step 102 Gate wiring forming step 103 Gate insulating film / semiconductor film forming step 104 Gate insulating film / semiconductor film processing step 105 Source / drain wiring pre-processing step 106 Source / drain wiring forming step 107 Channel portion processing step 108 Protective film / interlayer insulating film forming process 109 Protective film processing process 110 Pixel electrode forming process

Claims (8)

A material constituting wiring and / or electrodes formed on an insulating substrate, a silver alloy material composed of silver and indium,
When the silver content of the silver alloy material is 100% by weight,
The silver alloy material characterized in that the content of indium with respect to silver is 5 wt% or more and 28 wt% or less. 2. The silver alloy material according to claim 1, wherein a composition range of the silver and the indium is set so that an electric resistivity as a silver alloy is 10 μΩcm or less. Circuit board, characterized in that it comprises a wire and / or electrode composed of a silver alloy material according to claim 1 or 2. An electronic device comprising the circuit board according to claim 3 . A display device comprising the circuit board according to claim 3 as a display circuit board. A circuit board according to claim 3 is used as a circuit board for liquid crystal display. A flowable metal-containing material for forming wiring and / or electrodes made of a silver alloy material made of silver and indium,
When the silver content of the silver alloy material is 100% by weight,
Content of indium with respect to said silver is 5 weight% or more and 28 weight% or less, The fluid metal containing material for wiring and / or electrode formation characterized by the above-mentioned. A method for producing a circuit board, comprising forming wirings and / or electrodes on an insulating substrate using the flowable metal-containing material according to claim 7 .

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