JP4410026B2 - Electronic component composite, electronic component test method, and electronic component manufacturing method - Google Patents

Description

  The present invention relates to a contact sheet for testing electronic components such as a semiconductor wafer, a semiconductor chip, a BGA (Ball Grid Allay) package, and a passive element, a test apparatus including the contact sheet, a test method using the test apparatus, and an electronic device. The present invention relates to a component manufacturing method and an electronic component.

  With the miniaturization and simplification of semiconductor packages, when many chips are mounted in one package, such as MCM (Multi Chip Module), or for supplying COB (Chip On Board) bare die, A KGD (Known Good Die) technique is required to know the good or bad of each chip.

  Conventionally, a test is performed by electrically contacting a test substrate such as a hard test multilayer substrate against an OLB terminal or a semiconductor chip or a wafer electrode after the semiconductor chip is mounted on a package substrate. At that time, electrodes of electronic components such as a semiconductor chip and a semiconductor wafer are brought into contact with the substrate electrode of the test substrate. The test apparatus includes a test board and a test circuit, and further includes wiring for electrically connecting the test board and the test circuit. When a test such as a burn-in test is performed on the BGA package, the package with the BGA ball is placed in a dedicated socket electrically connected to the test circuit and contacted by pressure to perform the test. In the case of a wafer, the test is performed by contacting the probe by pressing it against the electrode of the wafer.

  An example of a test apparatus is a high temperature bias test. This is a test in which the device is exposed to a high temperature atmosphere while applying a voltage. This test is an accelerated test that simulates actual usage conditions, and can accelerate the cause of deterioration physically and temporally and produce results in a short time. Screening (or burn-in) and reliability for the purpose of removing initial defects Used as part of life test in testing.

  In the wafer level burn-in test, the wafer is held with the element surface on which the electrode is formed on the base, the multilayer sheet having the protruding electrode at a position opposite to the electrode of the wafer, There is known a test apparatus including a flexible member having conductivity at an opposite position, a highly flat burn-in base unit in which wiring to a test circuit is formed, and a mechanism for applying pressure (Patent Document) 1).

In addition, a conventional technique is known in which a porous resin is interposed between an insulating substrate of a semiconductor package and a semiconductor chip to maintain a good bonding state between them (Patent Document 2). In addition, a technique is known in which vias and wiring are formed inside a porous body of an insulating material such as a liquid crystalline polymer containing polytetrafluoroethylene, polyimide, or aramid (Patent Documents 3 and 4).
Japanese Patent Laid-Open No. 10-284556 JP-A-11-163203 (page 9 and FIG. 1) JP 2001-345537 A JP 2001-83347 A

  When an electrode such as a semiconductor chip (for example, a solder bump) is soldered to a hard test board, when the semiconductor chip is removed from the test board, the electrode of the semiconductor chip or the test board is destroyed, or at any place on the solder bump. Breaking occurs and it is difficult to control the damage. Therefore, a test such as a burn-in test is performed by pressing the electrode or terminal of the package or chip against the test substrate. In this case, the test apparatus needs a mechanism for pressurizing and holding an electronic component such as a semiconductor chip in addition to the alignment mechanism.

  The present invention has been made to solve such a problem, and it is easy to perform a test by soldering a solder bump, which is an electrode of an electronic component, to an electrode of a contact sheet or a test substrate. In addition, when removing electronic components such as semiconductor chips from the test board after the test, it is possible to control the damage to the electrodes such as bumps, such as a decrease in the amount of solder, and to repair the semiconductor chip and reuse the test board A contact sheet for testing electronic components that is effective for testing, a test apparatus that does not require a mechanism for pressurization and holding using the contact sheet, and a test method using such a contact sheet and the test apparatus And an electronic component manufacturing method, and an electronic component peeled off from a porous body layer A.

  According to one aspect of the present invention, an insulating porous body layer is disposed on the insulating porous body layer, and electrically connects an electrode or terminal of an electronic component and a terminal of a test apparatus. There is provided a contact sheet for testing an electronic component, characterized in that the connection electrode is embedded below at least one main surface of the insulating porous body layer.

  According to another aspect of the present invention, an insulating via layer in which a connection electrode for electrically connecting an electrode or terminal of an electronic component and a terminal of a test apparatus is embedded, and the insulating via layer face each other. There is provided a contact sheet for testing an electronic component, comprising an insulating porous body layer formed on two main surfaces.

  According to another aspect of the present invention, the insulating porous body layer is composed of Sn or an alloy containing Sn, and at least a part of the insulating porous body layer is filled with the electrode or terminal of the electronic component. There is provided a contact sheet for testing an electronic component, characterized by comprising a solder derivative layer for inducing.

  According to another aspect of the present invention, there is provided a test circuit and the contact sheet for testing an electronic component according to any one of claims 1 to 6 electrically connected to the test circuit, and the connection The electronic component testing apparatus, wherein the electrode or the solder derivative layer is melt-connected to an electrode or terminal of an electronic component placed at the time of the test, and the electrode or terminal of the electronic component is a solder bump or a ball Is provided.

  According to another aspect of the present invention, a test circuit, a test substrate electrically connected to the inside of the test circuit, a substrate electrode formed on the test substrate, and the substrate electrode so as to cover the substrate electrode A contact sheet formed on a test substrate, the contact sheet is made of the insulating porous layer, and an electrode or a terminal of an electronic component placed at the time of the test is a solder bump or a ball A featured electronic component testing apparatus is provided.

  According to another aspect of the present invention, a test circuit, a test board electrically connected to the inside of the test circuit, a board electrode formed on the test board, and an electronic component according to claim 7 A test contact sheet, and the solder derivative layer of the substrate electrode or the test contact sheet is melt-connected to an electrode or terminal of an electronic component placed at the time of the test, and the electrode or terminal of the electronic component is There is provided an electronic component test apparatus characterized by being a solder bump or a ball.

  According to another aspect of the present invention, an electronic component to be tested is mounted on the test contact sheet of the electronic component test apparatus according to claim 8, and solder bumps or balls that are electrodes of the electronic component are mounted. Contacting the connection electrode or the solder derivative layer via the insulating porous body layer, heating and melting and bonding, the solder bumps or balls of the electronic component to the connection electrode or the solder derivative layer A step of bonding and electrically connecting to the test circuit and then testing the electronic component by the test circuit; and a step of separating the solder bumps or balls from the test contact sheet after the test is completed. An electronic component test method is provided.

  According to another aspect of the present invention, an electronic component to be tested is mounted on the test contact sheet of the electronic component test apparatus according to claim 10, and solder bumps or balls that are electrodes of the electronic component are provided. Contacting the substrate electrode or the solder derivative layer, heating and melting and bonding, and bonding the solder bumps or balls of the electronic component to the substrate electrode or the solder derivative layer to electrically connect to the test circuit An electronic component comprising: a step of testing the electronic component with the test circuit after being connected; and a step of separating the solder bump or ball from the test contact sheet after the test is completed. A test method is provided.

  According to another aspect of the present invention, an electronic component to be tested is mounted on the test contact sheet in the electronic component test apparatus according to claim 8, and solder bumps or balls that are electrodes of the electronic component are mounted. Contacting the connection electrode or the solder derivative layer via the insulating porous body layer, heating and melting and bonding, the solder bumps or balls of the electronic component to the connection electrode or the solder derivative layer A step of bonding and electrically connecting to the test circuit and then testing the electronic component by the test circuit; and a step of separating the solder bumps or balls from the test contact sheet after the test is completed. Among the test contact sheets separated from the test board, electronic components that are determined to be non-defective by the test are mounted. A step of impregnating the porous body layer constituting the test contact sheet between the test contact sheet and the electronic component, and solder used as a terminal for the connection electrode on the back surface of the test contact sheet There is provided a method of manufacturing an electronic component comprising a step of attaching a ball.

  According to another aspect of the present invention, there is provided an electronic component having a plurality of electrodes or terminals, wherein the tips of the electrodes or terminals of the electronic component are substantially flat and have a substantially uniform height. An electronic component is provided.

According to an electronic component contact sheet, an electronic component test apparatus, an electronic component test method, an electronic component manufacturing method, and an electronic component according to an aspect of the present invention, the following effects can be obtained.
(1) The contact sheet base material is porous, and the contact sheet connection electrode and the electrode of the electronic component such as a semiconductor chip are provided by providing a gap amount from the connection electrode inside the contact sheet to the contact sheet surface. Solder bumps can be fused. This solder joint facilitates testing of electronic components.

  (2) By providing a connection electrode inside the porous body layer, even after an electronic component such as a semiconductor chip and a contact sheet are soldered and fused, the damage to the electrode and the amount of solder bump used as an electrode vary. An electronic component such as a semiconductor chip can be removed from the contact sheet without generating it. This facilitates repair of electronic components such as semiconductor chips.

  (3) By setting the pore diameter of the porous body layer to about 0.01 to 20 μm, it is possible to limit the solder fracture surface when removing an electronic component such as a semiconductor chip from the contact sheet. As a result, it is possible to control the solder amount of bumps that are electrodes of electronic parts such as semiconductor chips after repair.

  (4) By using the connection structure of the present invention, it is easy to simplify the test apparatus and repair electronic components such as semiconductor chips.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following, embodiments of the present invention will be described with reference to the drawings. However, these drawings are provided for illustration, and the present invention is not limited to these drawings.

  First, the first embodiment will be described with reference to FIGS. 1 to 3 and FIGS. 8 to 11. FIG. 1 is a partial cross-sectional view of an electronic component test contact sheet (hereinafter referred to as a contact sheet) used in this embodiment, and FIG. 2 is a process cross-sectional view showing a connection structure between the contact sheet and the electronic component. 3 is a cross-sectional view of the contact sheet and the electronic component for explaining a state in which the electronic component is removed from the contact sheet. FIG. 8 is a diagram for explaining a state in which the electronic component and the test circuit are electrically connected via the contact sheet. FIG. 9 is a perspective view of a contact sheet, FIG. 10 is a cross-sectional view of a BGA package which is an example of an electronic component, and FIG. 11 electrically connects the electronic component and the test circuit via the contact sheet. It is a schematic sectional drawing of the other test apparatus explaining the state connected automatically.

  As shown in FIG. 1, the contact sheet 1 includes an insulating porous body layer (hereinafter referred to as a porous body) made of an insulating material such as a liquid crystalline polymer containing PTFE (polytetrafluoroethylene), polyimide, or aramid. 1), a connection electrode 2 or a connection electrode 2 embedded at least partially in the porous body layer 1 ′, and a wiring 3 connected to the connection electrode 2. The pore diameter of the porous body layer 1 ′ is preferably about 0.01 to 20 μm. When the pore diameter of the porous body layer 1 ′ exceeds 20 μm, solder bumps 11, which will be described later, which are the electrodes of the electronic component are difficult to peel off on the surface of the porous body layer 1 ′, and the pore diameter of the porous body layer 1 ′ is 0 This is because if it is less than 0.01 μm, it will be difficult to permeate flux 4 (described later) necessary for solder connection into connection electrode 2. As techniques for forming vias and wirings in the porous body layer in this way, there are Patent Documents 3 and 4, for example. Further, the pores of the porous body layer are three-dimensionally continuous. The connection electrode 2 is embedded below the upper surface of the porous body layer 1 ′, and the gap g between the upper surface of the connection electrode 2 embedded from the upper surface of the porous body layer 1 ′ is 10 μm or less, more preferably 0. .01 to 5 μm or less. This is because if the gap g exceeds 10 μm, the penetration of solder becomes difficult. As will be described later, the depth of the gap g is determined by the ease of penetration of solder bumps used for electrodes or terminals of electronic components. The connection electrode 2 connected to the connection electrode 2 or the internal wiring 3 is arranged vertically and horizontally in the center portion of the contact sheet 1. The upper surface of the connection electrode 2 is embedded in the porous body layer 1 ′, and the lower surface of the connection electrode 2 is exposed from the lower surface of the porous body layer 1 ′ including the lower surface of the internal wiring 3 (FIG. 9). reference).

  When the electronic component is mounted on the test apparatus, the connection electrode 2 of the contact sheet 1 is disposed so as to face the electrode or terminal of the electronic component such as a semiconductor chip, a semiconductor wafer, a BGA package, or a passive element. Yes. Examples of the electrodes or terminals of the electronic component include solder balls and solder bumps. The contact sheet on which the internal wiring is formed is used in a test apparatus that does not use a test substrate.

  In order to operate the test apparatus, the electrode or terminal of the electronic component is connected to the connection electrode 2 of the contact sheet 1 as shown in FIG. In this embodiment, a semiconductor chip or wafer 10 is used as an electronic component, and solder bumps 11 are used as electrodes or terminals. FIG. 2 shows a case where a semiconductor chip or a wafer 10 is flip-chip connected to the contact sheet 1. First, flux 4 or the like is applied to the chip mounting surface on the contact sheet 1. The flux 4 reaches the connection electrode 2 soaked and embedded in the porous body layer 1 ′ constituting the contact sheet 1 (FIG. 2A).

  Since the flux becomes liquid when the solder is melted, it does not necessarily need to be liquid at the application stage. When a semiconductor chip or wafer 10 is mounted on this (FIG. 2 (b)) and the solder bumps 11 are brought close to the surface of the porous body layer 1 ′ and melted, the solder is partially removed from the porous body layer 1 ′. The connection electrode 2 and the solder bump 11 are solder-connected. Since the solder bump 11 penetrates into the porous body layer 1 ′, the solder bump 11 has a portion 11 ′ soaked into the porous body layer (FIG. 2C). At this time, if the gap (g) amount (see FIG. 1) from the surface of the connection electrode 2 to the surface of the contact sheet 1 is set to a predetermined value, the amount of the solder bump 11 soaking into the porous body layer is accurately determined. Can be controlled.

  Next, an operation of testing an electronic component after mounting the electronic component on a test apparatus will be described with reference to FIG. In this embodiment, a burn-in test or the like is performed. This connection structure and test method can also be applied to a BGA type semiconductor package (BGA package). The contact sheet 1 and the semiconductor chip or wafer 10 are disposed so that the connection electrodes 2 and the solder bumps 11 face each other, and are connected by soldering as shown in FIG. The main configuration of the test apparatus is a test circuit 23, a test substrate 20, and a contact sheet 1. For example, a multilayer circuit board in which multilayer circuits are stacked is used as the test board 20. When a wiring electrically connected to the connection electrode is formed on the contact sheet (see FIGS. 9C and 1B), this wiring is directly connected to an external wiring connected to the test circuit. Therefore, the test board can be omitted. The test circuit 23 and the test substrate 20 are electrically connected by a wiring 22 electrically connected to the multilayer circuit. A substrate electrode 21 electrically connected to the multilayer circuit is formed on the main surface of the test substrate 20. The test is performed after the contact sheet 1 on which the semiconductor chip or the wafer 10 is mounted is placed on the test substrate 20 so that each connection electrode 2 is in contact with each substrate electrode 21.

  When the semiconductor chip or the wafer 10 is removed after the test is completed, as shown in FIG. 3, the solder bumps 11 are part of the surface of the porous body layer 1 ′ that has soaked into the porous body layer and the part that has not soaked into the porous body layer. The semiconductor chip or wafer 10 is mechanically removed. The shape of the solder bump 11 of the semiconductor chip or wafer 10 removed from the porous body layer 1 ′ is almost uniform to the height obtained by subtracting the height of the gap g (10 μm or less) from the diameter of the solder bump 11. Yes. The semiconductor chip or wafer 10 having solder bumps of such a shape is obtained as a result of being peeled off from the porous body layer 1 ′. Further, it can be removed by immersing it in a liquid and applying ultrasonic waves. At this time, it is more efficient as a process if the flux is simultaneously cleaned. Furthermore, as described above, when the gap amount from the surface of the contact sheet to the surface of the embedded connection electrode is set to a predetermined value, the amount of the solder bump soaking into the porous body layer can be accurately controlled. Can do.

  As described above, when soldering a contact sheet with an electrode inside the porous body layer and a semiconductor chip, the electrode breaks after the test or the variation in the amount of bump solder after peeling off within the same semiconductor chip increases. The semiconductor chip can be removed from the contact sheet while preventing this. Therefore, it is possible to repair a chip on which a non-defective chip is mounted on another package substrate after the test or to reuse the test substrate.

  In addition, by connecting the solder bumps of the semiconductor chip or the like and the solder balls of the BGA package and the connection electrodes of the contact sheet, the mechanical load applied to the semiconductor chip or package during the test is reduced, and the test apparatus is installed in the mechanical operating part. It can be made a simple configuration with few.

  For example, the BGA package shown in FIG. 10 is used. The semiconductor chip 12 such as silicon has solder bumps (not shown) as external connection terminals. The substrate that supports the semiconductor chip is a wiring board 14 such as a multilayer circuit board, and solder balls (BGA balls) 15 are attached to the lower surface. A connection electrode (not shown) that is electrically connected to the solder ball via an internal multilayer circuit is formed on the upper surface. The semiconductor chip 12 is mounted on the wiring board 14, and the solder bumps of the semiconductor chip 12 are connected to the connection electrodes of the wiring board 14, respectively. An underfill resin 13 such as an epoxy resin is sealed between the semiconductor chip 12 on which the solder bumps are disposed and the wiring board 14, and the semiconductor chip 12 on the wiring board 14 is sealed with a resin sealing body 16 such as an epoxy resin. It is sealed by. When testing this BGA package with a test apparatus, the BGA package is mounted on the contact sheet.

  Note that the test apparatus used in this embodiment has the structure shown in FIG. 8 and uses a test substrate. That is, the contact sheet is mounted on the test substrate and the electrodes are brought into direct contact with each other so as to be electrically connected to the test circuit. Therefore, the contact sheet shown in FIG. 1A that does not require internal wiring is used. On the other hand, as shown in FIG. 11, a test apparatus that does not use a test substrate is also known. The main configuration of this test apparatus is a test circuit 23 and a contact sheet 1. A contact electrode 2 and an internal wiring 3 electrically connected to the electrode are formed on the contact sheet 1. This contact sheet is shown in FIG. The test circuit 23 and the contact sheet 1 are electrically connected by a wiring 22 that is electrically connected to an internal wiring 3 connected to the connection electrode 2. Then, after the semiconductor chip or wafer 10 is mounted on the contact sheet 1, a burn-in test or the like is performed.

Next, a second embodiment will be described with reference to FIG.
In this embodiment, a contact sheet in which connection electrodes are completely embedded therein will be described. FIG. 5 is a partial cross-sectional view of the contact sheet. In the case of FIG. 5A, the contact sheet 24 includes a porous body layer 24 ′ made of an insulating material such as a liquid crystalline polymer containing PTFE (polytetrafluoroethylene), polyimide, and aramid, and the porous body. The connection electrode 25 is embedded in the layer 24 '. The pore size of the porous body layer 24 ′ is preferably about 0.01 to 20 μm. The pores of this porous body layer are three-dimensionally continuous. The connection electrode 25 is embedded below the upper surface of the porous body layer 1 ′, and the gaps g1, g2 between the surfaces of the connection electrode 25 embedded from the upper surface and the lower surface of the porous body layer 24 ′ are 10 μm or less, More preferably, it is 0.01-5 micrometers or less. The depths of the gaps g1 and g2 are determined by the ease of penetration of solder bumps used for electrodes or terminals of electronic components such as semiconductor chips. The connection electrodes 25 are arranged vertically and horizontally in the center portion of the contact sheet 24. The entire connection electrode 25 is embedded in the porous body layer 24 ′. When the electronic component is mounted on the test apparatus, the connection electrode 25 of the contact sheet 24 is disposed so as to face the electrode or terminal of the electronic component such as a semiconductor chip, a wafer, or a BGA package.

  In the case of FIG. 5B, a thin porous body layer is pasted on an insulating via layer (referred to as a via layer) in which conductive vias serving as connection electrodes are formed. That is, the contact sheet 29 is formed on both surfaces of the insulating via layer 26 in which the connection electrode (also referred to as conductive via) 25 is embedded and the connection electrode 25 exposed on both surfaces of the via layer 26. And thin porous body layers 27 and 28. The thicknesses of the porous body layers 27 and 28 correspond to the gaps g1 and g2 shown in FIG. The material of the porous body layer and the porous pore diameter are the same as in the example of FIG.

  5 (a) and 5 (b), for example, the test apparatus shown in FIG. 8 is used, and the contact sheets 24 and 25 having the semiconductor chip 10 mounted thereon are tested so that each connection electrode is in contact with each substrate electrode. After placing it on top, perform tests such as burn-in.

  When the semiconductor chip is removed from the contact sheet after the test is completed, as shown in FIG. 3, the solder bump breaks at the interface between the part soaked in the porous body and the part not soaked in the surface of the porous body layer. The semiconductor chip is removed mechanically. Further, it is possible to remove it by immersing it in a liquid and applying ultrasonic waves. At this time, it is more efficient as a process if the flux is simultaneously cleaned. Furthermore, as described above, the gap amount from the surface of the contact sheet to the surface of the embedded connection electrode (in the case of FIG. 5B, the thickness of the porous body layer) is determined to be a predetermined value. The amount of the solder bump that permeates into the porous body layer can be accurately controlled.

  As described above, when soldering a contact sheet with an electrode inside the porous body layer and a semiconductor chip, the electrode breaks after the test or the variation in the amount of bump solder after peeling off within the same semiconductor chip increases. The semiconductor chip can be removed from the contact sheet while preventing this. Therefore, it is possible to repair a chip on which a non-defective chip is mounted on another package substrate after the test or to reuse the test substrate.

  Also, by connecting the solder bumps of the semiconductor chip and the connection electrodes of the contact sheet by soldering, the mechanical load applied to the semiconductor chip and package during testing is reduced, and the test device has a simple configuration with few mechanical operating parts. Can do.

Next, a third embodiment will be described with reference to FIG.
In this embodiment, a process of fixing a contact sheet to a test substrate using a plating layer will be described. FIG. 6 is a process cross-sectional view for fixing the contact sheet to the test substrate. As shown in FIG. 6, the contact sheet 30 has a porous body layer 30 ′ made of an insulating material such as a liquid crystalline polymer containing PTFE, polyimide, or aramid, and one surface embedded in the porous body layer 30 ′. In other words, the connection electrode 31 is exposed on the other surface. The pore size of the porous body layer 30 ′ is preferably about 0.01 to 20 μm. The pores of this porous body layer are three-dimensionally continuous. The connection electrode 31 is embedded below the upper surface of the porous body layer 30 ′, and the gap g between the upper surface of the connection electrode 31 embedded from the upper surface (surface on which the semiconductor chip is mounted) of the porous body layer 30 ′ is It is 10 μm or less, more preferably 0.01 to 5 μm or less. The depth of the gap g is determined by the ease of penetration of solder bumps used for electrodes or terminals of electronic components. The connection electrodes 31 are arranged vertically and horizontally in the center portion of the contact sheet 30. And when mounting an electronic component in a test apparatus, the connection electrode 31 of this contact sheet 30 is arrange | positioned so as to oppose the electrode or terminal of electronic components, such as a semiconductor chip.

  Next, the surface where the connection electrode 31 is exposed is made to face the test substrate 20 of the test apparatus, and the connection electrode 31 is mounted in alignment with the substrate electrode 21 (FIG. 6A). Next, the surface of the connection electrode 31 inside the porous body layer 30 ′ is plated by electrolytic plating or the like to integrate the test substrate and the porous body layer 30 ′. Thereafter, an electronic component such as a semiconductor chip is soldered and connected to the contact sheet for testing.

  When the semiconductor chip is removed from the contact sheet after the test is completed, as shown in FIG. 3, the solder bump breaks at the interface between the part soaked in the porous body and the part not soaked in the surface of the porous body layer. The semiconductor chip is removed mechanically. Further, it is possible to remove it by immersing it in a liquid and applying ultrasonic waves. At this time, it is more efficient as a process if the flux is simultaneously cleaned. Furthermore, when the gap amount from the surface of the contact sheet to the surface of the embedded connection electrode is set to a predetermined value, the amount of the solder bump soaking into the porous body layer can be accurately controlled.

  As described above, when soldering a contact sheet with an electrode inside the porous body layer and a semiconductor chip, the electrode breaks after the test or the variation in the amount of bump solder after peeling off within the same semiconductor chip increases. The semiconductor chip can be removed from the contact sheet while preventing this. Therefore, it is possible to repair a chip on which a non-defective chip is mounted on another package substrate after the test or to reuse the test substrate.

  Also, by connecting the solder bumps of the semiconductor chip and the connection electrodes of the contact sheet by soldering, the mechanical load applied to the semiconductor chip and package during testing is reduced, and the test device has a simple configuration with few mechanical operating parts. Can do.

  Further, in peeling off the electronic component to be inspected after the test, since the connection strength on the test board side becomes stronger than the solder connection side by plating, only the electronic component side can be peeled off.

Next, a fourth embodiment will be described with reference to FIG.
In this embodiment, a contact sheet formed in close contact with a test substrate will be described. FIG. 7 is a cross-sectional view of a contact sheet formed on a test substrate. For example, a test substrate 20 constituting the test apparatus shown in FIG. 8 has a substrate electrode 21 formed on the surface. A thin porous layer 40 ′ having a thickness of 5 μm or less is attached and formed so as to cover the substrate electrode 21. Since the contact sheet 40 used here is not provided with a connection electrode, the porous body layer itself is a contact sheet. The solder bumps of the semiconductor chip or wafer are mounted in alignment with the substrate electrode 21 of the test substrate 20, and the solder on the semiconductor chip or wafer side is melt-connected to the substrate electrode by reflowing.

  Unlike the other embodiments, the substrate electrode of the test substrate here serves as the connection electrode of the contact sheet, so that the semiconductor chip or wafer and the contact sheet and the test substrate are fixed simultaneously.

  The contact sheet 40 is composed of a porous body layer 40 ′ composed of an insulating material such as a liquid crystalline polymer containing PTFE, polyimide, or aramid, for example. The pore diameter of the porous body layer 40 ′ is preferably about 0.01 to 20 μm. This hole is three-dimensionally continuous. The substrate electrode 21 is coated below the upper surface of the porous body layer 40 ′, and the gap g between the upper surface of the porous body layer 40 ′ and the surface of the substrate electrode 21 is 10 μm or less, more preferably 0.01 to It is 5 μm or less. The depth of the gap g is determined by the ease of penetration of solder bumps used for electrodes or terminals of electronic components such as semiconductor chips.

  When a semiconductor chip or wafer is mounted on a test apparatus, the substrate electrode 21 covered by the contact sheet 40 is disposed so as to face an electrode or terminal of an electronic component such as a semiconductor chip or wafer.

  When the semiconductor chip is removed from the contact sheet after the test is completed, the solder bump breaks at the interface between the part soaked in the porous body and the part not soaked in the surface of the porous body layer. Removed. Further, it is possible to remove it by immersing it in a liquid and applying ultrasonic waves, and it is more efficient as a process if the flux is cleaned at this time.

  Furthermore, when the gap amount from the surface of the contact sheet to the surface of the substrate electrode is determined to be a predetermined value, the amount of the solder bump soaking into the porous body layer can be accurately controlled.

  As described above, when soldering a contact sheet to a semiconductor chip, etc., the semiconductor chip is removed from the contact sheet while preventing electrode breakdown after test and spreading of bump solder amount after peeling in the same semiconductor chip. Can be removed. Therefore, it is possible to repair a chip on which a non-defective chip is mounted on another package substrate after the test or to reuse the test substrate.

  Also, by connecting the solder bumps of the semiconductor chip and the connection electrodes of the contact sheet by soldering, the mechanical load applied to the semiconductor chip and package during testing is reduced, and the test device has a simple configuration with few mechanical operating parts. Can do.

Next, a fifth embodiment will be described with reference to FIG.
As described above, in the present invention, when the contact sheet and the semiconductor chip are soldered and connected, it is possible to prevent the electrode from being destroyed after the test and the variation in the amount of bump solder after being peeled off within the same semiconductor chip. A semiconductor chip or the like can be removed from the contact sheet. Therefore, it is possible to repair the semiconductor chip in which the non-defective chip is mounted on another package substrate after the test.

  FIG. 4 is a partial cross-sectional view of a contact sheet on which a semiconductor wafer determined to be a non-defective product as a result of the test is mounted and packaged. For example, after a test such as burn-in is performed on a semiconductor wafer such as silicon which is an electronic component by the method according to the first embodiment, a contact sheet on which a semiconductor wafer having non-defective chips is mounted is provided on the semiconductor wafer 50. The resin 54 is impregnated around the solder bumps 51 as the electrodes and the porous layer 52 ′ constituting the contact sheet 52. Thereafter, an assembly process such as attaching a BGA ball to the connection electrode 53 and cutting the contact sheet 52 is performed to produce a semiconductor package. In this embodiment, the process can be reduced by simultaneously performing the test process and the connection process.

Next, a sixth embodiment will be described with reference to FIGS.
In this embodiment, a contact sheet in which a part of the porous body layer is filled with a solder derivative layer will be described. 12 to 14 are partial cross-sectional views of the contact sheet, FIG. 15 is an enlarged partial cross-sectional view of a part of the contact sheet, and FIG. 16 is a diagram schematically illustrating a process of forming the solder derivative layer. . As shown in FIG. 12, the contact sheet 60 includes, for example, a porous body layer 60 ′ made of an insulating material such as a liquid crystalline polymer containing PTFE (polytetrafluoroethylene), polyimide, and aramid, and the porous body layer. The connection electrode 61 is embedded in 60 ′ and the solder derivative layer 62 is filled in part of the porous body layer 60 ′. The pore diameter of the porous body layer 60 ′ is preferably about 0.01 to 20 μm. The pores of the porous body layer 60 'are three-dimensionally continuous. The connection electrode 61 is embedded below the upper surface of the porous body layer 60 ′, and the gap g between the surfaces of the connection electrode 61 embedded from the upper surface of the porous body layer 60 ′ is 5 μm or more, more preferably 10 μm. That's it. For example, when using Sn as the solder derivative layer 62 and forming the connection electrode 61 having a diameter of 100 μm, the gap g is preferably 400 μm or less from the allowable range of the electric resistance value. Further, the portion of the porous body layer 60 ′ other than the portion filled with the solder derivative layer 62 may be impregnated with resin. The connection electrodes 61 are arranged vertically and horizontally at the center portion of the contact sheet 60. The upper surface of the connection electrode 61 is embedded in the porous body layer 60 ′, and the lower surface of the connection electrode 61 is exposed from the lower surface of the porous body layer 60 ′.

  The solder derivative layer 62 fills the portion of the porous body layer 60 ′ between the upper surface of the porous body layer 60 ′ and the upper surface of the connection electrode 61 and the portion of the porous body layer 60 ′ near the side surface of the connection electrode 61. Has been. The solder derivative layer 60 only needs to be filled in at least the portion of the porous body layer 60 'between the upper surface of the porous body layer 60' and the upper surface of the connection electrode 61. In addition to what is shown in FIG. 13 (a), the solder derivative layer 62 is filled only in the portion of the porous body layer 60 'between the upper surface of the porous body layer 60' and the upper surface of the connection electrode 61, or FIG. As shown in (b), the solder derivative layer 62 is porous between the upper surface of the porous body layer 60 ′ and the upper surface of the connection electrode 61 and between the lower surface of the porous body layer 60 ′ and the lower surface of the connection electrode 61. The material layer 60 ′ and the porous material layer 60 ′ near the side surface of the connection electrode 61 may be filled. Further, as shown in FIGS. 14A and 14B, the solder derivative layer 62 may be formed so as to rise on the porous body layer 60 ′. Here, in the case of FIGS. 13B and 14B, the gaps g1 and g2 between the surfaces of the connection electrodes 61 embedded from the upper surface and the lower surface of the porous body layer 60 ′ are more preferably 5 μm or more. Is 10 μm or more. 13A and 14A, the height h of the solder derivative layer 62 from the upper surface of the porous body layer 60 ′ is preferably about 20 μm or less. When the height h exceeds 20 μm, even if the solder derivative layer 62 is made of Sn or an alloy containing Sn close to the composition of the solder bump 11, the solder bump 11 is unacceptable to the solder bump 11. This is because it diffuses and the composition of the solder bump 11 changes.

  In addition, the fact that the solder derivative layer 62 is filled means that the material constituting the solder derivative layer 62 is, for example, as shown in FIG. 15 (c), when the surface of the porous body is coated as shown in FIG. 15 (b). The case where it is spread on the part as shown in FIG.

  The solder derivative layer 62 can be made of Sn, an alloy containing Sn such as Sn—Pb, Sn—Ag, or other metal having a melting point of 300 ° C. or lower. Here, the metal having a melting point of 300 ° C. or less is due to the heat resistance of the electronic component to be inspected and the substrate for inspection. 15A and 15B, the solder derivative layer 62 may be made of a resin having good wettability with respect to the solder bumps 11 in addition to the above. Here, it is not necessary for the solder derivative layer 62 to have all the gaps configured only by one form of FIGS. 15A, 15B, and 15C. For example, a layer as shown in FIG. And a two-layer structure of layers as shown in FIG. 15A or a multilayer structure composed of the respective layers.

  Such a solder derivative layer 62 can be formed as follows, for example. First, as shown in FIG. 16A, the cathode electrode 63 is attached to the lower surface of the porous body layer 60 ′ in which the connection electrode 61 is embedded. The cathode electrode 63 is formed with a columnar portion 63 ′ that is higher than the thickness of the porous body layer 60 ′. The porous body layer 60 is in contact with the portion where the columnar portion 63 ′ is embedded in the connection electrode 61. Attach to ´. Here, the height of the columnar portion 63 ′ is made higher than the thickness of the porous body layer 60 ′ in the portion of the porous body layer 60 ′ located on the portion of the cathode electrode 63 other than the columnar portion 63 ′. This is to prevent the plating from being embedded. Further, the anode electrode 64 is disposed so as to face the cathode electrode 63 and the porous body layer 60 ′ is disposed between the cathode electrode 63. Then, as shown in FIG. 16B, these are immersed in an electrolytic plating solution such as an electrolytic Sn plating solution, and a voltage is applied between the anode electrode 64 and the cathode electrode 63 to perform electrolytic plating. Apply. As a result, the plating enters the porous body layer 60 ′, the plating is performed around the connection electrode 61, and the solder derivative layer 62 shown in FIG. 12 is formed. It is also possible to form the solder derivative layer 62 by electroless plating. In this case, for example, the solder derivative layer 62 can be formed by immersing the porous body layer 60 ′ in which the connection electrode 61 is embedded in the electroless plating solution.

  Next, an operation for testing an electronic component after mounting the electronic component on a test apparatus will be described. For example, the test apparatus shown in FIG. 8 is used. After the contact sheet 60 on which the semiconductor chip or the wafer 10 is mounted is placed on the test substrate 20 so that the connection electrodes 61 are in contact with the substrate electrodes 21, the burn-in is performed. Conduct tests such as tests. Here, when the semiconductor chip or wafer 10 is mounted on the contact sheet 60, the contact sheet 60 and the semiconductor chip or wafer 10 are arranged so that the connection electrodes 61 and the solder bumps 11 face each other. Alternatively, the solder derivative layer 62 and the solder bump 11 are connected by soldering. Specifically, for example, the substance constituting the solder derivative layer 62 is formed on the porous body layer 60 ′ between the upper surface of the porous body layer 60 ′ and the upper surface of the connection electrode 61 as shown in FIG. When dispersed in the part and when the surface of the porous body of the part is coated as shown in FIG. 15B, the solder bump 11 is melt-connected to the connection electrode 61 and the solder derivative layer 62 is formed. When the constituent material is spread on the porous layer 60 'between the upper surface of the porous layer 60' and the upper surface of the connection electrode 61 as shown in FIG. 11 is melt-connected to the solder derivative layer 62.

  The present embodiment has the following effects in addition to the effects described in the first embodiment. The substance constituting the solder induction layer 62 is dispersed in the porous body layer 60 ′ between the upper surface of the porous body layer 60 ′ and the upper surface of the connection electrode 61, and the porous body in that portion. Since the wettability of the solder bumps 11 in the porous body layer 60 'can be improved, the solder bumps 11 can easily penetrate into the porous body layer 60'. Thereby, even if the gaps g, g1, and g2 are 5 μm or more, the solder bump 11 can be connected to the connection electrode 62. Further, since the gaps g, g1, and g2 are 5 μm or more, the substance constituting the connection electrode 62 becomes difficult to diffuse into the solder bump 11 portion on the porous body layer 60 ′, and is peeled off from the contact sheet 60. The composition change of the solder bump 11 on the semiconductor chip or the wafer 10 side can be suppressed.

  The substance constituting the solder derivative layer 62 is Sn or an alloy containing Sn, and is spread over the portion of the porous body layer 60 ′ between the upper surface of the porous body layer 60 ′ and the upper surface of the connection electrode 61. In this case, since the solder bump 11 is electrically connected to the connection electrode 61 via the solder derivative layer 62, the material constituting the connection electrode 61 is difficult to diffuse into the solder bump 11, and the composition of the solder bump 11. Change can be suppressed. Here, it is conceivable that Sn or an alloy containing Sn constituting the solder derivative layer 62 diffuses into the solder bump 11, but the alloy containing Sn or Sn has a composition close to that of the solder bump 11. Even when Sn or an alloy containing Sn is diffused in the solder bump 11, the change in the composition of the solder bump 11 is small enough to be tolerated.

  By forming the solder derivative layer 62, the flatness of the solder bump 11 on the semiconductor chip or wafer 10 side after the solder bump 11 is peeled off from the contact sheet 60 can be improved, and the volume variation of the solder bump 11 can be reduced. Can be reduced.

Next, a seventh embodiment will be described with reference to FIGS.
In this embodiment, a contact sheet in which a connection electrode is not provided and a solder derivative layer is filled in a part of a porous body layer will be described. 17 and 18 are partial cross-sectional views of the contact sheet, and FIG. 19 is a diagram schematically showing a process of forming the solder derivative layer. As shown in FIG. 17, the contact sheet 70 includes a porous body layer 70 ′ and a porous body layer made of an insulating material such as a liquid crystalline polymer containing PTFE (polytetrafluoroethylene), polyimide, or aramid, for example. It is composed of a solder derivative layer 71 filled in a part of 70 '. The pore size of the porous body layer 70 ′ is preferably about 0.01 to 20 μm. The pores of the porous layer 70 'are three-dimensionally continuous. For example, when Sn is used as the solder derivative layer 71 and the solder derivative layer 71 having a diameter of 100 μm is formed, the thickness d of the porous body layer 70 ′ is preferably 400 μm or less from the allowable range of the electric resistance value. Further, a portion of the porous body layer 70 ′ other than the portion filled with the solder derivative layer 71 may be impregnated with resin.

  The solder derivative layer 71 is filled in a part of the porous body layer 70 ′ from the upper surface to the lower surface of the porous body layer 70 ′. The solder derivative layer 71 only needs to be filled in at least a part of the porous body layer 70 ′. As shown in FIG. 18, the solder derivative layer 71 is formed so as to rise on the porous body layer 70 ′. Also good. In FIG. 18, the height h of the solder derivative layer 71 from the upper surface of the porous body layer 70 ′ is preferably about 20 μm or less. When the height h exceeds 20 μm, even if the solder derivative layer 71 is made of Sn or an alloy containing Sn close to the composition of the solder bump 11, the solder bump 11 is unacceptable for the alloy containing Sn or Sn. This is because it diffuses and the composition of the solder bump 11 changes. Further, the fact that the solder derivative layer 71 is filled has the same meaning as in the sixth embodiment.

  The solder derivative layer 71 can be made of Sn, an alloy containing Sn such as Sn—Pb, Sn—Ag, or other metal having a melting point of 300 ° C. or lower. Here, the metal having a melting point of 300 ° C. or less is due to the heat resistance of the electronic component to be inspected and the substrate for inspection. In addition, when the substance constituting the solder induction layer 71 is dispersed in the porous body layer 70 ′ and when the surface of the porous body is coated, the solder derivative layer 62 is used in addition to the above. Alternatively, a resin having good wettability with respect to the solder bump 11 may be used. Further, the solder derivative layer 71 does not need to be configured by only one form of the gap. For example, the solder derivative layer 71 has a multilayer structure of a layer dispersed in the porous body layer 70 ′ and a filled layer. You can take it.

  Such a solder derivative layer 71 can be formed as follows, for example. First, the cathode electrode 72 is attached to the upper surface or the lower surface of the porous body layer 70 ′. The cathode electrode 72 is formed with a columnar portion 72 ′ that is higher than the thickness of the porous body layer 70 ′, and the porous body layer 70 ′ is attached to the columnar portion 72 ′. Here, the height of the columnar portion 72 ′ is set higher than the thickness of the porous body layer 70 ′ in the portion of the porous body layer 70 ′ located on the portion of the cathode electrode 72 other than the columnar portion 72 ′. This is to prevent the plating from being embedded. Further, the anode electrode 73 is disposed so as to face the cathode electrode 72 and the porous body layer 70 ′ is disposed between the cathode electrode 72. Then, as shown in FIG. 19B, these are immersed in an electrolytic plating solution such as an electrolytic Sn plating solution, and a voltage is applied between the anode electrode 73 and the cathode electrode 72 to perform electrolytic plating. Apply. As a result, plating enters the porous body layer 70 ′, and the solder derivative layer 71 shown in FIG. 17 is formed. It is also possible to form the solder derivative layer 71 by electroless plating.

  Next, an operation for testing an electronic component after mounting the electronic component on a test apparatus will be described. For example, the test apparatus shown in FIG. 8 is used, and the contact sheet 70 is placed on the test substrate 20 so that the solder derivative layer 71 is positioned on the substrate electrode 21. A test such as a burn-in test is carried out after the substrate electrode 21 or the solder derivative layer 71 and the solder bump 11 are solder-connected with the bumps 11 facing each other. Here, when the substrate electrode 21 or the solder derivative layer 70 and the solder bump 11 are connected by soldering, for example, when the material constituting the solder derivative layer 71 is dispersed in the porous body layer 70 ′ and porous In the case where the surface of the material is coated, the solder bump 11 is melt-connected to the substrate electrode 21, and the substance constituting the solder derivative layer 71 is spread in the porous material layer 70 '. The solder bumps 11 are fused and connected to the solder derivative layer 62.

  The present embodiment has the following effects in addition to the effects described in the fourth embodiment. When the substance constituting the solder induction layer 71 is dispersed in the porous body layer 70 ′ and when the surface of the porous body is coated, the solder bump 11 in the porous body layer 70 ′. Since the wettability of the solder bumps 11 can be improved, the solder bumps 11 can easily penetrate into the porous body layer 70 '. Thereby, even if thickness d is 5 micrometers or more, the solder bump 11 can be connected to the board | substrate electrode 21. FIG. Further, since the thickness d is 5 μm or more, the substance constituting the substrate electrode 21 is difficult to diffuse into the solder bump 11 portion on the porous body layer 70 ′, and the semiconductor chip after being peeled off from the contact sheet 70. Or the composition change of the solder bump 11 on the wafer 10 side can be suppressed.

  When the material constituting the solder derivative layer 71 is Sn or an alloy containing Sn and is spread over at least a part of the porous body layer 70 ′, the solder bumps 11 are interposed via the solder derivative layer 71. Since it is electrically connected to the substrate electrode 21, the material constituting the substrate electrode 21 becomes difficult to diffuse into the solder bump 11, and the composition change of the solder bump 11 can be suppressed. Here, it is conceivable that Sn or an alloy containing Sn constituting the solder derivative layer 71 diffuses into the solder bump 11, but the alloy containing Sn or Sn has a composition close to that of the solder bump 11. Even when Sn or an alloy containing Sn is diffused in the solder bump 11, the change in the composition of the solder bump 11 is small enough to be tolerated.

  By forming the solder derivative layer 71, the flatness of the solder bumps 11 on the semiconductor chip or wafer 10 side after the solder bumps 11 are peeled off from the contact sheet 71 can be improved. Can be reduced.

Next, the porous body used in the present invention will be described.
Specific examples of the porous body include a porous sheet in which three-dimensional continuous pores are formed in a sheet of polymer material or the like, a cloth in which polymer fibers or ceramic fibers are entangled in a three-dimensional network, or a nonwoven fabric. Specifically, for example, a sheet produced by stretching a crystalline polymer sheet such as polypropylene or polytetrafluoroethylene, a polyimide formed by utilizing a phase separation phenomenon such as spinodal decomposition or microphase separation of the polymer, etc. It may be a porous body. As the cloth or non-woven fabric, those made of ceramic fiber or polymer fiber are used.

  As the ceramic fiber, for example, silica glass fiber, alumina fiber, silicon carbide fiber, potassium titanate fiber or the like is used. Examples of polymer fibers include liquid crystalline polymers such as aromatic polyamide fibers and aromatic polyester fibers, high-Tg polymer fibers, fluorine-based polymer fibers such as PTFE fibers, polyparaphenylene sulfide fibers, aromatic polyimide fibers, and polybenzoic acids. Oxazole derivative fibers and the like are used. The ceramic fiber and polymer fiber may be mixed, or a composite fiber of ceramics and polymer may be used.

  Non-woven fabrics are preferable to cloths because the fibers are entangled three-dimensionally and the pore diameter is uniform. Further, as the nonwoven fabric, for example, a fine fiber having a diameter of about 0.1 to 0.3 μm obtained by finely pulverizing a polymer fiber nonwoven fabric produced by a melt blow method or a liquid crystalline polymer fiber such as aromatic polyamide is used. A non-woven fabric is preferable because the fiber diameter is fine and the pore diameter is uniform. In order to improve the dimensional stability of these nonwoven fabrics, it is preferable to prevent the fibers from being displaced by welding the fibers or coating a polymer or the like.

  Among these porous materials, a porous material obtained by stretching polytetrafluoroethylene, a porous material such as polyimide formed by utilizing a phase separation phenomenon, and a non-woven fabric of fine fibers of a liquid crystalline polymer are three-dimensionally homogeneous. It is preferable because it has a porous structure with little anisotropy and a uniform pore diameter.

The fragmentary sectional view of the contact sheet which concerns on the 1st Embodiment of this invention. The fragmentary sectional view of the process which shows the connection structure of the contact sheet and electronic component which concern on the 1st Embodiment of this invention. FIG. 3 is a partial cross-sectional view of the contact sheet and the electronic component for explaining a state where the electronic component according to the first embodiment of the present invention is removed from the contact sheet. The fragmentary sectional view of the contact sheet in which the semiconductor wafer determined to be a non-defective product as a result of the test according to the fifth embodiment of the present invention was mounted and packaged. The fragmentary sectional view of the contact sheet which concerns on the 2nd Embodiment of this invention. The process fragmentary sectional view which fixes the contact sheet which concerns on the 3rd Embodiment of this invention to a test board | substrate. Sectional drawing of the contact sheet formed on the test board | substrate which concerns on the 4th Embodiment of this invention. The schematic sectional drawing of the test apparatus explaining the state which electrically connects an electronic component and a test circuit via the contact sheet which concerns on the 1st Embodiment of this invention. The perspective view of the contact sheet which concerns on the 1st Embodiment of this invention. Sectional drawing of the BGA package which is an example of the electronic component which concerns on the 1st Embodiment of this invention. The schematic sectional drawing of the test apparatus explaining the state which electrically connects an electronic component and a test circuit via the contact sheet which concerns on the 1st Embodiment of this invention. The fragmentary sectional view of the contact sheet which concerns on the 6th Embodiment of this invention. The fragmentary sectional view of the contact sheet which concerns on the 6th Embodiment of this invention. The fragmentary sectional view of the contact sheet which concerns on the 6th Embodiment of this invention. The fragmentary sectional view which expanded a part of contact sheet which concerns on the 6th Embodiment of this invention. The figure which showed typically the process of forming the solder derivative layer which concerns on the 6th Embodiment of this invention. The fragmentary sectional view of the contact sheet which concerns on the 7th Embodiment of this invention. The fragmentary sectional view of the contact sheet which concerns on the 7th Embodiment of this invention. The figure which showed typically the process of forming the solder derivative layer which concerns on the 6th Embodiment of this invention.

Explanation of symbols

  1, 24, 29, 30, 40, 52, 60, 70 ... contact sheet, 1 ', 24', 27 ', 28, 30', 40 ', 52', 60 ', 70' ... porous body layer, 2, 25, 31, 53, 61 ... connection electrode, 3 ... internal wiring, 4 ... flux, 10, 12, 50 ... semiconductor chip or wafer, 11, 51 ... solder bump, 11 '... in the porous body layer Soaked solder portion, 13 ... underfill resin, 14 ... wiring board, 15 ... solder ball (BGA ball), 16 ... resin sealing body, 21 ... test board, 22 ... wiring, 23 ... test circuit, 32 ... plating layer 54, resin, 62, 71 ... solder derivative layer.

Claims (10)

Electronic components,
An insulating porous body layer, a connection electrode embedded below at least one main surface of the insulating porous body layer, and at least one main surface of the insulating porous body layer and the connection electrode A test contact sheet having a solder derivative filled in at least a part of the insulating porous body layer in between,
A solder for electrically connecting the electrode or terminal of the electronic component and the solder derivative;
Electronic component complex, wherein the provided child a. 2. The electronic component composite according to claim 1, wherein a gap amount from the at least one main surface of the insulating porous body layer to the connection electrode is 10 μm or less. The solder derivative electronic component composite according to claim 1 or 2, characterized by being composed of an alloy containing Sn or Sn. Electronic components,
Against the connection electrodes embedded insulating via layer, and the insulating two formed on the main surface insulating opposing via layer porous layer, filling at least a portion of the insulating porous layer A test contact sheet having a solder derivative,
A solder for electrically connecting the electrode or terminal of the electronic component and the solder derivative;
Electronic component complex, wherein the provided child a. Electronic components,
A test contact sheet comprising: an insulating porous body layer; and a solder derivative composed of Sn or an alloy containing Sn and filled in at least a part of the insulating porous body layer ;
A solder for electrically connecting the electrode or terminal of the electronic component and the solder derivative;
Electronic component complex, wherein the provided child a. A test circuit and a test contact sheet electrically connected to the test circuit;
The test contact sheet includes an insulating porous layer, a connection electrode embedded below at least one main surface of the insulating porous layer, and at least one main electrode of the insulating porous layer. A solder derivative filled in at least a part of the insulating porous body layer between a surface and the connection electrode,
An electronic component test method using an electronic component test apparatus,
Wherein is mounted under test electronic component to the test contact sheet of the electronic components of the test device, the solder bumps or balls is an electrode of an electronic component into contact with the solder derivative, a step of bonding heat melted and ,
Bonding the solder bumps or balls of the electronic component to the solder derivative and electrically connecting to the test circuit, and then testing the electronic component with the test circuit;
Separating the solder bumps or balls from the test contact sheet after the test is completed;
A test method for an electronic component, comprising: The step of separating the solder bumps or balls from the test contact sheet is performed by breaking the solder bumps or balls at an interface between a portion including a porous body layer and a portion not including the porous body layer. 6. A method for testing an electronic component according to 6 . In the step of bringing the solder bump or ball, which is an electrode of the electronic component, into contact with the connection electrode or the solder derivative via the insulating porous body layer and heating and melting and joining, the solder bump or ball is connected to the electronic component. Before contacting the electrode or the solder derivative, a flux is infiltrated into the interface between the insulating porous body layer and the connection electrode or the solder derivative and the vicinity thereof, and then the solder bump or ball is heated and melted and bonded. The method for testing an electronic component according to claim 6 or 7 , wherein: A test circuit, a test substrate electrically connected to the test circuit, a substrate electrode formed on the test substrate, and a test contact sheet;
The test contact sheet includes an insulating porous body layer and a solder derivative that is made of Sn or an alloy containing Sn and is filled in at least a part of the insulating porous body layer.
An electronic component test method using an electronic component test apparatus,
An electronic component to be tested is mounted on the test contact sheet of the electronic component test apparatus, and a solder bump or a ball as an electrode of the electronic component is brought into contact with the substrate electrode or the solder derivative, and heated and melted. Joining, and
Bonding the solder bumps or balls of the electronic component to the substrate electrode or the solder derivative and electrically connecting to the test circuit, and then testing the electronic component with the test circuit;
Separating the solder bumps or balls from the test contact sheet after the test is completed;
A test method for an electronic component, comprising: A test circuit and a test contact sheet electrically connected to the test circuit;
The test contact sheet includes an insulating porous layer, a connection electrode embedded below at least one main surface of the insulating porous layer, and at least one main electrode of the insulating porous layer. A solder derivative filled in at least a part of the insulating porous body layer between a surface and the connection electrode,
An electronic component manufacturing method using an electronic component test apparatus,
An electronic component to be tested is mounted on the test contact sheet in the electronic component testing apparatus, and a solder bump or a ball, which is an electrode of the electronic component, is connected to the connection electrode or the electrode via the insulating porous body layer. Contacting the solder derivative, heating and melting and joining,
Bonding the solder bumps or balls of the electronic component to the connection electrode or the solder derivative and electrically connecting to the test circuit, and then testing the electronic component with the test circuit;
Separating the solder bumps or balls from the test contact sheet after the test is completed;
Among the test contact sheets separated from the test substrate, the porous structure constituting the test contact sheet between the test contact sheet on which the electronic components determined to be non-defective by the test and the electronic components are mounted Impregnating the body layer with resin;
And a step of attaching solder balls used as terminals to the connection electrodes on the back surface of the test contact sheet.

Images