JP4386851B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

Info

Publication number
JP4386851B2
JP4386851B2 JP2005044820A JP2005044820A JP4386851B2 JP 4386851 B2 JP4386851 B2 JP 4386851B2 JP 2005044820 A JP2005044820 A JP 2005044820A JP 2005044820 A JP2005044820 A JP 2005044820A JP 4386851 B2 JP4386851 B2 JP 4386851B2
Authority
JP
Japan
Prior art keywords
switch
output
pads
input
switches
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005044820A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006229175A5 (enExample
JP2006229175A (ja
Inventor
直行 宮澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Device Innovations Inc
Original Assignee
Sumitomo Electric Device Innovations Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Device Innovations Inc filed Critical Sumitomo Electric Device Innovations Inc
Priority to JP2005044820A priority Critical patent/JP4386851B2/ja
Publication of JP2006229175A publication Critical patent/JP2006229175A/ja
Publication of JP2006229175A5 publication Critical patent/JP2006229175A5/ja
Application granted granted Critical
Publication of JP4386851B2 publication Critical patent/JP4386851B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
JP2005044820A 2005-02-21 2005-02-21 半導体装置の製造方法 Expired - Fee Related JP4386851B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005044820A JP4386851B2 (ja) 2005-02-21 2005-02-21 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005044820A JP4386851B2 (ja) 2005-02-21 2005-02-21 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2006229175A JP2006229175A (ja) 2006-08-31
JP2006229175A5 JP2006229175A5 (enExample) 2007-07-05
JP4386851B2 true JP4386851B2 (ja) 2009-12-16

Family

ID=36990225

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005044820A Expired - Fee Related JP4386851B2 (ja) 2005-02-21 2005-02-21 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JP4386851B2 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016162925A (ja) * 2015-03-03 2016-09-05 力晶科技股▲ふん▼有限公司 Ｍｏｍキャパシタ回路及び半導体装置
CN113225953B (zh) * 2021-05-07 2022-12-13 江西雕视信息技术股份有限公司 一种可支持高分辨率点对点显示编码解码的装置及方法

Also Published As

Publication number Publication date
JP2006229175A (ja) 2006-08-31

Similar Documents

Publication Publication Date Title
US11476226B2 (en) Radio-frequency module and communication device
US9941582B2 (en) Switch module, front-end module, and driving method for switch module
CN1316673C (zh) 天线开关模块及其制造方法、一体化通信模块和通信装置
JP3759143B2 (ja) マルチバンドアンテナを有する移動通信装置
JP6908000B2 (ja) 高周波回路
JP4433087B2 (ja) 高周波スイッチ回路
US20050197095A1 (en) High-frequency switching circuit, high-frequency module, and wireless communications device
JP2009531882A (ja) マルチバンドおよびマルチモード方式の移動無線モジュール
JP2005117467A (ja) 高周波スイッチ装置
CN106450771A (zh) 电子装置及其多频段天线
WO2017204347A1 (ja) 高周波フィルタ装置、及び、通信装置
US12375054B2 (en) Acoustic wave filter with buried connection layer under resonator
JP2005303940A (ja) アンテナスイッチ回路、ならびにそれを用いた複合高周波部品および移動体通信機器
WO2021205845A1 (ja) 高周波回路、ダイバーシティモジュールおよび通信装置
KR101931682B1 (ko) 단일안테나의 동작을 위한 TLT(Transmission Line Transformer)를 포함하는 SPDT 스위치 구조
JP3494046B2 (ja) Ｔｄｍａ／ｃｄｍａ共用通信端末
CN107210774A (zh) 开关电路以及高频模块
JP4386851B2 (ja) 半導体装置の製造方法
JP2004297633A (ja) アンテナ共用器およびそれを用いた無線端末
US7869770B2 (en) Apparatus, methods and articles of manufacture for a multi-band switch
JP2009218649A (ja) 高周波電子部品
WO2023037978A1 (ja) 高周波回路および通信装置
KR20070110957A (ko) 프론트 앤드 모듈
JP2006217279A (ja) アンテナスイッチ回路及び無線通信装置
JP2006174219A (ja) アンテナ装置およびそれを用いた携帯無線機

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070516

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070516

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20090206

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090210

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090409

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20090507

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090729

A911 Transfer to examiner for re-examination before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20090814

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20090929

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090929

R150 Certificate of patent or registration of utility model

Ref document number: 4386851

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121009

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131009

Year of fee payment: 4

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees