JP4380546B2 - Manufacturing die for semiconductor devices - Google Patents

Manufacturing die for semiconductor devices Download PDF

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Publication number
JP4380546B2
JP4380546B2 JP2005016634A JP2005016634A JP4380546B2 JP 4380546 B2 JP4380546 B2 JP 4380546B2 JP 2005016634 A JP2005016634 A JP 2005016634A JP 2005016634 A JP2005016634 A JP 2005016634A JP 4380546 B2 JP4380546 B2 JP 4380546B2
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electrical connection
lead frame
semiconductor device
resin
mold
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JP2005117072A (en
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良一 笹原
大輔 中島
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched

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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a molding metal mold of a semiconductor device that can be manufactured at low cost by preventing thin burrs at an electric junction on a lead frame and establishing stable electrical connection. <P>SOLUTION: The molding metal mold seals a lead frame 2 with resin when mounting and electrically connecting a semiconductor device 1 to the outside. When sealing with resin, the molding metal molds 51, 52 are built in a way free from coming in contact with electric junction 21 where the semiconductor device 1 and the lead frame 2 are electrically connected. <P>COPYRIGHT: (C)2005,JPO&amp;NCIPI

Description

この発明は、リードフレームを樹脂封止して一体成形する半導体装置の製造金型に関するもので、特にリードフレームをインサート成形する際のバリ発生を防止するものに関する。   The present invention relates to a mold for manufacturing a semiconductor device in which a lead frame is sealed with a resin and integrally molded, and more particularly to a mold for preventing the generation of burrs when insert molding a lead frame.

図１５は、従来の半導体装置を示す上面図である。また図１６は、上記図１５のＥ−Ｅ線における断面図である。図において、１は半導体素子、２は半導体素子１が載置されており、外部と電気的な接続を行うリードフレーム、３は半導体素子１とリードフレーム２とを電気的に接続する電気的接続部材、２１はリードフレーム２において接続部材３が接続される領域である電気的接続領域、４は樹脂により成形された筐体であり、リードフレーム２は、樹脂により筐体４内に封止されている。また、筐体４は中空部４１を有し、半導体素子１はこの中空部４１側に露出されている。   FIG. 15 is a top view showing a conventional semiconductor device. 16 is a cross-sectional view taken along line EE in FIG. In the figure, 1 is a semiconductor element, 2 is a lead frame on which a semiconductor element 1 is mounted, and 3 is an electrical connection for electrically connecting the semiconductor element 1 and the lead frame 2. Reference numeral 21 denotes an electrical connection region in which the connection member 3 is connected in the lead frame 2, and 4 denotes a housing formed of resin. The lead frame 2 is sealed in the housing 4 by resin. ing. The housing 4 has a hollow portion 41, and the semiconductor element 1 is exposed to the hollow portion 41 side.

このように構成された半導体装置の製造方法は、まず、金型内にリードフレーム２を載置して、次に、金型内に樹脂をインジェクション成形、トランスファー成形により注入して、リードフレーム２と筐体４とを一体成形する方法が用いられている。   In the manufacturing method of the semiconductor device configured as described above, first, the lead frame 2 is placed in the mold, and then the resin is injected into the mold by injection molding and transfer molding. A method of integrally molding the casing 4 and the casing 4 is used.

しかしながら、以上のような従来の半導体装置は、リードフレーム２の樹脂モールドの際に、リードフレーム２と金型との微少な空間を介して樹脂が漏洩して、電気的接続領域２１に薄バリ４２が発生する。従って、電気的接続部材３を電気的接続領域２１にワイヤボンディング、はんだ付けなどにより接合することが容易にできないという問題点があった。   However, in the conventional semiconductor device as described above, when the lead frame 2 is resin-molded, the resin leaks through a minute space between the lead frame 2 and the mold, and a thin burr is formed in the electrical connection region 21. 42 occurs. Therefore, there is a problem that the electrical connection member 3 cannot be easily joined to the electrical connection region 21 by wire bonding or soldering.

この問題を解決する方法として、リードフレーム２に対向する金型の密着圧を高めて、リードフレーム２と金型との微少な空間を無くし、樹脂が当該部分から漏洩するのを防いでいた。また、電気的接続部材３による接続を行う前に、電気化学反応を利用した電解バリ取り法、液体の高圧噴射による水圧バリ取り法、微粒子の研磨材を用いたブラスト法、及びこれらの方法の組合せによりバリを除去していた。   As a method for solving this problem, the adhesion pressure of the mold facing the lead frame 2 is increased to eliminate a minute space between the lead frame 2 and the mold, thereby preventing the resin from leaking from the portion. In addition, before the connection by the electrical connection member 3, an electrolytic deburring method using an electrochemical reaction, a hydraulic deburring method by high-pressure injection of liquid, a blasting method using a fine particle abrasive, and a method of these methods The burr was removed by the combination.

しかしながら、金型の密着圧を高めるには、リードフレーム２及び金型の面粗度、平面度、寸法を高精度にすることが必要であり、製造コストが高くなるという新たな問題点が発生する。また、リードフレーム２と金型とを密着させることにより、リードフレーム２の電気的接続領域２１にキズや樹脂カスの付着などが発生し、電気的接続不良が生じるという問題点もある。   However, in order to increase the adhesion pressure of the mold, it is necessary to increase the surface roughness, flatness, and dimensions of the lead frame 2 and the mold, which causes a new problem that the manufacturing cost increases. To do. In addition, when the lead frame 2 and the mold are brought into close contact with each other, there is a problem that flaws, adhesion of resin residue, and the like occur in the electrical connection region 21 of the lead frame 2 to cause poor electrical connection.

さらに、電解バリ取り法では、薄バリを完全に除去することが極めて困難であり、水圧バリ取り法及びブラスト法を併用する必要がある。また、リードフレーム２に樹脂が成形されたまま溶液中に浸漬させるため、溶液や筐体４が汚れてしまい、溶液の交換を頻繁に行ったり、電解バリ取り後にさらに筐体４を洗浄する必要がある。このため、製造工程が煩雑となり、製造コストが高くなるという問題点がある。   Furthermore, in the electrolytic deburring method, it is extremely difficult to completely remove the thin deburring, and it is necessary to use both the hydraulic deburring method and the blasting method. Moreover, since the resin is immersed in the solution while the resin is molded on the lead frame 2, the solution and the housing 4 are contaminated, and it is necessary to frequently replace the solution or to further clean the housing 4 after removing electrolytic burrs. There is. For this reason, there are problems that the manufacturing process becomes complicated and the manufacturing cost increases.

また、水圧バリ取り法では、高圧噴射を発生させるための高価な設備が必要であり、且つ筐体４の形状によって水圧の当たらない部分があるので、完全に薄バリを除去することが困難である。   In addition, the water pressure deburring method requires expensive equipment for generating high-pressure injection, and because there is a portion where the water pressure is not applied depending on the shape of the housing 4, it is difficult to completely remove the thin burr. is there.

また、ブラスト法においては、筐体４が、粒子の衝突で破損するため、バリ取りの必要がない部分をマスキングする必要があり、製造工程が煩雑となる問題がある。また、粒子がリードフレーム２及び筐体４に突き刺さり、そのままの状態で電気的接続を行うと電気的接続不良が生じるという問題がある。   Further, in the blast method, the housing 4 is damaged by the collision of particles, so that it is necessary to mask a portion that does not need to be deburred, and there is a problem that the manufacturing process becomes complicated. In addition, there is a problem that if the particles stick into the lead frame 2 and the casing 4 and electrical connection is performed in the state as it is, electrical connection failure occurs.

以上のように、いずれのバリ取り工法においても、完全に薄バリを除去することは困難であり、目視作業などで多くの時間と手間をかけて薄バリがないことを確認しなければならなかった。   As described above, in any deburring method, it is difficult to completely remove thin burrs, and it is necessary to confirm that there are no thin burrs by taking a lot of time and effort by visual work. It was.

この発明は、以上のような問題点を解決するためになされたもので、リードフレーム上の電気的接続領域での薄バリの発生を防止し、電気的接続を安定的に行うことができ、安価に製造できる半導体装置の製造金型を得ることを目的とする。   The present invention has been made to solve the above-described problems, prevents the occurrence of thin burrs in the electrical connection region on the lead frame, and can stably perform electrical connection. An object is to obtain a manufacturing die for a semiconductor device that can be manufactured at low cost.

この発明に係る半導体装置の製造金型は、中空部を有する樹脂筐体を成形するものであり、半導体素子を載置して外部と電気的な接続を行う電気的接続領域が形成されたリードフレームを、電気的接続領域が中空部に露出するように樹脂封止して樹脂筐体を成形する半導体装置の製造金型であって、この製造金型は、電気的接続領域に対向し中空部を成形する部分に凹部を備え、樹脂封止の際に製造金型と電気的接続領域とが接触しないように構成されているものである。 A mold for manufacturing a semiconductor device according to the present invention is for molding a resin casing having a hollow portion, and a lead on which a semiconductor element is placed and an electrical connection region for electrical connection to the outside is formed. A mold for manufacturing a semiconductor device in which a frame is resin-sealed so that an electrical connection region is exposed in a hollow portion, and a resin casing is molded . The manufacturing die is opposed to the electrical connection region and is hollow. The part for molding the part is provided with a recess, and is configured so that the manufacturing mold and the electrical connection region do not come into contact with each other during resin sealing.

以上のように、請求項１記載の発明によれば、中空部を有する樹脂筐体を成形するものであり、半導体素子を載置して外部と電気的な接続を行う電気的接続領域が形成されたリードフレームを、電気的接続領域が中空部に露出するように樹脂封止して樹脂筐体を成形する半導体装置の製造金型であって、この製造金型は、電気的接続領域に対向し中空部を成形する部分に凹部を備え、樹脂封止の際に製造金型と電気的接続領域とが接触しないように構成されているので、電気的接続領域を傷つけることなく、また電気的接続領域を汚すこともなく、安定的に電気的接続を行うことができる効果が得られる。さらに、金型の密着圧を高めることができるため、薄バリの発生を防止できる効果が得られる。
 As described above, according to the first aspect of the present invention, a resin casing having a hollow portion is formed, and an electrical connection region for mounting a semiconductor element and electrically connecting to the outside is formed. the lead frames, a mold for manufacturing a semiconductor device for forming a resin housing sealed with resin as the electrical connection region are exposed to the hollow portion, the manufacturing mold, the electrical connection region Concave portions are formed in the facing portions to form the hollow portions, and are configured so that the manufacturing mold and the electrical connection region do not come into contact with each other during resin sealing. The effect that the electrical connection can be stably performed without contaminating the target connection region is obtained. Furthermore, since the adhesion pressure of the mold can be increased, an effect of preventing the occurrence of thin burrs can be obtained.

実施の形態１．
図１は、この発明の実施の形態１による半導体装置を示す上面図であり、図２は、上記図１のＡ−Ａ線における拡大断面図である。また図３は、この発明の実施の形態１による半導体装置のリードフレームを示す上面図であり、図４は、上記図３のＢ−Ｂ線における拡大断面図である。また図５は、この発明の実施の形態１による半導体装置の樹脂封止成形を説明する断面図であり、図６は、上記図３のａ部における拡大断面図である。 Embodiment 1 FIG.
1 is a top view showing a semiconductor device according to Embodiment 1 of the present invention, and FIG. 2 is an enlarged cross-sectional view taken along line AA of FIG. 3 is a top view showing a lead frame of the semiconductor device according to the first embodiment of the present invention, and FIG. 4 is an enlarged sectional view taken along line BB of FIG. FIG. 5 is a cross-sectional view for explaining resin sealing molding of the semiconductor device according to the first embodiment of the present invention, and FIG. 6 is an enlarged cross-sectional view at a portion a of FIG.

図１において、１は半導体素子、２は半導体素子１が載置されており、外部と電気的な接続を行うリードフレーム、３は半導体素子１とリードフレーム２とを電気的に接続する電気的接続部材、２１はリードフレーム２において電気的接続部材３が接続される領域である電気的接続領域、４は樹脂により成形された筐体であり、リードフレーム２は、樹脂により筐体４内に封止されている。また、筐体４は中空部４１を有し、半導体素子１はこの中空部４１側に露出されている。   In FIG. 1, 1 is a semiconductor element, 2 is a lead frame on which a semiconductor element 1 is mounted, and 3 is an electrical connection that electrically connects the semiconductor element 1 and the lead frame 2. The connection member 21 is an electrical connection region in which the electrical connection member 3 is connected in the lead frame 2, and 4 is a housing formed of resin. The lead frame 2 is placed in the housing 4 by resin. It is sealed. The housing 4 has a hollow portion 41, and the semiconductor element 1 is exposed to the hollow portion 41 side.

２２は電気的接続領域２１の外周に形成された溝である。この溝の形状は、凹形状、Ｖ字状、Ｕ字状など、樹脂成形時に、リードフレーム２と上金型５１との微少な空間から漏洩する樹脂を溜めることができる形状であればよく、漏洩する樹脂の最大量が溝を乗り越えない寸法に設定する。   Reference numeral 22 denotes a groove formed on the outer periphery of the electrical connection region 21. The shape of the groove may be a concave shape, a V shape, a U shape, etc., as long as the resin leaks from a minute space between the lead frame 2 and the upper mold 51 during resin molding, Set the dimension so that the maximum amount of resin to leak does not get over the groove.

このように構成された半導体装置の製造方法を、図３乃至図６に基づいて説明する。まず、図３に示すようなリードフレーム２を成形する。リードフレーム２は、銅、銅合金などの金属板をプレス加工やエッチング加工により形成する。さらに、図４に示すように、電気的接続領域２１の外周に溝２２を形成する。溝２２は、プレス工法、エッチング工法、レーザー工法などにより形成することができる。   A method of manufacturing the semiconductor device configured as described above will be described with reference to FIGS. First, the lead frame 2 as shown in FIG. 3 is formed. The lead frame 2 is formed by pressing or etching a metal plate such as copper or copper alloy. Further, as shown in FIG. 4, a groove 22 is formed on the outer periphery of the electrical connection region 21. The groove 22 can be formed by a press method, an etching method, a laser method, or the like.

次に、図５に示すように、リードフレーム２を、上金型５１及び下金型５２から構成されるモールド金型に密着させて設置する。上金型５１と下金型５２との間には、筐体４の外形に相当する空間（キャビティ）が形成されており、この空間内にエポキシなどの樹脂を注入して、リードフレーム２が封止された筐体４を形成する。   Next, as shown in FIG. 5, the lead frame 2 is placed in close contact with a mold die composed of an upper die 51 and a lower die 52. A space (cavity) corresponding to the outer shape of the housing 4 is formed between the upper mold 51 and the lower mold 52, and a resin such as epoxy is injected into the space so that the lead frame 2 is A sealed housing 4 is formed.

このとき、図６に示すように、リードフレーム２と上金型５１との微少な空間を介して樹脂が漏洩する。しかし、電気的接続領域２１の外周には溝２２が形成されているので、漏洩した樹脂は溝２２に溜り、電気的接続領域２１に到達することはなく、電気的接続領域２１に薄バリが発生することを防ぐ。   At this time, as shown in FIG. 6, the resin leaks through a minute space between the lead frame 2 and the upper mold 51. However, since the groove 22 is formed on the outer periphery of the electrical connection region 21, the leaked resin accumulates in the groove 22 and does not reach the electrical connection region 21, and a thin burr is formed in the electrical connection region 21. Prevent it from occurring.

リードフレーム２の樹脂封止成形が終わると、半導体素子１をリードフレーム２に載置して、半導体素子１とリードフレーム２の電気的接続領域２１とを、金線、アルミニウム線などの電気的接続部材３でワイヤボンディングされる。   When the resin sealing molding of the lead frame 2 is finished, the semiconductor element 1 is placed on the lead frame 2, and the electrical connection region 21 between the semiconductor element 1 and the lead frame 2 is electrically connected to a gold wire, an aluminum wire, or the like. Wire bonding is performed by the connecting member 3.

以上のように、この実施の形態１によれば、リードフレーム２の樹脂封止成形の際に、電気的接続領域２１に樹脂が漏洩するのを防いで、薄バリの発生を防止できるため、電気的接続領域２１を清浄な状態に保つことができ、安定的に電気的接続を行うことができる。また、樹脂成形後に、手間のかかる薄バリ取りの工程が不要となり、安価に装置を製造することができる。   As described above, according to the first embodiment, the resin can be prevented from leaking into the electrical connection region 21 during the resin sealing molding of the lead frame 2, and the occurrence of thin burrs can be prevented. The electrical connection region 21 can be kept clean and stable electrical connection can be performed. In addition, a thin deburring process is not required after resin molding, and the apparatus can be manufactured at low cost.

なお、上記実施の形態１では、リードフレーム２における電気的接続領域２１の外周に溝２２を形成したが、上金型５１において、電気的接続領域２１に対応する領域の外周に溝を形成しても、上記実施の形態１と同様の効果が得られることは言うまでもない。   In the first embodiment, the groove 22 is formed on the outer periphery of the electrical connection region 21 in the lead frame 2. However, in the upper mold 51, the groove is formed on the outer periphery of the region corresponding to the electrical connection region 21. However, it goes without saying that the same effect as in the first embodiment can be obtained.

実施の形態２．
図７は、この発明の実施の形態２による半導体装置を示す上面図であり、図８は、上記図７のＣ−Ｃ線における拡大断面図である。また図９は、この発明の実施の形態２による半導体装置のリードフレームを示す上面図であり、図１０は、上記図９のＤ−Ｄ線における拡大断面図である。また図１１は、この発明の実施の形態２による半導体装置の樹脂封止成形を説明する断面図であり、図１２は、上記図１１のｂ部における拡大断面図である。なお、上記実施の形態１と同様または相当する部分には同一の符号を付し、その説明を省略している。 Embodiment 2. FIG.
7 is a top view showing a semiconductor device according to Embodiment 2 of the present invention, and FIG. 8 is an enlarged cross-sectional view taken along the line CC of FIG. 9 is a top view showing a lead frame of the semiconductor device according to the second embodiment of the present invention, and FIG. 10 is an enlarged cross-sectional view taken along the line DD of FIG. FIG. 11 is a cross-sectional view for explaining resin sealing molding of a semiconductor device according to the second embodiment of the present invention, and FIG. 12 is an enlarged cross-sectional view at a portion b in FIG. In addition, the same code | symbol is attached | subjected to the part similar or equivalent to the said Embodiment 1, and the description is abbreviate | omitted.

本実施の形態では、図８及び図１０に示すように、リードフレーム２に形成された溝２２で囲まれた電気的接続領域２１の表面高さを、他の領域の表面高さより低く沈み込ませたものである。このような構成にすれば、図１１及び図１２に示すように、樹脂封止成形時に、電気的接続領域２１が上金型５１と接触することがない。   In the present embodiment, as shown in FIGS. 8 and 10, the surface height of the electrical connection region 21 surrounded by the groove 22 formed in the lead frame 2 sinks lower than the surface height of other regions. It is not. With such a configuration, as shown in FIGS. 11 and 12, the electrical connection region 21 does not come into contact with the upper mold 51 during resin sealing molding.

ここで、沈み込ませる量は、樹脂封止成形時に、電気的接続領域２１が上金型５１と接触せず、且つ溝２２に溜まった樹脂が電気的接続領域２１に溢れ出ない程度の量である。沈み込ませる方法は、プレス工法、エッチング工法にて、溝２２と同時に形成する。   Here, the amount to be submerged is such that the electrical connection region 21 does not come into contact with the upper mold 51 and the resin accumulated in the groove 22 does not overflow into the electrical connection region 21 during resin sealing molding. It is. As a method of sinking, the groove 22 is formed simultaneously with a press method or an etching method.

以上のように、この実施の形態２によれば、溝２２で囲まれた電気的接続領域２１の表面高さを、他の領域の表面高さより低く形成することにより、樹脂封止成形時に、電気的接続領域２１が上金型５１と接触することがない。従って、金型によって電気的接続領域２１を傷つけることなく、また金型に付着した樹脂カスや埃などが電気的接続領域２１を汚すこともなく、清浄な状態を保つことができ、安定的に電気的接続を行うことができる。   As described above, according to the second embodiment, by forming the surface height of the electrical connection region 21 surrounded by the groove 22 lower than the surface height of other regions, at the time of resin sealing molding, The electrical connection region 21 does not come into contact with the upper mold 51. Accordingly, a clean state can be maintained stably without damaging the electrical connection region 21 by the mold, and without the resin residue or dust adhering to the mold contaminating the electrical connection region 21. An electrical connection can be made.

なお、上記実施の形態２では、リードフレーム２の電気的接続領域２１の周囲に溝２２を形成した上で、溝２２で囲まれた電気的接続領域２１の表面高さを、他の領域の表面高さより低く形成する構成としたが、リードフレーム２に溝２２を設けず、電気的接続領域２１の表面高さを、他の領域の表面高さより低く形成する構成のみでも良い。   In the second embodiment, the groove 22 is formed around the electrical connection region 21 of the lead frame 2, and the surface height of the electrical connection region 21 surrounded by the groove 22 is set to the other region. Although the structure is formed so as to be lower than the surface height, the structure may be such that the groove 22 is not provided in the lead frame 2 and the surface height of the electrical connection region 21 is formed lower than the surface height of other regions.

すなわち、電気的接続領域２１の表面高さを、他の領域の表面高さより低く形成することにより、電気的接続領域２１が上金型５１と接触しないため、金型の密着圧を高めても電気的接続領域２１にキズや樹脂カスの付着などが発生しない。従って、金型の密着圧を高めて、リードフレーム２と金型との間における樹脂の漏洩を防ぎ、薄バリの発生を防止することができる。   That is, by forming the surface height of the electrical connection region 21 lower than the surface height of other regions, the electrical connection region 21 does not come into contact with the upper mold 51. Therefore, even if the adhesion pressure of the mold is increased. No scratches or resin residue adhere to the electrical connection region 21. Accordingly, it is possible to increase the adhesion pressure of the mold, prevent the resin from leaking between the lead frame 2 and the mold, and prevent the occurrence of thin burrs.

実施の形態３．
図１３は、この発明の実施の形態３による半導体装置の製造金型を示す断面図であり、図１４は、上記図１３のｃ部を拡大した拡大断面図である。なお、上記実施の形態１と同様または相当する部分には同一の符号を付し、その説明を省略している。 Embodiment 3 FIG.
13 is a cross-sectional view showing a semiconductor device manufacturing mold according to Embodiment 3 of the present invention, and FIG. 14 is an enlarged cross-sectional view enlarging a portion c of FIG. In addition, the same code | symbol is attached | subjected to the part similar or equivalent to the said Embodiment 1, and the description is abbreviate | omitted.

本実施の形態では、図１３及び図１４に示すように、上金型５１に凹部５３を設けた構成となっている。これにより、上記実施の形態２と同様に、樹脂封止成形時に、電気的接続領域２１が上金型５１と接触することを防ぐことができる。従って、金型によって電気的接続領域２１を傷つけることなく、また金型に付着した樹脂カスや埃などが電気的接続領域２１を汚すこともなく、清浄な状態を保つことができ、安定的に電気的接続を行うことができる。   In the present embodiment, as shown in FIGS. 13 and 14, the upper mold 51 is provided with a recess 53. Thereby, like the said Embodiment 2, it can prevent that the electrical connection area | region 21 contacts the upper metal mold | die 51 at the time of resin sealing molding. Accordingly, a clean state can be maintained stably without damaging the electrical connection region 21 by the mold, and without the resin residue or dust adhering to the mold contaminating the electrical connection region 21. An electrical connection can be made.

なお、上記実施の形態３では、リードフレーム２の電気的接続領域２１の周囲に溝２２を形成した上で上金型５１に凹部５３を設けた構成としたが、リードフレーム２に溝２２を設けず上金型５１の凹部５３のみでも良い。   In the third embodiment, the groove 22 is formed around the electrical connection region 21 of the lead frame 2 and the upper mold 51 is provided with the recess 53. However, the groove 22 is formed in the lead frame 2. Only the concave portion 53 of the upper mold 51 may be provided without being provided.

すなわち、上金型５１の凹部５３により、電気的接続領域２１が上金型５１と接触しないため、金型の密着圧を高めても電気的接続領域２１にキズや樹脂カスの付着などが発生しない。従って、金型の密着圧を高めて、リードフレーム２と金型との間における樹脂の漏洩を防ぎ、薄バリの発生を防止することができる。   That is, since the electrical connection region 21 does not come into contact with the upper die 51 due to the concave portion 53 of the upper die 51, even if the adhesion pressure of the die is increased, scratches or resin residue adhere to the electrical connection region 21. do not do. Accordingly, it is possible to increase the adhesion pressure of the mold, prevent the resin from leaking between the lead frame 2 and the mold, and prevent the occurrence of thin burrs.

この発明の実施の形態１による半導体装置を示す上面図である。1 is a top view showing a semiconductor device according to a first embodiment of the present invention. この発明の実施の形態１による半導体装置を示す断面図である。It is sectional drawing which shows the semiconductor device by Embodiment 1 of this invention. この発明の実施の形態１による半導体装置のリードフレームを示す上面図である。1 is a top view showing a lead frame of a semiconductor device according to a first embodiment of the present invention. この発明の実施の形態１による半導体装置のリードフレームを示す拡大断面図である。1 is an enlarged sectional view showing a lead frame of a semiconductor device according to a first embodiment of the present invention. この発明の実施の形態１による半導体装置の樹脂封止成形を説明する断面図である。It is sectional drawing explaining the resin sealing molding of the semiconductor device by Embodiment 1 of this invention. この発明の実施の形態１による半導体装置の樹脂封止成形を説明する拡大断面図である。It is an expanded sectional view explaining resin sealing molding of the semiconductor device by Embodiment 1 of this invention. この発明の実施の形態２による半導体装置を示す上面図である。It is a top view which shows the semiconductor device by Embodiment 2 of this invention. この発明の実施の形態２による半導体装置を示す断面図である。It is sectional drawing which shows the semiconductor device by Embodiment 2 of this invention. この発明の実施の形態２による半導体装置のリードフレームを示す断面図である。It is sectional drawing which shows the lead frame of the semiconductor device by Embodiment 2 of this invention. この発明の実施の形態２による半導体装置のリードフレームを示す拡大断面図である。It is an expanded sectional view which shows the lead frame of the semiconductor device by Embodiment 2 of this invention. この発明の実施の形態２による半導体装置の樹脂封止成形を説明する断面図である。It is sectional drawing explaining the resin sealing molding of the semiconductor device by Embodiment 2 of this invention. この発明の実施の形態２による半導体装置の樹脂封止成形を説明する拡大断面図である。It is an expanded sectional view explaining resin sealing molding of the semiconductor device by Embodiment 2 of this invention. この発明の実施の形態３による半導体装置の樹脂封止成形を説明する断面図である。It is sectional drawing explaining the resin sealing molding of the semiconductor device by Embodiment 3 of this invention. この発明の実施の形態３による半導体装置の樹脂封止成形を説明する拡大断面図である。It is an expanded sectional view explaining the resin sealing molding of the semiconductor device by Embodiment 3 of this invention. 従来の半導体装置を示す上面図である。It is a top view which shows the conventional semiconductor device. 従来の半導体装置を示す断面図である。It is sectional drawing which shows the conventional semiconductor device.

符号の説明Explanation of symbols

１ 半導体素子、２ リードフレーム、３ 電気的接続部材、４ 筐体、２１ 電気的接続領域、２２ 溝、４１ 中空部、５１ 上金型、５２ 下金型、５３ 凹部。
DESCRIPTION OF SYMBOLS 1 Semiconductor element, 2 Lead frame, 3 Electrical connection member, 4 Housing | casing, 21 Electrical connection area | region, 22 Groove, 41 Hollow part, 51 Upper die, 52 Lower die, 53 Concave part

Claims (1)

中空部を有する樹脂筐体を成形するものであり、半導体素子を載置して外部と電気的な接続を行う電気的接続領域が形成されたリードフレームを、上記電気的接続領域が上記中空部に露出するように樹脂封止して上記樹脂筐体を成形する半導体装置の製造金型であって、この製造金型は、上記電気的接続領域に対向し上記中空部を成形する部分に凹部を備え、樹脂封止の際に上記製造金型と上記電気的接続領域とが接触しないように構成されていることを特徴とする半導体装置の製造金型。 A resin casing having a hollow portion is molded, and a lead frame in which an electrical connection region for electrical connection with the outside is formed by mounting a semiconductor element is formed, and the electrical connection region is the hollow portion. A mold for manufacturing a semiconductor device in which the resin casing is molded by resin sealing so as to be exposed to the surface of the semiconductor device, the manufacturing mold facing the electrical connection region and being recessed in a portion for molding the hollow portion the provided, a mold for manufacturing a semiconductor device, characterized in that the manufacturing mold and the said electrical connection area is configured so as not to contact during resin sealing.
JP2005016634A 2005-01-25 2005-01-25 Manufacturing die for semiconductor devices Expired - Lifetime JP4380546B2 (en)

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