JP4374940B2 - Sync signal processing circuit - Google Patents

Description

  The present invention relates to a synchronization signal processing circuit in a digital display device such as a plasma display.

  In recent years, an apparatus using a digital display device such as a plasma display has been attracting attention, and efforts have been made to receive video signals of various horizontal and vertical frequencies such as high definition and multi-scan.

  The sync signal processing in such an apparatus determines the position of the video and on-screen display (OSD) by counting the horizontal sync signal based on the vertical sync signal, and the phase of the horizontal sync signal and the vertical sync signal. Therefore, it is necessary to always maintain a constant phase relationship so as not to cause a counting error due to a missing horizontal sync signal.

  Although there is no known document, FIG. 4 shows a block diagram of a conventional synchronous processing circuit. In FIG. 4, the vertical synchronization signal phase detection means 1 detects the phase between the front edge of the horizontal synchronization signal and the front edge of the vertical synchronization signal, and the detection result is input to the phase determination means 2. The discrimination pattern generating means 3 generates a discrimination pattern in which the region is divided with respect to the phase for one period of the horizontal synchronizing signal as shown in FIG. Regarding the division of the area, the division is performed at the position of the quarter period and the position of the quarter period with reference to the leading edge of the horizontal synchronizing signal. This is the same as the area division used in field discrimination when the input signal is an interlace system. The phase discriminating unit 2 discriminates where the detected phase belongs to the discrimination pattern generated by the discrimination pattern generating unit 3.

  The vertical synchronization signal output means 4 switches the vertical synchronization phase in accordance with the divided areas and outputs the result. If it is determined in FIG. 5 that the region is (1), it has the same phase as the leading edge of the next horizontal synchronizing signal B, and if it is determined that the region is (2), the next horizontal synchronizing signal B A vertical synchronizing signal is output at a phase 1/2 cycle after the leading edge. In the case of an interlaced signal, since the area changes alternately for each field, the output of the vertical synchronizing signal is correspondingly outputted with the phase changed by 1/2 period for each field (see, for example, Patent Document 1). ).

However, in such a sync signal processing circuit, when the phase of the vertical sync signal corresponding to the input video signal is near the boundary of the region provided by the phase discriminating means 2, the jitter of the vertical sync signal, etc. As a result, the phase of the vertical sync output becomes unstable due to the discrimination result in either (1) or (2), and the subsequent circuit malfunctions, such as the vertical fluctuation of the video due to the horizontal sync signal count error. There was a problem of letting it go.
JP-A-10-307562

  An object of the present invention is to solve such problems and to output a vertical synchronization signal having a stable phase without any influence of jitter or the like regardless of the phase of the vertical synchronization signal. is there.

  To achieve the above object, the synchronizing signal processing circuit of the present invention comprises a vertical synchronizing signal phase detecting means for detecting a phase of a vertical synchronizing signal with respect to a horizontal synchronizing signal of an inputted video signal, and a vertical synchronizing signal phase detecting means. Detected by a discriminant pattern generating means for generating at least two discriminant patterns for discriminating the phase of the detected vertical synchronizing signal, a discriminating pattern switching means for switching the discriminating pattern, and a vertical synchronizing signal phase detecting means A phase discriminating unit that discriminates the phase of the vertical synchronizing signal phase using the discriminating pattern from the discriminating pattern switching unit, and a start position of the vertical synchronizing signal to be output is determined according to the discrimination result of the phase discriminating unit; Vertical synchronization signal output means.

  According to the present invention, there are two or more discriminating patterns for detecting the phase of the vertical synchronizing signal with respect to the horizontal synchronizing signal, and switching of the discriminating pattern is performed based on detection of the discriminating pattern, and the phase determined by the discriminating pattern is supported. By outputting the vertical synchronizing signal in this way, it is possible to obtain an effect that a vertical synchronizing signal having a stable phase is always generated with respect to the phase and jitter of the vertical synchronizing signal.

  According to a first aspect of the present invention, there is provided a vertical synchronizing signal phase detecting means for detecting a phase of a vertical synchronizing signal with respect to a horizontal synchronizing signal of an input video signal, and the vertical synchronizing signal phase detecting means detecting the vertical synchronizing signal phase detecting means. Discrimination pattern generation means for generating at least two discrimination patterns for discriminating the phase of the vertical synchronization signal, discrimination pattern switching means for switching the discrimination pattern, and vertical synchronization detected by the vertical synchronization signal phase detection means A phase discriminating unit that discriminates a phase using a discrimination pattern from the discriminating pattern switching unit and a vertical synchronization signal output that determines a start position of a vertical synchronization signal to be output according to a discrimination result by the phase discriminating unit Means.

  According to a second aspect of the present invention, in the first aspect, the discrimination pattern switching means detects that the phase of the vertical synchronization signal is at the boundary with respect to the discrimination area of the discrimination pattern with respect to the selected discrimination pattern. Thus, the discrimination pattern is switched. According to a third aspect of the present invention, in the first aspect, the discrimination pattern generating means generates a discrimination pattern in which one period of the horizontal synchronizing signal is divided into a plurality of regions with respect to the phase. Further, it is characterized in that it determines which region the phase detected by the vertical synchronizing signal phase detection means belongs to the discrimination pattern. Further, the invention according to claim 4 is the invention according to claim 3, wherein the discrimination pattern generating means is composed of two regions having a width of a half cycle of the horizontal synchronizing signal as the divided regions, and the phases divided from each other. Are characterized by generating different discrimination patterns.

  Hereinafter, a synchronization signal processing circuit according to an embodiment of the present invention will be described with reference to FIGS.

  FIG. 1 shows a block diagram of a synchronizing signal processing circuit according to an embodiment of the present invention, and FIG. 2 shows an example of phase discrimination in the vertical synchronizing signal output means of FIG. FIG. 3 shows an example of discrimination boundary detection for the phase of the vertical synchronization signal in the discrimination pattern switching means of FIG.

  In FIG. 1, a vertical synchronizing signal phase detecting means 11 detects the phase of a vertical synchronizing signal with respect to a horizontal synchronizing signal of an inputted video signal based on a horizontal synchronizing signal and a vertical synchronizing signal corresponding to the inputted video signal. . The discrimination pattern generation means 12 and 13 output at least two discrimination patterns for discriminating the phase of the vertical synchronization signal detected by the vertical synchronization signal phase detection means 11 (2 in the figure are 2). One) provided. The discrimination pattern switching unit 14 switches the discrimination pattern output from the discrimination pattern generating units 12 and 13. The discrimination pattern switching unit 14 includes a discrimination pattern region boundary detection unit 15 and a discrimination pattern switching unit 16. Yes.

  The phase discriminating unit 17 discriminates the phase of the vertical synchronizing signal phase detected by the vertical synchronizing signal phase detecting unit 11 using the discrimination pattern from the discrimination pattern switching unit 14. The vertical synchronization signal output means 18 determines the start position of the vertical synchronization signal to be output according to the determination result in the phase determination means 17.

  Further, with respect to the area determined by the phase determining means 17, two or more determination patterns obtained by dividing the area with different phases are provided for the phase where the area is divided as shown in FIG. Each discrimination pattern is divided into two areas each having a ½ period width, and the phases divided from each other are different. The phase discrimination means 17 performs phase discrimination using one of the discrimination patterns. The difference in the divided phase between the respective discrimination patterns is a value determined from the amount of phase change due to jitter of the vertical synchronization signal, fluctuation due to temperature, or the like.

  The discrimination pattern switching unit 14 includes a discrimination pattern region boundary detection unit 15 for discriminating the vicinity of the boundary, and generates a signal for boundary determination for the currently selected discrimination pattern, When the phase of the vertical synchronization signal is in the vicinity of the boundary of the discrimination region, switching the discrimination pattern separates the phase from the boundary and prevents erroneous discrimination due to jitter or the like. FIG. 3 shows an example of the boundary determination signal. When a certain time width is provided before and after the boundary of the determination pattern and the vertical synchronization signal is within the range, the determination pattern (1) to the determination pattern (2 ) To switch the discrimination pattern. Similar to the phase difference between the respective discrimination patterns, the time width before and after the boundary is a value determined from the amount of phase change due to jitter of the vertical synchronization signal, fluctuation due to temperature, and the like. Usually, the time width is less than ½ of the boundary phase difference between the discrimination patterns.

  In such a synchronous signal processing circuit, the discrimination pattern generated by the discrimination pattern generating means 12 and 13 is switched by the discrimination pattern switching means 14, and the discrimination pattern is switched based on the detection of the discrimination pattern boundary. By outputting a vertical synchronization signal corresponding to the determined phase, it is possible to generate a vertical synchronization signal having a stable phase with respect to the phase and jitter of the vertical synchronization signal.

  By providing the synchronization signal processing circuit as described above in the plasma display device, it is possible to generate a vertical synchronization signal having a stable phase with respect to the phase and jitter of the vertical synchronization signal, and various horizontal frequencies and verticals. A video signal with a frequency can be received.

1 is a block diagram of a synchronization signal processing circuit according to an embodiment of the present invention. Waveform diagram showing an example of phase discrimination in the synchronization signal processing circuit of FIG. Waveform diagram showing an example of discrimination pattern region boundary detection in the synchronization signal processing circuit of FIG. Block diagram of a conventional sync signal processing circuit Waveform diagram showing an example of phase discrimination in the synchronization signal processing circuit of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Vertical synchronizing signal phase detection means 12, 13 Discrimination pattern generation means 14 Discrimination pattern switching means 15 Discrimination pattern area | region boundary detection means 16 Discrimination pattern switching part 17 Phase discrimination means 18 Vertical synchronization signal output means

Claims (4)

Vertical synchronization signal phase detection means for detecting the phase of the vertical synchronization signal with respect to the horizontal synchronization signal of the input video signal, and at least 2 for determining the phase of the vertical synchronization signal detected by the vertical synchronization signal phase detection means Discrimination pattern generation means for generating one or more discrimination patterns; Discrimination pattern switching means for switching the discrimination patterns; Discrimination pattern from the discrimination pattern switching means for the vertical synchronization signal phase detected by the vertical synchronization signal phase detection means A synchronization signal, comprising: a phase determination means for determining a phase using a signal; and a vertical synchronization signal output means for determining a start position of a vertical synchronization signal to be output according to a determination result of the phase determination means Processing circuit. The discrimination pattern switching means is configured to detect that the phase of the vertical synchronization signal is at the boundary with respect to the discrimination area of the discrimination pattern with respect to the selected discrimination pattern, and to switch the discrimination pattern. 2. The synchronization signal processing circuit according to 1. The discrimination pattern generating means generates a discrimination pattern in which one period of the horizontal synchronizing signal is divided into a plurality of regions with respect to the phase, and the phase discriminating means has the phase detected by the vertical synchronizing signal phase detecting means as described above. 2. The synchronization signal processing circuit according to claim 1, wherein the synchronization signal processing circuit determines which region belongs to the discrimination pattern. The discriminant pattern generating means is composed of two regions having a width of ½ period of the horizontal synchronization signal as the divided regions, and generates discriminant patterns having different division phases. Item 4. The synchronous signal processing circuit according to Item 3.

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