JP4374251B2 - Semiconductor device - Google Patents

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JP4374251B2
JP4374251B2 JP2004007294A JP2004007294A JP4374251B2 JP 4374251 B2 JP4374251 B2 JP 4374251B2 JP 2004007294 A JP2004007294 A JP 2004007294A JP 2004007294 A JP2004007294 A JP 2004007294A JP 4374251 B2 JP4374251 B2 JP 4374251B2
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semiconductor device
wiring board
electrode
terminal
semiconductor
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JP2005203518A (en
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賢二 利田
恒夫 濱口
正人 小山
耕平 佐藤
高宏 長嶺
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Description

この発明は複数の半導体パケージを高密度に実装する半導体装置に関する The present invention relates to a semiconductor device for mounting a plurality of semiconductor packages at high density.

電子機器の小型化をはかるためには、半導体素子を高密度に実装することが重要である。その方法として、インターポーザと呼ばれる配線板に複数の半導体素子を実装して1パッケージ化し、または複数個の半導体パッケージをエポキシ樹脂等を用いて接着して積層する実装方法が用いられている。以下に従来装置の一例を示す。   In order to reduce the size of electronic equipment, it is important to mount semiconductor elements at high density. As such a method, a mounting method is used in which a plurality of semiconductor elements are mounted on a wiring board called an interposer to form one package, or a plurality of semiconductor packages are bonded and laminated using an epoxy resin or the like. An example of a conventional apparatus is shown below.

従来装置の第１の例として、特開平１０−１１６９６３号公報（以下特許文献１と称す。）に示されるものがある。この特許文献１に示されるものは、二段重ねされた積層構造の半導体装置は、上段ならびに下段の各々が、表面実装パッケージの１種であるＵＴＳＯＰ形のＤＲＡＭ半導体装置からなるメモリ１（第１の半導体装置）とメモリ２（第２の半導体装置）が2段重ねで構成されている。
各メモリは、例えば、ポリイミドからなるフィルムの上面にリードとなる銅箔の配線が繰り返し形成されたテープキャリアに、半導体チップが搭載された構造となっている。
また、半導体チップおよびインナーリードが、例えば、エポキシ樹脂によって封止されてパッケージが形成され、パッケージから突き出した個々のアウターリードはＪ字状に屈曲形成されている。上段に配置されるパッケージのアウターリードはＬ字状に屈曲形成されている。
下段メモリのアウターリードと上段メモリのアウターリードは実装基板に設けられたランドに直接電気的に接続される構成となっている。 As a first example of a conventional apparatus, there is one disclosed in Japanese Patent Laid-Open No. 10-116963 (hereinafter referred to as Patent Document 1). A semiconductor device having a stacked structure in which two layers are stacked is disclosed in Patent Document 1 in which a memory 1 (first semiconductor memory) is formed of an UTSOP type DRAM semiconductor device in which an upper stage and a lower stage are each a kind of surface mount package. The semiconductor device) and the memory 2 (second semiconductor device) are configured in two stages.
Each memory has a structure in which, for example, a semiconductor chip is mounted on a tape carrier in which wiring of a copper foil serving as a lead is repeatedly formed on the upper surface of a film made of polyimide.
Further, the semiconductor chip and the inner lead are sealed with, for example, an epoxy resin to form a package, and each outer lead protruding from the package is bent into a J shape. The outer leads of the package disposed in the upper stage are bent in an L shape.
The outer leads of the lower memory and the outer leads of the upper memory are configured to be directly electrically connected to lands provided on the mounting board.

従来装置の第２の例として、特開平２００１−７７２９４号公報（以下特許文献２と称す。）に示されるものがある。この特許文献２に示されるものは、２個の半導体チップは、ポリイミド樹脂等のような可撓性のある材料からなるＦＰＣ基板の一面に、フリップチップ接続方式で接続されている。すなわち、ＦＰＣ基板の一方の面に、導電薄で構成された電極パッドが形成されており、各半導体チップの電極にそれぞれ設けられている金バンプがそれぞれ電極パッドに接続されている。また、２つの半導体チップが背中合わせになるように、ＦＰＣ基板はほぼ中間位置において厚さ方向にＵ字型に曲げられている。ＦＰＣの曲げられた内側の空間に樹脂が充填されている。   As a second example of the conventional apparatus, there is one disclosed in Japanese Patent Laid-Open No. 2001-77294 (hereinafter referred to as Patent Document 2). As shown in Patent Document 2, two semiconductor chips are connected to one surface of an FPC board made of a flexible material such as polyimide resin by a flip chip connection method. That is, an electrode pad made of a thin conductive film is formed on one surface of the FPC board, and gold bumps respectively provided on the electrodes of each semiconductor chip are connected to the electrode pads. In addition, the FPC board is bent in a U-shape in the thickness direction at a substantially intermediate position so that the two semiconductor chips are back to back. The space inside the bent FPC is filled with resin.

また、従来装置の第３の例として、特開２００３−８６７６１号公報（以下特許文献３と称す。）に示されるものがある。この特許文献３に示されるものは、フレキシブル基板とリジッド基板とから形成されるリジッドフレックス基板を備えている。リジッドフレックス基板は、フレキシブル基板が露出する可撓部で屈曲自在となり、また可撓部を境にして、両側にリジッド基板が上下両面に配設され、４面のリジッド基板を具備する。
そして、可撓部を境にした一方側のリジッド基板が上下両面に配設される部分の一方のリ
ジッド基板には、ウエハレベル構造の半導体チップがフェースダウンによりフリップチップ実装され、他方のリジッド基板には、格子状にはんだボールを配設して外部接続端子が形成される。
こうしてチップ実装および端子形成されたリジッドフレックス基板は、可撓部で屈曲され
ることによって、各半導体チップを積層状態にする。この状態で上下に対向する半導体チップ同士を接着固定してから、リジッド基板との接合部を覆うようにリジッド基板に実装される各半導体チップを封止樹脂にて気密封止する構造を有する。 As a third example of the conventional apparatus, there is one disclosed in Japanese Patent Application Laid-Open No. 2003-86761 (hereinafter referred to as Patent Document 3). The thing shown by this patent document 3 is equipped with the rigid flex board | substrate formed from a flexible substrate and a rigid board | substrate. The rigid flex substrate is flexible at the flexible portion where the flexible substrate is exposed, and the rigid substrate is provided on both sides of the flexible portion on both sides with the flexible portion as a boundary, and includes a four-sided rigid substrate.
A semiconductor chip having a wafer level structure is flip-chip mounted face-down on one rigid substrate where the rigid substrate on one side of the flexible part is disposed on both upper and lower surfaces, and the other rigid substrate The external connection terminals are formed by arranging solder balls in a lattice shape.
The rigid flex substrate on which the chips are mounted and the terminals are formed is bent at the flexible portion, so that the semiconductor chips are stacked. In this state, the semiconductor chips that are vertically opposed to each other are bonded and fixed, and then each semiconductor chip mounted on the rigid substrate is hermetically sealed with a sealing resin so as to cover the joint portion with the rigid substrate.

特開平１０−１１６９６３号公報（第３〜第４頁、第１図、第２図、第３図）JP-A-10-116963 (3rd to 4th pages, FIGS. 1, 2 and 3) 特開平２００１−７７２９４号公報（第２頁、図１）JP 2001-77294 A (2nd page, FIG. 1) 特開２００３−８６７６１公報（第５頁、図１）JP 2003-86761 A (page 5, FIG. 1)

上述した第１の従来装置においては、パッケージ周辺に外部接続用のリードを出す構造であるため、多数のピン数をもつパッケージを積層する場合は、パッケージも大きくなるため実装面積が広くなり、小型化に向かないという問題点があった。   The first conventional device described above has a structure in which leads for external connection are provided around the periphery of the package. Therefore, when stacking a package having a large number of pins, the package becomes large and the mounting area is widened and the size is reduced. There was a problem that it was not suitable.

また、第２の従来装置においては、可撓性のある配線基板に2つの半導体チップをフリップチップで接続後、配線基板をＵ字型に曲げ、樹脂を充填して半導体装置を構成するため、組立によって多発する半導体チップ不良や、半導体チップと配線基板との接続不良は組立後に電気的テストを行う必要があり、テスト結果で２つの半導体チップがそれぞれ良品でないと使えず、例えば、1つでも不良半導体チップがあれば不良品として廃棄しなければならないという問題点があった。   In the second conventional device, since two semiconductor chips are connected to a flexible wiring board by flip chip, the wiring board is bent into a U shape and filled with a resin to constitute a semiconductor device. Semiconductor chip failures that frequently occur during assembly and poor connection between the semiconductor chip and the wiring board require an electrical test after assembly. The test results indicate that the two semiconductor chips cannot be used unless they are non-defective products. There is a problem that if there is a defective semiconductor chip, it must be discarded as a defective product.

また、第３の従来装置においては、下面に外部接続用のはんだボールがついた配線板上に、はんだボールのついた半導体パッケージ（ＣＳＰ：チップ サイズ パッケージ）が搭載された構造であるため、接合部が２箇所あるため、半導体装置が高くなる問題点があった。   In addition, the third conventional device has a structure in which a semiconductor package (CSP: chip size package) with solder balls is mounted on a wiring board with solder balls for external connection on the lower surface. Since there are two portions, there is a problem that the semiconductor device becomes expensive.

この発明は上記のような従来装置の問題点に鑑み成されたもので、実装密度の高密度化あるいは装置の薄型、小型化が可能な半導体装置を得ることを目的とする。
また、多ピンの電子部品の搭載が可能であって、事前にテスト済みの半導体パッケージ
の積層に適した半導体装置を得ることを目的とする。 The present invention has been made in view of the above-described problems of conventional devices, and an object thereof is to obtain a semiconductor device capable of increasing the mounting density or reducing the thickness and size of the device.
It is another object of the present invention to obtain a semiconductor device that can be mounted with multi-pin electronic components and is suitable for stacking semiconductor packages that have been tested in advance.

（１） この発明に係る半導体装置は、可撓性部材から成り、第１の領域に実装基板上の電極に接続される外部端子が設けられ、第２の領域に電子部品が実装された配線板、
配線基板の一方の面に、半導体素子を搭載すると共に、この半導体素子に電気的に接続される電極を有し、上記配線基板の他方の面に、該電極に接続されると共に、実装基板上の電極に接続される第１の端子が設けられて成る第１の半導体装置を備え、
上記配線板の一方を上記第１の半導体装置の周辺に固定し、他方を厚さ方向に折り曲げて、上記第２の領域に実装された電子部品が上記第１の半導体装置上に積層される構造とし、上記配線板の外部端子と、上記第１の半導体装置の第１の端子が、実装基板上の異なる電極に接続されるよう構成したものである。 (1) A semiconductor device according to the present invention is made of a flexible member, and an external terminal connected to an electrode on a mounting board is provided in a first region, and an electronic component is mounted in a second region Board,
A semiconductor element is mounted on one surface of the wiring board, and an electrode electrically connected to the semiconductor element is provided. The other surface of the wiring board is connected to the electrode and mounted on the mounting board. A first semiconductor device provided with a first terminal connected to the electrode of
One of the wiring boards is fixed to the periphery of the first semiconductor device, the other is bent in the thickness direction, and the electronic component mounted in the second region is stacked on the first semiconductor device. In this structure, the external terminal of the wiring board and the first terminal of the first semiconductor device are connected to different electrodes on the mounting substrate.

(２) また、この発明に係る半導体装置は、可撓性部材から成り、第１の領域に実装基板上の電極に接続される外部端子が設けられ、第２の領域に電子部品が実装された配線板、
配線基板の一方の面に、半導体素子を搭載すると共に、この半導体素子に電気的に接続される電極を有し、上記配線基板の他方の面に、上記電極に接続されると共に、実装基板上の電極に接続される第１の端子が設けられて成る第１の半導体装置を備え、
上記配線板を耐熱性フィルムの片面に導体を形成した片面配線構造とし、この配線板の一方を上記第１の半導体装置の底面に固着すると共に、他方を厚さ方向に折り曲げて、上記第２の領域に実装された電子部品が上記第１の半導体装置上に積層される構造とし、上記配線板の外部端子と、上記第１の半導体装置の第１の端子が、実装基板上の異なる電極に接続されるよう構成したものである。 (2) Further, the semiconductor device according to the present invention is made of a flexible member, and an external terminal connected to the electrode on the mounting substrate is provided in the first region, and an electronic component is mounted in the second region. Wiring board,
A semiconductor element is mounted on one surface of the wiring board, and an electrode is electrically connected to the semiconductor element. The other surface of the wiring board is connected to the electrode and is mounted on the mounting board. A first semiconductor device provided with a first terminal connected to the electrode of
The wiring board has a single-sided wiring structure in which a conductor is formed on one side of a heat-resistant film. One of the wiring boards is fixed to the bottom surface of the first semiconductor device, and the other is bent in the thickness direction, and the second The electronic component mounted in the region is stacked on the first semiconductor device, and the external terminal of the wiring board and the first terminal of the first semiconductor device are different electrodes on the mounting substrate. It is comprised so that it may be connected to.

（３） また、この発明に係る半導体装置は、可撓性部材から成り、第１の領域に実装基板上の電極に接続される外部端子が設けられ、第２の領域に電子部品が実装された配線板、
配線基板の一方の面に、半導体素子を搭載すると共に、この半導体素子に電気的に接続される電極を有し、上記配線基板の他方の面に、上記電極に接続されると共に、実装基板上の電極に接続される第１の端子が設けられて成る第１の半導体装置を備え、
上記配線板の一方を、上記第１の半導体装置の底面に固着すると共に、他方を、上記第２の領域に実装された電子部品が、実装基板上に実装された高さの低い他の電子部品上に積層されるよう配設し、上記配線板の外部端子と、上記第１の半導体装置の第１の端子が、実装基板上の異なる電極に接続されるよう構成したものである。 (3) The semiconductor device according to the present invention is made of a flexible member, and an external terminal connected to the electrode on the mounting substrate is provided in the first region, and an electronic component is mounted in the second region. Wiring board,
A semiconductor element is mounted on one surface of the wiring board, and an electrode is electrically connected to the semiconductor element. The other surface of the wiring board is connected to the electrode and is mounted on the mounting board. A first semiconductor device provided with a first terminal connected to the electrode of
One of the wiring boards is fixed to the bottom surface of the first semiconductor device, and the other electronic component mounted on the second region is mounted on the mounting board with another electronic device having a low height. It is arranged so as to be stacked on a component, and the external terminal of the wiring board and the first terminal of the first semiconductor device are connected to different electrodes on the mounting substrate.

（４） また、この発明に係る半導体装置は、可撓性部材から成り、一方の面に電子部品が実装され、他方の面に接続部が設けられた配線板、
樹脂中に導体配線が施され、一方端に上記配線板の接続部に接続される電極が設けられ、他方端に実装基板上の電極に接続される外部接続端子が設けられた樹脂成型コネクタ、
配線基板の一方の面に、半導体素子を搭載すると共に、この半導体素子に電気的に接続される電極を有し、上記配線基板の他方の面に、上記電極に接続されると共に、実装基板上の電極に接続される第１の端子が設けられて成る第１の半導体装置を備え、
上記樹脂成型コネクタを上記第１の半導体装置の周辺に並設し、樹脂成型コネクタの一方端の電極と、上記配線板の接続部とを接続して、上記配線板上に実装された電子部品が上記第１の半導体装置上に積層される積層構造とし、上記樹脂成型コネクタの外部接続端子と、上記第１の半導体装置の第１の端子が、実装基板上の異なる電極に接続されるよう構成したものである。 (4) Further, a semiconductor device according to the present invention includes a wiring board made of a flexible member, on which an electronic component is mounted on one surface and a connection portion is provided on the other surface,
A resin-molded connector in which conductor wiring is provided in the resin, an electrode connected to the connection portion of the wiring board is provided at one end, and an external connection terminal connected to the electrode on the mounting substrate is provided at the other end;
A semiconductor element is mounted on one surface of the wiring board, and an electrode is electrically connected to the semiconductor element. The other surface of the wiring board is connected to the electrode and is mounted on the mounting board. A first semiconductor device provided with a first terminal connected to the electrode of
An electronic component mounted on the wiring board, wherein the resin-molded connector is juxtaposed around the first semiconductor device, the electrode at one end of the resin-molded connector is connected to the connection portion of the wiring board Are stacked on the first semiconductor device, and the external connection terminal of the resin molded connector and the first terminal of the first semiconductor device are connected to different electrodes on the mounting substrate. It is composed.

（５） また、この発明に係る半導体装置は、可撓性部材から成り、第１の領域に実装基板上の電極に接続される外部端子が設けられ、第２の領域に電子部品が実装された配線板、
外部リード線によって実装基板に間隙をおいて実装された第２の半導体装置を備え、
上記配線板を厚さ方向に折り曲げて、上記第２の半導体装置に固着すると共に、上記第２の領域に実装された電子部品が上記第２の半導体装置上に積層される構造とし、且つ、上記外部端子が、上記第２の半導体装置と実装基板との間隙に位置するよう構成したものである。 (5) Further, the semiconductor device according to the present invention is made of a flexible member, and an external terminal connected to the electrode on the mounting substrate is provided in the first region, and an electronic component is mounted in the second region. Wiring board,
A second semiconductor device mounted on the mounting substrate with a gap by an external lead;
The wiring board is bent in the thickness direction and fixed to the second semiconductor device, and an electronic component mounted in the second region is stacked on the second semiconductor device, and The external terminal is configured to be positioned in a gap between the second semiconductor device and the mounting substrate.

（６） また、この発明に係る半導体装置は、上述した（１）〜（４）の半導体装置において、第１の半導体装置が、試験完了後の半導体装置であることを特徴とするものである。   (6) Further, the semiconductor device according to the present invention is characterized in that, in the semiconductor devices of (1) to (4) described above, the first semiconductor device is a semiconductor device after completion of the test. .

（７） また、この発明に係る半導体装置は、上述した（５）の半導体装置において、第２の半導体装置が、試験完了後の半導体装置であることを特徴とするものである   (7) The semiconductor device according to the present invention is characterized in that, in the semiconductor device of (5) described above, the second semiconductor device is a semiconductor device after completion of the test.

この発明によれば、実装密度の高密度化あるいは装置の薄型、小型化が可能な半導体装置を得ることができるものである。   According to the present invention, it is possible to obtain a semiconductor device capable of increasing the mounting density or reducing the thickness and size of the device.

また、この発明によれば、多ピンの電子部品の搭載が可能であって、事前にテスト済みの半導体パッケージの積層に適した半導体装置を得ることができるものである。   In addition, according to the present invention, it is possible to mount a multi-pin electronic component and obtain a semiconductor device suitable for stacking semiconductor packages that have been tested in advance.

さらに、この発明によれば、積層される半導体装置を実装基板上で部品高さの低い領域に配置できるので、部品高さの低い実装基板を実現することができるものである。   Furthermore, according to the present invention, since the stacked semiconductor devices can be arranged on the mounting substrate in a region having a low component height, a mounting substrate having a low component height can be realized.

実施の形態１．
図１は、この発明の実施の形態１における半導体装置の構成を示す図である。
図１において、１はマザー基板（実装基板）、２ａ、２ｂは可撓性を有する配線板、３は第１の半導体装置、１０、１１は電子部品、１２はモールド樹脂である。
第１の半導体装置３は、配線基板４の表面に設けられた電極に、第１の半導体チップ6を金ワイヤ７で接続し、該電極と接続された外部接続用の第１の端子（以下第１の端子と称す。）８が、配線基板４の裏面に設けられた構造をもつ。第１の端子８は、はんだボールで形成されている。
第１の半導体チップ６と配線基板４との接続は、この実施の形態１においては金ワイヤ７で接続する場合を示しているが、半導体チップ上の電極と配線基板上の電極を直接接続するフリップチップ接続方法でもよい。 Embodiment 1 FIG.
1 is a diagram showing a configuration of a semiconductor device according to a first embodiment of the present invention.
In FIG. 1, 1 is a mother board (mounting board), 2a and 2b are flexible wiring boards, 3 is a first semiconductor device, 10 and 11 are electronic components, and 12 is a mold resin.
In the first semiconductor device 3, a first semiconductor chip 6 is connected to an electrode provided on the surface of the wiring substrate 4 by a gold wire 7, and a first terminal (hereinafter referred to as an external connection) connected to the electrode is connected. (Referred to as a first terminal) 8 has a structure provided on the back surface of the wiring board 4. The first terminal 8 is formed of a solder ball.
The connection between the first semiconductor chip 6 and the wiring board 4 is shown by the case where the first semiconductor chip 6 and the wiring board 4 are connected by the gold wire 7, but the electrode on the semiconductor chip and the electrode on the wiring board are directly connected. A flip chip connection method may be used.

配線板２ａ、２ｂは可撓性の材料で形成されており、一方の面（図の場合裏面）の所定の領域（第１の領域）に外部接続用の端子（以下外部端子と称す。）９が形成され、同一面の他の領域（第２の領域）には、はんだボールで形成された接続端子１６を介して電子部品１０、１１が実装されている。
この配線板２ａ、２ｂの一端は、第１の半導体装置３の周辺に、エポキシ樹脂などの樹脂１3によって固定され、他端が、第１の半導体装置３の上に交互に折り曲げられて、第２の領域に実装された電子部品１０、１１が第１の半導体装置３上に積層される構造となっている。
折り曲げられた配線板２ａは、第1の半導体装置３上にエポキシ樹脂等で接着されて接着剤層１５が形成され、電子部品１０上には、同じく折り曲げられた配線板２ｂがエポキシ樹脂等で接着され接着剤層１４が形成されている。
また、配線板２ａ、２ｂの外部端子９が形成された面と反対側の表面に、ポリイミド等からなる補強板５が設けられている。なお、この補強板５は、基板を取扱い易くするために設けられたものであり、必ずしも必要とするものではない。
そして、第１の半導体装置３の第１の端子８と、配線板２ａ、２ｂの外部端子９は、マザー基板１上の異なる電極に接続するよう構成されている。 The wiring boards 2a and 2b are made of a flexible material, and are connected to an external connection terminal (hereinafter referred to as an external terminal) in a predetermined region (first region) on one surface (the back surface in the figure). 9 are formed, and the electronic components 10 and 11 are mounted on the other region (second region) on the same surface via the connection terminals 16 formed of solder balls.
One end of each of the wiring boards 2a and 2b is fixed to the periphery of the first semiconductor device 3 with a resin 13 such as an epoxy resin, and the other end is alternately bent onto the first semiconductor device 3 The electronic components 10 and 11 mounted in the region 2 are stacked on the first semiconductor device 3.
The folded wiring board 2a is bonded to the first semiconductor device 3 with an epoxy resin or the like to form an adhesive layer 15, and on the electronic component 10, the bent wiring board 2b is also made of an epoxy resin or the like. The adhesive layer 14 is formed by bonding.
A reinforcing plate 5 made of polyimide or the like is provided on the surface of the wiring boards 2a and 2b opposite to the surface on which the external terminals 9 are formed. The reinforcing plate 5 is provided to facilitate handling of the substrate and is not necessarily required.
The first terminal 8 of the first semiconductor device 3 and the external terminals 9 of the wiring boards 2 a and 2 b are configured to be connected to different electrodes on the mother substrate 1.

以上の説明においては、配線板２ａ、２ｂは直角に折り曲げられているが、Ｕ字型に交互に曲げて積層してもよい。
また、曲げられた配線板２ａ、２ｂの内側は、例えばエポキシ樹脂等を充填して用いてもよい。
また、電子部品１０、１１は、半導体装置などの能動素子またはチップ抵抗などの受動部品をいう。
配線板２ａ、２ｂは、ポリイミド基板上に配線を形成したもので、可撓性のポリイミド基板をリジッドなプリント基板ではさんだフレックスリジッド基板を用いてもよい。 In the above description, the wiring boards 2a and 2b are bent at a right angle, but may be alternately bent and stacked in a U-shape.
Further, the inner side of the bent wiring boards 2a and 2b may be filled with, for example, an epoxy resin.
The electronic components 10 and 11 refer to active components such as semiconductor devices or passive components such as chip resistors.
The wiring boards 2a and 2b are formed by forming wirings on a polyimide substrate, and a flex-rigid substrate obtained by sandwiching a flexible polyimide substrate with a rigid printed substrate may be used.

また、上記においては、配線板２ａ、２ｂを第1の半導体装置３の周辺に樹脂により固定する方法を示したが、配線が形成されていないガラスエポキシ基板からなる支持部材を第1の半導体装置３の周辺に樹脂により固定し、この支持部材に配線板２を接着して用いてもよい。
さらに、第１の半導体装置３は、図１においては、半導体素子６が１個搭載されたパッケージで示したが、半導体素子を複数個積層したスタックド型パッケージを用いてもよい。 In the above description, the method of fixing the wiring boards 2a and 2b to the periphery of the first semiconductor device 3 with a resin has been described. 3 may be fixed by resin around the wiring board 2 and the wiring board 2 may be bonded to the supporting member.
Further, the first semiconductor device 3 is shown as a package in which one semiconductor element 6 is mounted in FIG. 1, but a stacked package in which a plurality of semiconductor elements are stacked may be used.

以上のように、この発明の実施の形態１の半導体装置によれば、配線板２ａ、２ｂは第１の半導体装置３の周辺に固定されているので、配線板２（２ａ、２ｂ）と外部端子９の厚さ分だけ半導体装置全体の高さを薄くすることが可能となる。
また、配線板２ａ、２ｂと第１の半導体装置３とは、マザー基板１上の異なる電極に各々接続され、直接配線が引き回されていないため、第１の半導体装置３の第１の端子８のピン数に関係なく、配線板２ａ、２ｂの外部端子９を多ピン化できるので、電子部品１０，１１は多ピンのものが選択可能となる。 As described above, according to the semiconductor device of the first embodiment of the present invention, since wiring boards 2a and 2b are fixed to the periphery of first semiconductor device 3, wiring board 2 (2a and 2b) is connected to the outside. The height of the entire semiconductor device can be reduced by the thickness of the terminal 9.
Further, since the wiring boards 2a and 2b and the first semiconductor device 3 are respectively connected to different electrodes on the mother substrate 1 and no direct wiring is routed, the first terminal of the first semiconductor device 3 Regardless of the number of 8 pins, the external terminals 9 of the wiring boards 2a and 2b can be multi-pinned, so that the electronic components 10 and 11 can be selected from multi-pins.

実施の形態２．
図２は、この発明の実施の形態２の半導体装置を示す構成図である。なお、図中、図１と同一の符号は、同一または相当部分を示すもので、詳細説明は省略する。
図２において、配線板２は第１の半導体装置３の下面（底面）に、第１の半導体装置３の第１の端子８の部分を除いて接着されている。
配線板２は第１の半導体装置３の下面に接着固定されるため、薄いポリイミド基板を用いる。本実施例の場合、厚さ２５μｍのポリイミドフィルムに導体を片面に形成したものを使用している。第１の半導体装置３と配線板２との接着はエポキシ樹脂を用いる。第１の半導体装置３の第１の端子８と、配線板２の外部端子９は、マザー基板１上の異なる電極に接続されている。 Embodiment 2. FIG.
FIG. 2 is a block diagram showing a semiconductor device according to the second embodiment of the present invention. In the figure, the same reference numerals as those in FIG. 1 denote the same or corresponding parts, and detailed description thereof will be omitted.
In FIG. 2, the wiring board 2 is bonded to the lower surface (bottom surface) of the first semiconductor device 3 except for the first terminal 8 portion of the first semiconductor device 3.
Since the wiring board 2 is bonded and fixed to the lower surface of the first semiconductor device 3, a thin polyimide substrate is used. In this example, a polyimide film having a thickness of 25 μm and a conductor formed on one side is used. Adhesion between the first semiconductor device 3 and the wiring board 2 uses an epoxy resin. The first terminal 8 of the first semiconductor device 3 and the external terminal 9 of the wiring board 2 are connected to different electrodes on the mother substrate 1.

図６は、上述した半導体装置の組み立て工程の一例を示す図で、第１の半導体装置３と配線板２を接着し（図６(a))、配線板２を折り曲げて、電子部品１０を第１の半導体装置３上に積層する(図６(b))。次いで、第１の半導体装置３の第１の端子８に、はんだボールを搭載した後（図６(c)）、マザー基板１に搭載して、第１の半導体装置３の第１の端子８と、配線板２の外部端子９を、各々マザー基板１上の異なる電極に接続して組み立てを完了する(図６(d))。ただし、上記工程において、半導体装置３は、図６(c)ではんだボールを搭載する場合を示したが、最初からはんだボールが搭載されたものを用いてもよい。
なお、図７は、配線板２を下面から見た場合の一例図である。 FIG. 6 is a diagram illustrating an example of the assembly process of the semiconductor device described above. The first semiconductor device 3 and the wiring board 2 are bonded (FIG. 6A), the wiring board 2 is bent, and the electronic component 10 is assembled. It is stacked on the first semiconductor device 3 (FIG. 6B). Next, after solder balls are mounted on the first terminals 8 of the first semiconductor device 3 (FIG. 6C), they are mounted on the mother substrate 1 and the first terminals 8 of the first semiconductor device 3 are mounted. Then, the external terminals 9 of the wiring board 2 are respectively connected to different electrodes on the mother board 1 to complete the assembly (FIG. 6 (d)). However, in the above process, the semiconductor device 3 is shown in FIG. 6C where the solder balls are mounted. However, a semiconductor device having the solder balls mounted from the beginning may be used.
FIG. 7 is an example of the wiring board 2 as viewed from the lower surface.

この実施の形態２の半導体装置によれば、配線板２に厚さ２５μｍの片面配線の薄いポリイミドフィルムを用いることで、第１の半導体装置３上に積層するときに折り曲げが容易になるという効果が得られる。
また、片面配線基板が使用できるため、配線板２のコストを下げることができる。 According to the semiconductor device of the second embodiment, the use of a thin polyimide film with a single-sided wiring having a thickness of 25 μm for the wiring board 2 makes it easy to bend when laminated on the first semiconductor device 3. Is obtained.
Moreover, since a single-sided wiring board can be used, the cost of the wiring board 2 can be reduced.

実施の形態３．
図３は、この発明の実施の形態３の半導体装置を示す構成図である。なお、図中、図１〜図２と同一の符号は、同一または相当部分を示すもので、説明は省略する。
図３において、１７は、マザー基板１上に実装された高さの低い第２の電子部品、１８ａ、１８ｂはチップコンデンサやチップ抵抗等のチップ部品である。
この実施の形態３の半導体装置は、実施の形態２の変形例を示すもので、第１の半導体装置３の裏面に接着した配線板２を、第１の半導体装置３上に積層せずに、マザー基板１上に実装された他の高さの低い第２の電子部品１７上に配置したものである。
なお、図示の例では、電子部品１７上に電子部品１０はただ置いたままになっているが、電子部品１０と電子部品１７を接着剤で固定しても良い。 Embodiment 3 FIG.
FIG. 3 is a block diagram showing a semiconductor device according to the third embodiment of the present invention. In the figure, the same reference numerals as those in FIGS. 1 to 2 denote the same or corresponding parts, and the description thereof is omitted.
In FIG. 3, 17 is a second electronic component having a low height mounted on the mother substrate 1, and 18a and 18b are chip components such as a chip capacitor and a chip resistor.
The semiconductor device according to the third embodiment is a modification of the second embodiment, and the wiring board 2 bonded to the back surface of the first semiconductor device 3 is not stacked on the first semiconductor device 3. These are arranged on the second electronic component 17 having a low height mounted on the mother board 1.
In the illustrated example, the electronic component 10 is simply left on the electronic component 17, but the electronic component 10 and the electronic component 17 may be fixed with an adhesive.

この実施の形態３の半導体装置によれば、マザー基板１に実装される部品の高さを均等にすることが可能になり、効率よく実装基板の薄型化がはかられ、小型の電子機器が容易に得られる効果がある。   According to the semiconductor device of the third embodiment, the heights of components mounted on the mother substrate 1 can be made uniform, and the mounting substrate can be efficiently reduced in thickness. There is an effect that can be easily obtained.

実施の形態４.
図４は、この発明の実施の形態４の半導体装置を示す構成図である。なお、図中、図１〜図３と同一の符号は、同一または相当部分を示すもので、説明は省略する。
この実施の形態４に示されるものは、片端面にのみ外部接続用端子のリード２４を持つ第２の半導体装置２３が、リード２４によって、マザー基板の電極２５に接続され、マザー基板１上に間隙をおいて実装されている。そして、この第２の半導体装置２３の厚み方向周囲に、可撓性の配線板２を折り曲げて、エポキシ樹脂等によって接着し、配線板２に実装された電子部品１０が第２の半導体装置２３上に積層されると共に、配線板２の外部端子９が、第２の半導体装置２３とマザー基板１との間隙に位置するよう構成されている。 Embodiment 4.
4 is a block diagram showing a semiconductor device according to a fourth embodiment of the present invention. In the figure, the same reference numerals as those in FIGS. 1 to 3 denote the same or corresponding parts, and the description thereof is omitted.
In the fourth embodiment, a second semiconductor device 23 having an external connection terminal lead 24 only on one end face is connected to an electrode 25 of a mother substrate by a lead 24, and is formed on the mother substrate 1. It is mounted with a gap. Then, the flexible wiring board 2 is bent around the thickness direction of the second semiconductor device 23 and bonded with an epoxy resin or the like, and the electronic component 10 mounted on the wiring board 2 is attached to the second semiconductor device 23. The external terminals 9 of the wiring board 2 are configured so as to be positioned in the gap between the second semiconductor device 23 and the mother substrate 1.

この実施の形態４の半導体装置によれば、配線板２が、外部接続用のリード２４を持つ第２の半導体装置２３の厚み方向に沿って接着され、前記配線板２の外部端子９が、第２の半導体装置２３の実装された隙間部に設けられることで、実装面積を有効に活用することができ、高密度実装を可能にするという効果がある。
なお、上記の説明では、外部接続用リード２４が片方にのみある第２の半導体装置２３を用いた場合について説明したが、外部接続用のリードを他の辺にも持つ第２の半導体装置を用いても同様の効果が得られるものである。 According to the semiconductor device of the fourth embodiment, the wiring board 2 is bonded along the thickness direction of the second semiconductor device 23 having the leads 24 for external connection, and the external terminals 9 of the wiring board 2 are By being provided in the gap where the second semiconductor device 23 is mounted, the mounting area can be used effectively, and high-density mounting can be achieved.
In the above description, the case where the second semiconductor device 23 having the external connection lead 24 only on one side has been described. However, the second semiconductor device having the external connection lead on the other side is also described. Even if it is used, the same effect can be obtained.

上述した実施の形態１〜実施の形態４においては、配線板２（２ａ、２ｂ）は、外部端子９と電子部品１０、１１とが同一平面上に設けられたものについて説明したが、両面に導体が設けられて各面の導体が電気的に接続されている配線板を用いれば、外部端子９と電子部品１０、１１とが異なる平面上に設けられるものであってもよい。   In the first to fourth embodiments described above, the wiring board 2 (2a, 2b) has been described in which the external terminals 9 and the electronic components 10 and 11 are provided on the same plane. If a wiring board in which conductors are provided and the conductors on each surface are electrically connected is used, the external terminals 9 and the electronic components 10 and 11 may be provided on different planes.

実施の形態５．
図５は、この発明の実施の形態５の半導体装置を示す構成図である。なお、図中、図１〜図４と同一の符号は、同一または相当部分を示すもので、詳細説明は省略する。
図５において、１９は樹脂成型コネクタを示す。
第１の半導体装置３の周辺に、樹脂中に配線電極を形成した樹脂成型コネクタ１９を並設し、エポキシ樹脂２２により固定する。樹脂成型コネクタ１９の一方端には外部接続端子２１が設けられ、他方端に設けられた電極には、可撓性を有する薄い配線板２が接続され、配線板２には電子部品１０、１１が実装されている。
樹脂成コネクタ１９と配線板２との接続は、はんだまたは導電粒子を用いた異方性導電接着剤を用いて接続され、配線板２と電子部品１０、１１とは、はんだボールで形成された接続端子１６で接続されている。
そして、第１の半導体装置３の第１の端子８と、樹脂成形コネクタ１９の外部接続端子２１は、マザー基板１上の異なる電極に接続されている。 Embodiment 5 FIG.
FIG. 5 is a block diagram showing a semiconductor device according to the fifth embodiment of the present invention. In the figure, the same reference numerals as those in FIGS. 1 to 4 denote the same or corresponding parts, and detailed description thereof will be omitted.
In FIG. 5, 19 indicates a resin molded connector.
Around the periphery of the first semiconductor device 3, a resin molded connector 19 in which a wiring electrode is formed in resin is provided side by side and fixed with an epoxy resin 22. An external connection terminal 21 is provided at one end of the resin-molded connector 19, and a flexible thin wiring board 2 is connected to an electrode provided at the other end, and the electronic components 10, 11 are connected to the wiring board 2. Has been implemented.
The resin-formed connector 19 and the wiring board 2 are connected using an anisotropic conductive adhesive using solder or conductive particles, and the wiring board 2 and the electronic components 10 and 11 are formed of solder balls. The connection terminal 16 is connected.
The first terminal 8 of the first semiconductor device 3 and the external connection terminal 21 of the resin molded connector 19 are connected to different electrodes on the mother substrate 1.

樹脂成型コネクタ１９は、例えばＰＰＳ（ポリフェニレンサルファイド）、ＰＡ（ポリアミド樹脂）、ＰＢＴ（ポリブチレンテレフターレート樹脂）などの熱可塑性の樹脂中に、めっきなどで導体配線を形成したものを用いる。ただし、樹脂成型コネクタ１９の樹脂はこれらに限定されるものではなく耐熱性を有する樹脂であればよい。   As the resin molded connector 19, for example, a conductive resin formed by plating or the like in a thermoplastic resin such as PPS (polyphenylene sulfide), PA (polyamide resin), or PBT (polybutylene terephthalate resin) is used. However, the resin of the resin molded connector 19 is not limited to these, and any resin having heat resistance may be used.

この実施の形態５の半導体装置によれば、第１の半導体装置３上に積層するために、電子部品１０，１１が接続された配線板２とマザー基板１との外部接続に樹脂成型コネクタ１９を用いることにより、積層された電子部品から外部の端子（コネクタ）にむかう配線本数を多くとれることで、多ピンの入出力をもつ電子部品を搭載できるという効果が得られる。   According to the semiconductor device of the fifth embodiment, the resin molded connector 19 is used for external connection between the wiring board 2 to which the electronic components 10 and 11 are connected and the mother board 1 in order to be stacked on the first semiconductor device 3. By using this, it is possible to increase the number of wires from the stacked electronic components to the external terminals (connectors), thereby obtaining an effect that an electronic component having a multi-pin input / output can be mounted.

この発明は、半導体パッケージを高密度に実装する半導体装置に関するもので、電子機器の小型化などに適用できるものである。   The present invention relates to a semiconductor device for mounting semiconductor packages at high density, and can be applied to downsizing of electronic equipment.

この発明の実施の形態１による半導体装置を示す構成図である。1 is a configuration diagram showing a semiconductor device according to a first embodiment of the present invention. この発明の実施の形態２による半導体装置を示す構成図である。It is a block diagram which shows the semiconductor device by Embodiment 2 of this invention. この発明の実施の形態３による半導体装置を示す構成図である。It is a block diagram which shows the semiconductor device by Embodiment 3 of this invention. この発明の実施の形態４による半導体装置を示す構成図である。It is a block diagram which shows the semiconductor device by Embodiment 4 of this invention. この発明の実施の形態５による半導体装置を示す構成図である。It is a block diagram which shows the semiconductor device by Embodiment 5 of this invention. この発明の半導体装置の組み立て工程の一例を示す図である。It is a figure which shows an example of the assembly process of the semiconductor device of this invention. この発明に用いられる配線板２の一例図である。It is an example figure of the wiring board 2 used for this invention.

符号の説明Explanation of symbols

１ マザー基板、２、２ａ、２ｂ 配線板、３ 第１の半導体装置、４ 配線基板、
６ 第１の半導体チップ、７ 金ワイヤ、８ 第１の半導体装置の第１の端子、
９ 配線板の外部端子、１０、１１ 電子部品、１２ モールド樹脂、
１３ エポキシ樹脂、１４、１５ 接着剤層、１６ 電子部品接続端子はんだボール、
１７ 第２の電子部品、１９ 樹脂成型コネクタ、２０ 電極、２１ 外部接続端子、
２２ エポキシ樹脂、２３ 第２の半導体装置、２４ リード、
２５ マザー基板の電極。 1 Mother board, 2, 2a, 2b Wiring board, 3 First semiconductor device, 4 Wiring board,
6 first semiconductor chip, 7 gold wire, 8 first terminal of first semiconductor device,
9 External terminal of wiring board, 10, 11 Electronic component, 12 Mold resin,
13 Epoxy resin, 14, 15 Adhesive layer, 16 Electronic component connection terminal solder ball,
17 Second electronic component, 19 Resin molded connector, 20 electrodes, 21 External connection terminal,
22 epoxy resin, 23 second semiconductor device, 24 leads,
25 Mother board electrode.

Claims (7)

可撓性部材から成り、第１の領域に実装基板上の電極に接続される外部端子が設けられ、第２の領域に電子部品が実装された配線板、
配線基板の一方の面に、半導体素子を搭載すると共に、この半導体素子に電気的に接続される電極を有し、上記配線基板の他方の面に、該電極に接続されると共に、実装基板上の電極に接続される第１の端子が設けられて成る第１の半導体装置を備え、
上記配線板の一方を上記第１の半導体装置の周辺に固定し、他方を厚さ方向に折り曲げて、上記第２の領域に実装された電子部品が上記第１の半導体装置上に積層される構造とし、上記配線板の外部端子と、上記第１の半導体装置の第１の端子が、実装基板上の異なる電極に接続されるよう構成したことを特徴とする半導体装置。 A wiring board made of a flexible member, provided with external terminals connected to the electrodes on the mounting substrate in the first area, and mounted with electronic components in the second area,
A semiconductor element is mounted on one surface of the wiring board, and an electrode electrically connected to the semiconductor element is provided. The other surface of the wiring board is connected to the electrode and mounted on the mounting board. A first semiconductor device provided with a first terminal connected to the electrode of
One of the wiring boards is fixed to the periphery of the first semiconductor device, the other is bent in the thickness direction, and the electronic component mounted in the second region is stacked on the first semiconductor device. A semiconductor device having a structure in which an external terminal of the wiring board and a first terminal of the first semiconductor device are connected to different electrodes on a mounting substrate. 可撓性部材から成り、第１の領域に実装基板上の電極に接続される外部端子が設けられ、第２の領域に電子部品が実装された配線板、
配線基板の一方の面に、半導体素子を搭載すると共に、この半導体素子に電気的に接続される電極を有し、上記配線基板の他方の面に、上記電極に接続されると共に、実装基板上の電極に接続される第１の端子が設けられて成る第１の半導体装置を備え、
上記配線板を耐熱性フィルムの片面に導体を形成した片面配線構造とし、この配線板の一方を上記第１の半導体装置の底面に固着すると共に、他方を厚さ方向に折り曲げて、上記第２の領域に実装された電子部品が上記第１の半導体装置上に積層される構造とし、上記配線板の外部端子と、上記第１の半導体装置の第１の端子が、実装基板上の異なる電極に接続されるよう構成したことを特徴とする半導体装置。 A wiring board made of a flexible member, provided with external terminals connected to the electrodes on the mounting substrate in the first area, and mounted with electronic components in the second area,
A semiconductor element is mounted on one surface of the wiring board, and an electrode is electrically connected to the semiconductor element. The other surface of the wiring board is connected to the electrode and is mounted on the mounting board. A first semiconductor device provided with a first terminal connected to the electrode of
The wiring board has a single-sided wiring structure in which a conductor is formed on one side of a heat-resistant film. One of the wiring boards is fixed to the bottom surface of the first semiconductor device, and the other is bent in the thickness direction, and the second The electronic component mounted in the region is stacked on the first semiconductor device, and the external terminal of the wiring board and the first terminal of the first semiconductor device are different electrodes on the mounting substrate. A semiconductor device characterized in that it is connected to a semiconductor device. 可撓性部材から成り、第１の領域に実装基板上の電極に接続される外部端子が設けられ、第２の領域に電子部品が実装された配線板、
配線基板の一方の面に、半導体素子を搭載すると共に、この半導体素子に電気的に接続される電極を有し、上記配線基板の他方の面に、上記電極に接続されると共に、実装基板上の電極に接続される第１の端子が設けられて成る第１の半導体装置を備え、
上記配線板の一方を、上記第１の半導体装置の底面に固着すると共に、他方を、上記第２の領域に実装された電子部品が、実装基板上に実装された高さの低い他の電子部品上に積層されるよう配設し、上記配線板の外部端子と、上記第１の半導体装置の第１の端子が、実装基板上の異なる電極に接続されるよう構成したことを特徴とする半導体装置。 A wiring board made of a flexible member, provided with external terminals connected to the electrodes on the mounting substrate in the first area, and mounted with electronic components in the second area,
A semiconductor element is mounted on one surface of the wiring board, and an electrode is electrically connected to the semiconductor element. The other surface of the wiring board is connected to the electrode and is mounted on the mounting board. A first semiconductor device provided with a first terminal connected to the electrode of
One of the wiring boards is fixed to the bottom surface of the first semiconductor device, and the other electronic component mounted on the second region is mounted on the mounting board with another electronic device having a low height. It is arranged so as to be laminated on a component, and the external terminal of the wiring board and the first terminal of the first semiconductor device are connected to different electrodes on the mounting board. Semiconductor device. 可撓性部材から成り、一方の面に電子部品が実装され、他方の面に接続部が設けられた配線板、
樹脂中に導体配線が施され、一方端に上記配線板の接続部に接続される電極が設けられ、他方端に実装基板上の電極に接続される外部接続端子が設けられた樹脂成型コネクタ、
配線基板の一方の面に、半導体素子を搭載すると共に、この半導体素子に電気的に接続される電極を有し、上記配線基板の他方の面に、上記電極に接続されると共に、実装基板上の電極に接続される第１の端子が設けられて成る第１の半導体装置を備え、
上記樹脂成型コネクタを上記第１の半導体装置の周辺に並設し、樹脂成型コネクタの一方端の電極と、上記配線板の接続部とを接続して、上記配線板上に実装された電子部品が上記第１の半導体装置上に積層される積層構造とし、上記樹脂成型コネクタの外部接続端子と、上記第１の半導体装置の第１の端子が、実装基板上の異なる電極に接続されるよう構成したことを特徴とする半導体装置。 A wiring board composed of a flexible member, on which electronic components are mounted on one surface, and a connecting portion is provided on the other surface;
A resin-molded connector in which conductor wiring is provided in the resin, an electrode connected to the connection portion of the wiring board is provided at one end, and an external connection terminal connected to the electrode on the mounting substrate is provided at the other end;
A semiconductor element is mounted on one surface of the wiring board, and an electrode is electrically connected to the semiconductor element. The other surface of the wiring board is connected to the electrode and is mounted on the mounting board. A first semiconductor device provided with a first terminal connected to the electrode of
An electronic component mounted on the wiring board, wherein the resin-molded connector is juxtaposed around the first semiconductor device, the electrode at one end of the resin-molded connector is connected to the connection portion of the wiring board Are stacked on the first semiconductor device, and the external connection terminal of the resin molded connector and the first terminal of the first semiconductor device are connected to different electrodes on the mounting substrate. A semiconductor device characterized by comprising. 可撓性部材から成り、第１の領域に実装基板上の電極に接続される外部端子が設けられ、第２の領域に電子部品が実装された配線板、
外部リード線によって実装基板に間隙をおいて実装された第２の半導体装置を備え、
上記配線板を厚さ方向に折り曲げて、上記第２の半導体装置に固着すると共に、上記第２の領域に実装された電子部品が上記第２の半導体装置上に積層される構造とし、且つ、上記外部端子が、上記第２の半導体装置と実装基板との間隙に位置するよう構成したことを特徴とする半導体装置。 A wiring board made of a flexible member, provided with external terminals connected to the electrodes on the mounting substrate in the first area, and mounted with electronic components in the second area,
A second semiconductor device mounted on the mounting substrate with a gap by an external lead;
The wiring board is bent in the thickness direction and fixed to the second semiconductor device, and an electronic component mounted in the second region is stacked on the second semiconductor device, and A semiconductor device characterized in that the external terminal is located in a gap between the second semiconductor device and a mounting substrate. 上記第１の半導体装置は、試験完了後の半導体装置であることを特徴とする請求項１〜請求項４のいずれかに記載の半導体装置。   The semiconductor device according to claim 1, wherein the first semiconductor device is a semiconductor device after completion of the test. 上記第２の半導体装置は、試験完了後の半導体装置であることを特徴とする請求項５に記載の半導体装置。   6. The semiconductor device according to claim 5, wherein the second semiconductor device is a semiconductor device after completion of the test.
JP2004007294A 2004-01-14 2004-01-14 Semiconductor device Expired - Fee Related JP4374251B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9489971B1 (en) * 2015-01-29 2016-11-08 Seagate Technology Llc Flexible circuit for concurrently active recording heads

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9489971B1 (en) * 2015-01-29 2016-11-08 Seagate Technology Llc Flexible circuit for concurrently active recording heads

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