JP4371121B2 - Electro-optical device and electronic apparatus - Google Patents

Description

  The present invention belongs to a technical field of an electro-optical device such as a liquid crystal device which is preferably used for displaying moving images such as live-action images and animation images such as television and video, and in particular, an electro-optical device having a pixel arrangement pattern of delta arrangement and the same Belongs to the technical field of electronic equipment using

  Conventionally, pixel arrangement patterns in an electro-optical device such as a liquid crystal device include a mosaic arrangement in which pixels are arranged straight in the horizontal direction and in the vertical direction (in this case, the coloring pattern of the corresponding color filter includes a diagonal pattern). In addition, there is a diagonal mosaic arrangement in which R (red), G (green), and B (blue) are arranged, and a stripe arrangement in which R, G, and B are arranged in the vertical direction), and vertical lines and horizontal lines are continuous. Since it can be displayed linearly, it is suitable for displaying character data on a monitor such as a personal computer.

  On the other hand, as shown in FIGS. 11 and 12, the pixel arrangement pattern in the electro-optical device is shown together with the data lines 6 for supplying image signals to the pixel electrodes 9a, and the pixels are arranged straight in the X direction and Y In the direction, there is a delta arrangement in which each pixel is arranged with a shift of 0.5 pixel pitch in the X direction. Among these, the pixel electrode group shown in FIG. 11 is connected to the same data line 6, and the same color is applied to the pixel electrode group arranged by shifting 1.5 pixels for each scanning line (that is, for each row) by a color filter. This is called a delta arrangement of the same color system of data lines to which (ie, R, G or B) is assigned. On the other hand, the pixel electrode group shown in FIG. 12 is connected to the same data line 6 and arranged by shifting 0.5 pixel for each scanning line, and two colors (ie, R and G, G and B or B and G) are alternately called a data line two-color rotation type delta arrangement.

  In the latter case, it is only necessary to connect the pixel electrodes 9a arranged so as to be shifted by 0.5 pixels to the same data line 6. Therefore, although there is an advantage that the wiring of the data lines 6 can be relatively small, each data line 6 Each time, it is necessary to alternately input image signals related to the data of two colors, and there is a disadvantage that the external circuit for processing the image signal becomes complicated. Further, the data of the two colors related to the same data line 6 are mutually connected. The display is uneven because it is affected by this. On the other hand, in the case of the former (data line same color system), since the image signal related to the same color data is inputted to the same data line 6, the data related to a plurality of rows located relatively close does not change so much. Therefore, display unevenness due to the influence of data between different lines hardly occurs. Therefore, the data line same color system is generally adopted.

  Since this delta arrangement can display horizontal lines and diagonal lines as a substantially continuous straight line, it is suitable for displaying moving images such as live-action images and animation images on televisions and videos. In addition, the delta arrangement is also preferably used in an inexpensive single-plate projector that enables color display using, for example, a single liquid crystal device as a light valve, and further, an inexpensive display device for monochrome display It is also adopted.

  In the case of an active matrix liquid crystal device, transistor characteristics are prevented from being deteriorated due to generation of photocurrent caused by light entering a channel region of a pixel switching thin film transistor (hereinafter referred to as TFT as appropriate). There is a need to.

  For this reason, on the counter substrate, a black matrix or a metal material such as Cr (chromium) or a resin black is used in a non-pixel opening region (a region where light is not transmitted in each pixel) including a position facing each TFT. In general, a light shielding film called a black mask is formed. This light-shielding film fulfills various functions such as defining the pixel opening region (that is, the region through which light is transmitted) of each pixel, shielding the TFT semiconductor layer, and improving the contrast ratio. In particular, a liquid crystal device provided with a color filter layer also functions to prevent color mixture of color materials constituting the color filter layer.

  By the way, in order to shield the TFT so that incident light is not irradiated, it is necessary to shield the TFT separately by using the above-described light shielding film on the counter substrate, which causes a complicated device defect and an increase in cost and reliability. There is a problem that it is difficult to provide high light shielding.

  The present invention has been made in view of the above-described problems, and in an active matrix drive type electro-optical device, an electro-optical device such as a liquid crystal device capable of displaying a high-quality image by efficiently shielding a transistor. It is an issue to provide.

In order to solve the above problem, an electro-optical device according to the present invention includes an electro-optical material sandwiched between a pair of substrates, a data line and a pixel electrode provided on one of the pair of substrates, A transistor for electrically connecting the data line and the pixel electrode, and a part of the data line has a protrusion protruding in a plane from the main line part of the data line, the protrusion being The transistor is provided on the electro-optic material side, and the transistor includes a first gate and a second gate between the first gate and the data line, and the first gate is an LDD. (Lightly Doped Drain) structure, the high concentration source region of the first gate overlaps with the pixel electrode in a plane, and the junction region between the channel region of the first gate and the low concentration drain region is the protrusion. Covered by the part, front The junction region between the channel region of the first gate and the low-concentration source region is not covered with the protruding portion.

Further, a scanning line intersecting with the data line may be provided on the one substrate, and the data line may have the protruding portion at a position where the data line faces the scanning line. An edge of the gate electrode on the pixel electrode side is covered with the protrusion. Note that the main line portion may cover part or all of the remaining portion covered by the protruding portion in the channel region of the transistor. Therefore, the light shielding in the transistor with respect to the incident light from the other substrate side is efficiently performed by this protrusion.

  Further, the main line portion includes a portion electrically connected to the transistor and is meandering by 0.5 pixels for each scanning line corresponding to the gap between the pixel electrodes. Thereby, the parasitic capacitance between the data line and the pixel electrode can be reduced. Then, the difference in parasitic capacitance generated between the odd-numbered stage and the even-numbered stage due to the positional deviation between the data line and the pixel electrode in the manufacturing process can be reduced. That is, even if the positional deviation is large, the difference in parasitic capacitance generated accordingly can be reduced, so that the horizontal line unevenness caused by the difference in parasitic capacitance between the odd-numbered stage and the even-numbered stage can be effectively reduced.

  As a result, according to the electro-optical device of the present invention, by efficiently shielding the transistor, the S / N (signal / noise) ratio in the image signal on the data line is improved and the transistor due to light leakage is improved. By preventing characteristic deterioration, high-quality image display becomes possible.

  In one aspect of the present invention, the channel region of the transistor is formed in a direction different from the extending direction of the main line portion of the data line at a position facing the scanning line.

  According to this aspect, the channel region is formed in a direction different from the extending direction of the main line portion of the data line at the position facing the scanning line, but the protruding portion is formed in this different direction from the main line portion of the data line at this position. By projecting, the channel region can be shielded from light.

  In one aspect of the present invention, the protruding portion of the data line has a different protruding direction for each scanning line.

  According to this aspect, even if the channel region is formed in a different direction for each scanning line (that is, usually alternately left and right) with reference to the main line portion meandering so as to minimize the routing of the data line, Thus, the channel region can be shielded from light by the protruding portion of the data line whose protruding direction is different for each scanning line.

The second gate has an LDD (Lightly Doped Drain) structure, a semiconductor layer of the transistor has a U-shaped dual gate structure that crosses the scanning line twice, and a channel region of the second gate The junction region between the low concentration source region and the low concentration source region is covered with the main line portion, and the junction region between the channel region of the second gate and the low concentration drain region is covered with both the main line portion and the protruding portion. It may not be.

  According to this aspect, the data line made of a light-shielding conductive material such as Al, for example, has a channel region facing the gate on the side close to the source of the transistor having a dual gate, the main line portion of the data line, and the counter substrate. It is at least partially covered when viewed from the side. On the other hand, the channel region facing the gate on the side close to the drain of the transistor having the dual gate is at least partially covered by the protruding portion of the data line when viewed from the counter substrate side. Therefore, light shielding in the transistor with respect to incident light from the counter substrate side is performed very efficiently by the main line portion and the protruding portion of the data line. At this time, a portion connecting the two gates in the U-shaped dual gate structure in the semiconductor layer is disposed in the pixel opening region, and the protruding portion capable of various shapes and layouts is disposed away from the pixel electrode. Thus, the pixel aperture ratio can be reduced at all or hardly.

  In another aspect of the present invention, the transistor has a U-shaped dual gate in which a semiconductor layer crosses the scanning line twice, and the data line corresponds to the gate electrode on the data line side of the dual gate. The edge on the data line side is covered, and the edge on the pixel electrode side of the gate electrode on the pixel electrode side of the dual gate is covered.

  In another aspect of the present invention, the transistor includes a transistor having an LDD (Lightly Doped Drain) structure, and the data line at least partially covers the LDD region of the transistor in addition to the channel region of the transistor. The electro-optical device according to claim 1, wherein:

  According to this aspect, when the transistor is off in nature, the transistor having the LDD structure with a small leakage current is adopted, and not only the channel region but also the LDD region in the transistor is shielded. Can be reliably prevented.

  In another aspect of the present invention, a light shielding film covering the channel region of the transistor is provided on the one substrate.

  According to this aspect, since the light shielding film is provided also on the lower side of the transistor, it is possible to perform light shielding in the transistor against the return light from one substrate. Furthermore, since this light shielding film can provide part or all of the function of defining the contour of the pixel opening area, the data line must not have all of the function of defining the outline of the pixel opening area. That's it. Accordingly, the degree of freedom of the shape and position of the main line portion and the protruding portion of the data line is remarkably increased, and as a result, the pixel opening area can be widened.

  In another aspect of the present invention, the light shielding film does not overlap a contact hole for electrically connecting the transistor and the pixel electrode.

  In another aspect of the present invention, the light shielding film overlaps the scanning line and is formed to be narrower than the scanning line, and the light shielding film is formed in a region where the scanning line overlaps the protruding portion of the data line. Is formed wide so as to cover the channel region of the transistor.

  In general, in this type of electro-optical device, stress is increased when a light-shielding film is provided below a semiconductor layer constituting a transistor. In particular, when the contact hole between the semiconductor layer and the pixel electrode is opened, stress is dissipated around it, causing cracks and deformation, or if there is a capacitance line around it, insulation that forms a storage capacitor The pressure resistance of the film may deteriorate. Therefore, by not providing the light shielding film below the contact hole in this way, it is possible to prevent the adverse effect due to the stress caused by the presence of the light shielding film from becoming apparent when the contact hole is opened.

  In another aspect of the present invention, the pixel electrodes are arranged with a shift of 0.5 pixels for each scanning line, and the pixel electrodes are arranged with a shift of 1.5 pixels for each scanning line among the pixel electrodes. A group is connected to the same data line through the transistor and corresponds to the same color.

  In another aspect of the present invention, the data line covers only a part of the gate electrode.

  In another aspect of the present invention, a plurality of scanning lines and a plurality of data lines each having an electro-optic material sandwiched between a pair of substrates and intersecting each other on one of the pair of substrates, and the scanning lines. And a transistor provided corresponding to the intersection of each data line, and a pixel electrode electrically connected to the drain of the transistor through a contact hole, and the data line is made of a light-shielding conductive material. The transistor is electrically connected to the source of the transistor through a contact hole, and the gate electrode of the transistor has an edge on the side electrically connected to the pixel electrode covering a part of the data line. It has been broken.

  Such an operation and other advantages of the present invention will become apparent from the embodiments described below.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment of electro-optical device)
An embodiment of an electro-optical device will be described with reference to the drawings. In this embodiment, the present invention is applied to a liquid crystal device. FIG. 1 is a block diagram showing a pixel portion and a peripheral circuit formed on a TFT array substrate of the liquid crystal device. FIG. FIG. 3 is a plan view of a plurality of adjacent pixel groups of a TFT array substrate on which scanning lines, pixel electrodes, and the like are formed, and FIG. 3 is a cross-sectional view taken along line AA ′ of FIG. In FIG. 3, the scale of each layer and each member is different in order to make each layer and each member recognizable on the drawing.

  In FIG. 1, the plurality of pixels 10 b constituting the image display area on the TFT array substrate 10 of the liquid crystal device according to the present embodiment are particularly delta-arranged as a kind of matrix arrangement. Each pixel 10b is formed with a pixel switching TFT 30 for controlling the pixel electrode 9a, and the data line 6 to which the image signals S1, S2,... Sn are supplied is electrically connected to the source of the TFT 30. Has been. The image signals S1, S2,..., Sn to be written to the data lines 6 may be supplied line-sequentially in this order, or may be supplied to each of a plurality of adjacent data lines 6 for each group. good. Further, the scanning line 3a is electrically connected to the gate of the TFT 30, and the scanning signals G1, G2,..., Gm are applied to the scanning line 3a in a pulse-sequential manner in this order at a predetermined timing. It is configured. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and the image signal S1, S2,..., Sn supplied from the data line 6 is obtained by closing the TFT 30 as a switching element for a certain period. Write at a predetermined timing. A predetermined level of image signals S1, S2,..., Sn written on the liquid crystal as an example of the electro-optical material via the pixel electrode 9a is between the counter electrode (described later) formed on the counter substrate (described later). Is held for a certain period. The liquid crystal modulates light by changing the orientation and order of the molecular assembly according to the applied voltage level, thereby enabling gradation display. In the normally white mode, incident light cannot pass through the liquid crystal part according to the applied voltage. In the normally black mode, incident light passes through the liquid crystal part according to the applied voltage. Through the liquid crystal device as a whole, light having a contrast according to the image signal is emitted. Here, in order to prevent the voltage of the image signal held between the pixel electrode 9a and the counter electrode from being reduced in a short time due to the current when the TFT 30 is turned off, that is, a leakage current, the voltage between the pixel electrode 9a and the counter electrode is reduced. A storage capacitor 70 is added in parallel with the liquid crystal capacitor formed in the above. For example, it is held by the storage capacitor 70 for a time that is three orders of magnitude longer than the time during which the source voltage is applied. Thereby, the holding characteristics are further improved, and a liquid crystal device with a high contrast ratio can be realized. A capacitor line 3b, which is a wiring for forming the storage capacitor 70, is formed in parallel with the scanning line 3a. Each capacitor line 3b is connected to the wiring of the constant potential VMOS outside the image display region (that is, the peripheral region), and is configured to make the potential of one storage capacitor electrode of the storage capacitor 70 constant. . The constant potential VMOS may be connected to a constant potential power source of the data line driving circuit or the scanning line driving circuit or a constant potential source supplied to the counter electrode.

  In the peripheral region on the TFT array substrate 10, peripheral circuits such as the data line driving circuit 101, the scanning line driving circuit 104, the sampling circuit 301, and the inspection circuit 401 may be integrated on the same substrate. By adopting such a configuration, not only does the peripheral IC cost increase and the yield decrease due to poor mounting, but also the pixel pitch can be narrowed, a high-definition electro-optical device or a small size can be achieved. An electro-optical device can be realized.

  The scanning line driving circuit 104 includes a shift register that sequentially outputs transfer signals in the Y direction or the opposite direction in the figure, and starts a transfer operation in response to a transfer start signal supplied from an external control circuit. Based on the clock signal and its inverted signal, a transfer signal is applied to the scanning line 3 in a pulse-sequential manner as scanning signals G1, G2,.

  The data line driving circuit 101 includes a shift register that sequentially outputs transfer signals in the X direction or the opposite direction in the figure, and starts a transfer operation in response to a transfer start signal supplied from an external control circuit. The red (R) image signal VID-R, the green (G) image signal VID-G, and the blue (B) which are color image signals supplied from the image signal line 115 based on the clock signal and its inverted signal. A sampling circuit driving signal for sampling the image signal VID-B is supplied to the sampling circuit 301 via the sampling circuit driving signal line 306.

  The sampling circuit 301 includes a TFT 302 functioning as a switch for each data line 6, the image signal line 115 is connected to the source electrode of the TFT 302, and the sampling circuit drive signal line 306 is connected to the gate electrode of the TFT 302. ing. Then, according to the sampling circuit drive signal, the image signals VID-R, VID-G and VID-B supplied via the image signal line 115 are sampled, and a plurality of image signals S1, S2,. The data lines 6 are respectively supplied. The control switch of the sampling circuit 301 is formed of a TFT, and may be an N-channel TFT, a P-channel TFT, or a complementary TFT. In addition, the inspection circuit 401 is configured to be able to perform a predetermined inspection regarding quality and defects such as continuity and disconnection in wiring and circuits such as the data line 6, the TFT 30, and the storage capacitor 70 during manufacturing or at the time of shipment. The inspection circuit 401 can prevent outflow of defective products to the next process and can reduce the cost of members.

  In the example shown in FIG. 1, the serial image signals VID-B, VID-G, and VID-R are supplied for each color via the assigned one image signal line 115, and each image signal VID is supplied. The sampling circuit 301 sequentially samples -B, VID-G, and VID-R.

  Next, as shown in FIG. 2, the sampling circuit driving signal lines are simultaneously supplied to the sampling circuits 301 corresponding to the adjacent image signals VID-R, VID-G, and VID-B through the sampling circuit driving signal line 306 ′. In this way, the phases of the image signals VID-R, VID-G, and VID-B may be adjusted. For example, the image signals S1, S2, and S3 are sampled simultaneously. As a result, the operating frequency of the data line driving circuit 101 can be reduced to 1/3, so that power consumption and EMI (Electomagnetic wave Interference) can be reduced.

  Note that serial image signals VID-R are provided in advance so that the image signals VID-R, VID-G, and VID-B can be supplied in parallel for each predetermined number of data line groups in the external image signal processing circuit. VID-G and VID-B may be converted into a predetermined number of parallel image signals, and a plurality of image signals after serial-parallel conversion may be sampled on the data line 6. For example, if the sampling circuit 301 has a high sampling capability, the number of image signals for each parallel color and the number of data lines constituting each group to which image signals are applied simultaneously may be one. On the contrary, if the sampling capability is low, 12, 24, etc. may be used. Thus, by serial-parallel conversion of the image signal, it is possible to cope with an image signal with a high dot frequency such as so-called XGA and SXGA by using the sampling circuit 301 having a sampling capability that is not so high.

  As shown in FIG. 1 and FIG. 2, in this embodiment, the data lines 6 are configured by a delta arrangement of the same color system so that the same data line 6 corresponds. With such a configuration, since image signals relating to the same color data are input to the same data line 6, the data relating to a plurality of rows located relatively close to each other does not change so much. Display unevenness due to influence hardly occurs. In order to correspond to the data line 6 with the same color, it is only necessary to stagger the pixels in the X direction by 1.5 pixels for each scanning line 3a. At this time, the pixel switching TFT 30 for controlling the pixel electrode 9a is provided on the opposite side to the meandering direction of the data line 6 arranged to meander between the adjacent pixel electrodes 9a and the Y-direction axis. Then, wiring can be performed most efficiently.

  Next, in FIG. 3, on the TFT array substrate 10 of the liquid crystal device, a plurality of pixel electrodes 9a (contours are indicated by dotted line portions 9a ') arranged in a delta arrangement in the same color system as the data lines are provided. A data line 6, a scanning line 3a, and a capacitor line 3b are provided along the vertical and horizontal boundaries of the pixel electrode 9a. The scanning lines 3a are provided in a straight line corresponding to the linear arrangement arranged in the X direction in the delta arrangement of the pixel electrodes 9a. The data line 6 is provided so as to meander and sew a portion shifted by 0.5 pixels for each scanning line arranged in the Y direction in the delta arrangement of the pixel electrodes 9a. The TFT 30 is composed of a dual-gate TFT having two gates, the drain is connected to the pixel electrode 9a, the source is connected to the data line 6, and the gate is connected to the scanning line 3a. Has been. The data line 6 is electrically connected to a source region, which will be described later, of the semiconductor layer 1 such as a polysilicon film constituting the TFT 30 having a dual gate structure through a contact hole 5. The pixel electrode 9 a The layer 1 is electrically connected to a drain region described later via a contact hole 8. In addition, the scanning line 3a is arranged so as to face the channel regions 1a and 1a ′ (the hatched region in the lower right in the drawing) of the two gates in the semiconductor layer 1, and the scanning line 3a functions as a gate electrode. .

  In this embodiment, in particular, the data line 6 is made of a low-resistance light-shielding conductive material such as Al, and between adjacent pixel electrodes 9a arranged by shifting 0.5 pixels for each scanning line. The main line portion 6a including the portion connected to the source region of the semiconductor layer 1 via the contact hole 5 and the main line portion 6a that protrudes in a plane from the main line portion 6a to the scanning line 3a. And a protrusion 6b. In addition, the pixel electrode group arranged by shifting 1.5 pixels for each scanning line in the pixel electrode 9 a is connected to the same data line 6 through the TFT 30. The main line portion 6a and the protruding portion 6b of the data lines 6 at least partially cover the channel regions 1a and 1a ′ of the dual gate TFT 30 having the gate connected to the main line portion 6a when viewed from the counter substrate side. It is configured as follows. Therefore, light shielding in the channel regions 1 a and 1 a ′ with respect to incident light from the counter substrate side is performed by the main line portion 6 a and the protruding portion 6 b of the data line 6.

  In this embodiment, the storage capacitor 70 can be provided to the pixel electrode 9a by providing the capacitor line 3b side by side with the scanning line 3b. Since the storage capacitor 70 is provided to each pixel electrode 9a by providing the capacitor line 3b, the influence on the image signal or display image due to the parasitic capacitance particularly between the data line 6 and the pixel electrode 9a can be relatively reduced. That is, the horizontal line unevenness due to the difference in parasitic capacitance between the odd-numbered stage and the even-numbered stage can be effectively reduced.

  Further, the capacitor line 3 b extends below the data line 6, and the storage capacitor 70 can be formed between the first storage capacitor electrode 1 f formed of a part of the semiconductor layer 1 via an insulating film.

  With such a configuration, it is possible to efficiently increase the storage capacitor 70 using the non-light transmission region below the data line 6, and the data line between the odd-numbered stages and the even-numbered stages described above. The horizontal line unevenness caused by the difference in parasitic capacitance between the pixel electrode 6 and the pixel electrode 9a can be reduced very effectively.

  In the present embodiment, the protruding portion 6b of the data line 6 is configured so that the protruding direction is different for each scanning line. By adopting such a configuration, even if the channel region is formed in a different direction for each scanning line (that is, usually alternately left and right) with reference to the main line portion meandering to minimize the routing of the data line, In response to this, the channel region can be shielded from light by the protruding portion of the data line having a different protruding direction for each scanning line.

  Next, as shown in the cross-sectional view of FIG. 4, the liquid crystal device includes a TFT array substrate 10 that constitutes an example of one transparent substrate, and a counter substrate that constitutes an example of the other transparent substrate disposed opposite thereto. 20. The TFT array substrate 10 is made of, for example, a quartz substrate, and the counter substrate 20 is made of, for example, a glass substrate or a quartz substrate. A pixel electrode 9a is provided on the TFT array substrate 10, and an alignment film 16 that has been subjected to a predetermined alignment process such as a rubbing process is provided above the pixel electrode 9a. The pixel electrode 9a is made of a transparent conductive thin film such as an ITO (Indium Tin Oxide) film. The alignment film 16 is made of an organic thin film such as a polyimide thin film.

  On the other hand, the counter substrate 20 is provided with a counter electrode (common electrode) 21 over the entire surface thereof, and an alignment film 22 subjected to a predetermined alignment process such as a rubbing process is provided below the counter electrode 20. ing. The counter electrode 21 is made of a transparent conductive thin film such as an ITO film. The alignment film 22 is made of an organic thin film such as a polyimide thin film.

  As shown in FIGS. 3 and 4, the TFT array substrate 10 is provided with pixel switching TFTs 30 that perform switching control of the pixel electrodes 9 a at positions adjacent to the pixel electrodes 9 a.

  As shown in FIG. 4, the counter substrate 20 is further provided with a second light shielding film 23 in an area other than the opening area of each pixel portion. By the second light shielding film 23 and the main line portion 6a and the protruding portion 6b of the data line 6, incident light from the counter substrate 20 side enters the channel regions 1a and 1a ′ of the semiconductor layer 1 of the pixel switching TFT 30 and the channel region 1a. The LDD regions 1b ′ and 1c ′ adjacent to the adjacent LDD regions 1b and 1c and the channel region 1a ′ are not penetrated. Further, the second light-shielding film 23 has functions such as improving the contrast ratio, preventing color mixture of color materials, and preventing temperature rise due to incident light of the liquid crystal device, and the second light-shielding film 23 provides a pixel opening region of the liquid crystal device. It is also possible to at least partially define the contour.

  The counter substrate 20 is further provided with a color filter layer (coloring material layer) 24 and an overcoat film 25 that form a color arrangement based on a delta arrangement. The color filter layer 24 is manufactured by a pigment dispersion method, a dyeing method, a printing method, an electrodeposition method, an ink jet method, or the like. Among these, the pigment dispersion method is comprehensively excellent in terms of spectral characteristics, pattern accuracy, manufacturing cost, heat resistance, light resistance, and the like, and is currently mainstream. On the other hand, the overcoat film 25 is formed on the entire surface of the color filter layer 24 as a protective film and a planarizing film having a thickness of about 0.5 to 2 μm from an acrylic resin or an epoxy resin. Thus, the liquid crystal device is configured as a color liquid crystal device. Accordingly, not only a direct-view type liquid crystal device of a notebook personal computer or a portable device, but also an inexpensive single-plate type project can be created using only one liquid crystal device. The color filter layer 24 may be directly formed on the TFT array substrate 10 with a color resist or the like. It is also possible to form the second light shielding film 23 on the TFT array substrate 10. As a result, it is possible to prevent a decrease in pixel aperture ratio due to a shift in bonding the TFT array substrate 10 and the counter substrate 20, so that not only a high aperture ratio can be realized, but also a yield reduction is not caused. There are advantages.

  Between the TFT array substrate 10 and the counter substrate 20 which are configured as described above and are arranged so that the pixel electrode 9a and the counter electrode 21 face each other, a sealing material (see FIGS. 9 and 10) described later is used. Liquid crystal is sealed in the enclosed space, and the liquid crystal layer 50 is formed. The liquid crystal layer 50 takes a predetermined alignment state by the alignment films 16 and 22 in a state where the electric field from the pixel electrode 9a is not applied. The liquid crystal layer 50 is made of, for example, a liquid crystal in which one kind or several kinds of nematic liquid crystals are mixed. The sealing material is an adhesive made of, for example, a photo-curing resin or a thermosetting resin for bonding the TFT array substrate 10 and the counter substrate 20 around them, and the distance between the two substrates is set to a predetermined value. Gap materials (spacers) such as glass fibers or glass beads are mixed.

  The base insulating film 12 has a function as a base film for the pixel switching TFT 30 by being formed on the entire surface of the TFT array substrate 10. That is, the TFT array substrate 10 has a function of preventing deterioration of the characteristics of the TFT 30 due to roughness during polishing of the surface of the TFT array substrate 10 and dirt remaining after cleaning. The base insulating film 12 is, for example, a highly insulating glass such as NSG (non-doped silicate glass), PSG (phosphorus silicate glass), BSG (boron silicate glass), or BPSG (boron phosphorus silicate glass), a silicon oxide film, or a nitride. It consists of a silicon film or the like.

  In the present embodiment, in particular, the gate insulating film 2 extends from a position facing the scanning line 3a and is used as a dielectric film, and a part of the semiconductor layer 1 serves as the first storage capacitor electrode 1f, and further faces these. A storage capacitor 70 is configured by using a part of the capacitor line 3b as a second storage capacitor electrode. More specifically, a high-concentration drain region 1e ′ of the semiconductor layer 1 connected to the pixel electrode 9a via the contact hole 8 extends below the data line 6 and the scanning line 3a. The capacitor line 3b extending along the scanning line 3a is disposed opposite to the capacitor film 3b through the insulating film (the same film as the gate insulating film 2) to form the first storage capacitor electrode 1f. As a result, the space outside the pixel opening area, that is, the area under the data line 6 and the area where the liquid crystal disclination occurs along the scanning line 3a (that is, the area where the capacitor line 3b is formed) is effectively used. Thus, the storage capacity of the pixel electrode 9a can be increased. Since the storage capacitor 70 is configured to have a relatively large capacity as described above, the influence of the parasitic capacitance between the data line 6 and the pixel electrode 9a on the image signals S1, S2,. Can be small. That is, the horizontal line unevenness due to the difference in parasitic capacitance between the odd-numbered stage and the even-numbered stage can be effectively reduced.

  4 again, the pixel switching TFT 30 having a dual gate structure has an LDD structure for each gate, and the semiconductor layer 1 in which a channel is formed by the scanning line 3a and the electric field from the scanning line 3a. Channel region 1a, gate insulating film 2 that insulates scanning line 3a from semiconductor layer 1, data line 6 (main line portion 6a, protruding portion 6b), low concentration source of semiconductor layer 1 with respect to channel region 1a closer to the source A region (source-side LDD region) 1b, a low-concentration drain region (drain-side LDD region) 1c, a high-concentration source region 1d and a high-concentration drain region 1e, and a channel region 1a ′ closer to the drain. Low concentration source region 1b ′ and low concentration drain region 1c ′ and high concentration source region 1d ′ (high concentration drain) of semiconductor layer 1 And a frequency 1e) and the heavily doped drain region 1e '.

  In particular, the high-concentration drain region 1e for the channel region 1a also functions as a high-concentration source region 1d 'for the channel region 1a', and the pixel switching TFT 30 is constructed. Further, the high-concentration drain region 1e for the channel region 1a (the high-concentration source region 1d ′ for the channel region 1a ′) is a U-shaped connecting portion of two gates in the pixel opening region as shown in FIG. The semiconductor layer 1 in the protruding region is originally thin and almost transparent and relatively close to the TFT array substrate 10 (that is, the thickness from the pixel electrode 9a through the interlayer insulating film or the like). The pixel electrode 9a portion on the protruding region is flattened during a plurality of thin film forming processes without being subjected to a flattening process. It is easily flattened by some flattening process in a later process. As a result, there is almost no problem that the semiconductor layer portion in the protruding region causes unevenness in the pixel electrode 9a (that is, causes alignment failure in the liquid crystal layer 50).

  A corresponding one of the plurality of pixel electrodes 9a is connected to the high concentration drain region 1e '. As will be described later, the source region and the drain region of the semiconductor layer 1 have N-channel or P-channel impurity ions having a predetermined concentration depending on whether an N-type or P-type channel is formed in the semiconductor layer 1. It is formed by doping. N-channel TFTs have the advantage of high operating speed, and are often used as TFTs that are pixel switching elements.

  In the present embodiment, the data line 6 is particularly composed of a light-shielding thin film such as a metal film such as Al or an alloy film such as metal silicide. Further, on the scanning line 3a, the gate insulating film 2 and the base insulating film 12, a contact hole 5 leading to the high concentration source region 1d and a contact hole 8 leading to the high concentration drain region 1e ′ are formed, respectively. An insulating film 4 is formed. The main line portion 6a of the data line 6 is electrically connected to the high concentration source region 1d through the contact hole 5 to the high concentration source region 1d. Further, a first interlayer insulating film 7 in which a contact hole 8 to the high concentration drain region 1 e ′ is formed is formed on the data line 6 and the first interlayer insulating film 4. The pixel electrode 9a is electrically connected to the high concentration drain region 1e 'via the contact hole 8 to the high concentration drain region 1e'. The aforementioned pixel electrode 9a is provided on the upper surface of the second interlayer insulating film 7 thus configured. The pixel electrode 9a and the high concentration drain region 1e 'may be electrically connected by relaying the same Al film as the data line 6 or the same polysilicon film as the scanning line 3b.

  The pixel switching TFT 30 preferably has an LDD structure as described above, but may have an offset structure in which impurity ions are not implanted into the low concentration source regions 1b and 1b ′ and the low concentration drain regions 1c and 1c ′. A TFT having a self-aligned structure in which impurity ions are implanted at a high concentration using the gate electrode as a mask to form high concentration source and drain regions in a self-aligning manner may be used.

  In this embodiment, since the pixel switching TFT 30 employs a dual gate structure, a leakage current between the channel and the source-drain region junction can be prevented, and the off-time current can be reduced. Furthermore, if at least one of these two gates has an LDD structure, the off-current can be reduced and a stable switching element can be obtained. However, instead of the dual gate structure, a single gate TFT in which one gate electrode protrudes in a square shape from the scanning line 3a may be used, or a triple gate structure TFT having three or more gate electrodes. Etc. may be used.

  In the present embodiment, in particular, the main line portion 6a of the data line 6 extends meanderingly by sewing along the side of a staggered array of pixel electrodes 9a arranged in the Y direction, and the protruding portion 6b of the data line 6 In the position which opposes the scanning line 3a from the main line part 6a, it each protrudes planarly (refer FIG. 3). The channel regions 1a and 1a 'of the pixel switching TFT 30 are at least partially covered with the main line portion 6a and the protruding portion 6b, respectively. Therefore, the light shielding in the pixel switching TFT 30 with respect to the incident light from the counter substrate 20 side is efficiently performed by the main line portion 6a and the projecting portion 6b, and the incident light in the semiconductor layer 1 in the pixel switching TFT 30 is reduced. It is possible to effectively prevent the transistor characteristics from being deteriorated due to the photoelectric conversion effect. At this time, part or all of the occupied area of the protruding portion 6b, which can be variously shaped and laid out, is removed from the pixel electrode 9a, so that the pixel aperture ratio does not decrease or hardly decreases. Further, since the main line portion 6a of the data line 6 is formed by sewing between the adjacent pixel electrodes 9a, the parasitic capacitance between the data line 6 and the pixel electrode 9a can be reduced. Then, the difference in the parasitic capacitance generated between the odd-numbered stage and the even-numbered stage due to the positional deviation between the data line 6 and the pixel electrode 9a in the manufacturing process can be reduced. That is, even if the positional deviation is large, the difference in parasitic capacitance generated accordingly can be reduced, so that the horizontal line unevenness caused by the difference in parasitic capacitance between the odd-numbered stage and the even-numbered stage can be effectively reduced.

  Particularly in the present embodiment, when viewed from the counter substrate 20 side, the edge of the main line portion 6a and the edge of the pixel electrode 9a overlap each other at a slight width along both edges (see FIG. 3). Accordingly, since light does not leak between the two and it does not lead to image deterioration such as white spots, the main line portion 6a thus overlapped causes the pixel opening region to the left and right (that is, each side extending in the Y direction of the pixel opening region). Can be defined. Note that, as the overlapping area increases, the parasitic capacitance between the data line 6 and the pixel electrode 9a increases and causes the above-described uneven horizontal line. Therefore, the overlapping area is as small as possible while considering manufacturing accuracy. Better. Further, in such a planar layout configuration of the data line 6, the second light shielding film 23 on the counter substrate 20 (see FIG. 4) is formed above and below the pixel opening region (that is, each side extending in the X direction of the pixel opening region). ).

  Further, in this embodiment, in particular, for the pixel switching TFT 30 having a dual gate structure, the channel region 1a is covered by the main line portion 6a of the data line 6 and the channel region 1a ′ is covered by the protruding portion 6b of the data line 6. As shown in FIG. 3, the light shielding in the pixel switching TFT 30 is performed very efficiently by the main line portion 6a and the protruding portion 6b. In addition, a portion connecting the two U-shaped gates in the semiconductor layer 1 is disposed in the pixel opening region, and the protruding portion 6b that can be variously shaped and laid out does not overlap with the pixel electrode 9a when viewed in plan. Therefore, parasitic capacitance is not generated between the protruding portion 6b of the data line 6 and the pixel electrode 9a, and thus occurrence of uneven horizontal lines due to parasitic capacitance can be suppressed. On the other hand, such a dual-gate TFT can shorten the distance from the data line 6 to the pixel electrode 9a, so that basically the pixel aperture ratio can be increased and the leakage current at the off time is small. This is suitable for TFTs.

  As described in detail above, according to the first embodiment, in the delta arrangement liquid crystal device of the data line same color method, the image on the data line is effectively shielded by reducing the TFT 30 while reducing the number of data lines. The signal / noise (S / N) ratio in the signal can be improved, and the pixel aperture ratio is kept high, and the parasitic capacitance between the data line 6 and the pixel electrode 9a is reduced, so that high quality is achieved. Image display is possible.

(Second embodiment of electro-optical device)
A second embodiment of the electro-optical device according to the invention will be described with reference to FIG.

  The liquid crystal device according to the first embodiment described above is configured as a single-plate color display liquid crystal device provided with a color filter layer on the counter substrate 20, but the liquid crystal device according to the second embodiment uses this color filter layer. It is configured as a liquid crystal device for monochrome or monochrome display that is not provided. Since other configurations are the same as those in the first embodiment, the same components as those in FIG. 4 are denoted by the same reference numerals in FIG. 5 and description thereof is omitted. FIG. 5 is a cross-sectional view corresponding to the A-A ′ cross section shown in FIG. 4 and shows a second embodiment that does not include the color filter layer.

  In FIG. 5, a second light shielding film 23, a counter electrode 21, and an alignment film 22 are formed on the counter substrate 20, and no color filter layer or overcoat layer is formed. Therefore, when a single-plate color projector or the like is produced using the liquid crystal device according to the second embodiment, a microlens is provided on the counter substrate 20 so as to correspond to each pixel provided on the TFT array substrate 10. By performing color separation by changing the incident direction of light, a liquid crystal device having no color filter layer can be displayed in color on a single plate. Needless to say, the liquid crystal device according to the second embodiment can be used to create a single-plate monochrome projector or a high-quality color projector using a combination of three projectors.

(Third embodiment of electro-optical device)
A third embodiment of the electro-optical device according to the invention will be described with reference to FIG.

  In the first or second embodiment described above, any flattening process is applied to the step with respect to other regions in the stacked region in which the pixel switching TFT 30, the scanning line 3a, the capacitor line 3b, the data line 6 and the like are formed. However, in the third embodiment, at least one of the base insulating film 12, the first interlayer insulating film 4, the second interlayer insulating film 7, and the TFT array substrate 10 includes at least the data line 6, the scanning line 3a, and the scanning line 3a. At least a part of the region facing the capacitor line 3b is formed in a concave shape. As a result, the base surface of the pixel electrode 9a is flattened. Since other configurations are the same as those in the second embodiment, the same reference numerals are given to the same components in the drawing, and descriptions thereof are omitted. FIG. 6 is a cross-sectional view corresponding to the A-A ′ cross section shown in FIG. 4 and shows an embodiment that does not include the color filter layer.

  As shown in FIG. 6, in the third embodiment, the surface of the second interlayer insulating film 7 is flattened. The second interlayer insulating film 7 is flattened by, for example, a CMP (Chemical Mechanical Polishing) process, an organic SOG (Spin On Glass) film, an inorganic SOG film, an organic film, or a spin coat process. As a result, the level difference between the region where the scanning line 3a, the TFT 30, the capacitor line 3b, etc. are formed so as to overlap the main line portion 6a and the protruding portion 6b of the data line 6 and the pixel opening region is reduced. Since the underlying surface of the pixel electrode 9a is flattened in this way, the pixel electrode 9a can be flattened, and the liquid crystal disclination (caused by unevenness of the surface of the pixel electrode 9a according to the degree of flattening ( Orientation failure). As a result, according to the fourth embodiment, higher-quality image display can be performed, and the pixel opening area can be widened.

  The first interlayer insulating film 4, the second interlayer insulating film 7, the base insulating film 12, and at least a part of the region facing the data line 6, the scanning line 3a, and the capacitor line 3b in the TFT array substrate 10 are recessed. Even if they are formed, the same flattening effect can be obtained. As a method of forming each interlayer insulating film in a concave shape, each interlayer insulating film has a two-layer structure, a thin part consisting of only one layer is formed as a concave recessed part, and a thick part of two layers is formed as a concave bank part. Formation and etching may be performed. Alternatively, each interlayer insulating film may have a single layer structure, and a concave recess may be opened by etching. In these cases, when dry etching such as reactive ion etching or reactive ion beam etching is used, there is an advantage that a concave portion can be formed as designed. On the other hand, at least when wet etching is used alone or in combination with dry etching, the side wall surface of the concave depression can be formed into a taper shape, so that the polysilicon film formed in the concave depression in a later step Further, since the residue around the sidewall of the resist or the like can be reduced, an advantage that the yield is not lowered can be obtained.

(Embodiment 4 of electro-optical device)
A fourth embodiment of an electro-optical device according to the present invention will be described with reference to FIGS.

  In the first to third embodiments described above, the light shielding film for shielding the return light from the TFT array substrate 10 side is not provided on the lower side of the pixel switching TFT 30, but in the fourth embodiment, Such a light shielding film is formed between the TFT array substrate 10 and the base insulating film 12. Since other configurations are the same as those in the second and third embodiments, the same components are denoted by the same reference numerals in the drawings, and the description thereof is omitted. 7 is a plan view of a plurality of adjacent pixel groups on the TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed, and FIG. 8 is a cross-sectional view taken along the line BB ′ of FIG. is there.

  As shown in FIG. 7, a first light shielding film 11 a including a striped wiring portion is provided in a region indicated by a diagonal line rising to the right in the drawing so as to pass below the scanning line 3 a and the TFT 30. More specifically, the striped wiring portions of the first light shielding film 11a extend linearly below the scanning line 3a along the scanning line 3a. In particular, when the scanning line 3a intersects the data line 6 so as to cover the TFT 30 including the channel regions 1a and 1a ′ when viewed from the TFT array substrate 10 side (that is, the lower side of the TFT 30), It is formed slightly wider upward along the data line 6, and other portions are formed slightly narrower in plane than the scanning line 3 a (that is, close to the lower side of the scanning line 3 a in FIG. 7). As a result, the first light shielding film 11a is configured not to be irradiated with light incident from the counter substrate as much as possible.

  Furthermore, the first light-shielding film 11a can have a part or all of the function for defining the contour of the pixel opening area, and therefore the data line 6 has all the functions for defining the outline of the pixel opening area. You don't have to hold it. Accordingly, the degree of freedom of the shape and position of the main line portion 6a and the protruding portion 6b of the data line 6 is remarkably increased, and as a result, the pixel opening area can be widened.

  As shown in FIG. 8, the first light-shielding film 11a is disposed between the TFT array substrate 10 and each dual-gate TFT 30 at positions facing the two channel regions 1a and 1a ′ of the dual-gate TFT 30. Is provided. The first light-shielding film 11a preferably includes at least one of Ti (titanium), Cr, W (tungsten), Ta (tantalum), Mo (molybdenum), and Pd (lead), which are opaque high melting point metals. , Metal simple substance, alloy, metal silicide and the like. If comprised from such a material, the 1st light shielding film 11a will be destroyed or melt | dissolved by the high temperature process in the formation process of TFT30 of the dual gate structure performed after the formation process of the 1st light shielding film 11a on the TFT array substrate 10. You can avoid it. Since the first light shielding film 11a is formed, it is possible to prevent the return light from the TFT array substrate 10 from entering the channel regions 1a and 1a 'of the TFT 30 having the dual gate structure. In such a configuration, the base insulating film 12 between the first light-shielding film 11a and the pixel switching TFT 30 has the function of serving as the base film of the pixel switching TFT 30 described above. It is provided to electrically insulate from the first light shielding film 11a.

  In the present embodiment, preferably, the first light-shielding film 11a is electrically connected to a constant potential source and has a constant potential. Therefore, the potential fluctuation of the first light shielding film 11a does not adversely affect the dual gate TFT 30 disposed opposite to the first light shielding film 11a. In this case, the constant potential source includes a negative power source supplied to a peripheral circuit for driving the liquid crystal device (for example, a scanning line driving circuit, a data line driving circuit, etc.), a constant potential source such as a positive power source, and a ground power source. And a constant potential source supplied to the counter electrode 21. In this way, if the power source such as a peripheral circuit is used, the first light-shielding film 11a can be set to a constant potential without providing a dedicated potential wiring or an external input terminal.

  In the present embodiment, in particular, the striped wiring portion of the first light shielding film 11 a extends along the scanning line 3 a and is divided in the direction along the data line 6. For this reason, for example, polysilicon forming the first light-shielding film 11a, the scanning line 3a, and the capacitor line 3b is compared with the case where a lattice-shaped light-shielding film integrally formed around each pixel opening region is provided. In the laminated structure of the liquid crystal device comprising the semiconductor layer 1 such as a film, the metal film forming the data line 6, the interlayer insulating film, etc., the stress generated by heating and cooling during the manufacturing process due to the difference in physical properties of each film Will be greatly eased. For this reason, the occurrence of cracks in the first light-shielding film 11a and the like can be prevented and the yield can be improved.

  In the liquid crystal device according to the fourth embodiment described above, incident light is incident from the counter substrate 20 side as in the prior art. However, since the first light shielding film 11a is provided, the incident light is incident from the TFT array substrate 10 side. Incident light may be incident and emitted from the counter substrate 20 side. That is, even when the liquid crystal device is attached to the liquid crystal projector in this way, it is possible to prevent light from entering the channel region and the LDD region of the semiconductor layer 1 and display a high-quality image. Here, conventionally, in order to prevent reflection on the back surface side of the TFT array substrate 10, it is necessary to separately arrange an antireflection (AR) coated polarizing plate or to attach an AR film. It was. However, in the fourth embodiment, since the first light-shielding film 11a is formed between the surface of the TFT array substrate 10 and at least the channel region and the LDD region of the semiconductor layer 1, such an AR-coated polarizing plate. There is no need to use an AR film or an AR film processed TFT substrate 10 itself. Therefore, according to each embodiment, the material cost can be reduced, and it is very advantageous that the yield is not lowered due to dust, scratches, etc. when the polarizing plate is attached.

  Further, in the present embodiment, the first light shielding film 11a is not provided below the contact hole 8 that connects the drain and the pixel electrode 9a. For this reason, when the first light-shielding film 11a is provided under the semiconductor layer 1, a relatively strong stress is generated. However, when the contact hole 8 is opened, the stress is dissipated around the hole, causing cracks and deformation. Such a configuration is practically advantageous because it can avoid a situation in which the withstand voltage of the insulating film in the capacitor line 3b around it is deteriorated.

(Overall configuration of electro-optical device)
The overall configuration of the liquid crystal device in each embodiment of the electro-optical device configured as described above will be described with reference to FIGS. FIG. 9 is a plan view of the TFT array substrate 10 viewed from the counter substrate 20 side together with the components formed thereon, and FIG. 10 is a cross-sectional view taken along the line HH ′ of FIG.

  In FIG. 9, a sealing material 52 is provided on the TFT array substrate 10 along the edge thereof, and is formed of the same or different material as the second light shielding film 23, for example, in parallel with the inner side thereof. A third light-shielding film 53 is provided as a frame that defines the periphery of the region. A data line driving circuit 101 and a mounting terminal 102 are provided along one side of the TFT array substrate 10 in a region outside the sealing material 52, and the scanning line driving circuit 104 extends along two sides adjacent to the one side. Is provided. Needless to say, if the delay of the scanning signal supplied to the scanning line 3a is not a problem, the scanning line driving circuit 104 may be provided on only one side. Further, the data line driving circuit 101 may be arranged on both sides along the side of the image display area. For example, the odd-numbered data lines 6 are supplied with an image signal from a data line driving circuit disposed along one side of the image display area, and the even-numbered data lines are along the opposite side of the image display area. Alternatively, an image signal may be supplied from a data line driving circuit arranged in this manner. If the data line 6 is driven in a comb-like shape in this way, the area occupied by the data line driving circuit can be expanded, so that a complicated circuit can be configured. Further, on the remaining side of the TFT array substrate 10, a plurality of wirings 105 are provided for connecting between the scanning line driving circuits 104 provided on both sides of the image display area. Further, at least one corner portion of the counter substrate 20 is provided with a conductive material 106 for electrical conduction between the TFT array substrate 10 and the counter substrate 20. As shown in FIG. 10, the counter substrate 20 having substantially the same outline as the sealing material 52 shown in FIG. 9 is fixed to the TFT array substrate 10 by the sealing material 52.

  In addition, on the TFT array substrate 10 of the liquid crystal device according to each embodiment described with reference to FIGS. 1 to 10, the image signal is preceded by the sampling circuit 301 in order to reduce the burden of writing the image signal to the data line 6. Thus, a precharge circuit or the like for writing a precharge signal of a predetermined potential to each data line 6 may be formed. Further, instead of providing the data line driving circuit 101, the scanning line driving circuit 104, and the inspection circuit 401 on the TFT array substrate 10, for example, the driving LSI mounted on the TAB (Tape Automated Bonding) substrate is connected to the TFT array substrate. You may make it connect electrically and mechanically through the anisotropic conductive film provided in the 10 peripheral part. Further, for example, a TN (Twisted Nematic) mode, a VA (Vertically Aligned) mode, and a PDLC (Polymer Dispersed Liquid Crystal) are respectively provided on the side on which the projection light of the counter substrate 20 enters and the side on which the emission light of the TFT array substrate 10 exits. ) Mode or the like, or a normally white mode / normally black mode, a polarizing film, a retardation film, a polarizing plate and the like are arranged in a predetermined direction.

  In the liquid crystal device of each embodiment described above, a micro lens may be formed on the counter substrate 20 so as to correspond to one pixel. In this way, a bright liquid crystal device can be realized by improving the collection efficiency of incident light. Further, a dichroic filter that creates RGB colors by using interference of light may be formed by depositing multiple layers of interference layers having different refractive indexes on the counter substrate 20. According to this counter substrate with a dichroic filter, a brighter color liquid crystal device can be realized.

  In the liquid crystal device according to each of the embodiments described above, the light resistance is excellent due to the data line 6, the first light shielding film 11a, the second light shielding film 23, or the like. Therefore, a bright light source is used, or polarization conversion is performed using a polarization beam splitter. Thus, even if the light use efficiency is improved, image quality deterioration such as crosstalk due to light does not occur.

The switching element provided in each pixel has been described as a normal stagger type or coplanar type polysilicon TFT, but other types of TFTs such as an inverted stagger type TFT and an amorphous silicon TFT are also used. Each embodiment is effective. (Electronics)
Next, an embodiment of an electronic device including the liquid crystal device 100 described in detail above will be described with reference to FIGS.

  First, FIG. 13 shows a schematic configuration of an electronic apparatus including the liquid crystal device 100 as described above.

  In FIG. 13, the electronic apparatus includes a display information output source 1000, a display information processing circuit 1002, a drive circuit 1004, a liquid crystal device 100, a clock generation circuit 1008, and a power supply circuit 1010. The display information output source 1000 includes a ROM (Read Only Memory), a RAM (Random Access Memory), a memory such as an optical disk device, a tuning circuit that tunes and outputs an image signal, and the like. Based on this, display information such as an image signal in a predetermined format is output to the display information processing circuit 1002. The display information processing circuit 1002 includes various known processing circuits such as an amplification / polarity inversion circuit, a serial-parallel conversion circuit, a rotation circuit, a gamma correction circuit, and a clamp circuit, and is input based on a clock signal. Digital signals are sequentially generated from the displayed information and output to the drive circuit 1004 together with the clock signal CLK. The drive circuit 1004 drives the liquid crystal device 100. The power supply circuit 1010 supplies predetermined power to the above-described circuits. Note that the drive circuit 1004 may be mounted on the TFT array substrate constituting the liquid crystal device 100, and in addition to this, the display information processing circuit 1002 may be mounted.

  Next, specific examples of the electronic apparatus configured in this way are shown in FIGS.

  In FIG. 14, a liquid crystal projector 1100 as an example of an electronic device prepares three liquid crystal display modules including the liquid crystal device 100 in which the drive circuit 1004 described above is mounted on a TFT array substrate. It is configured as a projector used as 100G and 100B. In the liquid crystal projector 1100, when projection light is emitted from a lamp unit 1102 of a white light source such as a metal halide lamp, light components R, G, and R corresponding to the three primary colors of RGB are obtained by three mirrors 1106 and two dichroic mirrors 1108. The light is divided into B and led to the light valves 100R, 100G, and 100B corresponding to the respective colors. At this time, in particular, the B light is guided through a relay lens system 1121 including an incident lens 1122, a relay lens 1123, and an exit lens 1124 in order to prevent light loss due to a long optical path. The light components corresponding to the three primary colors modulated by the light valves 100R, 100G, and 100B are synthesized again by the dichroic prism 1112 and then projected as a color image on the screen 1120 via the projection lens 1114.

  In FIG. 15, a laptop personal computer (PC) 1200 compatible with multimedia, which is another example of an electronic device, includes the above-described liquid crystal device 100 in a top cover case, and further includes a CPU, a memory, a modem, and the like. And a main body 1204 in which a keyboard 1202 is incorporated.

  In addition to the electronic devices described above with reference to FIGS. 14 to 15, a liquid crystal television, a viewfinder type or a monitor direct view type video tape recorder, a car navigation device, an electronic notebook, a calculator, a word processor, an engineering workstation ( EWS), a mobile phone, a video phone, a POS terminal, a device provided with a touch panel, and the like are examples of the electronic device shown in FIG.

  As described above, according to the present embodiment, it is possible to realize various electronic devices including a liquid crystal device capable of high-quality image display with high manufacturing efficiency.

  According to the present invention, in the delta arrangement TFT active matrix driving type electro-optical device of the same color type of the data line, it corresponds to the pixel electrode arranged on the TFT array substrate with a shift of 0.5 pixels for each scanning line. Since the TFT in the pixel portion is covered from the counter substrate side by the meandering main line portion and the protruding portion protruding from the main line portion, the TFT is efficiently shielded from light while reducing the data line routing. And high-quality image display becomes possible. In addition, since the parasitic capacitance between the data line and the pixel electrode can be reduced while maintaining the pixel aperture ratio high, higher-quality image display is possible.

FIG. 3 is a block diagram showing a pixel unit and peripheral circuits formed on a TFT array substrate in the liquid crystal device according to the first embodiment of the electro-optical device. The block diagram which shows the modification of the liquid crystal device of 1st Embodiment. FIG. 3 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes and the like are formed in the liquid crystal device according to the first embodiment. FIG. 4 is a cross-sectional view taken along line A-A ′ of FIG. 3. Sectional drawing of the liquid crystal device of 2nd Embodiment of an electro-optical apparatus. Sectional drawing of the liquid crystal device of 3rd Embodiment of an electro-optical apparatus. The top view of the several pixel group which the TFT array substrate in which the data line, the scanning line, the pixel electrode, the light shielding film, etc. in the liquid crystal device of 4th Embodiment of an electro-optical device formed was adjacent. B-B 'sectional drawing of FIG. The top view which looked at the TFT array board | substrate in each embodiment of an electro-optical apparatus from the opposing board | substrate side with each component formed on it. H-H 'sectional drawing of FIG. FIG. 3 is a schematic plan view showing a delta arrangement of the data line two-color identical method. The schematic top view which shows the delta arrangement | sequence of a data line 2 color rotation system. The block diagram which shows schematic structure of embodiment of the electronic device by this invention. Sectional drawing which shows a liquid crystal projector as an example of an electronic device. The front view which shows the personal computer as another example of an electronic device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Semiconductor layer, 1a, 1a '... Channel region, 1b, 1b' ... Low concentration source region (source side LDD region), 1c, 1c '... Low concentration drain region (drain side LDD region), 1d, 1d' ... High concentration source region, 1e, 1e '... high concentration drain region, 1f ... first storage capacitor electrode, 2 ... insulating film, 3a ... scanning line, 3b ... capacitance line, 4 ... first interlayer insulating film, 5 ... contact hole , 6 ... data line, 6a ... main line part, 6b ... projecting part, 7 ... second interlayer insulating film, 8 ... contact hole, 9a ... pixel electrode, 10 ... TFT array substrate, 12 ... underlying insulating film, 16 ... alignment film 20 ... counter substrate, 21 ... counter electrode, 22 ... alignment film, 30 ... TFT, 50 ... liquid crystal layer, 70 ... storage capacitor, 101 ... data line driving circuit, 104 ... scanning line driving circuit.

Claims (11)

An electro-optic material is sandwiched between a pair of substrates, a data line and a pixel electrode provided on one of the pair of substrates, and a transistor that electrically connects the data line and the pixel electrode With
A portion of the data line has a protrusion protruding in a plane from the main line of the data line;
The protrusion is provided on the electro-optic material side of the transistor;
The transistor has a first gate, and a second gate between the first gate and the data line ,
The first gate has an LDD (Lightly Doped Drain) structure;
The high-concentration source region of the first gate overlaps the pixel electrode in a plane,
The junction region between the channel region of the first gate and the low-concentration drain region is covered by the protrusion, and the junction region of the channel region of the first gate and the low-concentration source region is covered by the protrusion. An electro-optical device characterized by not being broken. A scan line intersecting the data line on the one substrate;
The data line, an electro-optical device according to claim 1 in which the data line is characterized by having the protrusion at a position opposed to the scanning line. The main line portion includes a portion that is electrically connected to the transistor, and is formed to meander by 0.5 pixel for each scanning line corresponding to the gap between the pixel electrodes. Item 5. The electro-optical device according to Item 2 . 4. The electro-optical device according to claim 3 , wherein a channel region of the transistor is formed in a direction different from an extending direction of the main line portion of the data line at a position where the data line faces the scanning line. 4. The electro-optical device according to claim 3 , wherein the protruding portion of the data line has a different protruding direction for each scanning line. The second gate has an LDD (Lightly Doped Drain) structure,
The semiconductor layer of the transistor has a U-shaped dual gate structure that crosses the scanning line twice;
The junction region between the channel region of the second gate and the low-concentration source region is covered by the main line portion , and the junction region between the channel region of the second gate and the low-concentration drain region is formed between the main line portion and the low-concentration drain region. the electro-optical device according to any one of claims 1 to 5, characterized in that not even covered by any of the protruding portion. A light-shielding film is provided on the opposite side of the electro-optic material of the transistor;
The light-shielding film electro-optical device according to any one of 6 claim 1, characterized in that covers a channel region of the transistor. The electro-optical device according to claim 7 , wherein the light shielding film does not overlap a contact hole for electrically connecting the transistor and the pixel electrode. The light shielding film overlaps the scanning line and is formed narrower than the scanning line,
9. The electro-optical device according to claim 7 , wherein the light-shielding film is formed wide so as to cover a channel region of the transistor in a region where the scanning line overlaps with a protruding portion of the data line. . The pixel electrodes are arranged with a shift of 0.5 pixels for each scanning line,
2. The pixel electrode group arranged by shifting by 1.5 pixels for each scanning line among the pixel electrodes is connected to the same data line through the transistor and corresponds to the same color. The electro-optical device according to any one of 1 to 9 . An electronic apparatus comprising the electro-optical device according to any one of claims 1 to 10.

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