JP4357279B2 - Converter circuit in electric vehicle control device - Google Patents

Converter circuit in electric vehicle control device Download PDF

Info

Publication number
JP4357279B2
JP4357279B2 JP2003406233A JP2003406233A JP4357279B2 JP 4357279 B2 JP4357279 B2 JP 4357279B2 JP 2003406233 A JP2003406233 A JP 2003406233A JP 2003406233 A JP2003406233 A JP 2003406233A JP 4357279 B2 JP4357279 B2 JP 4357279B2
Authority
JP
Japan
Prior art keywords
semiconductor switching
converter circuit
phase
electrode side
electric vehicle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2003406233A
Other languages
Japanese (ja)
Other versions
JP2005168240A (en
Inventor
和敏 三浦
育雄 安岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2003406233A priority Critical patent/JP4357279B2/en
Publication of JP2005168240A publication Critical patent/JP2005168240A/en
Application granted granted Critical
Publication of JP4357279B2 publication Critical patent/JP4357279B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • H02M7/487Neutral point clamped inverters

Description

本発明は電気車制御装置におけるコンバータ回路に関する。   The present invention relates to a converter circuit in an electric vehicle control device.

図2に従来の代表的な交流受電用の電気車制御装置の構成を示してある。この従来の電気車制御装置は、基本的にはトランス1、3レベルコンバータ回路(CON)2、3レベルインバータ回路(INV)3、駆動用モータ4で構成されている。   FIG. 2 shows a configuration of a conventional representative electric vehicle control apparatus for AC power reception. This conventional electric vehicle control device basically includes a transformer 1, a three-level converter circuit (CON) 2, a three-level inverter circuit (INV) 3, and a drive motor 4.

新幹線電車のような高速電車の場合、このコンバータ回路2の入力電流ISAは、電気車の加速に合わせて増加し、例えば図3のような定出力領域100km/h〜250km/hの広い範囲で最大となる。この定出力領域でのコンバータ回路2の動作は次のようになる。   In the case of a high-speed train such as a Shinkansen train, the input current ISA of the converter circuit 2 increases in accordance with the acceleration of the electric vehicle. For example, in a wide range of a constant output region of 100 km / h to 250 km / h as shown in FIG. Maximum. The operation of the converter circuit 2 in this constant output region is as follows.

図4は従来の電気車制御装置における3レベルコンバータ回路2の詳細を示し、図5、図6は半導体スイッチング素子のゲートタイムチャートと主回路の電圧、電流波形を示している。図4の半導体スイッチング素子11〜18は、図面上それぞれ1個で記述しているが、実際は全て2並列接続である。   FIG. 4 shows the details of the three-level converter circuit 2 in the conventional electric vehicle control device, and FIGS. 5 and 6 show the gate time chart of the semiconductor switching element and the voltage and current waveforms of the main circuit. Although the semiconductor switching elements 11 to 18 in FIG. 4 are described as one piece on the drawing, they are actually two parallel connections.

国内における新幹線電車駆動用の電気車制御装置の場合、図2において中間リンク電圧EFCP=EFCN=1200V〜1500V、入力電流ISA(max)=1000A〜1200Aの電圧・電流が目安となっており、これに見合う3レベルコンバータ回路の半導体スイッチング素子として3300V−1200A定格のIGBT(Insulated Gate Bipolar Transistor)が使われている。   In the case of an electric vehicle control apparatus for driving a Shinkansen train in Japan, the voltage / current of the intermediate link voltage EFCP = EFCN = 1200 V to 1500 V and the input current ISA (max) = 1000 A to 1200 A in FIG. An IGBT (Insulated Gate Bipolar Transistor) rated at 3300V-1200A is used as a semiconductor switching element of a three-level converter circuit that meets the above requirements.

3レベルコンバータ回路2の動作を、入力電流ISAが図4及び図5、図6に示した交流電源の正極性の半サイクルT期間について説明する。図5、図6に示したT期間のゲートタイムチャートは次のモードを意味する。U相は第1のモードとして、U1素子11がオン、U2素子12がオン、U3素子13がオフ、U4素子14がオフ、第2のモードとして、U1素子11がオフ、U2素子12がオン、U3素子13がオン、U4素子14がオフである。V相は、第3のモードとして、V1素子15がオフ、V2素子16がオン、V3素子17がオン、V4素子18がオフ、第4のモードとして、V1素子15がオフ、V2素子16がオフ、V3素子17がオン、V4素子18がオンである。これらのモードの組み合わせで、正極性の半サイクルを動作する。   The operation of the three-level converter circuit 2 will be described with respect to the positive half cycle T period of the AC power source in which the input current ISA is shown in FIGS. 4, 5, and 6. The gate time chart of the T period shown in FIGS. 5 and 6 means the following mode. In the U phase, U1 element 11 is on, U2 element 12 is on, U3 element 13 is off, U4 element 14 is off, and U1 element 11 is off and U2 element 12 is on as the second mode. , U3 element 13 is on, and U4 element 14 is off. In the V phase, the V1 element 15 is off, the V2 element 16 is on, the V3 element 17 is on, the V4 element 18 is off, and the V1 element 15 is off and the V2 element 16 is off as the fourth mode. Off, V3 element 17 is on, and V4 element 18 is on. A combination of these modes operates a positive half cycle.

つまり、図7に示すように、U相の第2モードとV相の第4モードで交流電源5、トランスの漏れインダクタンス6からU3素子13のIGBT部分→ダイオード52→コンデンサ72→V4素子18のダイオード部分→V3素子17のダイオード部分→交流電源5の経路で電流が流れ、直流電圧O〜N間(図2におけるEFCN)を充電する。   That is, as shown in FIG. 7, in the second mode of the U phase and the fourth mode of the V phase, the IGBT power source of the U3 element 13 from the AC power supply 5 and the leakage inductance 6 of the transformer → the diode 52 → the capacitor 72 → the V4 element 18 A current flows through a path of the diode portion → the diode portion of the V3 element 17 → the AC power source 5 to charge the DC voltage O to N (EFCN in FIG. 2).

次に、図8に示すように、U相の第1モードとV相の第3モードで交流電源5→トランスの漏れインダクタンス6→U2素子12のダイオード部分→U1素子11のダイオード部分→コンデンサ73→ダイオード53→V2素子16のIGBT部分→交流電源5の経路で電流が流れ、直流電圧P−O間(同EFCP)を充電する。負極性の半サイクルも同様な動作モードとなる。   Next, as shown in FIG. 8, in the first mode of the U phase and the third mode of the V phase, the AC power supply 5 → the leakage inductance 6 of the transformer → the diode part of the U2 element 12 → the diode part of the U1 element 11 → the capacitor 73 → Diode 53 → IGBT portion of V2 element 16 → Current flows through the path of AC power supply 5 and charges between DC voltage PO (same EFCP). A negative half-cycle is also operated in the same manner.

以上のように、入力電流ISAがIGBT部分に流れるのは内側の半導体スイッチング素子U3又はU2とV2又はV3だけであり、ダイオード部分に流れるのは、内側素子、外側素子とも同じである。従って、内側の半導体スイッチング素子U2、U3、V2、V3のIGBT部分から大きな損失が発生するが、外側の半導体スイッチング素子U1、U4、V1、V4のIGBT部分からの損失はほとんどない。このため、半導体スイッチング素子の冷却器は、特に最近のように環境問題から冷媒を使用しない冷却方式が増加する傾向にあるため、内側素子の発生損失で冷却性能を決める必要があり、大型化する問題点があった。   As described above, the input current ISA flows through the IGBT portion only in the inner semiconductor switching elements U3 or U2 and V2 or V3, and the flow through the diode portion is the same in both the inner and outer elements. Therefore, a large loss is generated from the IGBT portions of the inner semiconductor switching elements U2, U3, V2, and V3, but there is almost no loss from the IGBT portion of the outer semiconductor switching elements U1, U4, V1, and V4. For this reason, semiconductor switching element coolers tend to increase the number of cooling systems that do not use refrigerants due to environmental problems, such as recently, so it is necessary to determine the cooling performance based on the generation loss of the inner elements, and the size of the cooler There was a problem.

本発明は、上述した従来の技術的課題に鑑みてなされたもので、3レベルコンバータ回路の外側に接続された半導体スイッチング素子と内側に接続された半導体スイッチング素子の素子1個あたりの発生損失の均等化を図り、結果として冷却器の小型化が図れる電気車制御装置におけるコンバータ回路を提供することを目的とする。   The present invention has been made in view of the above-described conventional technical problems, and the generation loss per element of the semiconductor switching element connected to the outside of the three-level converter circuit and the semiconductor switching element connected to the inside is reduced. It is an object of the present invention to provide a converter circuit in an electric vehicle control device that can achieve equalization and consequently reduce the size of a cooler.

請求項1の発明は、交流電源をコンバータ回路に入力して直流電圧に変換し、さらにその直流電圧をインバータ回路に入力して可変電圧可変周波数電圧に変換して負荷電動機のために出力する電気車制御装置におけるコンバータ回路であって、U相、V相それぞれにおいて、正極側と負極側の接続点を挟み、前記接続点に近い位置に正極側、負極側それぞれの内側の半導体スイッチング手段を備え、前記接続点から遠い位置に正極側、負極側それぞれの外側の半導体スイッチング手段を備えた3レベルコンバータ回路にして、前記U相、V相それぞれの外側の半導体スイッチング手段は、半導体スイッチング素子を2並列接続して構成し、前記U相、V相それぞれの内側の半導体スイッチング手段は、前記外側の半導体スイッチング素子より定格電流の小さい半導体スイッチング素子を4並列接続して構成したものである。 According to the first aspect of the present invention, an AC power source is input to a converter circuit and converted into a DC voltage, and the DC voltage is input to an inverter circuit to be converted into a variable voltage and a variable frequency voltage to be output for a load motor. A converter circuit in a vehicle control device, comprising U-phase and V-phase semiconductor switching means sandwiching a connection point between a positive electrode side and a negative electrode side and inside the positive electrode side and the negative electrode side at a position close to the connection point. The three-level converter circuit is provided with semiconductor switching means on the positive and negative sides at positions far from the connection point, and the semiconductor switching means outside the U phase and V phase has two semiconductor switching elements. The semiconductor switching means is configured by connecting in parallel, and each of the U-phase and V-phase inner semiconductor switching means is more than the outer semiconductor switching element. A semiconductor switching element having a small rated current is connected in parallel .

本発明によれば、3レベルコンバータ回路の外側の半導体スイッチング素子は従来通り2並列とし、内側の半導体スイッチング素子は、定格電流の小さい半導体スイッチング素子を4並列で構成することで、1つの半導体スイッチング素子あたりの発生損失を均等化でき、結果として冷却器の小型化が図れる。   According to the present invention, the semiconductor switching elements on the outside of the three-level converter circuit are arranged in parallel in the conventional manner, and the semiconductor switching elements on the inside are constituted by four parallel semiconductor switching elements having a small rated current, thereby providing one semiconductor switching element. The generated loss per element can be equalized, and as a result, the cooler can be miniaturized.

以下、本発明の実施の形態を図に基づいて詳説する。図1を用いて、本発明の1つの実施の形態の電気車制御装置におけるコンバータ回路について説明する。本実施の形態のコンバータ回路を含む電気車制御装置は、従来例と同様に図2に示す構成である。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. A converter circuit in an electric vehicle control apparatus according to one embodiment of the present invention will be described with reference to FIG. The electric vehicle control apparatus including the converter circuit of the present embodiment has the configuration shown in FIG. 2 as in the conventional example.

そのような電気車制御装置におけるコンバータ回路(CON)2は図1に示す構成であり、3レベルコンバータ回路であって、U相の外側の半導体スイッチング素子11,21及び14,24は例えば3300V−1200A定格素子を2並列とし、内側の半導体スイッチング素子12,22,32,42及び13,23,33,43は例えば3300V−800A定格素子を4並列としている。V相も同様に、外側の半導体スイッチング素子15,25及び18,28は例えば3300V−1200A定格素子を2並列とし、内側の半導体スイッチング素子16,26,36,46及び17,27,37,47は例えば3300V−800A定格素子を4並列としている。各組の半導体スイッチング素子は同時にオン/オフ動作する。図1において、5は交流電源、6はトランスの漏れインダクタンスである。また、51〜64はダイオード、71〜74はフイルタコンデンサである。   The converter circuit (CON) 2 in such an electric vehicle control device has the configuration shown in FIG. 1 and is a three-level converter circuit. The semiconductor switching elements 11, 21 and 14, 24 outside the U phase are, for example, 3300 V− Two 1200A rated elements are arranged in parallel, and the inner semiconductor switching elements 12, 22, 32, 42 and 13, 23, 33, 43 are arranged, for example, in parallel with 3300V-800A rated elements. Similarly, in the V phase, the outer semiconductor switching elements 15, 25, 18, and 28 have, for example, two 3300V-1200A rated elements in parallel, and the inner semiconductor switching elements 16, 26, 36, 46 and 17, 27, 37, 47. Has, for example, four parallel 3300V-800A rated elements. Each set of semiconductor switching elements is simultaneously turned on / off. In FIG. 1, 5 is an AC power source, and 6 is a leakage inductance of the transformer. Reference numerals 51 to 64 denote diodes, and reference numerals 71 to 74 denote filter capacitors.

本実施の形態のコンバータ回路2では、従来例と同様に図5に示すゲート信号によって駆動され、図6に示す交流−直流変換作用を行う。またそのときにスイッチング動作は、図7、図8に示した従来例と同様である。   The converter circuit 2 of the present embodiment is driven by the gate signal shown in FIG. 5 as in the conventional example, and performs the AC-DC conversion action shown in FIG. At that time, the switching operation is the same as that of the conventional example shown in FIGS.

本実施の形態のコンバータ回路2は、以上の構成により、例えば、直流電圧EFCP=EFCN=1200V、入力電流ISA=1100A、コンバータ回路2のPWMキャリア周波数1260Hzの時、内側半導体スイッチング素子1個あたりの発生損失は、図4に示した従来の構成に比べて電流が半分になるので、IGBT部分≒620W、ダイオード部分≒320W、外側半導体スイッチング素子1個あたりの発生損失はダイオード部分≒690Wとなる。このように、従来の構成では内側の半導体スイッチング素子1個あたりの発生損失がIGBT部分=1420W、ダイオード部分=690Wとなっていたものが、本実施の形態では素子1個あたりの損失が大幅に均等化される。最近、環境問題から冷媒を使わない冷却構造が増加する傾向にあり、素子1個あたりの発生損失で素子取付部の温度上昇が決まるため、本実施の形態のように各半導体スイッチング素子の発生損失の均等化ができればコンバータ回路の冷却器の最適化が図れ、従来よりも低い発生損失に対応した冷却器を採用することができ、ひいてはコストの低減、冷却器の小型化が図れる。   The converter circuit 2 of the present embodiment has the above configuration, for example, when the DC voltage EFCP = EFCN = 1200 V, the input current ISA = 1100 A, and the PWM carrier frequency of the converter circuit 2 is 1260 Hz, it is per one inner semiconductor switching element. Since the generation loss is half that of the conventional configuration shown in FIG. 4, the IGBT portion is about 620 W, the diode portion is about 320 W, and the generation loss per one outer semiconductor switching element is the diode portion about 690 W. As described above, in the conventional configuration, the generated loss per inner semiconductor switching element is IGBT part = 1420 W and the diode part = 690 W. In this embodiment, the loss per element is greatly increased. Equalized. Recently, cooling structures that do not use a refrigerant tend to increase due to environmental problems, and since the temperature rise of the element mounting portion is determined by the generated loss per element, the generated loss of each semiconductor switching element as in this embodiment If the equalization can be achieved, the converter circuit cooler can be optimized, and a cooler corresponding to the generated loss lower than the conventional one can be adopted. As a result, the cost can be reduced and the cooler can be downsized.

本発明の1つの実施の形態の3レベルコンバータ回路の回路図。1 is a circuit diagram of a three-level converter circuit according to one embodiment of the present invention. 交流受電の代表的な主回路システムの回路図。A circuit diagram of a typical main circuit system for AC power reception. 新幹線電車などの高速車両の力行性能特性を示すグラフ。The graph which shows the power running performance characteristic of high-speed vehicles, such as a Shinkansen train. 従来の代表的な3レベルコンバータ回路の回路図。The circuit diagram of the conventional typical 3 level converter circuit. 上記従来の3レベルコンバータ回路のゲートタイムチャート。The gate time chart of the said conventional 3 level converter circuit. 上記従来の3レベルコンバータ回路の各部の電圧、電流の波形図。FIG. 3 is a waveform diagram of voltages and currents at various parts of the conventional three-level converter circuit. 上記従来の3レベルコンバータ回路の動作説明図その1。FIG. 1 is a diagram for explaining the operation of the conventional three-level converter circuit. 上記従来の3レベルコンバータ回路の動作説明図その2。FIG. 2 is a diagram for explaining the operation of the conventional three-level converter circuit.

符号の説明Explanation of symbols

1…トランス
2…コンバータ回路
3…インバータ回路
4…モータ
11〜47…半導体スイッチング素子
51〜64…ダイオード
71〜74…フイルタコンデンサ
DESCRIPTION OF SYMBOLS 1 ... Transformer 2 ... Converter circuit 3 ... Inverter circuit 4 ... Motor 11-47 ... Semiconductor switching element 51-64 ... Diode 71-74 ... Filter capacitor

Claims (1)

交流電源をコンバータ回路に入力して直流電圧に変換し、さらにその直流電圧をインバータ回路に入力して可変電圧可変周波数電圧に変換して負荷電動機のために出力する電気車制御装置におけるコンバータ回路であって、
U相、V相それぞれにおいて、正極側と負極側の接続点を挟み、前記接続点に近い位置に正極側、負極側それぞれの内側の半導体スイッチング手段を備え、前記接続点から遠い位置に正極側、負極側それぞれの外側の半導体スイッチング手段を備えた3レベルコンバータ回路にして、
前記U相、V相それぞれの外側の半導体スイッチング手段は、半導体スイッチング素子を2並列接続して構成し、前記U相、V相それぞれの内側の半導体スイッチング手段は、前記外側の半導体スイッチング素子より定格電流の小さい半導体スイッチング素子を4並列接続して構成したことを特徴とする電気車制御装置におけるコンバータ回路。
A converter circuit in an electric vehicle control device that inputs an AC power source to a converter circuit to convert it to a DC voltage, and further converts the DC voltage to an inverter circuit to convert it to a variable voltage / variable frequency voltage for output to a load motor. There,
In each of the U phase and the V phase, a positive electrode side and a negative electrode side connection point are sandwiched, semiconductor switching means inside the positive electrode side and the negative electrode side are provided at positions close to the connection point, and the positive electrode side is provided at a position far from the connection point. , A three-level converter circuit provided with semiconductor switching means on the outer side of each negative electrode side ,
The U-phase and V-phase outer semiconductor switching means are configured by connecting two semiconductor switching elements in parallel, and the U-phase and V-phase inner semiconductor switching means are more rated than the outer semiconductor switching elements. 4. A converter circuit in an electric vehicle control apparatus , wherein four semiconductor switching elements having a small current are connected in parallel .
JP2003406233A 2003-12-04 2003-12-04 Converter circuit in electric vehicle control device Expired - Fee Related JP4357279B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003406233A JP4357279B2 (en) 2003-12-04 2003-12-04 Converter circuit in electric vehicle control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003406233A JP4357279B2 (en) 2003-12-04 2003-12-04 Converter circuit in electric vehicle control device

Publications (2)

Publication Number Publication Date
JP2005168240A JP2005168240A (en) 2005-06-23
JP4357279B2 true JP4357279B2 (en) 2009-11-04

Family

ID=34728667

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003406233A Expired - Fee Related JP4357279B2 (en) 2003-12-04 2003-12-04 Converter circuit in electric vehicle control device

Country Status (1)

Country Link
JP (1) JP4357279B2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8867248B2 (en) * 2011-12-20 2014-10-21 Kohler Co. High-efficiency, three-level, single-phase inverter
CN103248255B (en) * 2013-05-24 2014-12-31 哈尔滨工业大学 Tri-phase modular multi-level converter and fault-tolerate detecting method for IGBT (insulated gate bipolar translator) open circuit fault in sub-modules thereof
JP6206118B2 (en) 2013-08-02 2017-10-04 株式会社明電舎 Multi-level power converter
JP2017019402A (en) * 2015-07-10 2017-01-26 矢崎総業株式会社 Power supply device and electric connection box
US11456673B2 (en) 2017-08-31 2022-09-27 Toshiba Mitsubishi-Electric Industrial Systems Corporation Power conversion device of a neutral point clamp type

Also Published As

Publication number Publication date
JP2005168240A (en) 2005-06-23

Similar Documents

Publication Publication Date Title
JP5457449B2 (en) Power converter
US7558094B2 (en) Control device for power conversion circuit
EP2309633A1 (en) Electric power converter
CN102835017B (en) Inverter device and electric device using same
JP6218906B1 (en) Power converter
US20080205109A1 (en) Energy distribution system for vehicle
JP6555521B2 (en) Power converter
JP2009273071A (en) Device and method of driving semiconductor device
US20170317607A1 (en) Three-level t-type npc power converter
JP2014068428A (en) Power conversion device
JP2021035118A (en) Dc/dc converter
JP2021027698A (en) Electric power conversion system
JP4357279B2 (en) Converter circuit in electric vehicle control device
JP4879330B2 (en) Inverter control device for air conditioner
JP5862606B2 (en) Power converter
JPWO2018198893A1 (en) Power conversion system
JP5420080B2 (en) Power converter
Ismail et al. Characterization and System Benefits of Using 3.3 kV All-SiC MOSFET Modules in MV Power Converter Applications
JP6908065B2 (en) Power converter
CN209948991U (en) Output regulation inverter
US10594203B2 (en) System and method for the conversion of DC electric power into three-phase AC electric power, with filtering means
JP5146370B2 (en) Fuel cell power converter
JP2007244183A (en) Single phase double voltage rectifier circuit and inverter device
JP2008177879A (en) Drive circuit of switching element
Lai et al. Novel integrated inverter/converter circuit and control technique of motor drives with dual mode control for ev/hev applications

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060201

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20080710

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080722

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080919

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20090707

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090804

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120814

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120814

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120814

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130814

Year of fee payment: 4

LAPS Cancellation because of no payment of annual fees