JP2007244183A - Single phase double voltage rectifier circuit and inverter device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a single phase double voltage rectifier circuit with less power loss, and an inverter device using it. <P>SOLUTION: A serial circuit of first and second capacitors and a serial circuit of first and second NMOS transistors are connected in parallel. A single phase AC voltage is applied between the mutual connection point of the first and second capacitors and the mutual connection point of the first and second NMOS transistors. An output voltage is taken out from both ends of the first and second capacitors connected in series. The first NMOS transistor is connected in series to the second NMOS transistor with the source of the former and the drain of the latter on the mutual connection point side. First and second comparators whose inputs are voltages from the source and drain, are connected between the source/drain of the first and second NMOS transistors. When the drain voltage which is the inputs of the first and second comparators is lower than the source voltage, the output signal is used to make the corresponding NMOS transistor conductive. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a single-phase voltage doubler rectifier circuit using a MOS transistor as a rectifier element and an inverter device using the same.

  Conventionally, in home washing machines, air conditioners, etc., DC power obtained by rectifying single-phase AC power is switched to convert it to three-phase AC power of variable voltage and variable frequency, and that power is used as a three-phase AC motor Inverter devices for variable speed control are widely adopted.

  FIG. 4 is a configuration example of such an inverter device. The inverter device 50 includes a single-phase voltage doubler rectifier circuit 52 that double-voltage rectifies the single-phase AC voltage supplied from the single-phase commercial power supply 51, and switches the output DC voltage to convert it to a three-phase AC voltage. It is comprised from the inverter circuit 53 supplied to the three-phase motor 54 which is.

  The single-phase voltage doubler rectifier circuit 52 is obtained by connecting a capacitor input type half-wave rectifier circuit composed of diodes 61 and 63 and a capacitor 65 and a capacitor input type half-wave rectifier circuit composed of diodes 62 and 64 and a capacitor 66 in series. . A DC voltage approximately twice the peak voltage of the input AC voltage is generated at both ends of the capacitors 65 and 66 connected in series. The diodes 63 and 64 are for protecting the capacitors 65 and 66.

  By the way, in recent years, since global warming has become a problem, electric appliances for household use are required to further reduce power consumption, and inverter devices that drive motors necessary for these devices are also required. There is a strong demand for further lower power consumption. Most of the power consumption in the inverter device 50 is generated by the diodes 61 and 62 in the rectifier circuit 52 and the six switching elements in the inverter circuit 53.

  The power consumption (power loss) in the diodes 61 and 62 in the rectifier circuit 52 is obtained by multiplying the value of the flowing current by the forward voltage (0.7 to 1.0 V). Since the inverter device 50 drives the three-phase motor 54, the current flowing through the diodes 61 and 62 has a large value. For this reason, for example, the power consumption when a current of 10 A flows is 7 to 10 W, which is a problem value not only from the viewpoint of power loss but also from the viewpoint of cooling the element or the device.

  As a conventional technique for reducing the power loss in such a rectifying diode, for example, there is a technique disclosed in Patent Document 1. The circuit configuration is as shown in FIG. 5, and a MOS transistor is used as a rectifier of a rectifier circuit 72 that rectifies the three-phase AC voltage generated by the three-phase AC generator 70 and charges the battery 71. is there. However, the claim of this patent document 1 states that “--a rectifier bridge circuit in which each bridge element is composed of all MOS FETs, and a reverse drain / source voltage higher than the voltage across the battery in any one of the FETs. When applied, a positive gate voltage is applied to the FET with respect to the source terminal, and when a reverse drain / source voltage higher than the voltage across the battery is not applied, the FET is negative with respect to the source terminal. A charging circuit comprising a control means for applying a gate voltage to be "." However, a specific example of “control means” for driving the gate of the MOS FET is not described in the detailed description, and the implementation method is unknown.

In addition, “when a reverse drain / source voltage higher than the voltage across the battery is applied, a positive gate voltage is applied to the FET with respect to the source terminal,” but the MOS FET is described. Due to the structure, a parasitic diode exists inside. When the reverse drain / source voltage is applied, the parasitic diode becomes conductive, and therefore it is impossible to apply a reverse drain / source voltage higher than the voltage across the battery between the drain and source. Therefore, it is considered that the technique described in Patent Document 1 cannot be actually realized.
Japanese Patent Laid-Open No. 04-138030 JP 59-216476 A

  The present invention has been made to solve such problems of the prior art, and an object thereof is to provide a single-phase voltage doubler rectifier circuit with low power loss and an inverter device using the same. .

  According to a first aspect of the present invention for solving the above problem, a series connection circuit of first and second capacitors and a series connection circuit of first and second NMOS transistors are connected in parallel. A single-phase AC voltage is applied between the interconnection point of the second capacitor and the interconnection point of the first and second NMOS transistors, and the DC voltage is taken out from both ends of the first and second capacitors connected in series. A first-phase voltage doubler rectifier circuit configured as described above, wherein the first NMOS transistor is connected in series with the source at the source, and the second NMOS transistor is connected in series with the drain at the connection point side. Between the source and drain of each of the two NMOS transistors, the first and second comparators having the source and drain voltages as inputs are connected, and the first and second comparators are connected. Is a single-phase voltage doubler rectifier circuit, wherein a drain voltage is the force that is arranged to conduct the corresponding NMOS transistor by an output signal only when lower than the source voltage.

  In the single-phase voltage doubler rectifier circuit configured as described above, the first and second NMOS transistors function as rectifier elements similar to ordinary diodes. And since the voltage drop at the time of the conduction | electrical_connection is smaller than the value of the diode when the same electric current is sent, there exists an effect that power loss becomes small compared with the case where a diode is used.

  The invention described in claim 2 is configured by connecting an inverter circuit for converting a DC voltage into a three-phase AC voltage having a predetermined frequency on the load side of the single-phase voltage doubler rectifier circuit according to claim 1. This is an inverter device.

  Since the inverter device having such a configuration employs a circuit with less power loss as a single-phase voltage doubler rectifier circuit, it has an effect of reducing power loss compared to an inverter device using a diode as a rectifier element of the rectifier circuit. .

  According to a third aspect of the present invention, the inverter circuit in the inverter device according to the second aspect has a configuration in which six switching elements are connected to a full bridge, and is connected to a negative power supply line of them. The inverter device employs NMOS transistors for three switching elements.

  As described above, when an NMOS transistor having a small conduction resistance is employed as the switching element of the inverter circuit, there is an effect that the power loss of the entire inverter device can be reduced.

According to a fourth aspect of the present invention, there is provided a module in which the single-phase voltage doubler rectifier circuit portion excluding the first and second capacitors in the inverter device according to the third aspect is integrated with the inverter circuit portion. The inverter device is characterized by being configured.
Thus, if it forms with a module structure, the whole inverter apparatus can be reduced in size.

  According to a fifth aspect of the present invention, as the first and second NMOS transistors used in the single-phase voltage doubler rectifier circuit according to the first aspect, a forward resistance value of a diode having the same rated current capacity is used. This is a single-phase voltage doubler rectifier circuit using an NMOS transistor having a low drain-source resistance value.

  Thus, if an NMOS transistor having a drain-source resistance value lower than the forward resistance value of the diode is used, an effect of reducing power loss can be obtained.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, an embodiment of a single phase voltage doubler rectifier circuit and an inverter device using the same according to the invention will be described with reference to the drawings. FIG. 1 is a circuit configuration diagram of the inverter device. The inverter device 1 according to the present embodiment converts a single-phase AC voltage supplied from a single-phase AC power source 2 into a three-phase AC voltage having a predetermined frequency and supplies it to a load 3. The load 3 is, for example, a motor that drives a washing machine or an air conditioner.

  The inverter device 1 is composed of a single-phase voltage doubler rectifier circuit 5 and an inverter circuit 6 as shown in the figure. The inverter circuit 6 includes a switching circuit 8 and a gate drive circuit 9. The switching circuit 8 is a known switching circuit in which six switching elements 12 to 17 are connected in a full bridge between the positive power supply line 10 and the negative power supply line 11. For example, IGBTs (insulated gate / bipolar transistors), MOS transistors, and bipolar transistors can be used as the switching elements 12 to 17.

  The switching elements 12 to 17 are driven by gate (or base) drive signals G1 to G6 output from the gate drive circuit 9. Under the control of the gate drive circuit 9, the switching elements 12 to 17 switch the DC voltage output from the single-phase voltage doubler rectifier circuit 5, whereby a three-phase AC voltage having a predetermined frequency and a predetermined peak value is output from the output terminal 20. Is done.

  The single-phase voltage doubler rectifier circuit 5 rectifies the single-phase AC voltage supplied from the single-phase AC power source 2 and connects a DC voltage between the positive power source line 10 and the negative power source line 11 connected to the output side thereof. Supply. The single-phase voltage doubler rectifier circuit 5 has a configuration in which first and second half-wave rectifier circuits 21 and 22 are connected in series.

  The first half-wave rectifier circuit 21 includes a first NMOS transistor 25, a first capacitor 26, a first comparator 27, a first driver 28, and a first diode 29. The first half-wave rectifier circuit 21 includes a diode 61 of a capacitor input type half-wave rectifier circuit, which includes the diodes 61 and 63 and the capacitor 65 in the circuit of FIG. , Replaced with a circuit comprising a first comparator 27 and a first driver 28. That is, the circuit including the first NMOS transistor 25, the first comparator 27, and the first driver 28 is configured to function as the same rectifier as the diode 61.

  Similarly, the second half-wave rectifier circuit 22 includes a second NMOS transistor 31, a second capacitor 32, a second comparator 33, a second driver 34, and a second diode 35. The second half-wave rectifier circuit 22 also includes a diode 62 of a capacitor input type half-wave rectifier circuit constituted by diodes 62 and 64 and a capacitor 66 in the circuit of FIG. The circuit is composed of a second comparator 33 and a second driver 34. That is, a circuit including the second NMOS transistor 31, the second comparator 33, and the second driver 34 is also configured to function as the same rectifier as the diode 62.

  The first and second capacitors 26 and 32 are connected in series. One end of the first capacitor 26 is connected to the positive power supply line 10, and one end of the second capacitor 32 is connected to the negative power supply line 11. Between the positive power supply line 10 and the negative power supply line 11, a DC voltage that is about twice the peak voltage of the input single-phase AC voltage is output. The first and second diodes 29 and 35 are for protecting the first and second capacitors 26 and 32, respectively, and are connected in parallel to the capacitors.

  The first and second NMOS transistors 25 and 31 are connected in series between the positive power supply line 10 and the negative power supply line 11. The source S of the first NMOS transistor 25 and the drain D of the second NMOS transistor 31 are interconnected, and the drain D of the first NMOS transistor 25 is connected to the positive power supply line 10 and the source of the second NMOS transistor 31. S is connected to the negative power supply line 11. The input single-phase AC voltage is input between the interconnection point 37 of the first and second NMOS transistors 25 and 31 and the interconnection point 38 of the first and second capacitors 26 and 32. .

  Next, the configuration and operation of a circuit including the first NMOS transistor 25, the first comparator 27, and the first driver 28 that function as a rectifying element will be described. The drain voltage of the first NMOS transistor 25 (equal to the voltage of the positive power supply line 10) is input to the inverting input terminal of the first comparator 27, and the source of the first NMOS transistor 25 is input to the non-inverting input terminal. A voltage (equal to the voltage at the interconnection point 37 to which the AC input line is connected) is input. The first comparator 27 outputs a logic “1” signal when the voltage at the non-inverting input terminal is higher than the voltage at the inverting input terminal, and a logic “0” signal when the voltage at the non-inverting input terminal is lower. Output to.

  The first driver 28 is a circuit that amplifies and level-shifts the signal output from the first comparator 27 to drive the first NMOS transistor 25. When the first comparator 27 outputs a signal of logic “1”, a high positive voltage based on the source S is applied to the gate G of the first NMOS transistor 25. On the other hand, when a signal of logic “0” is output, zero V based on the source S or a negative voltage is applied.

  The operation of these combinational circuits is as follows. The voltage-current characteristic curve of the first NMOS transistor 25 is as shown in FIG. The horizontal axis represents the drain-source voltage Vds with respect to the source S, and the vertical axis represents the drain current Id flowing from the drain D toward the source S. When the drain-source voltage Vds is in a positive range, the drain current Id changes greatly as shown in the figure using the gate-source voltage Vgs with the source S as a reference. As the gate-source voltage Vgs increases with a positive value, the drain current Id increases. However, when the gate-source voltage Vgs is zero or a negative value, the characteristic curve becomes a curve of (1) in the figure, and the drain current Id is almost zero.

  The characteristic of the negative range of the drain-source voltage Vds also varies depending on the value of the gate-source voltage Vgs. The characteristic curve when the drain-source voltage Vds is negative and the gate-source voltage Vgs is also negative is a dotted curve (2) in FIG. In the case where the gate-source voltage Vgs is zero or a negative value, a channel through which a current flows is not formed in the lower gate portion (P well portion), and thus the current flowing through the channel is zero. However, in the first NMOS transistor 25, a parasitic diode 40 by a PN junction is formed between the drain D formed of an n-type semiconductor and the P well portion which is the body. The P well portion is connected to a source S formed of an n-type semiconductor. Therefore, when the gate-source voltage Vgs is negative, a negative drain current Id flows through the parasitic diode 40. A dotted curve (2) in FIG. 2 is a forward characteristic curve of the parasitic diode 40.

  However, in the first half-wave rectifier circuit 21, when the drain-source voltage Vds of the first NMOS transistor 25 becomes negative, the first comparator 27 outputs a signal of logic “1”. Therefore, a positive gate-source voltage Vgs is applied to the gate G of the first NMOS transistor 25 by the first driver 28. When the gate-source voltage Vgs becomes positive, an n-type channel is formed under the gate G, and a drain current Id flows through the channel. The resistance value of the n-type channel is smaller than the forward resistance value of the parasitic diode 40 in a range where the drain-source voltage Vds is small. Therefore, the voltage-current characteristic curve is substantially linear as shown by the curve (3) in FIG.

  In summary, the voltage-current characteristic curve of the first NMOS transistor 25 is that of the curve (1) in FIG. 2 when the drain-source voltage Vds is in the positive range, and the curve (3) in FIG. It becomes like this. That is, current does not flow when the drain-source voltage Vds is positive, and current flows only when it is negative. Therefore, the first NMOS transistor 25 functions as a rectifying element similar to a normal diode.

  What is characteristic in this case is that the value of the drain-source voltage Vds when the current flows, that is, the value of the voltage drop is smaller than that of the diode. For example, when a drain current Id of -30 A flows, the operating point of the diode is point A and the voltage drop is about -1.0V. On the other hand, in the case of the first NMOS transistor 25, since the operating point is the point B, the voltage drop is only about −0.4V. This means that the power loss is reduced by 0.6 V × 30 A = 18 W when the first NMOS transistor 25 is used, compared to when the diode is used. In this way, if the first NMOS transistor 25 is driven by the drive circuit including the first comparator 27 and the first driver 28 as shown in FIG. 2, it can function as a rectifying element with very little power loss. it can.

  As the overall operation of the first half-wave rectifier circuit 21, when the voltage at the interconnection point 37 with respect to the interconnection point 38 is smaller than the charging voltage of the first capacitor 26, the first NMOS transistor 25 Since the drain-source voltage Vds becomes positive, the drain current Id does not flow. Therefore, the first capacitor 26 is not charged.

  When the voltage at the interconnection point 37 with respect to the interconnection point 38 becomes larger than the charging voltage of the first capacitor 26, the drain-source voltage Vds of the first NMOS transistor 25 becomes negative. Drain current Id flows. Accordingly, the first capacitor 26 is charged in the positive direction. By operating in this way, the first half-wave rectifier circuit 21 functions as a half-wave rectifier circuit.

  Although the above description is about the first half-wave rectifier circuit 21, the second half-wave rectifier circuit 22 operates in the same manner and functions as a half-wave rectifier circuit. The difference is that in the second half-wave rectifier circuit 22, the source of the second NMOS transistor 31 is connected to the negative terminal of the second capacitor 32 via the negative power supply line 11, and the input AC voltage is This is that the voltage is applied between the drain D of the second NMOS transistor 31 and the positive terminal of the second capacitor 32. As a result, when the voltage at the interconnection point 37 is lower than the voltage at the interconnection point 38 and the absolute value of the difference becomes larger than the charging voltage of the second capacitor 32, a negative drain current Id flows, and the second capacitor 32 Is charged in the positive direction.

  Since the first and second half-wave rectifier circuits 21 and 22 operate in this manner, an input AC is connected between the positive power supply line 10 and the negative power supply line 11 which are output lines of a circuit in which they are connected in series. A DC voltage approximately twice the amplitude of the voltage is output. That is, the circuit 5 shown in the figure operates as a single-phase voltage doubler rectifier circuit 5. The single-phase voltage doubler rectifier circuit 5 has an effect that the power loss is extremely reduced as compared with the case where the diode is used as described above.

  In order to reduce the power loss, it is advantageous to use an NMOS transistor having a small drain-source resistance value when conducting. In recent years, a low ON resistance MOS transistor having a very small drain-source resistance value during conduction has been developed and used. This transistor has a very small drain-source resistance value compared to a diode when the same current flows. Therefore, the effect of the present invention can be further enhanced by adopting such a low ON resistance MOS transistor.

  Up to now, the low ON resistance MOS transistor is used in place of the diode of the rectifier circuit, but such a low ON resistance MOS transistor may be adopted as a switching element in the inverter circuit 6. FIG. 3 shows three switching elements 13, 15 and 17 having one end connected to the negative power supply line 11 among the switching elements 12 to 17 used in the inverter circuit 6 in FIG. It is replaced with a transistor. IGBTs are used for the switching elements 12, 14, and 16 whose one ends are connected to the positive power supply line 10. In the case of this circuit configuration, the gate drive circuit 9 controls the switching circuit 8 so as to convert a DC voltage into a three-phase AC voltage by a two-phase modulation method (see, for example, Patent Document 2) instead of a three-phase modulation method. By doing so, it is possible to reduce power loss.

  Specifically, in the case of the two-phase modulation method, the on / off state of a predetermined single-phase switching element in the switching circuit 8 is stopped for a predetermined period one phase at a time in a predetermined order, and two-phase switching elements other than the stop phase are PWM control is performed at a predetermined PWM carrier cycle. At that time, among the pair of switching elements of the remaining two phases that are not the stop phase, the upper arm side (positive power supply line 10 side) switching element is PWM-controlled, and the lower arm side (negative power supply line 11 side) switching element is Always on. In the switching circuit 8 in FIG. 3, since a low ON resistance MOS transistor is used for the lower arm side switching element having a long ON period as described above, the power loss is compared with the case where the IGBT is used. A significant reduction effect is obtained.

  Note that the inverter device 1 using the MOS transistor having a low conduction resistance as shown in FIG. 3 has less power loss, and therefore the circuit generates less heat. Therefore, it becomes easy to manufacture a circuit portion excluding the first and second capacitors 26 and 32 in FIG. 3 with a module configuration. And if it manufactures in such a module structure, there exists an effect which can reduce the whole apparatus in size.

It is a circuit block diagram of the inverter apparatus which concerns on one Embodiment of this invention. It is a voltage-current characteristic curve of an NMOS transistor. It is a circuit block diagram of the inverter apparatus which employ | adopted the NMOS transistor for the one part switching element of the inverter circuit. FIG. 2 is a view corresponding to FIG. It is a circuit example of the charging circuit which concerns on a prior art.

Explanation of symbols

  In the drawings, 1 is an inverter device, 5 is a single-phase voltage doubler rectifier circuit, 6 is an inverter circuit, 8 is a switching circuit, 9 is a gate drive circuit, 12 to 17 are switching elements, 10 is a positive power line, and 11 is negative. Side power supply line, 25 is a first NMOS transistor, 26 is a first capacitor, 27 is a first comparator, 28 and 34 are drivers, 31 is a second NMOS transistor, 32 is a second capacitor, and 33 is a first capacitor Two comparators 37 and 38 are interconnection points, and 40 is a parasitic diode.

Claims (5)

A series connection circuit of first and second capacitors and a series connection circuit of first and second NMOS transistors are connected in parallel, and an interconnection point of the first and second capacitors and the first and second NMOSs A single-phase voltage doubler rectifier circuit configured to apply a single-phase AC voltage between the interconnection points of the transistors and to extract a DC voltage from both ends of the first and second capacitors connected in series,
The first NMOS transistor has a source and the second NMOS transistor has a drain connected in series with the interconnection point side, and the source and drain of each of the first and second NMOS transistors are connected in series. The first and second comparators having the source and drain voltages as inputs are connected, and the NMOS corresponding to the output signal only when the drain voltage input to the first and second comparators is lower than the source voltage A single-phase voltage doubler rectifier circuit, wherein the transistor is configured to be conductive.   An inverter device comprising an inverter circuit for converting a DC voltage into a three-phase AC voltage having a predetermined frequency is connected to the load side of the single-phase voltage doubler rectifier circuit according to claim 1.   3. The inverter circuit according to claim 2, wherein the inverter circuit has a configuration in which six switching elements are connected to a full bridge, and NMOS transistors are employed for three switching elements connected to the negative power supply line. An inverter device characterized by that.   4. The inverter device according to claim 3, wherein the single-phase voltage doubler rectifier circuit portion excluding the first and second capacitors and the inverter circuit portion are integrally formed in a module configuration. .   A drain-source resistance value lower than a forward resistance value of a diode having the same rated current capacity as the first and second NMOS transistors used in the single-phase voltage doubler rectifier circuit according to claim 1. A single-phase voltage doubler rectifier circuit using an NMOS transistor having the same.

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