JP4336029B2 - 半導体集積回路の故障シミュレーション方法および故障シミュレータ - Google Patents

半導体集積回路の故障シミュレーション方法および故障シミュレータ Download PDF

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JP4336029B2
JP4336029B2 JP2000183345A JP2000183345A JP4336029B2 JP 4336029 B2 JP4336029 B2 JP 4336029B2 JP 2000183345 A JP2000183345 A JP 2000183345A JP 2000183345 A JP2000183345 A JP 2000183345A JP 4336029 B2 JP4336029 B2 JP 4336029B2
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test pattern
transition
fault
signal
logic gate
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Japanese (ja)
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JP2002007508A (ja
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雅裕 石田
隆弘 山口
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Advantest Corp
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Advantest Corp
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Priority to JP2000183345A priority Critical patent/JP4336029B2/ja
Priority to US09/880,976 priority patent/US6461882B2/en
Priority to TW090114741A priority patent/TW507419B/zh
Priority to KR10-2001-0034407A priority patent/KR100400502B1/ko
Priority to DE10129329A priority patent/DE10129329A1/de
Publication of JP2002007508A publication Critical patent/JP2002007508A/ja
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Publication of JP4336029B2 publication Critical patent/JP4336029B2/ja
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318342—Generation of test inputs, e.g. test vectors, patterns or sequences by preliminary fault modelling, e.g. analysis, simulation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
JP2000183345A 2000-06-19 2000-06-19 半導体集積回路の故障シミュレーション方法および故障シミュレータ Expired - Fee Related JP4336029B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2000183345A JP4336029B2 (ja) 2000-06-19 2000-06-19 半導体集積回路の故障シミュレーション方法および故障シミュレータ
US09/880,976 US6461882B2 (en) 2000-06-19 2001-06-13 Fault simulation method and fault simulator for semiconductor integrated circuit
TW090114741A TW507419B (en) 2000-06-19 2001-06-18 Fault simulation method and fault simulator for semiconductor integrated circuit
KR10-2001-0034407A KR100400502B1 (ko) 2000-06-19 2001-06-18 반도체 집적회로의 고장 시뮬레이션방법 및 고장 시뮬레이터
DE10129329A DE10129329A1 (de) 2000-06-19 2001-06-19 Fehlersimulationsverfahren und Fehlersimulator für einen Halbleiter-IC

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JP2000183345A JP4336029B2 (ja) 2000-06-19 2000-06-19 半導体集積回路の故障シミュレーション方法および故障シミュレータ

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JP2002007508A JP2002007508A (ja) 2002-01-11
JP4336029B2 true JP4336029B2 (ja) 2009-09-30

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JP2000183345A Expired - Fee Related JP4336029B2 (ja) 2000-06-19 2000-06-19 半導体集積回路の故障シミュレーション方法および故障シミュレータ

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US (1) US6461882B2 (US20020011827A1-20020131-M00008.png)
JP (1) JP4336029B2 (US20020011827A1-20020131-M00008.png)
KR (1) KR100400502B1 (US20020011827A1-20020131-M00008.png)
DE (1) DE10129329A1 (US20020011827A1-20020131-M00008.png)
TW (1) TW507419B (US20020011827A1-20020131-M00008.png)

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JP2001208803A (ja) * 2000-01-24 2001-08-03 Advantest Corp 半導体集積回路の故障シミュレーション方法および故障シミュレータ
JP4488595B2 (ja) * 2000-06-08 2010-06-23 株式会社アドバンテスト テストパターン生成方法
US6675323B2 (en) * 2001-09-05 2004-01-06 International Business Machines Corporation Incremental fault dictionary
US6751768B2 (en) * 2001-11-29 2004-06-15 Agilent Technologies, Inc. Hierarchical creation of vectors for quiescent current (IDDQ) tests for system-on-chip circuits
KR100487979B1 (ko) * 2002-04-01 2005-05-06 학교법인 성균관대학 지유아이와 데이터베이스를 이용한 전력계통모의고장발생시스템 및 이의 운용방법
US6810510B2 (en) * 2002-06-11 2004-10-26 Heuristics Physics Laboratories, Inc. Method for eliminating false failures saved by redundant paths during circuit area analysis on an integrated circuit layout
KR100436048B1 (ko) * 2002-07-19 2004-06-12 주식회사 하이닉스반도체 전류 감지 장치
US7246290B1 (en) * 2002-10-31 2007-07-17 Advanced Micro Devices, Inc. Determining the health of a desired node in a multi-level system
JP4569146B2 (ja) * 2004-03-30 2010-10-27 日本電気株式会社 フォトマスク製造支援システム
US20080189141A1 (en) * 2005-01-07 2008-08-07 Adrian Gore Method of Managing the Business of a Health Insurance Plan and a System Therefor
KR100713206B1 (ko) * 2006-07-21 2007-05-02 연세대학교 산학협력단 다중고착 고장 진단을 위한 매칭 방법
US8381144B2 (en) * 2010-03-03 2013-02-19 Qualcomm Incorporated System and method of test mode gate operation
US8886507B2 (en) 2011-07-13 2014-11-11 General Electric Company Methods and systems for simulating circuit operation
CN102508140B (zh) * 2011-10-10 2013-07-17 保定天威集团有限公司 一种通过数字电路实现脉冲校验的方法
US9235460B2 (en) * 2012-02-27 2016-01-12 Altera Corporation Methods and apparatus for automatic fault detection
CN103439647A (zh) * 2013-08-28 2013-12-11 深圳华越天芯电子有限公司 一种动态电源电流监测的模拟电路故障诊断方法
US10248520B2 (en) * 2015-09-25 2019-04-02 Oracle International Corporation High speed functional test vectors in low power test conditions of a digital integrated circuit
US9934341B2 (en) * 2015-11-11 2018-04-03 International Business Machines Corporation Simulation of modifications to microprocessor design
CN107102630B (zh) * 2016-02-19 2019-12-31 同济大学 一种用于磁浮列车的控制器板卡故障检测系统
US11263322B2 (en) * 2018-08-27 2022-03-01 Infineon Technologies Ag Secure x-modular redundancy
US11216606B1 (en) * 2020-07-30 2022-01-04 Cadence Design Systems, Inc. Method and system for functional safety verification using fault relation rules
US11042679B1 (en) * 2020-08-31 2021-06-22 Siemens Industry Software Inc. Diagnosis resolution prediction

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04344540A (ja) * 1991-05-21 1992-12-01 Matsushita Electric Ind Co Ltd 検査系列生成方法
US6167352A (en) * 1997-06-26 2000-12-26 Agilent Technologies, Inc. Model-based diagnostic system with automated procedures for next test selection
JP2000020562A (ja) * 1998-06-29 2000-01-21 Matsushita Electric Ind Co Ltd シミュレーションテストベンチ生成方法およびその生成装置
US6061283A (en) * 1998-10-23 2000-05-09 Advantest Corp. Semiconductor integrated circuit evaluation system
JP4488595B2 (ja) * 2000-06-08 2010-06-23 株式会社アドバンテスト テストパターン生成方法

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Publication number Publication date
US20020011827A1 (en) 2002-01-31
JP2002007508A (ja) 2002-01-11
KR20010113540A (ko) 2001-12-28
KR100400502B1 (ko) 2003-10-08
US6461882B2 (en) 2002-10-08
DE10129329A1 (de) 2002-03-21
TW507419B (en) 2002-10-21

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