JP4335089B2 - Dcオフセット調整装置およびdcオフセット調整方法 - Google Patents
Dcオフセット調整装置およびdcオフセット調整方法 Download PDFInfo
- Publication number
- JP4335089B2 JP4335089B2 JP2004227754A JP2004227754A JP4335089B2 JP 4335089 B2 JP4335089 B2 JP 4335089B2 JP 2004227754 A JP2004227754 A JP 2004227754A JP 2004227754 A JP2004227754 A JP 2004227754A JP 4335089 B2 JP4335089 B2 JP 4335089B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- offset
- input
- correction
- cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
- H04B1/30—Circuits for homodyne or synchrodyne receivers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1425—Balanced arrangements with transistors
- H03D7/1433—Balanced arrangements with transistors using bipolar transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1425—Balanced arrangements with transistors
- H03D7/145—Balanced arrangements with transistors using a combination of bipolar transistors and field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1425—Balanced arrangements with transistors
- H03D7/1458—Double balanced arrangements, i.e. where both input signals are differential
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
- H03D2200/0001—Circuit elements of demodulators
- H03D2200/0033—Current mirrors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
- H03D2200/0041—Functional aspects of demodulators
- H03D2200/0047—Offset of DC voltage or frequency
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
- H03D2200/0041—Functional aspects of demodulators
- H03D2200/0088—Reduction of intermodulation, nonlinearities, adjacent channel interference; intercept points of harmonics or intermodulation products
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
- H03D2200/0041—Functional aspects of demodulators
- H03D2200/009—Reduction of local oscillator or RF leakage
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Superheterodyne Receivers (AREA)
- Noise Elimination (AREA)
- Amplifiers (AREA)
Description
(数1)
ΔIout=(A・(Icomp−)+C・(Icomp+))−(B・(Icomp−)+D・(Icomp+))
このずれ指数A,B,C,Dが等しい場合、電流量ΔIoutはゼロになる。しかしながら、そもそもミキサ回路103が2次の非線形歪を有する場合、その原因はスイッチングセル101を構成するトランジスタ201,202,203,204の相対誤差に起因するため、ずれ指数A,B,C,Dは互いに異なる値をもち、電流量ΔIoutの分だけミキサ出力に補正をかけることが可能になる。
102,602 RF入力セル
103,603 ミキサ回路
104,608 DCオフセット補正器
105 調整器
106,606 検波器
201,202,203,204,205,206 トランジスタ
207,208,609,610 出力端子
209,210,611,612 ローカル入力端子
211,212,613,614 RF入力端子
213,615 制御端子
301,401,501 希望信号
302,402,502 妨害信号
303,701 ノイズ信号
503 DCオフセット
604 補正発生器
605 コントローラ
607 ユーザインタフェース
Claims (13)
- 入力されたRF信号を増幅するRF入力セルと、増幅された前記RF信号とローカル信号をミキシングしてIF信号を出力するスイッチングセルと、前記RF信号の入力レベルを検知して前記IF信号に含まれるDCオフセットを補正する補正信号を出力するDCオフセット補正器とを備え、
前記補正信号を前記RF入力セルに加えて前記IF信号に含まれる前記DCオフセットを補正することを特徴とするDCオフセット調整装置。 - 前記DCオフセット補正器として、RF信号を入力して検波信号を出力する検波器と前記検波信号を入力して補正信号を出力する調整器を備え、前記補正信号によってIF信号に含まれるDCオフセットが最小となるように調整する制御信号を前記調整器に入力することを特徴とする請求項1記載のDCオフセット調整装置。
- 前記スイッチングセルとして、ギルバートセルで構成したことを特徴とする請求項1記載のDCオフセット調整装置。
- 前記RF入力セルとして、RF信号を入力するバイポーラトランジスタを備え、増幅された前記RF信号をコレクタ端子から出力するバイポーラ増幅器で構成したことを特徴とする請求項1記載のDCオフセット調整装置。
- 前記バイポーラ増幅器のコレクタ端子に、前記DCオフセット補正器の出力する補正信号を入力することを特徴とする請求項4記載のDCオフセット調整装置。
- 前記バイポーラ増幅器のエミッタ端子に、前記DCオフセット補正器の出力する補正信号を入力することを特徴とする請求項4記載のDCオフセット調整装置。
- 前記バイポーラ増幅器のベース端子に、前記DCオフセット補正器の出力する補正信号を入力することを特徴とする請求項4記載のDCオフセット調整装置。
- 前記RF入力セルとして、RF信号が入力されるMOSFETを備え、増幅された前記RF信号をドレイン端子から出力するMOSFET増幅器で構成したことを特徴とする請求項1記載のDCオフセット調整装置。
- 前記MOSFET増幅器のドレイン端子に、前記DCオフセット補正器の出力する補正信号を入力することを特徴とする請求項8記載のDCオフセット調整装置。
- 前記MOSFET増幅器のソース端子に、前記DCオフセット補正器の出力する補正信号を入力することを特徴とする請求項8記載のDCオフセット調整装置。
- 前記MOSFET増幅器のゲート端子に、前記DCオフセット補正器の出力する補正信号を入力することを特徴とする請求項8記載のDCオフセット調整装置。
- 入力されたRF信号をRF入力セルにより増幅する工程と、DCオフセット補正器により前記RF信号の入力レベルを検知してIF信号に含まれるDCオフセットを補正する補正信号を前記RF入力セルに出力する工程と、増幅された前記RF信号とローカル信号をスイッチングセルによりミキシングして前記IF信号を出力する工程とからなることを特徴とするDCオフセット調整方法。
- 前記DCオフセット補正器の補正信号を出力する工程において、RF信号の入力レベルを検波器で検知した検波信号を出力する工程と、前記検波信号を調整器に入力してIF信号に含まれるDCオフセットを補正する前記補正信号を出力する工程と、前記補正信号によって前記IF信号に含まれるDCオフセットが最小になるように前記調整器に入力する制御信号を調整する工程を有したことを特徴とする請求項12記載のDCオフセット調整方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004227754A JP4335089B2 (ja) | 2004-08-04 | 2004-08-04 | Dcオフセット調整装置およびdcオフセット調整方法 |
US11/195,286 US7734273B2 (en) | 2004-08-04 | 2005-08-02 | Frequency mixer device and method for compensating DC offset |
CN2005100882879A CN1734948B (zh) | 2004-08-04 | 2005-08-03 | 混频器设备和对dc偏移进行补偿的方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004227754A JP4335089B2 (ja) | 2004-08-04 | 2004-08-04 | Dcオフセット調整装置およびdcオフセット調整方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006050201A JP2006050201A (ja) | 2006-02-16 |
JP4335089B2 true JP4335089B2 (ja) | 2009-09-30 |
Family
ID=35758047
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004227754A Expired - Fee Related JP4335089B2 (ja) | 2004-08-04 | 2004-08-04 | Dcオフセット調整装置およびdcオフセット調整方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7734273B2 (ja) |
JP (1) | JP4335089B2 (ja) |
CN (1) | CN1734948B (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1575160A1 (en) * | 2004-03-08 | 2005-09-14 | Matsushita Electric Industrial Co., Ltd. | Mixer circuit and receiver circuit using the same |
US7558550B2 (en) * | 2005-02-17 | 2009-07-07 | Samsung Electronics Co., Ltd. | Versatile system for multimode, wireless communication receiver with ZIF and Near-ZIF operations |
GB2446463A (en) * | 2007-02-09 | 2008-08-13 | Acp Advanced Circuit Pursuit A | Mixer with shorting switch |
US8391818B2 (en) * | 2009-04-03 | 2013-03-05 | Panasonic Corporation | Second-order distortion correcting receiver and second-order distortion correcting method |
DE102012202007A1 (de) * | 2012-02-10 | 2013-08-14 | Robert Bosch Gmbh | Radarsensor |
US8787503B2 (en) * | 2012-09-18 | 2014-07-22 | Vixs Systems, Inc. | Frequency mixer with compensated DC offset correction to reduce linearity degradation |
KR102424896B1 (ko) * | 2016-02-25 | 2022-07-26 | 에스케이하이닉스 주식회사 | 데이터 트레이닝 장치 및 이를 포함하는 반도체 장치 |
US10122353B2 (en) * | 2016-09-09 | 2018-11-06 | Finisar Corporation | Cross-point offset adjustment circuit |
CN106788419A (zh) * | 2016-11-22 | 2017-05-31 | 广东技术师范学院 | 一种高性能可调谐宽带射频振荡器系统 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5898912A (en) * | 1996-07-01 | 1999-04-27 | Motorola, Inc. | Direct current (DC) offset compensation method and apparatus |
US6040731A (en) * | 1997-05-01 | 2000-03-21 | Raytheon Company | Differential pair gain control stage |
US6785530B2 (en) * | 2001-03-16 | 2004-08-31 | Skyworks Solutions, Inc. | Even-order non-linearity correction feedback for Gilbert style mixers |
US6535725B2 (en) * | 2001-03-30 | 2003-03-18 | Skyworks Solutions, Inc. | Interference reduction for direct conversion receivers |
US6687491B2 (en) * | 2002-01-18 | 2004-02-03 | Sony Corporation | Direct conversion of low power high linearity receiver |
US7184730B2 (en) * | 2002-05-03 | 2007-02-27 | Motorola, Inc. | Automatic gain control system having a wide range of continuous gain control |
JP2004048581A (ja) * | 2002-07-15 | 2004-02-12 | Hitachi Ltd | 受信装置及び利得制御システム |
TWI251425B (en) * | 2002-11-15 | 2006-03-11 | Interdigital Tech Corp | Compensating for analog radio component impairments to relax specifications |
US6950641B2 (en) * | 2003-01-31 | 2005-09-27 | Nokia Corporation | Apparatus, and an associated method, for increasing receiver sensitivity of a direct conversion receiver |
US7203476B2 (en) * | 2004-01-09 | 2007-04-10 | Motorola, Inc. | Method and apparatus for minimizing baseband offset error in a receiver |
US7336937B2 (en) * | 2004-05-05 | 2008-02-26 | Nokia Corporation | Compensation of a DC offset in a receiver |
-
2004
- 2004-08-04 JP JP2004227754A patent/JP4335089B2/ja not_active Expired - Fee Related
-
2005
- 2005-08-02 US US11/195,286 patent/US7734273B2/en not_active Expired - Fee Related
- 2005-08-03 CN CN2005100882879A patent/CN1734948B/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20060030288A1 (en) | 2006-02-09 |
CN1734948B (zh) | 2010-09-29 |
JP2006050201A (ja) | 2006-02-16 |
US7734273B2 (en) | 2010-06-08 |
CN1734948A (zh) | 2006-02-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7409199B2 (en) | Direct conversion receiver with DC offset compensation | |
US6535725B2 (en) | Interference reduction for direct conversion receivers | |
US8571149B2 (en) | Direct conversion RF transceiver for wireless communication | |
US7224722B2 (en) | Direct conversion RF transceiver with automatic frequency control | |
EP1786097B1 (en) | Receiver using DC Offset Adjustment for optimal IP2 | |
US20090189691A1 (en) | Method and apparatus for reducing intermodulation distortion in an electronic device having an amplifier circuit | |
US7734273B2 (en) | Frequency mixer device and method for compensating DC offset | |
US20070069816A1 (en) | Method for transconductance linearization for DC-coupled applications | |
KR100629621B1 (ko) | 위상을 조절하여 선형성을 보정하는 주파수 혼합방법 및주파수 혼합장치 | |
KR20140101215A (ko) | 무선 통신 시스템에서 사용되는 믹서의 iip2 특성 보정 방법과 그 믹서 | |
US7266357B2 (en) | Reduced local oscillator feedthrough quadrature image reject mixer | |
JP2007537631A (ja) | 三次変調相殺可変回路 | |
US8718576B2 (en) | Radio frequency modulator and method thereof | |
JP2008054314A (ja) | 受信機及びその増幅利得制御装置 | |
KR100687012B1 (ko) | 주파수 변환장치와 이를 포함하는 수신기 및 주파수 변환방법 | |
US20050008107A1 (en) | Receiver for correcting frequency dependent I/Q phase error | |
JP2004104515A (ja) | ミキサ回路 | |
JP2006319639A (ja) | Dcオフセットキャリブレーションシステム | |
JP2006060456A (ja) | Dcオフセットキャリブレーションシステム | |
US7791395B2 (en) | DC offset correcting device and DC offset correcting method | |
US20070019113A1 (en) | Mixer system with amplitude-, common mode- and phase corrections | |
US20100178891A1 (en) | Method and circuit for calibrating analog circuit components | |
US8649751B2 (en) | Receiver | |
KR101043416B1 (ko) | 주파수 혼합기 및 그 구동 방법 | |
CN116527069A (zh) | 一种具有ip2修调功能的射频接收机 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20061110 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20090127 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20090210 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20090602 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20090624 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120703 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120703 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130703 Year of fee payment: 4 |
|
LAPS | Cancellation because of no payment of annual fees |