JP4331993B2 - Power semiconductor device - Google Patents

Power semiconductor device Download PDF

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JP4331993B2
JP4331993B2 JP2003300178A JP2003300178A JP4331993B2 JP 4331993 B2 JP4331993 B2 JP 4331993B2 JP 2003300178 A JP2003300178 A JP 2003300178A JP 2003300178 A JP2003300178 A JP 2003300178A JP 4331993 B2 JP4331993 B2 JP 4331993B2
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main
power semiconductor
insulating
terminal
semiconductor device
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JP2004153243A (en
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慶久 小栗
辰哉 磐浅
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate

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Description

この発明は、パワー半導体装置がパッケージ内に組み込まれた電力用半導体装置に関するものである。   The present invention relates to a power semiconductor device in which a power semiconductor device is incorporated in a package.

この種のパワー半導体装置は、パッケージ(ケース)の底板を構成する金属の放熱板上に、半田により、表面に導電性の層を有する絶縁性のセラミック基板が設けられ、そのセラミック基板上面に導電層に、スイッチング用素子が取付けられている。また、ケース内部には、複数の主端子を保持するための端子ブロックが設けられており、各スイッチング素子は、主端子などにワイヤー配線を用いて結線される。前記主端子の一端はケース外に引き出され、接続端子となる。     In this type of power semiconductor device, an insulating ceramic substrate having a conductive layer on its surface is provided by solder on a metal heat radiating plate constituting a bottom plate of a package (case), and a conductive surface is provided on the upper surface of the ceramic substrate. A switching element is attached to the layer. Further, a terminal block for holding a plurality of main terminals is provided inside the case, and each switching element is connected to the main terminal or the like using wire wiring. One end of the main terminal is pulled out of the case and becomes a connection terminal.

前記端子ブロックでは、複数個の主端子を互いに絶縁するために、各主端子の間には絶縁紙が挿入され、ネジを用いて主端子が固定されていた。   In the terminal block, in order to insulate a plurality of main terminals from each other, insulating paper is inserted between the main terminals, and the main terminals are fixed using screws.

また、この種のパワー半導体装置には、絶縁紙は使用していないが、放熱効果を増すために、放熱板上に絶縁層を介して金属性の回路パターンを貼り合わせ、その回路パターン上に、外部取り出しのためのリードフレームを設け、そのリードフレーム上にデバイスを取り付けたものがある(例えば、特許文献１参照)。
特開平09-129822号「半導体装置」（段落番号[0031]〜[0044]、図１） In addition, this type of power semiconductor device does not use insulating paper, but in order to increase the heat dissipation effect, a metallic circuit pattern is bonded to the heat dissipation plate via an insulating layer, and the circuit pattern is placed on the circuit pattern. In some cases, a lead frame for external extraction is provided, and a device is mounted on the lead frame (see, for example, Patent Document 1).
Japanese Patent Laid-Open No. 09-129822 “Semiconductor Device” (paragraph numbers [0031] to [0044], FIG. 1)

上述のように、端子ブロックの形成には、主端子と絶縁紙とを交互に貼り合わす作業が必要であるため、作業性が低く、最終工程がネジによる固定のためネジと主端子との絶縁不具合を発生させる恐れがあった。   As described above, the formation of the terminal block requires the work of alternately bonding the main terminal and the insulating paper, so that the workability is low, and the insulation between the screw and the main terminal is performed because the final process is fixing with the screw. There was a risk of causing problems.

一方、特許文献１のものでは、放熱効果は優れているものの、多くの絶縁層および金属層を必要とするため高価となり、組み立て工程も複雑化した。   On the other hand, although the thing of patent document 1 is excellent in the thermal radiation effect, since many insulating layers and metal layers were required, it became expensive and the assembly process was also complicated.

この発明は、組み立て工程を少なくして端子ブロックの形成を容易にきる電力用半導体装置を提供するものである。   The present invention provides a power semiconductor device that can easily form a terminal block with fewer assembly steps.

本発明は、半導体装置のケース内部にて、主端子およびその主端子を固定する樹脂ラインからなる端子ブロックを金型を用いて形成できる電力用半導体装置を提供する。前記樹脂ラインに固定すべき必要枚数の主端子および各主端子間に挿入される絶縁紙に対し、それぞれ共通する個所に穴を形成しておく。そして前記金型にセットした主端子および絶縁紙を、成型時に移動しないように、当該金型に備えたガイド等にて保持する。そして、樹脂ラインを成型する際に、前記穴に注入した樹脂と一体的に成型することで、前記主端子および絶縁紙を樹脂ラインに固定する。   The present invention provides a power semiconductor device in which a terminal block including a main terminal and a resin line for fixing the main terminal can be formed using a mold inside a case of the semiconductor device. Holes are formed in common portions for the required number of main terminals to be fixed to the resin line and the insulating paper inserted between the main terminals. Then, the main terminal and insulating paper set in the mold are held by a guide or the like provided in the mold so as not to move during molding. Then, when the resin line is molded, the main terminal and the insulating paper are fixed to the resin line by integrally molding with the resin injected into the hole.

この発明によれば、端子ブロックの形成の際、樹脂ラインの成型時に、主端子だけでなく、絶縁紙に一緒に樹脂ラインに成型固定するようにしたので、主端子や絶縁紙を個々に組み立てる必要がなくなり、作業性が飛躍的に改善され、又、ロボットなどの高価な装置を必要としないので製品を安価に提供できる。また、主端子の固定にネジなどを使用しないため、絶縁不具合等の発生をなくせる。 According to the present invention, in forming the terminal blocks, when the resin line molding, not only the main terminals. Thus together molded fixed to the resin line insulating paper, assembled main terminals and insulating paper individually This eliminates the need for the device, dramatically improves workability, and does not require an expensive device such as a robot, so that the product can be provided at a low cost. In addition, since no screws or the like are used to fix the main terminal, it is possible to eliminate the occurrence of insulation defects.

実施の形態１．
本発明の実施の形態１における端子ブロック５０を適用して形成されたパワー半導体装置の内部平面図であり、この図１中のＡ−ＡラインおよびＢ−Ｂラインでの断面図を図２および図３に示す。パワー半導体装置のパッケージであるケース１の底面として熱伝導性のよい放熱板２が取付けネジにより取り付けられており、その放熱板２上でかつ、放熱板２を２分するように、樹脂ライン３が設けられる。その樹脂ライン３両側で前記放熱板２上には、それぞれ絶縁基板４が設けられ、その絶縁基板４上には所定の半導体素子５が実装されている。 Embodiment 1 FIG.
FIG. 2 is an internal plan view of a power semiconductor device formed by applying the terminal block 50 according to the first embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along lines AA and BB in FIG. As shown in FIG. A heat radiating plate 2 having good thermal conductivity is attached to the bottom surface of the case 1 which is a package of the power semiconductor device by mounting screws. Is provided. On both sides of the resin line 3, an insulating substrate 4 is provided on the heat sink 2, and a predetermined semiconductor element 5 is mounted on the insulating substrate 4.

図４は端子ブロック５０の組み立て図を示したものであり、図示のように、樹脂ライン３には、３個の主端子６(６ａ、６ｂ、６ｃ)と、各主端子間に挿入される２枚の絶縁紙７(７ａ、７ｂ)が図示した順序で組み立てられ、端子ブロック５０が形成される。各主端子６ａ、６ｂ、６ｃには、外部接続のために、一方端に接続用端子８ａ、８ｂ、８ｃを備える。この接続用端子に形成したネジ挿通穴に対応して、ケース１側に穴Ｐが形成される(図３)。これらの主端子や絶縁紙は、従来、ネジを用いて樹脂ライン３に固定していたが、本発明では以下のような方法で行う。   FIG. 4 shows an assembly diagram of the terminal block 50. As shown, the resin line 3 is inserted between the three main terminals 6 (6a, 6b, 6c) and the main terminals. The two insulating papers 7 (7a, 7b) are assembled in the order shown in the figure, and the terminal block 50 is formed. Each main terminal 6a, 6b, 6c is provided with connection terminals 8a, 8b, 8c at one end for external connection. A hole P is formed on the case 1 side corresponding to the screw insertion hole formed in the connection terminal (FIG. 3). Conventionally, these main terminals and insulating paper are fixed to the resin line 3 using screws, but in the present invention, the following methods are used.

主端子６および絶縁紙７に、図４で示されるように、それぞれ対応する個所に２個づつ穴Ｑを形成しておき、金型を用いた樹脂ライン３の成型時に、これらの穴Ｑに注入した樹脂３ａと共に一体成型することで主端子６および絶縁紙７を樹脂ライン３に固定している。   As shown in FIG. 4, the main terminal 6 and the insulating paper 7 are each formed with two holes Q at corresponding locations, and when the resin line 3 is molded using a mold, The main terminal 6 and the insulating paper 7 are fixed to the resin line 3 by being integrally molded together with the injected resin 3a.

但し、金型による成型時には、絶縁紙７が移動しないように保持しておく必要があり、そのため、図５に示すように、絶縁紙７の両側を保持するためのガイド２１と、絶縁紙７ａを上方から抑え込む支持部材２２とを前記金型に備えている。図５は、図４で示した順に組み立てた端子ブロック５０におけるＣ−Ｃ’ラインでの断面図である。   However, it is necessary to hold the insulating paper 7 so that it does not move during molding by a mold. Therefore, as shown in FIG. 5, a guide 21 for holding both sides of the insulating paper 7 and the insulating paper 7a. The mold is provided with a support member 22 that suppresses from above. FIG. 5 is a cross-sectional view taken along line C-C ′ in the terminal block 50 assembled in the order shown in FIG. 4.

図６は、端子ブロック５０を放熱板２上に装着した状態を示しており、樹脂ライン３の両側にし絶縁基板４が設けられ、その絶縁基板４に実装された半導体素子５は、導電性ワイヤ９によって、主端子６に接続される。   FIG. 6 shows a state in which the terminal block 50 is mounted on the heat radiating plate 2. The insulating substrate 4 is provided on both sides of the resin line 3, and the semiconductor element 5 mounted on the insulating substrate 4 is made of a conductive wire. 9 is connected to the main terminal 6.

その後、半導体素子５を埋設するようにケース１内にゲル状樹脂(不図示)が充填され、最後にケース１に上蓋１０が取付けられる。   Thereafter, a gel resin (not shown) is filled in the case 1 so as to embed the semiconductor element 5, and finally the upper lid 10 is attached to the case 1.

上記の実施の形態では、予め作製した着脱自在の端子ブロック５０をケース１に組み込んだが、主端子の一部をケースにインサートするなどして、ケース１の成型時に端子ブロック５０を一体的に成型してもよい。前者の場合は、成型金型の構造が前者のものと比較して単純となるため、金型加工の容易化を図れるだけでなく、成型不良を低減できる。後者の場合、組み立てが簡単となり、生産性が優れる。   In the above embodiment, the removable terminal block 50 prepared in advance is incorporated in the case 1, but the terminal block 50 is molded integrally when the case 1 is molded by inserting a part of the main terminal into the case. May be. In the former case, since the structure of the molding die is simpler than that of the former, not only the mold processing can be facilitated, but also molding defects can be reduced. In the latter case, assembly is easy and productivity is excellent.

上記実施の形態では、主端子６の両側に絶縁基板４を配設して、ボンディングワイヤの長さを短くし、結果的にワイヤボンディング時間の短縮により生産性の向上を図ったが、絶縁基板の一辺近傍に主端子を配設した構造も可能である。   In the above embodiment, the insulating substrate 4 is disposed on both sides of the main terminal 6 to shorten the length of the bonding wire, and as a result, the productivity is improved by shortening the wire bonding time. A structure in which a main terminal is disposed in the vicinity of one side is also possible.

また、端子ブロックを着脱自在に設ければ、組み立て時の生産性を更に高め得る効果がある。
 Further , if the terminal block is detachably provided, there is an effect that the productivity at the time of assembly can be further improved.

本発明の電力用半導体装置の内部平面図Internal plan view of the power semiconductor device of the present invention 図１中のＡ−Ａラインでの断面図Sectional view along the AA line in FIG. 図１中のＢ−Ｂラインでの断面図Sectional view taken along line BB in FIG. 端子ブロックの組み立て図Terminal block assembly drawing 端子ブロックの組み立て時の様子を示した断面図Sectional view showing the terminal block during assembly ケースに装着した端子ブロックの正面図Front view of the terminal block attached to the case

符号の説明Explanation of symbols

１ ケース
２ 放熱板
３ 樹脂ライン
４ 絶縁基板
５ 半導体素子
６ 主端子
７ 絶縁紙
８ 接続用端子
９ 導電性ワイヤ
１０ 上蓋
２１ ガイド
２２ 支持部材
５０ 端子ブロック
Ｑ 穴
DESCRIPTION OF SYMBOLS 1 Case 2 Heat sink 3 Resin line 4 Insulating board 5 Semiconductor element 6 Main terminal 7 Insulating paper 8 Connection terminal 9 Conductive wire 10 Upper lid 21 Guide 22 Support member 50 Terminal block Q Hole

Claims (3)

ベース板、
裏主面が前記ベース板の第１主面上に固着されると共に、表主面には回路パターンが形成された絶縁基板、
この絶縁基板の前記回路パターン上に固着された複数の電力用半導体チップ、
前記絶縁基板の一辺近傍に配設されると共に、互いの少なくとも一部同士が所定の間隔をおいて対向する複数の主端子、
前記複数の主端子を固定する樹脂ライン、
前記複数の主端子の前記間隔を置いた部分に配設され前記複数の主端子間を絶縁する絶縁層、
一端の開口端が前記ベース板の周縁部に固着し少なくとも前記絶縁基板と前記電力用半導体チップを囲繞する樹脂製のケース、
および前記電力用半導体チップと前記主端子とを接続するボンディングワイヤ
を備えた電力用半導体装置において、
前記絶縁層を前記ケースとは別体の絶縁紙とすると共に、前記主端子と前記絶縁紙の共通する箇所に穴を形成し、前記絶縁紙と前記主端子とを前記樹脂ラインに一体的に成型固定したことを特徴とする電力用半導体装置。 Base plate,
An insulating substrate having a back main surface fixed on the first main surface of the base plate and a circuit pattern formed on the front main surface;
A plurality of power semiconductor chips fixed on the circuit pattern of the insulating substrate;
A plurality of main terminals disposed near one side of the insulating substrate and facing each other at a predetermined interval with at least a part of each other,
A resin line for fixing the plurality of main terminals;
An insulating layer disposed in the spaced apart portions of the plurality of main terminals to insulate the plurality of main terminals;
A resin case in which an opening end of one end is fixed to a peripheral portion of the base plate and surrounds at least the insulating substrate and the power semiconductor chip;
And a power semiconductor device comprising a bonding wire for connecting the power semiconductor chip and the main terminal,
The insulating layer is made of insulating paper separate from the case, and a hole is formed at a common location of the main terminal and the insulating paper, and the insulating paper and the main terminal are integrated with the resin line. A power semiconductor device characterized by being molded and fixed . ベース板、
裏主面が前記ベース板の第１主面上に固着されると共に、表主面には回路パターンが形成された第１と第２の絶縁基板、
この第１と第２の絶縁基板の夫々の前記回路パターン上に固着された複数の電力用半導体チップ、
前記第１の絶縁基板と前記第２の絶縁基板との隣接部の上部に間隔をおいて配設されると共に、互いの少なくとも一部同士が所定の間隔をおいて対向する複数の主端子、
前記複数の主端子を固定する樹脂ライン、
前記複数の主端子の前記間隔を置いた部分に配設され前記複数の主端子間を絶縁する絶縁層、
一端の開口端が前記ベース板の周縁部に固着し少なくとも前記第１と第２の絶縁基板と前記電力用半導体チップを囲繞する樹脂製のケース、
および前記電力用半導体チップと前記主端子とを接続するボンディングワイヤ
を備えた電力用半導体装置において、
前記絶縁層を前記ケースとは別体の絶縁紙とすると共に、前記主端子と前記絶縁紙の共通する箇所に穴を形成し、前記絶縁紙と前記主端子とを前記樹脂ラインに一体的に成型固定したことを特徴とする電力用半導体装置。 Base plate,
First and second insulating substrates having a back main surface fixed on the first main surface of the base plate and a circuit pattern formed on the front main surface,
A plurality of power semiconductor chips fixed on the circuit patterns of the first and second insulating substrates,
A plurality of main terminals disposed at an upper portion of adjacent portions of the first insulating substrate and the second insulating substrate at an interval, and at least a part of each of the main terminals facing each other at a predetermined interval;
A resin line for fixing the plurality of main terminals;
An insulating layer disposed in the spaced apart portions of the plurality of main terminals to insulate the plurality of main terminals;
A resin case in which an opening end of one end is fixed to a peripheral portion of the base plate and surrounds at least the first and second insulating substrates and the power semiconductor chip;
And a power semiconductor device comprising a bonding wire for connecting the power semiconductor chip and the main terminal,
The insulating layer is made of insulating paper separate from the case, and a hole is formed at a common location of the main terminal and the insulating paper, and the insulating paper and the main terminal are integrated with the resin line. A power semiconductor device characterized by being molded and fixed . 樹脂で互いに一体化された主端子と絶縁紙とからなる端子ブロックを前記ケースに着脱自在としたことを特徴とする請求項１又は２に記載の電力用半導体装置。 The power semiconductor device according to the terminal block comprising a main terminal which is integrated together with the resin and the insulating paper according to claim 1 or 2, characterized in that the detachable to the case.
JP2003300178A 2002-10-11 2003-08-25 Power semiconductor device Expired - Lifetime JP4331993B2 (en)

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DE102005016650B4 (en) * 2005-04-12 2009-11-19 Semikron Elektronik Gmbh & Co. Kg Power semiconductor module with butt soldered connection and connection elements
JP5045111B2 (en) * 2007-01-17 2012-10-10 トヨタ自動車株式会社 Semiconductor module and manufacturing method thereof
CN103262238B (en) * 2010-09-24 2016-06-22 半导体元件工业有限责任公司 Circuit arrangement
JP6451747B2 (en) 2014-11-28 2019-01-16 富士電機株式会社 Semiconductor device
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