JP4321472B2 - Control device - Google Patents

Description

  The present invention relates to a control device that controls various devices including a vehicle, and more particularly, to a control device that can rewrite the contents of control processing using a programmable device.

A control device using a programmable device FPGA (Field Programmable Gate Array) as a logic circuit is known (for example, see Patent Document 1). The FPGA needs to read the circuit data and perform configuration when the power is turned on. In the technique of Patent Document 1, when a time difference occurs in the rise of the voltage between a plurality of power supplies that are provided immediately after the power is turned on, the configuration fails while the voltage varies, and the configuration fails. In order to prevent this, the configuration data is prohibited from being transferred until the voltage is stabilized, and the configuration is executed by confirming the voltage stability and then executing the configuration.
JP 2002-176352 A

  By the way, if configuration is performed after the power supply is stabilized in this way, it takes time from power-on to completion of configuration, and it takes time for the control circuit to start. There is a problem that can not be done. For this reason, it is difficult to apply to a system that needs to be activated and controlled early.

  Then, this invention makes it a subject to provide the control apparatus which enabled control to start early after power-on, using a programmable device.

In order to solve the above-described problems, a control device according to the present invention includes a programmable device that can arbitrarily determine hardware functions, and a memory that stores configuration information of the programmable device, and information stored in the memory. In the control device that performs system control by the programmable device configured based on the configuration, the control device further includes a dedicated processing circuit capable of executing a part of the control content executed by the programmable device, and the programmable device is stored in the memory. The system control is performed by the dedicated processing circuit while the configuration information is read and the configuration is performed .

A programmable device such as an FPGA is configured when the power is turned on or restarted. While this configuration is being performed, processing required at power-on or restart is performed by a dedicated processing circuit using a microcomputer or LSI that does not require configuration.

A control circuit that compares the control output of both the programmable device and the dedicated processing circuit is compared. If the comparison results are the same, control by the programmable device is continued. If the comparison results are different, the programmable device and executes a re-configuration of, during the reconfiguration may I line system controlled by a dedicated processor.

  In the programmable device, part or all of the set configuration information may be lost for some reason. Even in such a case, a normal control output can be obtained in the dedicated processing circuit. Therefore, when the processing results of the two differ, it is determined that an abnormality has occurred in the configuration information in the program device, and the configuration information is restored by performing reconfiguration.

  A plurality of pieces of configuration information having different contents are stored in the memory, and it is preferable to further include selection means for selecting configuration information to be transferred to the programmable device.

  The programmable device functions as a processing circuit corresponding to the configuration information. In other words, it is equivalent to selecting one of a plurality of processing circuits by transferring information selected from a plurality of pieces of configuration information.

  According to the present invention, during the configuration of the programmable device, the processing can be started early without waiting for the completion of the configuration by performing the processing by the dedicated processing circuit. For this reason, the usability of the control device is improved.

  In addition, by comparing the control output of the dedicated processing circuit with the control output of the programmable device, the configuration information of the programmable device can be verified during the control processing, and the configuration information by reconfiguration during the control processing. Therefore, the accuracy of the control process can be maintained and the reliability can be improved.

  By storing multiple pieces of configuration information and selecting appropriate configuration information from among them, for example, it is possible to share memory and programmable devices between different control devices that perform the same type of control, and which configuration By changing whether information is selected, different processing circuits can be realized even if the hardware configuration is the same. For this reason, it becomes easy to change the variation of the control processing, and fine control suitable for the system can be realized at low cost.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, preferred embodiments of the invention will be described in detail with reference to the accompanying drawings. In order to facilitate the understanding of the description, the same reference numerals are given to the same components in the drawings as much as possible, and duplicate descriptions are omitted.

FIG. 1 is a block diagram of a control device according to the present invention. The control device 100 is configured with the FPGA 1 as a center, and is a control device that controls a vehicle engine or the like that includes the FPGA 1, the microcomputer 2, and the base processing IC 3 as processing circuits. The control device 100 has two types of input circuits 4A and 4B and output circuits 5A and 5B, respectively. The input circuit 4A outputs outputs from a crank angle sensor, a knock sensor, a water temperature sensor, an outside air temperature sensor, an air conditioner switch, and the like. The input signal is output to the FPGA 1 and the base processing IC 3. On the other hand, the input circuit 4B includes outputs of a water temperature sensor, an outside air temperature sensor, an air conditioner switch, etc., as well as an input circuit 4A, an air flow meter, an accelerator / throttle opening sensor, a VVT (Variable Valve Timing) sensor, an O ₂ sensor. Etc. are input, and the signal input to the microcomputer 2 is output.

  The FPGA 1 and the microcomputer 2 receive activation control from the power supply IC 6 through the battery 20. A configuration ROM 10 in which configuration information is stored is connected to the FPGA 1. Further, the DPROM 7 storing control parameters and the like is connected to the FPGA 1 and the base processing IC 3. The output signals of the FPGA 1 and the base processing IC 3 are sent to the compare IC 8 that compares the signals, and sent from the compare IC 8 to the output circuit 5A. The completion signal of FPGA 1 is input to the compare IC 8. An injector / igniter signal or the like is output from the output circuit 5A. On the other hand, the output of the microcomputer 2 is sent to the output circuit 5B. Control signals such as an electric throttle and VVT are output from the output circuit 5B.

  The microcomputer 2 and the FPGA 1 are connected by a communication bus and can transmit and receive various data. The input data common to the microcomputer 2 and the FPGA 1 (and may be common to the base processing IC 3) may be input to any of the input circuits 4A and 4B and branched to the respective circuits for output. However, it may be configured to transmit from one of the microcomputer 2 and the FPGA 1 to the other through the communication bus.

  A configuration example of the compare IC 8 is shown in FIG. The compare IC 8 receives control outputs when the same control processing (processing A ′ in the figure) is performed by the FPGA 1 and the base processing IC 3. The compare IC 8 includes a comparator 80 and a switch 81. The comparator 80 receives the completion signal of the FPGA 1 and starts operation. Then, the comparator 80 outputs whether or not the comparison result matches after the completion signal of the FPGA 1 is input, and always outputs a signal that the comparison result does not match while the completion signal is not input. Output. The switch 81 switches the output signal to the output circuit 5A between the control output of the FPGA 1 and the control output of the base processing IC 3, and outputs that the output of the comparator 80 matches, When switching to the FPGA 1 side and outputting a message indicating that they do not match, switching to the base processing IC 3 side is performed.

  Next, the operation of this control device will be described. FIG. 3 is a flowchart showing the operation of the control device. This process is executed after the power supply IC 6 detects that the vehicle is turned on.

  First, the microcomputer 2 and the configuration ROM 10 perform power-on processing of the base processing IC 3 (step S1). Next, a configuration process of reading configuration information from the configuration ROM 10 and writing it into the FPGA 1 is started (step S2). Next, a signal is input from the input circuit 4A to the base processing IC 3 (step S3), and a control output of the processing A 'is obtained in the base processing IC 3 (step S4). This process is a basic process that is required at least when the vehicle is started, and includes, for example, calculation of a basic injection amount and a basic ignition position.

  Next, it is determined whether or not the configuration of the FPGA 1 is completed (step S5). If not completed, the control circuit 3A outputs the control output of the base processing IC 3 to the output circuit 5A (step S6), and the control is performed. After the output, the process returns to step S3 so that the process by the base processing IC 3 is performed while the configuration is not completed.

  If it is determined in step S5 that the configuration has been completed, the process proceeds to step S7, and a signal is input to both the FPGA 1 and the base processing IC 3. Next, the base processing IC3 obtains the control output of the processing A ', and the FPGA 1 obtains the control output of the processing A' and the processing A (step S8). Here, the process A includes advanced control that requires relatively complicated calculation such as correction amount control among the processes that require high-speed processing such as calculation of the correction amount of the injection amount and the ignition position.

  In step S9, the control output of the FPGA 1 and the processing A 'of the base processing IC 3 is compared to determine whether or not they match. If they do not match, it is determined that there is a problem in the configuration information, the process proceeds to step S10, the control output of the base processing IC 3 is output to the output circuit 5A, and then the process returns to step S2. Run the configuration. On the other hand, if they match, the process proceeds to step S11, the control output of FPGA 1 is output, and the process returns to step S7.

  The microcomputer 2 performs a predetermined process based on an input signal to the input circuit 4B immediately after the power is turned on, and outputs a control signal to each device through the output circuit 5B. Examples of the processing contents include calculation of the intake air amount, calculation of the target throttle opening, calculation of the target VVT displacement, and the like.

  FIG. 4 exemplifies the processing contents executed by the FPGA 1, the microcomputer 2, and the base processing IC 3, respectively. In the FPGA 1, the injector and igniter control such as increase correction, ignition position correction, and idling correction are performed. These require high-speed processing and are often asynchronous processing. In the base processing IC 3, among these controls that require high-speed processing, the minimum necessary basic processing is performed in common with the FPGA 1. In contrast, the microcomputer 2 performs synchronous processing such as calculation of the intake air amount, calculation of the target throttle opening, air-fuel ratio feedback control, calculation of the target VVT displacement, and communication with other ECUs. In this way, high-speed processing and synchronous processing can be appropriately executed by properly using appropriate control circuits according to each processing.

  In addition, even after the configuration completion determination, the processing results of the FPGA 1 and the base processing IC 3 are compared to detect the occurrence of an abnormality in the configuration information in the FPGA 1 due to some cause such as noise. Therefore, this function can be omitted.

  Further, by adopting a configuration in which parameters of processing executed by the base processing IC 3 and the FPGA 1 are recorded in the DPROM 7, it becomes easy to rewrite the parameters, and it is easy to update processing contents and make changes according to the vehicle type. Become.

  The configuration ROM 10 may store several types of configuration information. By making it possible to select configuration information to be read out to the FPGA 1, the configuration information stores information suitable for each vehicle while using the common control device 100 for vehicles with different engine configurations and other configurations. By doing so, the same effect as installing a control device using a dedicated circuit for each vehicle type can be obtained. That is, the same result as that obtained by using dedicated hardware can be obtained while sharing the hardware configuration.

It is a block block diagram of the control apparatus which concerns on this invention. It is a block block diagram of the compare IC8 of the control apparatus of FIG. It is a flowchart which shows operation | movement of the control apparatus of FIG. 2 illustrates processing contents executed in each circuit of the control device in FIG.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... FPGA, 2 ... Microcomputer, 3 ... Base processing IC, 4A, 4B ... Input circuit, 5A, 5B ... Output circuit, 6 ... Power supply IC, 7 ... DPROM, 8 ... Compare IC, 10 ... Configuration ROM, 20 ... Battery, 80 ... comparator, 81 ... switch, 100 ... control device.

Claims (3)

A programmable device capable of arbitrarily determining hardware functions and a memory storing configuration information of the programmable device, and system control is performed by the programmable device configured based on the information stored in the memory In the control device,
It further comprises a dedicated processing circuit capable of executing a part of the control contents executed by the programmable device, and while the programmable device is reading the configuration information stored in the memory and performing the configuration, A control apparatus that performs system control by a dedicated processing circuit. A programmable device capable of arbitrarily determining hardware functions and a memory storing configuration information of the programmable device, and system control is performed by the programmable device configured based on the information stored in the memory In the control device,
Wherein a dedicated processing circuit capable of executing a portion of the contents of control executed on a programmable device, wherein further includes a comparator circuit for comparing the two control outputs for the common control a programmable device and said dedicated processing circuit, the comparison result If the comparison results are different, the programmable device continues to be controlled, and if the comparison results are different, the programmable device is reconfigured and system control is performed by the dedicated processing circuit during the reconfiguration. A control device characterized by that. The plurality of pieces of configuration information having different contents are stored in the memory, and further comprising selection means for selecting configuration information to be transferred to the programmable device. Control device .

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