JP4317080B2 - Device test method - Google Patents

Description

  The present invention is a device in which a large number of devices (electronic components) such as ICs can be automatically tested at one time, enabling unattended operation at night, and reducing the number of test steps for low temperature test and high temperature test. It relates to the test method.

(1): Description of Conventional Automatic Machine (Handler) FIG. 6 is an explanatory view of a conventional automatic test apparatus (automatic machine). In FIG. 6, the automatic test apparatus includes an untested part 1, a test part 2, a socket part 3, a defective box 4, and a tested part 5.

  The untested portion 1 is a place where a tray on which an untested device that has not been tested is mounted is stored. The test unit 2 is a place where a tray loaded with a device to be tested is placed. The socket part 3 is a place where a socket for connecting to a device and performing a test is provided. The defective box 4 is a box that stores defective products as a result of device testing. The tested part 5 is a place for storing a tray on which non-defective products are mounted as a result of the device test.

(2): Description of Conventional Tray FIG. 7 is an explanatory diagram of a conventional tray. In FIG. 7, ICs as devices can be loaded from NO.1 to NO.100 (100 ICs) on the tray. Further, the storage units of the untested part 1 and the tested part 5 can store up to 10 trays. Therefore, the maximum number of ICs that can be tested at one time is 1000.

(3): Description of Operation of Conventional Automatic Machine (Handler) Hereinafter, the operation of the conventional automatic machine will be described with reference to FIGS.
(1) The automatic machine conveys the tray (100 ICs) on which the IC is mounted from the untested part 1 to the test part 2.

  (2) The automatic machine moves only one IC from the tray in the test unit 2 to the socket unit 3 by hand.

  (3) The automatic machine performs an IC test at the socket part 3. If it is a non-defective product, the IC is returned to the original position of the tray in the test part 2 by hand, and if it is defective, the IC is put into the defective box 4 by hand. Put in.

  (4) The automatic machine repeats steps (2) to (3) until all the ICs mounted on the tray in the test section 2 have tested.

  (5) The automatic machine transports the tray to the tested part 5 when all the ICs mounted on the tray in the testing part 2 have been tested.

(4): Description of IC chip appearance inspection apparatus Conventionally, there is provided an IC chip appearance inspection apparatus that is free from the problems of sensory inspection such as oversight of defective chips and that can reduce the time required for appearance inspection. For this purpose, a tray moving system for moving the tray for storing the IC chip, an appearance inspection unit for inspecting the appearance of the IC chip as it is stored in the tray, and a non-defective chip according to the result of the appearance inspection. Some have a chip sorting unit that sorts non-defective chips into separate trays and a tray storage unit that stores the sorted trays (see Patent Document 1).
JP-A-5-152406

  In conducting the IC (memory etc.) test with the conventional automatic machine and the visual inspection apparatus, there are the following problems.

  (1): In the automatic machine, after the test sample is set on the tray, the test is performed in the socket part. However, since the maximum number of trays in the storage part is 10, a large number of tests (1000 or more) can be performed at a time. Since all tests were completed during the night test, the automatic machine stopped, and the operator had to frequently change the trays of untested and tested parts.

  (2): When performing the high temperature and low temperature tests, the temperature was switched for each test (one IC), so it took time to reach the set temperature and the efficiency was poor.

  The present invention solves the above-mentioned conventional problems, and up to 1000 automatic tests can be performed at a time. However, according to the present invention, more than 1000 tests can be performed and fully unattended operation at night is possible. Another object of the present invention is to enable a low temperature / high temperature test with a smaller number of test steps than before.

  FIG. 1 is an explanatory diagram of an automatic test apparatus according to the present invention. In FIG. 1, 1 is an untested part, 2 is a test part, 3 is a socket part, 4 is a defective box, 5 is a tested part, 10 is a mounting part, T is a tray, and IC is a device.

  The present invention is configured as follows to solve the above problems.

  (1): A tray T including a plurality of mounting units 10 on which test device ICs are mounted, and the mounting unit 10 can mount a plurality of test device ICs on top of each other, and only one place on the tray T. Provides a vacant mounting portion 10 on which the test device IC is not mounted, and stores the device IC that has been tested by the automatic test apparatus in the vacant mounting portion. For this reason, a plurality of device ICs can be mounted on the tray T mounting unit 10 and, in the past, up to 1000 automatic tests can be performed, and more than 1000 tests can be performed. It becomes possible.

  (2): In the device test method of (1), after all the high temperature or low temperature tests of the device IC mounted on one tray T are completed, the temperature is switched to perform the low temperature or high temperature test. For this reason, conventionally, when performing a low temperature / high temperature test, it has been carried out separately or the temperature has been switched for each measurement, so it took a huge number of test steps, but the test can be performed with fewer steps than before.

  (3): In the device test method of (1), after all the high-temperature or low-temperature tests of the device ICs mounted on all the trays T are completed, the temperature is switched to perform a low-temperature or high-temperature test. For this reason, conventionally, when performing a low temperature / high temperature test, it has been carried out separately or the temperature has been switched for each measurement, so it took a huge number of test steps, but the test can be performed with fewer steps than before.

  The present invention has the following effects.

  (1): Only one tray on which a plurality of test devices can be stacked is provided with an empty mounting portion on which no device is mounted, and the device that has been tested by an automatic test apparatus is used as the empty mounting portion. Since it is housed, it is possible to carry out 1000 or more tests that could only be performed up to 1000 automatic tests in the past, and it is possible to perform a completely unattended operation at night.

  (2): After all the high-temperature or low-temperature tests of devices mounted on one tray are completed, the temperature is switched to perform the low-temperature or high-temperature tests. However, since the temperature was switched for each measurement, it took a huge amount of test man-hours, but the test can be performed with fewer man-hours than before.

  (3): After all high-temperature or low-temperature tests for devices mounted on all trays are completed, the temperature is switched to perform low-temperature or high-temperature tests. However, since the temperature was switched for each measurement, it took a huge amount of test man-hours, but the test can be performed with fewer man-hours than before.

(1): Description of Automatic Machine (Handler) FIG. 1 is an explanatory view of an automatic test according to the present invention, and FIG. 1 (a) is an illustration of an automatic test apparatus (automatic machine). This automatic test apparatus has the same configuration as a conventional apparatus (FIG. 6). The automatic test apparatus includes an untested part 1, a test part 2, a socket part 3, a defective box 4, and a tested part 5.

  The untested portion 1 is a place where a tray on which an untested device that has not been tested is mounted is stored. The test unit 2 is a place where a tray loaded with a device to be tested is placed. The socket unit 3 is a place where a socket (one or a plurality) for connecting to a device and performing a test is provided. The defective box 4 is a box that stores defective products as a result of device testing. The tested part 5 is a place for storing a tray on which non-defective products are mounted as a result of the device test.

(2): Explanation of Tray FIG. 1 (b) is an explanation of the tray of the present invention. In FIG. 1B, on the tray T, an IC mounting portion 10 (NO.1 to NO.99) for mounting an IC as a device to be tested and an empty mounting portion in which no IC is mounted at only one place in the upper right corner. 10 is provided. Three ICs can be stacked one on the other IC mounting portion 10. Therefore, up to 297 ICs can be mounted on one tray. In addition, the storage units of the untested unit 1 and the tested unit 5 can accommodate, for example, up to 10 trays. For this reason, the maximum number of ICs that can be tested at one time is 2970 (297 × 10).

  2A and 2B are explanatory views of the IC mounting portion, FIG. 2A is a description of mounting a TSOP type IC, and FIG. 2B is a description of mounting a BGA type IC. In FIG. 2A, the IC mounting unit 10 is mounted with three TSOP (thin small outline package) type ICs. This type of IC is for surface mounting in which leads serving as input / output terminals protrude like centipede feet from the side of the package. The right side of FIG. 2A is the state before the test, and the left side is the state after the test (IC1A to IC1C are non-defective products) (upside down).

  In FIG. 2B, three ICs of BGA (ball grid arrey) type are stacked and mounted on the IC mounting unit 10. In this type of IC, solder balls serving as input / output terminals are arranged on a matrix (lattice) on the lower surface of a package. The right side of FIG. 2B is the state before the test, and the left side is the state after the test (IC1A to IC1C are non-defective products) (upside down). Thus, the type of IC is not limited.

  FIG. 3 is an explanatory diagram of the main part of the automatic test apparatus of the present invention. In FIG. 3, the main parts of an automatic test apparatus for performing an automatic test of memory include a socket part 3, a tray part 11, a handler control part 12, a handler hand part 13, a socket presser plate part 14, a memory tester control part 15, a memory A tester driver unit 16 and a memory tester comparator unit 17 are provided.

  The socket section 3 is a place where a socket for performing a test by connecting to an IC (here, a memory) that is a device for performing the test is provided. The tray unit 11 is a place where a tray on which an IC to be tested is mounted is placed. The handler control unit 12 controls the handler hand unit 13. The handler hand unit 13 moves the IC of the tray unit 11 to the socket unit 3 under the control of the handler control unit 12, and returns a normal (non-defective) IC that has been tested to the tray unit 11. The socket presser plate portion 14 is for electrically connecting an IC to be tested by moving the socket presser plate up and down. The memory tester control unit 15 controls the memory tester. The memory tester driver unit 16 drives the memory in order to test the memory that is an IC under the control of the memory tester control unit 15. The memory tester comparator unit 17 compares the result of the memory (IC) test with a set value and determines whether it is defective or non-defective.

(3): Description of operation of automatic machine The operation of the automatic machine will be described below.

  (1) The automatic machine conveys trays (297 ICs) on which ICs are mounted from untested part 1 to test part 2.

  (2) The automatic machine moves only one IC from the tray in the test unit 2 to the socket unit 3 by hand.

  (3) The automatic machine performs an IC test at the socket part 3. If it is a non-defective product, the IC is returned to the empty position of the tray in the test part 2 by hand, and if it is defective, the IC is put into the defective box 4 by hand. Put in.

  (4) The automatic machine repeats steps (2) to (3) until all the ICs mounted on the tray in the test section 2 have tested. Since three ICs are stacked and stored in one IC mounting unit and the test is performed in order from the top, the ICs of the IC mounting unit for which testing has been completed are stored by stacking them upside down. Become.

  (5) The automatic machine transports the tray to the tested part 5 when all the ICs mounted on the tray in the testing part 2 have been tested.

(Explanation of operation with drawings)
FIG. 4 is an explanatory diagram of the test sequence. The test order will be described in accordance with reference numerals S1 to S7 in FIG. In FIG. 4, the ICs of the IC mounting part are shown as being arranged on the left and right for the sake of clarity, but in actuality, they are accommodated by being stacked vertically (in the depth direction of the IC mounting part).

  S1: This is the state before the automatic machine test, and the tray has IC mounting parts No.1 (IC1A to IC1C), NO.2 (IC2A to IC2C) and the upper part where the IC to be tested is mounted. There is an empty mounting portion on which no IC is mounted.

  S2: In the automatic machine, an IC test of IC 1A of the IC mounting part No. 1 is performed in the socket part 3, and if it is a non-defective product, the IC is returned to the empty position of the tray by hand.

  S3: The automatic machine performs an IC test of IC1B of the IC mounting part No. 1 in the socket part 3, and if it is a non-defective product, returns the IC to the empty tray position by hand.

  S4: In the automatic machine, the IC 1C IC test of the IC mounting part No. 1 is performed in the socket part 3, and if it is a non-defective product, the IC is returned to the empty tray position by hand. As a result, the IC mounting portion No. 1 becomes empty.

  S5: In the automatic machine, the IC 2A IC test of IC mounting part No. 2 is performed at the socket part 3, and if it is a non-defective product, the IC is returned to the empty tray position by hand.

  S6: In the automatic machine, the IC 2B IC test of the IC mounting part No. 2 is performed in the socket part 3, and if it is a non-defective product, the IC is returned to the empty tray position by hand.

  S7: In the automatic machine, the IC 2C IC test of the IC mounting part No. 2 is performed in the socket part 3, and if it is a non-defective product, the IC is returned to the empty tray position by hand. As a result, the IC mounting part No. 2 becomes empty.

(4): Description of low-temperature and high-temperature test methods Since ICs may be used in low-temperature and high-temperature environments, low-temperature and high-temperature operation tests (for example, 0 ° C. and 70 ° C.) are performed. For this reason, the test is performed by switching the temperature of the socket portion 3 from a low temperature to a high temperature (or from a high temperature to a low temperature).

(Explanation of Test Method 1)
In Test Method 1, after all the ICs mounted on the tray of the test section 2 have completed the high temperature test, the temperature is switched to perform the low temperature test.

  (1) Transport the tray of the untested part 1 to the test part 2.

  (2) Move the IC from the tray of the test unit 2 to the socket unit 3.

  (3) Conduct the test on socket part 3.

  (4) After the test is completed in the socket unit 3, the IC is moved from the socket unit 3 to the tray of the test unit 2.

  (5) Repeat (2) to (4) above.

  (6) After all the ICs mounted on the tray of Test Unit 2 have completed the high temperature test, switch from high temperature air to low temperature air.

  (7) Repeat (2) to (5) above.

  (8) After all the ICs mounted on the tray of the test unit 2 have completed the low temperature test, move the tray to the tested unit 5.

(Explanation of Test Method 2)
FIG. 5 is an explanatory diagram of an automatic test apparatus (automatic machine). In FIG. 5, the automatic test apparatus includes an untested part 1, a test part 2, a socket part 3, a defective box 4, and a tested part 5.

  The untested portion 1 is a place where a tray on which an untested device that has not been tested is mounted is stored. The test unit 2 is a place where a tray loaded with a device to be tested is placed. The socket part 3 is a place where a socket for performing a test by being connected to a device under a high temperature blow (high temperature test) / low temperature blow (low temperature test) is provided. The defective box 4 is a box that stores defective products as a result of device testing. The tested part 5 is a place for storing a tray on which non-defective products are mounted as a result of the device test.

  (1) Transport the tray of the untested part 1 to the test part 2.

  (2) Move the IC from the tray of the test unit 2 to the socket unit 3.

  (3) Conduct a high temperature test on the socket 3.

  (4) After the test is completed in the socket unit 3, the IC is moved from the socket unit 3 to the tray of the test unit 2.

  (5) Repeat (2) to (4) above.

  (6) After all the ICs mounted on the tray of the test unit 2 have completed the low temperature test, move the tray to the tested unit 5.

  (7) Repeat items (1) to (6) until all trays in untested part 1 are used up.

  (8) Move all trays in the tested part 5 to the untested part 1.

  (9) The item (3) is changed from the high temperature test to the low temperature test, and the items (1) to (7) are repeated.

  In the above example, it has been described that three ICs are stacked and mounted on one IC mounting unit, but two or four or more ICs can be stacked and stored. However, if the number of sheets is too large, the design change of an automatic machine such as a tray becomes significant.

  As described above, according to the present invention, up to 1000 automatic tests can be performed at a time. However, according to the method of the present invention, it is possible to perform 1000 or more tests and complete unattended operation at night. Is possible. In addition, conventionally, when performing a low temperature / high temperature test, it was performed separately or the temperature was switched for each measurement, which took enormous test man-hours. The test becomes possible at about 1/2.

It is explanatory drawing of the automatic test of this invention. It is explanatory drawing of the IC mounting part of this invention. It is explanatory drawing of the principal part of the automatic test apparatus of this invention. It is explanatory drawing of the test order of this invention. It is explanatory drawing of the automatic test apparatus of this invention. It is explanatory drawing of the conventional automatic test apparatus. It is explanatory drawing of the conventional tray.

Explanation of symbols

1 Untested part 2 Tested part 3 Socket part 4 Defective box 5 Tested part 10 Mounted part IC device T tray

Claims (3)

A tray having a plurality of mounting portions on which test devices are mounted;
The mounting portion can be mounted with a plurality of test devices stacked, and only one portion of the tray is provided with an empty mounting portion on which the test device is not mounted, and the device that has been tested by an automatic test apparatus. Is stored in the empty mounting portion. 2. The device testing method according to claim 1, wherein after all the high-temperature or low-temperature tests of the devices mounted on one tray are finished, the temperature is switched to perform the low-temperature or high-temperature test. 2. The device testing method according to claim 1, wherein after all the high-temperature or low-temperature tests of the devices mounted on all trays are completed, the temperature is switched to perform the low-temperature or high-temperature test.

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