JP4313702B2 - Liquid crystal display element and driving method thereof - Google Patents

Description

  The present invention relates to a method for driving a liquid crystal display element, and more particularly to a method for driving a cholesteric liquid crystal display element in which a voltage waveform is input to a liquid crystal layer from a plurality of common electrodes and a plurality of segment electrodes that intersect with each other in an opposing state.

  A method for driving a liquid crystal display element exhibiting a cholesteric phase and having a memory property is disclosed in Japanese Patent Application Laid-Open No. 11-326871. This method is a driving method in which a voltage is applied to the liquid crystal between the electrodes where the common electrode and the segment electrode intersect to bring the liquid crystal alignment state into a focal conic state at the time of reset. Such a driving method is called a focal conic reset method (FCR method).

  In the focal conic reset method, a selection period in which a selection signal voltage is applied and a non-selection signal voltage are sequentially applied to a reset period in which all pixels are in a focal conic state, and a common electrode from the first row to the last row. A rewriting period including a sustain period, and a display period for maintaining a display state in which a display sustain signal is applied to all pixels thereafter.

  According to this focal conic reset method, the shape (substantially S-shaped) of the characteristic curve of the pulse voltage-luminous reflectance characteristic does not change (without collapse) regardless of the rewriting time, that is, the planar state and the focal state. The first row and the last row in the conic state have almost the same reflectivity, a constant contrast display is obtained, and a uniform display can be obtained over the entire display area of the panel. It has the characteristic.

  Japanese Patent Application Laid-Open No. 11-326871 provides a reset period in which all the pixels are in a planar state, a reset period in which all the pixels are in a planar state, a selection period in which a selection signal voltage is applied, and a non-selection signal voltage. A method for driving a liquid crystal display element having three periods, i.e., a non-selection period in which is applied, is disclosed. In addition, it is described that gradation display can be performed by applying a pulse voltage in a transition region between a planar state and a focal conic state in a selection period.

This driving method is called a planar reset method because all pixels are brought into a planar state at the time of reset. Compared with the focal conic method, the planar reset method has a liquid crystal alignment state where the distance between the electrodes (cell gap) is large or small on the entire display surface, or the surface of the liquid crystal alignment film on the entire display surface. From the viewpoint of manufacturing a liquid crystal display device, it is practically advantageous because it is not easily affected by the local unevenness of the display surface of the state and can easily obtain a uniform display.
JP 11-326871 A JP 11-344961 A

The focal conic reset method described above has the following problems.
(1) FIG. 1 is an example of a pulse voltage-luminous reflectance characteristic by a focal conic reset method of a cholesteric liquid crystal display element. FIG. 3 shows the result of examining the influence of the pulse voltage on the reflectivity of the cholesteric liquid crystal display element by applying the pulse voltage (selective waveform) shown in FIG. 2 between the electrodes after the focal conic reset. The pulse width t in FIG. 2 relates to the length of the selection waveform output to the common electrode, that is, the rewriting speed of one common electrode. In order to understand the meaning of the pulse voltage in FIG. 2, FIG. 3 shows an example of a voltage waveform applied to the common electrode and the segment electrode. A composite waveform which is a difference between a voltage waveform applied to the common electrode and a voltage waveform applied to the segment electrode is a voltage waveform applied between both electrodes of the liquid crystal display element. The pulse voltage in FIG. 2 indicates a selection waveform that is a combined waveform.

  FIG. 4 shows the timing of the pulse voltage in which the selected waveform and the non-selected waveform are applied to the nth common electrode.

  According to FIGS. 3 and 4, one common electrode is selected as a common selection electrode, the other common electrode is selected as a common non-selection electrode, a common selection signal is applied to the common selection electrode, and at the same time, a common non-selection electrode is selected as a common non-selection electrode. A selection signal is applied, a data signal is applied to the segment electrode in synchronization with the common selection signal, and a selection signal consisting of the difference between the common selection signal and the data signal is applied to the liquid crystal constituting the pixel on the common selection electrode for display. The state is selected, and a rewrite operation is performed in which a non-select signal consisting of the difference between the common non-select signal and the data signal is applied to the liquid crystal constituting the pixel on the common non-select electrode, and then the next common electrode is set to the common select electrode. A rewrite operation is performed by selecting and the display state of the liquid crystal constituting all the pixels is rewritten by repeating this rewrite operation.

  In order to increase the rewriting speed, it is necessary to increase the pulse voltage in FIG. When driving using a general-purpose STN (Super Twisted Nematic) driver, the value is about 45V even for a high withstand voltage. In order to obtain a high-contrast and easy-to-see display with high reflectivity in the planar alignment state below this voltage, it is necessary to set the pulse width t (selection period) to 3 msec or more, and the rewrite speed is slow. Had. Further, in order to manufacture a dedicated driver capable of outputting a high drive voltage, a high-voltage dedicated drive IC chip is required to drive the liquid crystal display element, which has been a factor in increasing the cost of the liquid crystal display device.

(2) Further, when the rewriting speed is increased, the rising slope of the curve in FIG. 1 becomes gentle, and it is necessary to increase the non-selection voltage. When the non-selection voltage is increased, even if a planar alignment state with a high reflectance is obtained, the reflectance is impaired by the subsequent application of the non-selection voltage. Considering this, the pulse width t must be 3 msec or more.

(3) The shorter the pulse width t, the easier the curve shown in FIG. 1 changes with temperature. When an actual liquid crystal display element is considered, it is necessary to finely perform temperature compensation.

(4) FIG. 5 shows waveforms for performing gradation display by the STN driver. The selection waveform and non-selection waveform output to the common electrode are the same as the waveforms shown in FIG. 3, but the waveform for gradation is increased to the waveform output to the segment electrode. The waveform for gradation is a form in which the data waveform X and the data waveform Y are mixed, and the reflectance of gradation display is controlled by this mixing ratio.

  In order to perform uniform gradation display on the entire display area of the panel, it is necessary to maintain the uniformity of the inter-electrode distance (cell gap) of the panel and the uniformity of the surface state of the alignment film. , It has been very difficult to make the entire surface of a large panel with a large number of pixels, such as electronic paper, uniform.

  FIG. 6 is an example of a pulse voltage-luminous reflectance characteristic by a planar reset method of a cholesteric liquid crystal display element. 2 shows the result of examining the influence of the pulse voltage on the reflectance of the cholesteric liquid crystal display element by applying the pulse voltage shown in FIG. 2 after the planar reset. As described above, the pulse width t in FIG. 2 relates to the length of the selected waveform output to the common electrode, that is, the rewriting speed of one common electrode.

  From FIG. 6, it becomes difficult to obtain a complete (low reflectivity) focal conic orientation as the rewriting speed is increased. In addition, it becomes difficult to obtain a display with good contrast. In order to eliminate this problem and obtain a display with no sense of incongruity, the rewriting speed per common electrode needs to be 10 msec or more.

  If the manufacturing parameters of the liquid crystal display element such as the type of liquid crystal material, cell gap and alignment film are determined, the reflectivity in the planar state is almost constant, and thus the reflectivity in the focal conic state increases (the characteristic curve in FIG. 6). That the bottom of the screen rises) means that the difference in reflectance between the planar reflection state and the focal conic transmission state is reduced, and the display contrast is reduced. When the difference in reflectance is small, there is a technical problem that it is difficult to realize so-called high gradation display with a large number of gradations.

  On the other hand, in the planar reset method, in the liquid crystal display element in which the number of common electrodes is increased (the number of display pixels is increased) when the period t of the pulse voltage of the selection signal voltage is reduced and the rewriting time is reduced (the rewriting speed is increased). For the pixels near the end of the common electrode, as shown in FIG. 6, the shape of the characteristic curve of the pulse voltage-luminous reflectance characteristic is lost without being maintained, and the reflectance in the focal conic state is increased. It has been found that there is a problem that display unevenness occurs.

An object of the present invention is to provide a driving method in which display unevenness does not occur even when the rewriting speed is increased.
Another object of the present invention is to provide a driving method that enables uniform gradation display with good contrast on the entire surface.

  Still another object of the present invention is to provide a liquid crystal display element suitable for the above driving method.

A first aspect of the present invention is provided in a direction orthogonal to the direction of the common electrode group on a common electrode group provided on the surface of the glass substrate and on the other glass substrate surface arranged to face the glass substrate. A segmented electrode group and a liquid crystal exhibiting a cholesteric phase interposed between the common electrode group and the segmented electrode group, so that a pixel is formed in a matrix, and when no voltage is applied to the pixel, a planar state or a focal conic state For a liquid crystal display element in which a display state consisting of the intermediate states is maintained by the liquid crystal memory property, a voltage is applied to the pixel in a plurality of periods depending on a difference in voltage applied to the common electrode and the segment electrode. the method of driving a liquid crystal display device to be applied, the plurality of periods, a common reset signal to all of the common electrodes, all Applying a data reset signal to the segment electrodes, applying a reset signal consisting of the difference between these signals to the liquid crystals that make up all the pixels, and selecting a common electrode for the common period. Select an electrode, select another common electrode as a common non-selection electrode, apply a common selection signal to the common selection electrode, simultaneously apply a common non-selection signal to the common non-selection electrode, and synchronize with the common selection signal to segment electrodes A data signal is applied to the liquid crystal, a selection signal comprising the difference between the common selection signal and the data signal is applied to the liquid crystal constituting the pixel on the common selection electrode to select the display state, and the common non-selection signal and the data signal A rewrite operation is performed by applying a non-selection signal consisting of the difference to the liquid crystal composing the pixel on the common non-selection electrode, and then selecting the next common electrode as a common selection. The rewriting operation is performed by selecting the electrodes, and the rewriting operation is repeated to rewrite the display state of the liquid crystal constituting all the pixels, and after the rewriting period, the second common is applied to all the common electrodes. By applying the second data signal to all the segment electrodes, the second non-selected signal consisting of the difference between the second common non-selected signal and the second data signal is applied to all the segment electrodes. It is characterized by comprising a whole surface batch non-selection period in which all pixels are maintained in a non-selected state by being applied to the liquid crystal constituting the pixels.

  The present invention employs rewriting by the planar reset method. Rewriting by the planar reset method is less affected by the distance between the electrodes of the panel (cell gap) and the surface state of the alignment film compared to the focal conic method, and even if there is some unevenness in the display area, There is an advantage that uniform gradation display can be obtained. However, when the display capacity is increased, that is, when the number of common electrodes and the number of segment electrodes is increased, the display characteristics of reflectivity-applied voltage differ depending on the position of the common electrode row, thereby causing display unevenness. In particular, this display unevenness occurs remarkably during high-speed rewriting.

  Further, when the planar reset is performed, it is not necessary to strictly control the characteristics of the liquid crystal display element such as liquid crystal alignment control and gap variation between substrates.

  Further, according to the present invention, since the whole-surface batch non-selection maintaining period is provided, the display characteristics are the same for all pixels, and display unevenness is eliminated. Thereby, a liquid crystal having display uniformity and high-speed rewritability can be easily obtained.

  It is preferable that the entire surface non-selection maintaining period is 5 to 200 msec. 5 msec or less is not sufficient. In addition, at 200 msec or more, the rewriting speed is affected. For example, if the display has 320 common electrodes, a typical example is derived by the following calculation formula.

20 msec (planar reset period: 50 Hz 1 cycle) + 2 msec (common selection waveform length) x 320 (500 Hz 320 cycles)
+ Xmsec = 20 + 640 + xmsec (0.88 seconds)
x = 200 msec 660 msec becomes 880 msec
500 msec 660 msec becomes 1160 msec Practically, a rewrite time of about 1 second or less is required, but the present invention can realize this.

  The second non-selection signal and the non-selection signal are both voltage pulses, and the maximum voltage of the second non-selection signal is greater than 0V and not more than twice the maximum voltage of the non-selection signal. preferable. If the voltage of the second non-selection signal is 0V, there is no effect. In addition, when the number of non-selection signals is twice or more, the reflectance of a pixel in a planar state is lowered. That is, since the reflectance is lowered in both the planar state and the focal state, both brightness and contrast are lowered, which is not preferable.

  Alternatively, both the second non-selection signal and the non-selection signal are voltage pulses, and the minimum voltage of the second non-selection signal is less than 0V and is twice or more the minimum voltage of the non-selection signal. It is preferable.

  Alternatively, it is preferable that both the second non-selection signal and the non-selection signal are voltage pulses, and the maximum voltage value and the minimum voltage value thereof are the same.

  If the second non-selected voltage and the voltage of the non-selected signal are not the same, a new voltage changeover switch is required. By using the same voltage, the changeover switch mechanism can be omitted.

  Preferably, the second non-selection signal and the non-selection signal are both voltage pulses, and the frequency of the second non-selection signal is not less than the frequency of the non-selection signal and not more than 5 Hz. If the second non-selection signal is smaller than the frequency of the non-selection signal, the current consumption increases, which is not desirable. Above 5 Hz, the full-surface batch non-selection period becomes longer (more than 200 msec) and the rewriting time becomes longer.

  It is preferable that the selection signal in the rewriting period is a voltage pulse, and one period thereof is 0.5 to 5 msec. When one cycle of the selection signal is 0.5 msec or less (2000 Hz or more), even if the entire surface non-selection period is provided, the effect is incomplete and the display has a low contrast. Further, if it exceeds 5 msec (200 Hz), it takes a long time to rewrite the entire display pixel, which is not preferable for practical use. For example, in a display with 320 common electrodes, 5 msec × 320 = 1.6 seconds.

  In the reset period, a reset signal for setting all the pixels in the planar state is a voltage pulse (high voltage pulse) of 30 V or more, and a selection signal for setting the pixels in the focal conic state is a voltage pulse of 7 to 15 V in the rewriting period. Preferably, the selection signal for setting the pixel to the planar state is a voltage pulse (medium voltage pulse) within a range of 16 to 28V. Further, 2 × (low voltage pulse) −5 ≦ (medium voltage pulse) ≦ 2 × (low voltage pulse) is preferable.

  This range is a preferable condition for realizing uniform display over the entire display area while maintaining the high-speed rewriting state.

  The second aspect of the present invention is a liquid crystal display device. The present invention includes a common electrode group provided on a glass substrate surface, and a segment electrode group provided on the other glass substrate surface opposite to the glass substrate in a direction orthogonal to the direction of the common electrode group; A pixel is formed in a matrix by a liquid crystal exhibiting a cholesteric phase interposed between the common electrode group and the segment electrode group, and when no voltage is applied to the pixel, a planar state, a focal conic state, or an intermediate therebetween A liquid crystal display element in which a display state composed of states is maintained by a liquid crystal memory property, a common driver that outputs a common reset signal, a common selection signal, and a common non-selection signal to a common electrode group of the liquid crystal display element; and the segment electrode A segment driver for outputting a data reset signal and a data signal to the group; A cholesteric liquid crystal display device comprising a driver and a controller for controlling a segment driver, wherein the controller controls the common driver and the segment driver to apply a voltage to the pixels of the liquid crystal display element by the driving method. It is characterized by. The liquid crystal display element preferably has a polyimide-based vertical alignment film formed on the electrode group.

  In the case of a horizontal alignment film, it takes several seconds to several tens of seconds after the voltage waveform is applied until the appearance (reflectance) becomes constant. In addition, the condition setting range for gradation display is very narrow, and it is difficult to display fine gradations. In addition, the viewing angle is narrow. On the other hand, such a problem does not occur in the case of the vertical alignment film.

  The distance between the common electrode group and the segment electrode group is preferably 3.5 to 6 μm. If the thickness is less than 3.5 μm, the thickness of the liquid crystal layer is reduced, and reflection due to Bragg diffraction is not sufficient, so that the reflectivity in the planar state is reduced and the contrast is lowered. If it exceeds 6 μm, white turbidity of the display becomes remarkable in the focal conic state. Moreover, since the drive voltage exceeds 45V, it is not preferable for low voltage drive.

  According to the present invention, display with no display unevenness can be performed by the driving method in which the entire surface non-selection period is provided after the rewriting period, and further, uniform gradation display with good contrast can be performed on the entire surface. In addition, according to the liquid crystal display device of the present invention, in particular, when displaying a large area and high definition, uniform gradation display can be realized even if rewriting is performed in a short time.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 7 is a schematic diagram showing a configuration of a cholesteric liquid crystal display device to which the present invention is applied. The cholesteric liquid crystal display device includes a cholesteric liquid crystal display element 10 that performs matrix driving with a plurality of common electrodes COM1, COM2,... And a plurality of segment electrodes SEG1, SEG2,. And a mechanism for writing display contents by the method. This mechanism includes a common driver 12, a segment driver 14, a controller 16, and a power source 18.

  The common electrode of the cholesteric liquid crystal display element 10 is connected to the output terminal of the common driver 12, and the segment electrode is connected to the output terminal of the segment driver 14. Based on the data provided from the controller 16, voltages are applied from the common driver 12 to the common electrodes COM1, COM2,... And from the segment driver 14 to the segment electrodes SEG1, SEG2,. The voltage difference is applied to the pixels of the liquid crystal display element 10.

  FIG. 8 is a schematic view of the cholesteric liquid crystal display element 10 of the present invention.

In FIG. 8, as the substrate 1, quartz glass, aluminosilicate glass, alumina borosilicate glass, alkali-free glass, soda lime glass on which an alkali ion elution preventing film such as SiO ₂ film is formed, or polyether sulfone , A plastic film such as polyethylene terephthalate, or a plastic substrate such as polycarbonate.

  An electrode 2, an electrical insulating film 3 and an alignment film 4 are laminated on the substrate 1 in this order, and the electrode 2 is patterned into a plurality of linear electrodes to form a transparent substrate. Such two transparent substrates are bonded together with the main seal 5 so that the electrodes intersect, and the cholesteric liquid crystal 6 is sealed in a space partitioned by the main seal.

Here, ITO (Indium Tin Oxide) is suitable as the electrode 2, but other conductive metal oxides such as SnO ₂ and conductive materials such as conductive resins such as polypyrrole and polyanine may be used.

The electrical insulating film 3 is preferably made of an insulating material such as SiO ₂ or TiO ₂ . The electrical insulating film 3 is provided in order to prevent a short circuit between the opposing electrodes, and is not necessarily required.

  As the alignment film 4, a vertical alignment film is used. A polyimide resin is preferred, but silicon-containing, fluorine-containing, and nitrogen-containing surface modifiers and resins may be used. Examples include SE-1211, SE-7511L, and RN-1517 manufactured by Nissan Chemical Industries, and AY43-021 manufactured by Toray Dow Corning Silicone.

  The cholesteric liquid crystal 6 is preferably composed of a nematic liquid crystal having positive dielectric anisotropy and 10 to 50% by weight of a chiral agent. The nematic liquid crystal to be used is not particularly limited, and examples thereof include cyanobiphenyl type, phenylcyclohexyl type, phenylbenzoate type, cyclohexylbenzoate type, and tolan type liquid crystal. The cholesteric liquid crystal may be dispersed in a polymer matrix or encapsulated. The selective reflection wavelength of the cholesteric liquid crystal may be not only in the visible range but also in the infrared range.

  A light absorption film 7 may be formed on the side opposite to the observation side. The color of the light absorbing film is not particularly limited, but black or blue is preferred.

  In order to protect the liquid crystal from UV degradation, a plastic plate having a UV cut function may be placed on the observation side surface. Further, an optical film having an antireflection function and an antiglare function may be attached.

  A feature of the liquid crystal display element of this embodiment is that a polyimide-based vertical alignment film is formed on the electrode group. In the case of a vertical alignment film, it takes several seconds to several tens of seconds after the voltage waveform is applied until the appearance (reflectance) becomes constant, as in the case of a horizontal alignment film. There is no problem that the range of condition setting is very narrow, fine gradation display is difficult, and the viewing angle is narrow.

  The electrodes 2 facing each other across the cholesteric liquid crystal are a common electrode group and a segment electrode group, and the distance between the common electrode group and the segment electrode group is preferably 3.5 to 6 μm. This is because when the thickness is less than 3.5 μm, the thickness of the liquid crystal layer is reduced, and reflection due to Bragg diffraction is not sufficient. Therefore, the reflectivity in the planar state is reduced, and the contrast is lowered. This is because the display becomes clouded.

  As the cholesteric liquid crystal display element 10, a liquid crystal mixed with 0.25 g of Merck nematic liquid crystal MDA-02-1174 and 0.75 g of Merck cholesteric liquid crystal MDA-03-162 is used. The cholesteric liquid crystal display element shown was produced. The thickness of the liquid crystal layer is 4.5 μm. The alignment film 4 in FIG. 8 is a vertical alignment film. Moreover, blue printing was performed on the surface opposite to the observation surface.

  9 was sequentially applied to the obtained liquid crystal display element (number of common electrodes 640, number of segment electrodes 480), assuming actual matrix driving, and the luminous reflectance of the display pixel area was measured. . FIG. 9 shows voltage waveforms applied to the common electrode column and the segment electrode column of the liquid crystal display element of 4 rows × 3 columns in order to simplify the drawing. FIG. 10 shows an example of a composite waveform applied between the electrodes.

  In the reset period, a common reset signal is applied to all the common electrodes, a data reset signal is applied to all the segment electrodes, and a reset signal consisting of the difference between these signals is applied to the liquid crystals constituting all the pixels, Reset all pixels to the planar state.

  During the rewrite period, select one common electrode as the common selection electrode, select the other common electrode as the common non-selection electrode, apply the common selection signal to the common selection electrode, and simultaneously apply the common non-selection signal to the common non-selection electrode Then, a data signal is applied to the segment electrode in synchronization with the common selection signal, and a display signal is selected by applying a selection signal consisting of the difference between the common selection signal and the data signal to the liquid crystal constituting the pixel on the common selection electrode. In addition, a rewrite operation is performed in which a non-select signal consisting of the difference between the common non-select signal and the data signal is applied to the liquid crystal constituting the pixel on the common non-select signal, and then the next common electrode is selected as the common select electrode. By performing the operation and repeating the rewriting operation, the display state of the liquid crystal constituting all the pixels is rewritten.

  During the entire surface non-selection period, the second common non-selection signal is applied to all the common electrodes and the second data signal is applied to all the segment electrodes, and the second non-selection signal formed by the difference between these signals is applied. Is applied to the liquid crystals constituting all the pixels, and all the pixels are maintained in a non-selected state.

  In the above driving method, the following driving conditions were set for the voltage waveforms shown in FIG.

Planar reset condition: 35V, 20msec (50Hz) 1 cycle Rewrite condition:
The frequency of the applied voltage waveform is 500 Hz, 640 cycles The voltage setting is: 12 V for focal conic (corresponding to V2)
For planar: 23V (equivalent to V0)
Unselected waveform: 5.5V (equivalent to (V0-V2) / 2)
Whole surface non-selection condition: 5.5 V, 100 Hz, variable from 0 to 30 cycles (0 to 300 msec) The voltage of the non-selection signal in the rewriting period and the second non-selection signal in the whole surface non-selection period is the same 5.5 V It is said.

  FIG. 11 and FIG. 12 show the relationship between the application time of the whole surface non-selection waveform after the rewriting period and the optical characteristics of the pixels in the vicinity of the 640th common electrode of the liquid crystal display element. FIG. 11 shows luminous reflectance, and FIG. 12 shows contrast.

If the whole surface batch non-selection period after the selection waveform is applied becomes long,
-The reflectivity of the planar is 19% and hardly changes.
・ Focal conic reflectivity decreases. The saturation value is 6.3%.
-As a result, contrast is improved.
When trying to perform 16 gradations, when one gradation display is performed, the variation in the reflectance of the entire display area is
(Planar reflectivity-focal conic reflectivity) / (16-1)
In the case of this panel,
6.3+ (19-6.3) /15=7.1 (%)
Therefore, the reflectance of the focal conic must be suppressed to 7.1% or less.

  The voltage waveform shown in FIG. FIG. 13 shows the result of investigating the relationship between and the focal conic reflectance. The time (msec) in the figure indicates the application time of the whole surface non-selection voltage applied after the selection waveform is applied to the last COM electrode (COM 640) (0 msec is a comparative example). .

  As shown in FIG. 13, the planar reflectivity can be reduced to 7.1% or less by applying the whole surface non-selection waveform for about 10 msec after the selection waveform is applied. That is, it can be said that uniform gradation display can be obtained over the entire display area by adding the entire surface non-selection voltage of 10 msec.

  In the present embodiment, when an actual liquid crystal display device using an STN driver IC as a common driver and a segment driver is considered, the voltage changeover switch 20 shown in FIG. 14 is provided between the planar reset period and the rewrite period, and the reset is performed. It is preferable to switch the maximum voltage of the voltage pulse applied between the period and the rewriting period. In FIG. 14, the planar reset side voltage is set to 35V, and the rewrite side voltage is set to 23V. When V0 = 23V, the resistors R1, R2, R3, R4, and R5 are set so that V1 = 17.5V, V2 = 12V, V3 = 11V, V4 = 5.5V, and V5 = 0V. Both the common driver and the segment driver using the STN driver IC can output four-level voltages including 0V. For the planar reset, the output on both the common side and the segment side is only two levels of V0 and V5.

  The voltage changeover switch 20 is controlled by the controller 16 shown in FIG.

  In this embodiment, the voltage of the non-selection signal in the rewrite period and the voltage of the second non-selection signal in the entire batch non-selection period is set to 5.5V. The characteristics do not deteriorate. If there is a similar effect, the voltage, frequency, input timing, etc. of the second non-selection signal are not limited.

  For example, with respect to the voltage, the maximum voltage of the second non-selection signal is greater than 0 V, and is not more than twice the maximum voltage of the non-selection signal during the rewriting period. If this is 0 V, there is no effect of maintaining the reflectance of the focal conic pixel around the last common electrode where rewriting is completed, and if it exceeds twice the maximum voltage of the non-selection signal during the rewriting period. This is because the reflectance of a pixel that is in a planar state upon application of a selection signal is reduced. In this way, when the voltage of the second non-selection signal during the entire surface non-selection period is set to a different value from the voltage of the non-selection signal during the rewriting period, the voltage changeover switch as shown in FIG. 22 may be provided. Of course, the voltage changeover switch shown in FIG. 15 may be provided to output the second non-selection signal by setting the voltage for the planar reset.

  The voltage changeover switch 22 is controlled by the controller 16 shown in FIG.

  In addition, a 0V section may be provided between the rewriting period and the entire batch non-selection period, or the second and third full batch non-selection periods may be provided after the entire batch non-selection period ends. .

  In this embodiment, the planar reset is performed with a voltage waveform of 35 V and 50 Hz. However, if the entire display area can be reset to the planar state, waveforms such as voltage and frequency are not limited. A 0V section may be provided in the reset period.

  As the cholesteric liquid crystal display element 10, 0.7 g of nematic liquid crystal RPD-84202 made by Dainippon Ink and Chemicals, 0.2 g of Merck's chiral agent CB-15, and 0.1 g of Asahi Denka Kogyo's chiral agent A cholesteric liquid crystal display element shown in FIG. 8 was prepared using a cholesteric liquid crystal obtained by mixing CNL-617R. The thickness of the liquid crystal layer is 4.5 μm. The alignment film 4 in FIG. 8 is a vertical alignment film. Moreover, black printing was performed on the surface opposite to the observation surface.

  A pulse voltage having the voltage waveform shown in FIG. 16 was applied to the obtained liquid crystal display element having 640 common electrodes and segment electrodes (arbitrary number), and the luminous reflectance of the display area was measured. The driving conditions are as follows.

Planar reset condition: 33V, 10msec (100HZ) waveform for 2 cycles Rewrite condition:
The frequency of the applied voltage waveform is 500 Hz (the common selection signal corresponds to a length of 2 msec).
Non-selected waveform: 5.0V (equivalent to (V0-V2) / 2)
Whole surface non-selection condition: 5.5V, 100Hz for 10 cycles (10msec)
For comparison, FIG. 16 also shows a voltage waveform without a full-surface batch non-selection period.

  FIG. 17 shows the pulse voltage corresponding to the selection period in FIG. 16 and the optical characteristics of the pixel in the vicinity of the 640th common electrode of the liquid crystal display element. It can be seen that by providing the whole surface non-selection period, the planar reflectance is not changed, but the reflectance in the focal conic state (the valley portion in the characteristic curve) is maintained in a low state. In other words, it was possible to obtain a display with good contrast by providing a whole surface non-selection period.

  The voltage pulse shown in FIG. 18 was applied to the same liquid crystal display element as in Example 3, and the luminous reflectance of the display area was measured. The results are shown in FIG. By adding a whole surface non-selection period after the end of the rewriting period, there is almost no difference in optical characteristics between the periphery of the common electrode (COM1) where the rewriting starts and the common electrode (COM640) where the rewriting ends. Recognize. That is, the display pixel region where the rewrite operation is started and the display pixel region just before the rewrite operation are finished have substantially the same reflectivity in both the planar state and the focal conic state, and therefore the display characteristics are constant. Display without display unevenness was obtained by high-speed rewriting.

  In this embodiment, when an actual liquid crystal display device using an STN driver IC is taken into consideration, the voltage changeover switch 22 shown in FIG. 15 is provided between the planar reset period, the rewrite period, and the entire non-selection period. Is good. In FIG. 15, the planar reset period voltage is 33V, and the rewrite period voltage is preferably 20 to 24V. The voltage in the whole surface non-selection period is 1.1 times the voltage in the rewriting period. In FIG. 15, the voltage of the rewriting period is V0, and resistors R1, R1 are set so that V1 = V0-5 (V), V2 = V0-10 (V), V3 = 10V, V4 = 5V, V5 = 0V. By setting R2, R3, R4, and R5, driving with the voltage waveform shown in FIG. 18 is possible.

  The voltage waveforms shown in FIGS. 20 and 21 were applied to the liquid crystal display device manufactured in Example 3 to perform gradation display, and the luminous reflectance was measured. FIG. 21 is an enlarged view of the selection signal shown in FIG. 20, and shows the waveform of each selection signal that achieves gradation 1 to gradation 16. FIG. In the waveform of FIG. 21, by changing the ratio of the periods p and q, the planar orientation (p = 1, q = 0), the focal conic orientation (p = 0, q = 1), and any intermediate state thereof are created. It was.

  In the present embodiment, in consideration of 16 gradation fine display, a total of 16 types of selection signals obtained by dividing the reflectivity in the planar state and the reflectivity in the focal conic state in the vicinity of the common electrode COM1 where the rewrite operation is started. The luminous reflectance was measured for these pixels and for the pixels in the vicinity of the common electrode COM 640 where the rewriting operation is nearing the end. Table 1 shows the case of providing the entire surface non-selection period of the present invention and the prior art not providing it.

  The measurement results are shown in Table 1.

  As shown in Table 1, if the entire surface non-selection period is not provided, the optical characteristics are significantly different between COM1 and COM640, particularly on the side where the gradation level is close to the focal state (in transmission mode), and the gradation display is large. On the other hand, in the example of the present invention in which the entire surface non-selection period is provided, it is found that the total number of the first to 640th common electrodes is 0.5% or less and there is almost no difference.

If the reflectivity of the planar is 18.8% and the saturation value of the reflectivity of the focal conic is 3.6%, if 16 gradations are to be performed, the reflection of the entire display area when one gradation display is performed. Rate variation,
(Planar reflectivity-focal conic reflectivity) / (16-1)
= (18.8-3.6) / 15≈1 (%)
It is necessary to keep within. As shown in Table 1, it can be seen that by providing the entire surface non-selection period, the difference between the gradations COM1 and COM640 is suppressed to within 1%, and uniform gradation display can be performed for the entire display pixel. That is, it can be seen that high gradation display without display unevenness can be obtained by the embodiment.

It is a figure which shows an example of the pulse voltage-luminous reflectance characteristic by a focal conic reset method of a cholesteric liquid crystal display element. It is a figure which shows a selection waveform. It is a figure which shows an example of the voltage waveform applied to a common electrode and a segment electrode. It is a figure which shows the timing when a selection waveform and a non-selection waveform are applied to n common electrodes. It is a figure which shows the waveform for performing a gradation display with a STN driver. It is a figure which shows an example of the pulse voltage-luminous reflectance characteristic by a planar reset method of a cholesteric liquid crystal display element. It is the schematic which shows the structure of the cholesteric liquid crystal display device with which this invention is applied. It is the schematic of the cholesteric liquid crystal display element of this invention. It is a figure which shows the voltage waveform applied to the common electrode row | line | column and segment electrode row | line | column of a liquid crystal display element of 4 rows x 3 columns. It is a figure which shows the synthetic | combination waveform applied between electrodes. It is a figure which shows the reflectance of the pixel near the 640th common electrode of a liquid crystal display element, and the time which applied the whole surface non-selection waveform after the selection waveform was applied. It is a figure which shows the contrast of the pixel near the 640th common electrode of a liquid crystal display element, and the time which applied the whole surface non-selection waveform after the selection waveform was applied. The voltage waveform shown in FIG. It is a figure which shows the result of having investigated the relationship between a focal conic reflectance. It is a figure which shows a voltage switch. It is a figure which shows a voltage switch. It is a figure which shows a voltage waveform. FIG. 17 is a diagram illustrating a pulse voltage corresponding to the selection period of FIG. 16 and optical characteristics of a pixel near the 640th common electrode of the liquid crystal display element. It is a figure which shows a voltage waveform. It is a figure which shows the result of having applied the voltage pulse shown in FIG. 18, and measuring the luminous reflectance of a display area. It is a figure which shows a voltage waveform. It is a figure which shows the waveform of the selection signal for gradations.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Board | substrate 2 Electrode 3 Electrical insulation film 4 Orientation film 5 Main seal 6 Cholesteric liquid crystal 10 Cholesteric liquid crystal display element 12 Common driver 14 Segment driver 16 Controller 18 Power supply 20, 22 Changeover switch

Claims (15)

A common electrode group provided on the surface of the glass substrate, a segment electrode group provided on a surface of the other glass substrate opposed to the glass substrate in a direction orthogonal to the direction of the common electrode group, and the common electrode A display comprising a planar state, a focal conic state, or an intermediate state thereof when a pixel is configured in a matrix by a liquid crystal exhibiting a cholesteric phase interposed between a group and a segment electrode group, and no voltage is applied to the pixel A liquid crystal display element driving method in which a voltage is applied to the pixel in a plurality of periods depending on a difference in voltage applied to the common electrode and the segment electrode with respect to a liquid crystal display element whose state is maintained by liquid crystal memory characteristics. And the plurality of periods are:
A common reset signal is applied to all common electrodes, a data reset signal is applied to all segment electrodes, and a reset signal consisting of the difference between these signals is applied to the liquid crystal constituting all pixels, so that all pixels are in a planar state. Reset period to
Select a common electrode as a common selection electrode, select another common electrode as a common non-selection electrode, apply a common selection signal to the common selection electrode, and simultaneously apply a common non-selection signal to the common non-selection electrode, A data signal is applied to the segment electrode in synchronization with the signal, a selection signal consisting of the difference between the common selection signal and the data signal is applied to the liquid crystal constituting the pixel on the common selection electrode, and the display state is selected, and the common is not selected. A rewrite operation is performed by applying a non-selection signal consisting of a difference between the signal and the data signal to the liquid crystal constituting the pixel on the common non-selection electrode , and then the rewrite operation is performed by selecting the next common electrode as the common selection electrode, A rewriting period for rewriting the display state of the liquid crystal constituting all the pixels by repeating this rewriting operation;
After the end of the rewriting period , the second common non-selection signal and the second common non-selection signal are applied to all the common electrodes and the second data signal is applied to all the segment electrodes. A second non-selection signal consisting of a difference from the data signal is applied to the liquid crystal constituting all the pixels, and comprises a whole-surface collective non-selection period for maintaining all the pixels in a non-selected state .
A driving method of a liquid crystal display element. The method for driving a liquid crystal display element according to claim 1, wherein the whole-surface batch non-selection period is 5 to 200 msec.   Both the second non-selection signal and the non-selection signal are voltage pulses, and the maximum voltage of the second non-selection signal is greater than 0V and less than or equal to twice the maximum voltage of the non-selection signal. The method for driving a liquid crystal display element according to claim 1 or 2.   Both the second non-selection signal and the non-selection signal are voltage pulses, and the minimum voltage of the second non-selection signal is less than 0V and is more than twice the minimum voltage of the non-selection signal. The method for driving a liquid crystal display element according to claim 1 or 2.   3. The liquid crystal display according to claim 1, wherein the second non-selection signal and the non-selection signal are both voltage pulses, and their maximum voltage value and minimum voltage value are the same. Device driving method.   2. The second non-selection signal and the non-selection signal are both voltage pulses, and the frequency of the second non-selection signal is not less than the frequency of the non-selection signal and not more than 5 Hz. The driving method of the liquid crystal display element according to any one of?   The method for driving a liquid crystal display element according to claim 1, wherein the selection signal for the rewriting period is a voltage pulse, and one period thereof is 0.5 to 5 msec. In the reset period, a reset signal for setting all pixels to a planar state is a voltage pulse (high voltage pulse) of 30 V or more,
Within the rewriting period, the selection signal for setting the pixel to the focal conic state is a voltage pulse of 7 to 15V (low voltage pulse), or the selection signal for setting the pixel to the planar state is a voltage within the range of 16 to 28V. 8. The method for driving a liquid crystal display element according to claim 1, wherein the driving method is a pulse (medium voltage pulse). A common electrode group provided on the surface of the glass substrate, a segment electrode group provided on a surface of the other glass substrate opposed to the glass substrate in a direction orthogonal to the direction of the common electrode group, and the common electrode A display having a planar state, a focal conic state, or an intermediate state thereof when a pixel is configured in a matrix by a liquid crystal exhibiting a cholesteric phase interposed between a group and a segment electrode group, and no voltage is applied to the pixel A liquid crystal display element whose state is maintained by the memory property of the liquid crystal;
A common driver that outputs a common reset signal, a common selection signal, and a common non-selection signal to the common electrode group of the liquid crystal display element;
A segment driver that outputs a data reset signal and a data signal to the segment electrode group;
A cholesteric liquid crystal display device comprising a controller for controlling the common driver and the segment driver,
The cholesteric liquid crystal display device, wherein the controller controls the common driver and the segment driver to apply a voltage to the pixels of the liquid crystal display element by the driving method according to claim 1. The common driver can output four levels of voltage including 0V,
The segment driver can output 4 levels of voltage including 0V,
The voltage switching switch for switching the maximum voltage to at least two voltage values, wherein the maximum voltage output from the common driver is the same as the maximum voltage output from the segment driver. A cholesteric liquid crystal display device as described in 1.   The cholesteric liquid crystal display device according to claim 10, wherein the controller controls the voltage changeover switch so as to change a maximum voltage of a voltage pulse applied in a reset period and a rewrite period. 12. The cholesteric liquid crystal display device according to claim 10, wherein the controller controls the voltage changeover switch so as to change a maximum voltage of a voltage pulse between the rewriting period and the entire batch non-selection period .   The cholesteric liquid crystal display device according to claim 9, wherein a polyimide-based vertical alignment film is formed on the electrode group. The cholesteric liquid crystal display device according to claim 13, wherein a distance between the common electrode group and the segment electrode group is 3.5 μm to 6 μm.   The cholesteric liquid crystal display device according to claim 13, wherein the number of common electrodes constituting the pixel is 320 or more.

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