JP4307163B2 - Manufacturing method of chip-shaped solid electrolytic capacitor - Google Patents

Manufacturing method of chip-shaped solid electrolytic capacitor Download PDF

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Publication number
JP4307163B2
JP4307163B2 JP2003186462A JP2003186462A JP4307163B2 JP 4307163 B2 JP4307163 B2 JP 4307163B2 JP 2003186462 A JP2003186462 A JP 2003186462A JP 2003186462 A JP2003186462 A JP 2003186462A JP 4307163 B2 JP4307163 B2 JP 4307163B2
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Prior art keywords
anode
resin
cathode
conductive plate
capacitor element
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JP2005019925A (en
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明博 澤井
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Nichicon Capacitor Ltd
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Nichicon Capacitor Ltd
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Description

【0001】
【発明の属する技術分野】
本発明は、タンタル、ニオブ、アルミニウム等弁作用金属を使用したコンデンサ素子を樹脂フィルムシートにて密封してなるパッケージ型固体電解コンデンサの製造方法に関するものである。
【0002】
【従来の技術】
従来、この種のチップ状固体電解コンデンサは、コンデンサ素子の陽極リードを支持する段差と、陰極の支持部を一対とする部位を複数個有する絶縁基板と、コンデンサ素子を被覆する被覆材とからなり、絶縁基板上に複数個のコンデンサ素子を導電性接着剤で接続後、トランスファーモールドで樹脂被覆して一括組立後、個々のコンデンサに分割することにより固体電解コンデンサを提供している(例えば、特許文献1参照)。
【0003】
【特許文献1】
特開平8−148386号公報(第4頁−第1図〜第3図)
【0004】
【発明が解決しようとする課題】
従来のチップ状固体電解コンデンサは、コンデンサ素子を樹脂成型にて外装するものであり、図14のように、そのパッケージ表面とコンデンサ素子間の肉厚寸法は、コンデンサ素子へのストレスを抑えるために必要な肉厚に加えて、容易に樹脂を充填させるための間隙(少なくとも0.1mm)を確保する必要があり、この分だけ固体電解コンデンサの長さL、幅W、および高さHが増大することになる。
【0005】
そして、コンデンサ素子が前後、左右、および上下に傾くことを考慮すると、さらに0.05mm程度の間隙部のマージンが必要となり、固体電解コンデンサにおける長さL、幅W、および高さHがますます増大することになるため、コンデンサ素子の体積効率が低くなり、コンデンサが大形化するという問題があった。
【0006】
【課題を解決するための手段】
本発明は、上記の問題を解決した肉薄型樹脂外装の固体電解コンデンサの製造方法を提供することを目的とするものである。
【0007】
すなわち、陽極導出リード6aを有する弁作用金属焼結体6cの外表面に陽極酸化皮膜層、固体電解質層、陰極引出層6bを形成したコンデンサ素子6と、上記陽極導出リード6aに接続される陽極導電板2a、および陰極引出層6bに接続される陰極導電板2bを絶縁樹脂10に一体形成してなる電極基板1と、上記コンデンサ素子6を外装する樹脂とからなるチップ状固体電解コンデンサの製造方法において、
前記外装樹脂がコンデンサ素子6を各々、格納する複数個の凹部8を縦横に形成し、さらに該凹部8内に、陽極部分と陰極部分とを区分する内壁7を設けた樹脂シート4で形成され、
樹脂シート4の各凹部にコンデンサ素子6をそれぞれ格納する工程と、
陽極導出リード6aの根元部分にシリコーン樹脂9を塗布し硬化させる工程と、
陽極導出リード6aと陽極導電板2aとの間、および陰極引出層6bと陰極導電板2aとの間に導電性接着剤を充填する工程と、
陽極導電板2aと陽極導出リード6aとが接続されるように、および陰極導電板2bと陰極引出層6bとが接続されるように、樹脂シート4の各凹部8に電極基板1を重ねて固着させる工程と、
樹脂シート4の下面にUV硬化シート12を固着させる工程と、
個々のチップ状固体電解コンデンサに切削する工程と
を備えたことを特徴とするチップ状固体電解コンデンサの製造方法である。
【0011】
【発明の実施の形態】
上記のように、コンデンサ素子6と、上記陽極導出リード6aに接続される陽極導電板2a、および陰極引出層6bに接続される陰極導電板2bを絶縁樹脂10に一体形成してなる電極基板1と、上記コンデンサ素子6を外装する樹脂シート4とでチップ状固体電解コンデンサを構成する。
上記の樹脂シート4は、コンデンサ素子6を収納する凹部8を有し、該凹部8内に陽極部分と陰極部分を区分する内壁7が設けられている。
上記のチップ状固体電解コンデンサは、
▲1▼凹部8を縦横に形成した樹脂シート4にコンデンサ素子6を格納する工程と、
▲2▼陽極導出リード6aの根元部分にシリコーン樹脂を塗布し硬化させる工程と、
▲3▼上記陽極導出リード6aと陽極導電板2aとの間、および陰極引出層6bと陰極導電板2bとの間に導電性接着剤5を充填する工程と、
▲4▼上記シート4の凹部8に電極基板1を重ねて固着させる工程と、
▲5▼上記樹脂シート4の下面にUV硬化シート12を固着させる工程と、
▲6▼個々のチップ状固体電解コンデンサに切削する工程により、製造される。
上記の構成により、樹脂の肉厚寸法を薄くしてもコンデンサ素子へのストレスがなくなる。
さらに、凹部を有する樹脂シートにコンデンサ素子を格納したことでコンデンサ素子が前後左右方向に傾いたとしても、樹脂シートの凹部の内面から外表面に到る肉厚分だけ、外装樹脂の肉厚を常に維持することができるため、従来のようにコンデンサ素子の前後左右方向への傾きを考慮した余分の樹脂肉厚寸法をとる必要がなく、肉厚の大幅な低減を図ることができる。
従って、コンデンサ素子の体積効率が向上し、コンデンサの小形化を図ることができる。
【0012】
【実施例】
以下に本発明の実施例について図面を参照しながら説明する。
図1は、本発明の実施例によるチップ状固体電解コンデンサであり、(a)は横断面図、(b)は(a)のA−A’線による断面図、(c)は(a)のB−B’線による断面図、(d)は底面図である。
以下、図1のチップ状固体電解コンデンサの作製手順について説明する。
まず、図2に示す、陽極導出リード6aを具備したタンタル焼結体に、公知の方法で誘電体酸化皮膜、固体電解質層、陰極引出層を形成し、コンデンサ素子6とした。
陽極導出リード6aの表面をレーザまたはサンドブラストで粗面化処理を施した。
次に、図3に示す陽極部分と陰極部分を隔てる厚さ40μmの内壁7を有し、コンデンサ素子6を格納できる凹部8を設けたフィルムシート4(肉厚:30μm)を用意した。
【0013】
次いで、図3〜5に示すように、上記コンデンサ素子6をフィルムシート4の凹部8に陽極導出リード6aが内壁間に来るように横向きに配置し、図6のように、各コンデンサ素子6の陽極部分および陰極部分の間にシリコーン樹脂9を塗布し硬化した。
図7のように、上記コンデンサ素子6と凹部8との間に銀粒子を含むペースト状の導電性接着剤5をコンデンサ素子6全体が浸漬する深さまで充填し、図8、9のように凹部上端に電極基板1を重ね、導電性接着剤5を硬化させ、上記陽極導出リード6aと陽極導電板2a、および陰極引出層6bと陰極導電板2を導電性接着剤5で接続し、樹脂シート4と電極基板1とで、コンデンサ素子6を外装した。
なお、上記の電極基板1は厚さ8μmの銅箔を、陽極導電板2a、陰極導電板2bとして配置し、ポリイミド樹脂を塗布、硬化して絶縁層10を形成した後、上記導電板2a、2b上のポリイミド樹脂を除去し、ニッケルメッキと無光沢錫メッキのメッキ層3a〜3dを形成して厚さ50μmに形成したものである。
このとき、導電性接着剤5は先に塗布しているシリコーン樹脂9の高さを越えないように塗布した。
【0014】
図10のように、樹脂シート4の下面に、未硬化のUV硬化シート12を固着させて樹脂シート4が動かないようにし、図11のように、切断線Xに沿って、UV硬化シート12を切らないように調整したダイシングによって切削することにより、各コンデンサ素子6の陽極導電板2aと陰極導電板2bとを各々露出させた。
次いで図11に示すように各コンデンサ素子6間の切断線Yに沿ってダイシングにて複数個のチップ片13に切削した後(図12)、UV照射してUV硬化シート12を硬化させる。硬化したUV硬化シートは粘着性を失うので、各チップ片13をUV硬化シート12から容易に剥離することができる。最後に、外部電極面に無電解ニッケルメッキを行って、タンタル固体電解コンデンサを複数個、同時に作製した。
【0015】
図13は以上の工程により得られる外装寸法1.6×0.8×0.8mm(1608サイズ)のタンタル固体電解コンデンサ13の斜視透視図(導電性接着剤5、シリコーン樹脂9を除いて示す。)である。
従来例として特開平8−148386号公報記載の段差状支持部を有する電極基板を用いた、樹脂外装型の1608サイズのコンデンサを作製した。
上記実施例と従来例とで、パッケージ体のコンデンサ素子に対する肉厚寸法と、コンデンサ素子の体積効率を測定した結果を表1に示す。なお、従来例の体積効率は1.00とした。
【0016】
【表1】

Figure 0004307163
【0017】
表1から明らかなように、実施例は従来例より、肉厚寸法が低減されており、体積効率が改善されている。
なお、フィルムシートの厚さは10〜100μmの範囲が好ましい。10μm未満では剛性が弱く、組立時のハンドリング性が悪くなり、生産性が低下する。また、100μmを超えると、肉厚が大きくなり、体積効率が低下する。
【0018】
【発明の効果】
上記の構成により、コンデンサ素子を厚さ10〜100μmのフィルムシートで外装することで、固体電解コンデンサのパッケージの肉厚を樹脂外装の場合よりも低減することができ、肉厚を低減することができるので、コンデンサ素子の体積効率が向上し、コンデンサの小形化を図ることができる。
【図面の簡単な説明】
【図1】本発明の実施例によるチップ状固体電解コンデンサの断面図であり、(a)は横断面図、(b)は(a)のA−A’線による断面図、(c)は(a)のB−B’線による断面図、(d)は底面図である。
【図2】本発明で使用する、陽極導出リードを粗面化処理したコンデンサ素子の断面図である。
【図3】本発明の実施例に用いる樹脂シートの斜視図、および該シートの凹部にコンデンサ素子を配置するときの状態図である。
【図4】図3の樹脂シートにコンデンサ素子を配置した図である。
【図5】図2の樹脂シートの凹部にコンデンサ素子を配置したときの縦断面図である。
【図6】図5のコンデンサ素子の陽極部分と陰極部分の間にシリコーン樹脂を塗布し硬化したときの縦断面図である。
【図7】図6のコンデンサ素子の陽極部分と陰極部分に導電性接着剤を塗布したときの縦断面図である。
【図8】図7のコンデンサ素子を収納した樹脂シートの凹部に電極基板を固着させ、外装体とするときの状態図である。
【図9】図8の状態の斜視図である。
【図10】図9の外装体の下面にUV硬化シートを固着させた状態の斜視図である。
【図11】図10の外装体を、コンデンサ素子の陽極・陰極導電板が露出するよう切断したときの斜視図である。
【図12】図9の外装体を多数個のチップ片に切断したときの斜視図である。
【図13】上記工程により作製したチップ状固体電解コンデンサの斜視透視図である。
【図14】従来例によるチップ状固体電解コンデンサの断面図であり、(a)は横断面図、(b)はA−A’線による断面図、(c)は(a)のB−B’線による断面図である。
【符号の説明】
1 電極基板
2a 陽極導電板
2b 陰極導電板
3a 陽極メッキ層(外部電極)
3b 陰極メッキ層(外部電極)
3c 陽極メッキ層(内部電極)
3d 陰極メッキ層(内部電極)
4 樹脂シート
5 導電性接着剤
6 コンデンサ素子
6a 陽極導出リード
6b 陰極引出部
6c 弁作用金属焼結体
7 内壁
8 凹部
9 シリコーン樹脂
10 絶縁樹脂(ポリイミド樹脂)
11 外装体
11a 陽極・陰極導電板の露出面
12 UV硬化シート
13 チップ片
14、15 導電部材
16 外装樹脂[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a package type solid electrolytic capacitor in which a capacitor element using a valve metal such as tantalum, niobium, and aluminum is sealed with a resin film sheet.
[0002]
[Prior art]
Conventionally, this type of chip-shaped solid electrolytic capacitor comprises a step for supporting the anode lead of the capacitor element, an insulating substrate having a plurality of portions each having a pair of cathode support portions, and a covering material for covering the capacitor element. A solid electrolytic capacitor is provided by connecting a plurality of capacitor elements on an insulating substrate with a conductive adhesive, coating the resin with a transfer mold, and assembling and then dividing the capacitor into individual capacitors (for example, patents) Reference 1).
[0003]
[Patent Document 1]
JP-A-8-148386 (page 4-FIGS. 1 to 3)
[0004]
[Problems to be solved by the invention]
A conventional chip-shaped solid electrolytic capacitor has a capacitor element packaged by resin molding. As shown in FIG. 14, the thickness between the package surface and the capacitor element is used to suppress stress on the capacitor element. In addition to the required wall thickness, it is necessary to secure a gap (at least 0.1 mm) for easily filling the resin, and the length L, width W, and height H of the solid electrolytic capacitor increase accordingly. Will do.
[0005]
Considering that the capacitor element tilts back and forth, left and right, and up and down, a margin of about 0.05 mm is required, and the length L, width W, and height H of the solid electrolytic capacitor increase. This increases the volume efficiency of the capacitor element, resulting in a problem that the capacitor becomes large.
[0006]
[Means for Solving the Problems]
An object of the present invention is to provide a method for manufacturing a solid electrolytic capacitor having a thin and thin resin sheath that solves the above-described problems.
[0007]
That is, the capacitor element 6 in which the anodic oxide film layer, the solid electrolyte layer, and the cathode lead layer 6b are formed on the outer surface of the valve action metal sintered body 6c having the anode lead 6a, and the anode connected to the anode lead 6a. Manufacture of a chip-shaped solid electrolytic capacitor comprising an electrode substrate 1 integrally formed with an insulating resin 10 and a conductive plate 2a and a cathode conductive plate 2b connected to the cathode lead layer 6b, and a resin for covering the capacitor element 6 In the method
The outer resin are each a capacitor element 6, a plurality of recesses 8 for storing formed in a matrix, the further the recess 8, forming an inner wall 7 for partitioning the anode portion and a cathode portion of a resin sheet 4 provided And
Storing the capacitor element 6 in each recess of the resin sheet 4;
Applying a silicone resin 9 to the base portion of the anode lead 6a and curing it;
Filling a conductive adhesive between the anode lead 6a and the anode conductive plate 2a and between the cathode lead layer 6b and the cathode conductive plate 2a;
The electrode substrate 1 is overlapped and fixed to each recess 8 of the resin sheet 4 so that the anode conductive plate 2a and the anode lead 6a are connected and the cathode conductive plate 2b and the cathode lead layer 6b are connected. A process of
Fixing the UV cured sheet 12 to the lower surface of the resin sheet 4;
Cutting into individual solid electrolytic capacitors
Which is a method of manufacturing a chip solid electrolytic capacitor characterized by comprising.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
As described above, the electrode substrate 1 formed by integrally forming the capacitor element 6, the anode conductive plate 2a connected to the anode lead 6a, and the cathode conductive plate 2b connected to the cathode lead layer 6b on the insulating resin 10. And the resin sheet 4 which coat | covers the said capacitor | condenser element 6 comprises a chip-shaped solid electrolytic capacitor.
The resin sheet 4 has a recess 8 that houses the capacitor element 6, and an inner wall 7 that separates the anode portion and the cathode portion is provided in the recess 8.
The above chip-shaped solid electrolytic capacitor is
(1) The step of storing the capacitor element 6 in the resin sheet 4 in which the recesses 8 are formed vertically and horizontally;
(2) A step of applying and curing a silicone resin on the root portion of the anode lead 6a;
(3) Filling the conductive adhesive 5 between the anode lead 6a and the anode conductive plate 2a and between the cathode lead layer 6b and the cathode conductive plate 2b;
(4) A step of stacking and fixing the electrode substrate 1 on the concave portion 8 of the sheet 4;
(5) A step of fixing the UV cured sheet 12 to the lower surface of the resin sheet 4;
(6) Manufactured by cutting into individual chip-shaped solid electrolytic capacitors.
With the above configuration, the stress on the capacitor element is eliminated even if the thickness of the resin is reduced.
Furthermore, even if the capacitor element is tilted in the front-rear and left-right directions by storing the capacitor element in a resin sheet having a recess, the thickness of the exterior resin is increased by the thickness from the inner surface of the recess of the resin sheet to the outer surface. Since it can always be maintained, it is not necessary to take an extra resin wall thickness considering the inclination of the capacitor element in the front-rear and left-right directions as in the prior art, and the wall thickness can be greatly reduced.
Therefore, the volume efficiency of the capacitor element is improved, and the capacitor can be miniaturized.
[0012]
【Example】
Embodiments of the present invention will be described below with reference to the drawings.
1A and 1B show a chip-shaped solid electrolytic capacitor according to an embodiment of the present invention. FIG. 1A is a cross-sectional view, FIG. 1B is a cross-sectional view taken along the line AA ′ in FIG. Sectional drawing by the BB 'line | wire, (d) is a bottom view.
Hereinafter, a manufacturing procedure of the chip-shaped solid electrolytic capacitor of FIG. 1 will be described.
First, a dielectric oxide film, a solid electrolyte layer, and a cathode lead layer were formed by a known method on the tantalum sintered body having the anode lead 6a shown in FIG.
The surface of the anode lead 6a was roughened by laser or sand blasting.
Next, a film sheet 4 (thickness: 30 μm) having an inner wall 7 having a thickness of 40 μm separating the anode portion and the cathode portion shown in FIG.
[0013]
Next, as shown in FIGS. 3 to 5, the capacitor element 6 is disposed sideways in the recess 8 of the film sheet 4 so that the anode lead 6 a is between the inner walls, and as shown in FIG. Silicone resin 9 was applied between the anode part and the cathode part and cured.
As shown in FIG. 7, between the capacitor element 6 and the recess 8, a paste-like conductive adhesive 5 containing silver particles is filled to a depth at which the entire capacitor element 6 is immersed, and as shown in FIGS. The electrode substrate 1 is overlapped on the upper end, the conductive adhesive 5 is cured, the anode lead 6a and the anode conductive plate 2a, and the cathode lead layer 6b and the cathode conductive plate 2 are connected by the conductive adhesive 5, and a resin sheet 4 and the electrode substrate 1 covered the capacitor element 6.
The electrode substrate 1 is formed by arranging a copper foil having a thickness of 8 μm as the anode conductive plate 2a and the cathode conductive plate 2b, and applying and curing a polyimide resin to form the insulating layer 10, and then the conductive plate 2a, The polyimide resin on 2b is removed, and nickel-plated and matte tin-plated plating layers 3a to 3d are formed to a thickness of 50 μm.
At this time, the conductive adhesive 5 was applied so as not to exceed the height of the previously applied silicone resin 9.
[0014]
As shown in FIG. 10, the uncured UV curable sheet 12 is fixed to the lower surface of the resin sheet 4 so that the resin sheet 4 does not move, and the UV curable sheet 12 is taken along the cutting line X as shown in FIG. The anode conductive plate 2a and the cathode conductive plate 2b of each capacitor element 6 were exposed by cutting with dicing adjusted so as not to cut.
Next, as shown in FIG. 11, after cutting into a plurality of chip pieces 13 by dicing along cutting lines Y between the capacitor elements 6 (FIG. 12), the UV curable sheet 12 is cured by UV irradiation. Since the cured UV cured sheet loses its adhesiveness, each chip piece 13 can be easily peeled off from the UV cured sheet 12. Finally, electroless nickel plating was performed on the external electrode surface to produce a plurality of tantalum solid electrolytic capacitors at the same time.
[0015]
FIG. 13 is a perspective perspective view of the tantalum solid electrolytic capacitor 13 having an exterior dimension of 1.6 × 0.8 × 0.8 mm (1608 size) obtained by the above steps (excluding the conductive adhesive 5 and the silicone resin 9). .)
As a conventional example, a resin-encased 1608 size capacitor using an electrode substrate having a stepped support described in JP-A-8-148386 was produced.
Table 1 shows the results obtained by measuring the thickness of the package body with respect to the capacitor element and the volume efficiency of the capacitor element in the above example and the conventional example. The volume efficiency of the conventional example was set to 1.00.
[0016]
[Table 1]
Figure 0004307163
[0017]
As is apparent from Table 1, the wall thickness dimension of the example is reduced and the volume efficiency is improved as compared with the conventional example.
In addition, the thickness of a film sheet has the preferable range of 10-100 micrometers. If it is less than 10 μm, the rigidity is weak, the handling property at the time of assembly is deteriorated, and the productivity is lowered. Moreover, when it exceeds 100 micrometers, thickness will become large and volume efficiency will fall.
[0018]
【The invention's effect】
With the above configuration, by covering the capacitor element with a film sheet having a thickness of 10 to 100 μm, the thickness of the package of the solid electrolytic capacitor can be reduced as compared with the case of the resin sheath, and the thickness can be reduced. As a result, the volume efficiency of the capacitor element can be improved and the capacitor can be miniaturized.
[Brief description of the drawings]
1A and 1B are cross-sectional views of a chip-shaped solid electrolytic capacitor according to an embodiment of the present invention, in which FIG. 1A is a cross-sectional view, FIG. Sectional drawing by the BB 'line | wire of (a), (d) is a bottom view.
FIG. 2 is a cross-sectional view of a capacitor element used in the present invention, in which an anode lead is roughened.
FIG. 3 is a perspective view of a resin sheet used in an embodiment of the present invention, and a state diagram when a capacitor element is disposed in a concave portion of the sheet.
4 is a diagram in which capacitor elements are arranged on the resin sheet of FIG. 3;
5 is a longitudinal sectional view when a capacitor element is arranged in a recess of the resin sheet of FIG.
6 is a longitudinal sectional view when a silicone resin is applied and cured between an anode portion and a cathode portion of the capacitor element of FIG. 5;
7 is a longitudinal sectional view when a conductive adhesive is applied to the anode part and the cathode part of the capacitor element of FIG. 6;
8 is a state diagram when an electrode substrate is fixed to a concave portion of a resin sheet containing the capacitor element of FIG. 7 to form an exterior body.
FIG. 9 is a perspective view of the state of FIG.
10 is a perspective view of a state in which a UV cured sheet is fixed to the lower surface of the exterior body of FIG. 9. FIG.
11 is a perspective view of the exterior body of FIG. 10 when cut so that the anode / cathode conductive plate of the capacitor element is exposed.
12 is a perspective view when the exterior body of FIG. 9 is cut into a large number of chip pieces. FIG.
FIG. 13 is a perspective perspective view of a chip-shaped solid electrolytic capacitor produced by the above process.
14A and 14B are cross-sectional views of a conventional chip-shaped solid electrolytic capacitor, where FIG. 14A is a cross-sectional view, FIG. 14B is a cross-sectional view along the line AA ′, and FIG. It is sectional drawing by a line.
[Explanation of symbols]
1 Electrode substrate 2a Anode conductive plate 2b Cathode conductive plate 3a Anode plating layer (external electrode)
3b Cathode plating layer (external electrode)
3c Anodic plating layer (internal electrode)
3d cathode plating layer (internal electrode)
4 Resin Sheet 5 Conductive Adhesive 6 Capacitor Element 6a Anode Lead 6b Cathode Lead 6c Valve Action Sintered Metal 7 Inner Wall 8 Recess 9 Silicone Resin 10 Insulating Resin (Polyimide Resin)
DESCRIPTION OF SYMBOLS 11 Exterior body 11a Exposed surface of anode / cathode conductive plate 12 UV cured sheet 13 Chip pieces 14, 15 Conductive member 16 Exterior resin

Claims (1)

陽極導出リードを有する弁作用金属焼結体の外表面に陽極酸化皮膜層、固体電解質層、陰極引出層を形成したコンデンサ素子と、上記陽極導出リードに接続される陽極導電板、および陰極引出層に接続される陰極導電板を絶縁樹脂に一体形成してなる電極基板と、上記コンデンサ素子を外装する樹脂とからなるチップ状固体電解コンデンサの製造方法において、
前記外装樹脂が、前記コンデンサ素子を各々、格納する複数個の凹部を縦横に形成し、さらに該凹部内に、陽極部分と陰極部分とを区分する内壁を設けた樹脂シートで形成され、
前記樹脂シートの各凹部に前記コンデンサ素子をそれぞれ格納する工程と、
前記陽極導出リードの根元部分にシリコーン樹脂を塗布し硬化させる工程と、
前記陽極導出リードと前記陽極導電板との間、および前記陰極引出層と前記陰極導電板との間に導電性接着剤を充填する工程と、
前記陽極導電板と前記陽極導出リードとが接続されるように、および前記陰極導電板と前記陰極引出層とが接続されるように、前記樹脂シートの各凹部に前記電極基板を重ねて固着させる工程と、
前記樹脂シートの下面にUV硬化シートを固着させる工程と、
個々のチップ状固体電解コンデンサに切削する工程と
を備えたことを特徴とするチップ状固体電解コンデンサの製造方法
Capacitor element in which an anodized film layer, a solid electrolyte layer, and a cathode lead layer are formed on the outer surface of a valve action metal sintered body having an anode lead, an anode conductive plate connected to the anode lead, and a cathode lead layer In a manufacturing method of a chip-shaped solid electrolytic capacitor comprising an electrode substrate integrally formed with an insulating resin and a cathode conductive plate connected to the resin, and a resin covering the capacitor element,
The outer resin, each said capacitor element, a plurality of recesses to be stored is formed in a matrix, the further recess is formed in the resin sheet provided with a inner wall for partitioning the anode portion and the cathode portion,
Storing each of the capacitor elements in each recess of the resin sheet;
Applying and curing a silicone resin to the base portion of the anode lead, and
Filling a conductive adhesive between the anode lead and the anode conductive plate, and between the cathode lead layer and the cathode conductive plate;
The electrode substrate is overlapped and fixed in each recess of the resin sheet so that the anode conductive plate and the anode lead are connected, and the cathode conductive plate and the cathode lead layer are connected. Process,
Fixing a UV cured sheet to the lower surface of the resin sheet;
Cutting into individual solid electrolytic capacitors
A method for manufacturing a chip-shaped solid electrolytic capacitor , comprising:
JP2003186462A 2003-06-30 2003-06-30 Manufacturing method of chip-shaped solid electrolytic capacitor Expired - Fee Related JP4307163B2 (en)

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