JP4272504B2 - Scan line interpolation method - Google Patents

Description

The present invention relates to a scanning line interpolation method . For example, when a video signal such as a television signal is converted from an interlace (interlaced scanning) signal to a blogging (sequential scanning) signal, the vertical direction and oblique directions of a plurality of pixels are provided. The present invention relates to a scanning line interpolation method suitable for use in a case where a correlation of directions is determined and an interpolation pixel is generated based on the correlation.

  When a video signal such as a television signal is converted from an interlace signal to a blog progressive signal, the correlation between fields is low for a moving video signal, so the upper and lower lines with high correlation within one field are used. Interpolation is performed. At this time, when an interpolation signal is generated based only on the average of the pixel values of the upper and lower lines, if the display screen includes a diagonal line, the edge of the diagonal line is displayed in a jagged manner. For this reason, a scanning line interpolation method for reducing the jagged edges of the diagonal lines in the display screen has been proposed.

  As this type of scanning line interpolation method, there is an oblique correlation adaptive method. In the oblique correlation adaptive scanning line interpolation method, for example, as shown in FIG. 9, the interpolation pixel X of the first scanning line (line on the video input) above the pixel to be interpolated (interpolation pixel) X is supported. A (0) is a pixel to be processed, and pixels A (−1) and A (−2) are arranged in order from the pixel A (0) on the left side of the pixel A (0) supplied on the first scanning line. , A (−3),..., A (−N) (N is a positive integer), and the pixel on the right side of the pixel A (0) supplied on the first scanning line is close to the pixel A (0). Pixels A (1), A (2), A (3),..., A (N) in this order. A pixel corresponding to the interpolation pixel X of the second scanning line (video input lower line) below the interpolation pixel X is represented by B (0), and a pixel B (0) supplied on the second scanning line. In order from the pixel closer to the pixel B (0) to the left pixel, the pixels B (−1), B (−2), B (−3),..., B (−N) (N is a positive integer), and the like Pixels B (1), B (2), B (3),..., B (N) are arranged in order from the pixel closer to the pixel B (0) than the pixel B (0) supplied on the first scanning line. ).

  Conventionally, the absolute value of the difference in pixel value between the vertical pixel A (0) and the pixel B (0) with respect to the interpolation pixel X, and the diagonal pixel A (m) and pixel B (−m) (m is And the absolute value of the difference between the pixel values of the other pixel A (−m) and the pixel B (m) (m is a positive integer) in the diagonal direction. The magnitude is compared, and the direction with the smallest absolute value is determined to have a high correlation. In this case, when the correlation in the vertical direction is high, the average value of the pixel values of the pixel A (0) and the pixel B (0) is set as the interpolation pixel X. Further, when the correlation in the oblique direction is high and the absolute value of the difference between the pixel values of the pixel A (m) and the pixel B (−m) is the smallest, the pixel A (m) and the pixel B (−m) The average value of the pixel values is set as the interpolation pixel X. Further, when the other diagonal correlation is high and the absolute value of the difference between the pixel values of the pixel A (−m) and the pixel B (m) is the smallest, the pixel A (−m) and the pixel B (m) The average value of the pixel values is taken as the interpolation pixel X. In this way, the jagged edges of the diagonal lines are reduced.

FIG. 10 is a block diagram showing an electrical configuration of a scanning line interpolation circuit using the scanning line interpolation method shown in FIG.
As shown in FIG. 10, the scanning line interpolation circuit includes delay flip-flops (hereinafter referred to as “D-FF”) 1, 2, 3, a line memory 4, and D-FFs 5, 6, 7. Units 8, 9, 10; average value circuits 11, 12, 13, absolute value circuits 14, 15, 16, correlation determination circuit 17, isolated point removal circuits 18, 19, and 3to1 selector 20. Has been.

  In this scanning line interpolation circuit, for the pixels in the vertical direction of the video input signal in, the output signal of the D-FF 2 corresponds to the pixel A (0) in FIG. 9, and the output signal of the D-FF 6 is the pixel B (0 ). For pixels in the diagonal direction, the output signal of D-FF1 corresponds to pixel A (-m) (m is a positive integer), and the output signal of D-FF3 corresponds to pixel A (m). Further, the output signal of D-FF 5 corresponds to pixel B (−m), and the output signal of D-FF 7 corresponds to pixel B (m). The difference between the pixel values of the pixel A (0) and the pixel B (0) and the calculation of the absolute value are performed by the subtractor 9 and the absolute value circuit (ABS) 15. The difference between the pixel values of the pixel A (m) and the pixel B (−m) and the absolute value are calculated by the subtractor 10 and the absolute value circuit 16. The difference between the pixel values of the pixel A (−m) and the pixel B (m) and the absolute value are calculated by the subtractor 8 and the absolute value circuit 14. The correlation determination circuit 17 detects the minimum value of the output signals of the absolute value circuits 14, 15 and 16, and a flag of 1 (or 0) in the direction in which the minimum value of the three directions of up and down and diagonal directions is detected. Stand up. When the flag in the up / down direction is set, the flag is used as it is as the select signal of the selector 20. When it is determined that the correlation in the oblique direction is high, an isolated point may be generated due to an erroneous determination in the determination based only on the absolute value of the difference.

  This isolated point will be described. It is assumed that there is a correlation in the direction in which the value of | A (m) −B (−m) | (m is 0 or a positive integer) is small among the vertical direction and various oblique directions. The correlation in the same direction may be continuous, but it may not be continuous. When the same diagonal correlation does not continue in the horizontal direction, or when only n (n is a positive integer) continues, it is called an isolated point of diagonal correlation or an isolated point of continuous correlation in diagonal direction. When an isolated point with a relatively small value of n occurs, such as n = 1 or n = 2, if interpolation processing is performed assuming that there is a correlation in an oblique direction, it is likely to generate dot-like noise in units of one pixel on the screen. . Therefore, when an isolated point of diagonal correlation occurs, it may be determined that there is no diagonal correlation. In order to reduce isolated points, an output signal that has passed through isolated point removal circuits 18 and 19 for determination in an oblique direction is used as a select signal of the selector 20.

  On the other hand, in order to generate the interpolation pixel X, the average value circuit 12 calculates the average value of the pixel values of the pixel A (0) and the pixel B (0) in the vertical direction. The average value circuit 13 calculates the average value of the pixel values of the pixel A (m) and the pixel B (−m) in the oblique direction. The average value of the pixel A (−m) and the pixel B (m) in the diagonal direction is calculated by the average value circuit 11. Then, each output signal of the correlation determination circuit 17 and the isolated point removal circuits 18 and 19 is selected as a select signal, and one of the output signals of the average value circuits 11, 12 and 13 is selected by the selector 20, and is used as the interpolation pixel X. Is output.

FIG. 11 is a block diagram of the isolated point removal circuit 18 in FIG.
As shown in FIG. 11, the isolated point removing circuit 18 includes D-FFs 21 and 22 and an AND circuit 23, and removes an isolated point of one pixel. The isolated point removal circuit 19 in FIG. 10 has the same configuration.

FIG. 12 is another configuration diagram of the isolated point removing circuit 18 in FIG.
As shown in FIG. 12, the isolated point removal circuit 18 includes a shift register 25, a selector 26, and an AND circuit 27. Based on the number of stages of the shift register 25, N pixels (N is a positive number). (Integer) isolated points are removed. In this isolated point removal circuit 18, the flag of the correlation determination result based on the absolute value of the pixel value difference between the pixels in the diagonal direction is input, and the selector 26 among the output signals of the shift register 25 is based on the width designation signal w. By taking an AND (logical product) of the output signals selected in this manner, isolated points corresponding to the number of stages of the shift register 25 are removed.

In addition to the above-described scanning line interpolation method, conventionally, this type of technique has been described in, for example, the following documents.
In the scanning line interpolation method described in Patent Document 1, a method substantially similar to the scanning line interpolation method shown in FIG. 9 is described.

  In the scanning line interpolation apparatus described in Patent Document 2, an apparatus substantially similar to the scanning line interpolation circuit shown in FIG. 10 is described.

In the scanning line interpolation apparatus described in Patent Document 3, a method substantially similar to the scanning line interpolation method shown in FIG. 9 is described.
Japanese Patent Laying-Open No. 2003-230109 (page 15, FIG. 5) Japanese Patent Laid-Open No. 04-364685 (page 8, FIG. 2) JP 2003-052023 A (page 28, FIG. 3)

However, the conventional scanning line interpolation method has the following problems.
In other words, when the isolated point removing circuit 18 shown in FIG. 11 associates one clock with one pixel, not only the pulse of 1 clock width but also 1 It operates so as to narrow the pulse width by one clock for all pulses greater than the clock width. Further, the isolated point removal circuit 18 shown in FIG. 12 designates one clock for the flag of the output signal of the correlation determination circuit 17 when N pixels (N = positive integer) = N clock width is designated by the width designation signal w. The operation is performed so that all the pulses having the width or more are narrowed by the maximum N clock widths. Regardless of whether the pulse is an isolated pulse or not, a pulse with a uniformly specified width is removed, so that the isolated point is removed, and at the same time, the effect of the diagonal interpolation in the scanning line interpolation circuit using the diagonal correlation is deteriorated. There is a problem.

  Further, the correlation determination circuit 17 is arranged in a diagonal direction when a signal having a large change amount per clock (a high frequency component of the signal) such as a circle at the center of a monosco pattern (test pattern) is input. Misjudgment may continue continuously during correlation judgment. For this reason, there is a problem that the isolated point is not removed because it is not output as an isolated point from the correlation determination circuit 17. For example, when an interlace signal having a diagonal line as shown in FIG. 13A or a test pattern as shown in FIG. 13B (a circle at the center of the monosco) is input, as shown in FIG. Although there are no isolated points on the diagonal lines, as shown in FIG. 14B, wedge-shaped noise (isolated points) interpolated in the opposite direction to the concentric circles are seen in four diagonal directions in the test pattern. . This is a pixel interpolated by an erroneous determination in the diagonal correlation determination.

The cause of the display screen shown in FIG.
Of the four wedge-shaped noises in the figure, attention is paid to, for example, the noise at the upper left, and the input values corresponding to this noise are applied to the pixels A and B in FIG. That is, the monosco circle part is a white and black pattern that rises to the right. If the white level is 10 and the black level is 0 as a 2-pixel wide circle, the pixel value of each pixel is
A (−3) = 10, A (−2) = 10, A (−1) = 0, A (0) = 0,
A (1) = 10, A (2) = 10, A (3) = 0,
B (−3) = 0, B (−2) = 0, B (−1) = 10, B (0) = 10,
B (1) = 0, B (2) = 0, B (3) = 10
It becomes.

In this case, the output signal of D-FF6 in FIG. 10 is pixel A (0), the output signal of D-FF2 is pixel B (0), the output signal of D-FF7 is pixel A (-1), and D-FF1. , The output signal of D-FF5 corresponds to the pixel A (1), and the output signal of D-FF3 corresponds to the pixel B (-1). The absolute value of the difference in the vertical direction (the output signal of the absolute value circuit 15) is
| A (0) -B (0) | = | 0-10 | = 10
The absolute value of the difference in the oblique direction (the output signal of the absolute value circuit 14) is
| A (-1) -B (1) | = | 0-0 | = 0,
The absolute value of the other diagonal difference (the output signal of the absolute value circuit 16) is
| A (1) -B (-1) | = | 10-10 | = 0,
Thus, the correlation in both diagonal directions where the absolute value of the difference is the minimum value is high. In this way, when the absolute values of the differences in both diagonal directions are equal, for example, | A (−1) −B (1) in the wrong direction with a probability of 50% due to the priority of the circuit based on a conditional expression such as an IF statement. | May be determined to have the highest correlation.

  Also, when the video input signal in has, for example, 1024 gradations (10 bits), the absolute value of the difference in both diagonal directions should be essentially the same, but if there is noise in the lower 1 bit, then 1 gradation Therefore, when the absolute value of the difference is taken, the place that is originally “0” becomes “1”. If there is a difference of one gradation in the absolute value of the difference, if the noise has not been removed in advance, the interphase determination will be out of order.

In this case, in the output signal of the correlation determination circuit 17 in FIG. The isolated point removal of the correlation output in the oblique direction is performed by the isolated point removal circuits 18 and 19. Here, the absolute value of the difference in the diagonal direction is
| A (−3) −B (−1) | = | 10−10 | = 0
| A (−2) −B (−0) | = | 10−10 | = 0
| A (-1) -B (1) | = | 0-0 | = 0
| A (0) -B (2) | = | 0-0 | = 0
| A (1) -B (3) | = | 10-10 | = 0
The absolute value of the other diagonal difference is
| A (-1) -B (-3) | = | 0-0 | = 0
| A (-0) -B (-2) | = | 0-0 | = 0
| A (1) -B (-1) | = | 10-10 | = 0
| A (2) -B (0) | = | 10-10 | = 0
| A (3) -B (1) | = | 0-0 | = 0
Accordingly, the correlation determination circuit 17 always determines that the correlation in the oblique direction is high, and “1” continues to be set in the flag of the output signal.

  The fact that “1” continues to be set in the flag means that the output signal is a continuous pulse, so that it is not recognized as an isolated point by the isolated point removal circuits 18 and 19. If it is not recognized as an isolated point, it cannot be removed by the isolated point removal 18, 19, so the result of the correlation determination is directly reflected on the display screen. That is, the correlation determination continues with | A (−1) −B (1) | in the wrong direction. By this determination, the average value of the pixel values of A (−1) and B (1) (the output signal of the average value circuit 11) is selected and output by the selector 20, so that the isolated point is displayed and generated. The This is the wedge-shaped noise in FIG.

  The scanning line interpolation method described in Patent Document 1, the scanning line interpolation apparatus described in Patent Document 2, and the scanning line interpolation apparatus described in Patent Document 3 also have the same problems as described above.

In order to solve the above problems, the invention described in claim 1 is directed to a pixel supplied on the first scanning line and a pixel supplied on the second scanning line arranged below the first scanning line. On the other hand, according to an oblique correlation type scanning line interpolation method in which a direction having the highest correlation between pixel values is detected from the vertical direction and a plurality of diagonal directions, and interpolation is performed in the detected direction, the pixel X to be interpolated is detected. A pixel corresponding to the pixel X on the first scanning line above A is defined as A (0), and a pixel on the left side of the pixel A (0) on the first scanning line is closer to the pixel A (0) , A (−1), A (−2),..., A (−N) (N is a positive integer), and pixels on the right side of the pixel A (0) on the first scanning line. Pixels A (1), A (2),..., A (N) in order from the pixel A (0) closest to the pixel A (0) The pixel corresponding to the pixel X of the scanning line is B (0), and the pixel on the left side of the pixel B (0) on the second scanning line is the pixel B ( −1), B (−2),..., B (−N) (N is a positive integer), and a pixel on the right side of the pixel B (0) on the first scanning line is a pixel B (0). Pixel B (1), B (2),..., B (N) in order from the closest one, and a predetermined number of pixels A (n) (including the pixel A (0) on the first scanning line. n is an integer), and corresponding pixels B (n) supplied on the second scanning line,
Pixel value of A (n)> Pixel value of B (n) (Condition 1)
Or A (n) (n is an integer) that includes at least a predetermined number of pixels A (0) supplied on the first scanning line, and the second scanning line corresponding thereto For supplied pixel B (n),
Pixel value of A (n) <Pixel value of B (n) (Condition 2)
And for the pixel X, the pixel value correlation in the oblique direction between the pixel A (m) and the pixel B (−m) (m is a positive or negative integer), and the pixel A (0) When the correlation between the pixel value in the oblique direction between the pixel A (m) and the pixel B (−m) in which the specific m is specified is the highest among the correlation between the pixel value in the vertical direction with the pixel B (0). The pixel value of the pixel X is interpolated from the pixel A (m) and the pixel B (−m).

According to a second aspect of the present invention, with respect to the pixels supplied on the first scanning line and the pixels supplied on the second scanning line arranged below the first scanning line, a plurality of vertical directions and a plurality of pixels are supplied. An oblique correlation type scanning line interpolation method for detecting a direction having the highest correlation of pixel values from among oblique directions and performing interpolation in the detected direction, wherein the first above the pixel X to be interpolated The pixel corresponding to the pixel X on the scanning line is A (0), and the pixel on the left side of the pixel A (0) on the first scanning line is the pixel A (− in order from the pixel A (0). 1), A (−2),..., A (−N) (N is a positive integer), and the pixel on the right side of the pixel A (0) on the first scanning line is the pixel A (0). The pixels A (1), A (2),..., A (N) are arranged in order from the closest one, and the pixel X of the second scanning line below the pixel X is paired with the pixel X. The pixel to be performed is B (0), and the pixels on the left side of the pixel B (0) on the second scanning line are pixels B (−1) and B (−2) in order from the pixel closer to the pixel B (0). ,..., B (−N) (N is a positive integer), and pixels B (1) on the right side of the pixel B (0) on the first scanning line in order from the pixel closer to the pixel B (0). ), B (2),..., B (N), a predetermined number of consecutive pixels A (n) (n is an integer) including the pixels A (0) supplied on the first scanning line, and With respect to B (p) (p is an integer) continuous for the predetermined number or more including the pixel B (0) supplied on the second scanning line,
Pixel value of A (n) ≧ pixel value of A (n−1) and pixel value of B (p) ≧ B (p−1),
Pixel value (Condition 3)
Or
Pixel value of A (n) ≦ pixel value of A (n−1) and pixel value of B (p) ≦ B (p−1)
Pixel value (Condition 4)
For pixel X, the correlation of pixel values in the diagonal direction between pixel A (m) and pixel B (−m) (m is a positive or negative integer), and pixel A (0) and pixel When the correlation of the pixel value in the oblique direction between the pixel A (m) and the pixel B (−m) in which the specific m is specified is the highest among the correlations of the pixel values in the vertical direction with B (0), The pixel value of the pixel X is interpolated from the pixel A (m) and the pixel B (−m).

  The invention according to claim 3 relates to the scanning line interpolation method according to claim 1, and when the condition 1 or the condition 2 is not satisfied, the pixel value of the pixel X is set to pixel A (0) and pixel B (0). It is characterized by interpolating from

  A fourth aspect of the invention relates to the scanning line interpolation method according to the second aspect of the invention, and when the condition 3 or the condition 4 is not satisfied, the pixel value of the pixel X is set to pixel A (0) and pixel B (0). It is characterized by interpolating from

  The invention according to claim 5 relates to the scanning line interpolation method according to claim 1, wherein the condition 1 and condition 2 are satisfied, and two or more sets of the pixel A (r) and the pixel B (−r) (r is Similarly, when the correlation between the pixel values of (integer) is the highest, the pixel value of the pixel X is interpolated from the pixel A (r) and the pixel B (−r) having a smaller r value.

  A sixth aspect of the invention relates to the scanning line interpolation method of the second aspect, wherein the condition 3 and the condition 4 are satisfied, and two or more sets of the pixel A (r) and the pixel B (−r) (r is Similarly, when the correlation between the pixel values of (integer) is the highest, the pixel value of the pixel X is interpolated from the pixel A (r) and the pixel B (−r) having a smaller r value.

According to the configuration of the present invention, the magnitudes of the pixel values of the pixels supplied on the first scanning line and the pixels supplied on the second scanning line are compared, and whether or not the inclination in the oblique direction is reversed is determined. By determining, a portion where the amount of change per clock is intense (the frequency component of the signal is high) is monitored, so that a portion that has not been detected as an isolated point in the past can also be detected as an isolated point .

Provided is a scanning line interpolation method that eliminates isolated points caused by misjudgment in an oblique correlation adaptive scanning line interpolation method and prevents the effect of interpolation in an oblique direction from being deteriorated by the removal of isolated points .

FIG. 1 is a block diagram showing an electrical configuration of a scanning line interpolation circuit for carrying out the scanning line interpolation method according to the first embodiment of the present invention.
As shown in the figure, the scanning line interpolation circuit of this example includes D-FFs 31, 32, 33, a line memory 34, D-FFs 35, 36, 37, subtractors 38, 39, 40, and an average value. Circuits 41, 42, 43, absolute value circuits 44, 45, 46, isolated point removal circuit 47, correlation determination circuit 48, and selector 49 are included.

  In this scanning line interpolation circuit, the video input signal in corresponding to the interlace is input to the line memory 34, and the line memory 34 outputs a 1-line delayed video signal id obtained by delaying the video input signal in by 1 line. . In the D-FFs 31, 32, and 33, the video input signal in is delayed in units of clocks. In the D-FFs 35, 36, and 37, the one-line delayed video signal id is delayed in units of clocks. Each output signal of the D-FFs 32 and 36 becomes a center value. Each output signal of the D-FFs 33 and 37 is a signal one clock before the center value. Each output signal of the D-FFs 31 and 35 becomes a signal after one clock with respect to each center value. The output signals of the D-FFs 32 and 36 are input to the subtracter 39, and the difference between the upper and lower line signals serving as the center value is obtained from the absolute value circuit 45. Similarly, the output signals of the D-FFs 31 and 37 are input to the subtractor 38, and a difference in the oblique direction is obtained from the absolute value circuit 44. The respective output signals of the D-FFs 35 and 33 are input to the subtractor 40, and an absolute difference from the absolute value circuit 46 in the opposite direction to the output of the absolute value circuit 44 is obtained. The minimum value of each output signal of the absolute value circuits 44, 45, 46 is detected by the correlation determination circuit 48, and it is determined in which direction of the vertical direction or the diagonal direction the correlation is high.

  On the other hand, each output signal of the D-FFs 32 and 36 is input to the average value circuit 42, and an average value in the vertical direction is obtained from the average value circuit 42. The output signals of the D-FFs 31 and 37 are input to the average value circuit 41, and an average value in the oblique direction is obtained from the average value circuit 41. The output signals of the D-FFs 35 and 33 are input to the average value circuit 43, and the average value in the other diagonal direction is obtained from the average value circuit 43.

  When the correlation determination circuit 48 determines that the output signal of the absolute value circuit 44 is minimum (that is, the correlation is high), the average value output from the average value circuit 41 is selected by the selector 49 by interpolation. When it is determined that the output signal of the absolute value circuit 45 is minimum (that is, the correlation is high), the average value output from the average value circuit 42 by the selector 49 is selected as the interpolation output. When the output signal of the absolute value circuit 46 is determined to be minimum (that is, the correlation is high), the average value output from the average value circuit 43 is selected by the selector 49 as the interpolation output. Since each output signal of the absolute value circuits 44 and 46 includes an isolated point, an erroneous determination may occur depending on the input signal through the correlation determination circuit 48. In order to remove the isolated points, the output signals of the D-FFs 32 and 36 are input to the isolated point removal circuit 47, and a determination result g for removing the isolated points is output from the isolated point removal circuit 47.

FIG. 2 is a block diagram showing an electrical configuration of the isolated point removal circuit 47 in FIG.
As shown in FIG. 2, the isolated point removal circuit 47 includes a magnitude comparison circuit 51, a shift register 52, a selector 53, an AND circuit 54, a shift register 55, a selector 56, an OR circuit 57, The size comparison circuit 61, a shift register 62, a selector 63, an AND circuit 64, a shift register 65, a selector 66, and an OR circuit 67 are included.

  In the isolated point removal circuit 47, the output signal of the D-FF 32 in FIG. 1 is input as the video input signal B of the current line, and the output signal of the D-FF 36 is input as the video input signal A of the previous line. The magnitude comparison circuit 51 compares the magnitudes of the video input signals A and B and outputs 1 only when the video input signal A one line before is larger than the video input signal B of the current line. The output signal of the size comparison circuit 51 is delayed by one clock unit by the shift register 52, and the selector 53 selects how many isolated points are to be removed by the width designation signal w.

  In this case, as shown in FIG. 3, for example, when one isolated point is removed, the selector 53 selects the output signal of the two-stage register of the shift register 52 in order to detect the width of one clock pulse. When it is desired to remove three isolated points, the selector 53 selects the output signal of the four-stage register of the shift register 52. The output signal selected by the selector 53 is input to the AND circuit 54, and the isolated point is removed. The output signal k of the AND circuit 54 removes the isolated point of the point specified by the width specifying signal w, and at the same time, the signal corresponding to the clock width specified by the width specifying signal w is also deleted from the signal that is not the isolated point. . In order to restore this width, the output signal k of the AND circuit 54 is input to the shift register 55 and restored by the OR circuit 57 in order to restore the width designated by the width designation signal w by the selector 56. The OR circuit 57 restores the output signal m having a continuous width from the isolated point.

  On the other hand, the magnitude comparison circuit 61 compares the magnitudes of the video input signals A and B, and outputs 1 only when the video input signal A one line before is smaller than the video input signal B of the current line. The output signal of the magnitude comparison circuit 61 is delayed by one clock unit by the shift register 62, and the number of isolated points to be removed is selected by the width designation signal w.

  In this case, as shown in FIG. 3, for example, when it is desired to remove one isolated point, the selector 63 selects the output signal of the two-stage register of the shift register 62 in order to detect the width of one clock pulse. When it is desired to remove three isolated points, the selector 63 selects the output signal of the four-stage register of the shift register 62. The output signal selected by the selector 63 is input to the AND circuit 64, and the isolated point is removed. The output signal n of the AND circuit 64 removes the isolated point of the point designated by the width designation signal w, and at the same time, the signal corresponding to the clock width designated by the width designation signal w is also deleted from the signal that is not the isolated point. . In order to restore this width, the output signal of the AND circuit 64 is input to the shift register 65 and restored by the OR circuit 67 in order to restore the width designated by the selector 66 with the width designation signal w. The OR circuit 67 restores the output signal u having a continuous width from the isolated point. The output signal m of the OR circuit 57 and the output signal u of the OR circuit 67 are ORed by the OR circuit 58 to obtain a determination output g to be removed as an isolated point. When the determination output g is “1”, the output signal of the average value circuit 42 is selected by the selector 49 based on the output signal of the correlation determination circuit 48 in FIG. 1, and the interpolation pixel X from which the isolated points are removed is obtained.

FIG. 4 is a schematic block diagram showing an example of an electrical configuration of a plasma display device in which the scanning line interpolation circuit of FIG. 1 is used.
This plasma display device includes an analog interface 70 and a PDP module 80. The analog interface 70 includes a Y / C (luminance color) separation circuit 71 having a chroma decoder, an A / D (analog / digital) conversion circuit 72, a synchronization signal control circuit 73 having a PLL (phase lock) circuit, The image format conversion circuit 74, an inverse γ conversion circuit 75, a system control circuit 76, a PLE (Peak Luminance Enhancement) control circuit 77, and a scanning line interpolation circuit 78 are configured. The scanning line interpolation circuit 78 has the configuration shown in FIG. The PDP module 80 includes a digital signal processing control circuit 81, a panel unit 82, and an in-module power supply circuit 83 incorporating a DC / DC converter. The digital signal processing control circuit 81 includes an input interface signal processing circuit 84, a frame memory 85, a memory control circuit 86, and a driver control circuit 87.

  The panel unit 82 includes a PDP 92, a scan driver 88 that drives the scan electrodes of the PDP 92, data drivers 89A and 89B that drive the data electrodes, and high-voltage pulse circuits 90A and 90B that supply pulse voltages to the PDP 92 and the scan driver 88. And a power recovery circuit 91 that recovers surplus power generated in the high-voltage pulse circuits 90A and 90B.

  In this plasma display device, generally, an analog video signal corresponding to interlace is converted into a digital video signal by the analog interface 70, and the digital video signal is supplied to the PDP module 80. For example, an analog video signal output from a television tuner (not shown) is separated into luminance signals of R, G, and B colors by a Y / C separation circuit 71 and then converted into a digital video signal by an A / D conversion circuit 72. Converted. Since this digital video signal is a signal corresponding to interlace, pixels are interpolated by the scanning line interpolation circuit 78 and converted into a video signal of a format corresponding to sequential scanning by the image format conversion circuit 74.

  Further, the display luminance characteristic with respect to the input signal of the PDP 92 is linearly proportional, but a normal video signal is corrected (γ-converted) in advance according to the CRT characteristic. Therefore, after the A / D conversion of the analog video signal is performed in the A / D conversion circuit 72, the inverse γ conversion circuit 75 performs the inverse γ conversion. In this inverse γ conversion, a digital video signal restored to a linear characteristic is generated. This digital video signal is output to the PDP module 80 as an R, G, B video signal.

  Further, since the analog video signal does not include the sampling clock and data clock signal for A / D conversion, the horizontal signal supplied simultaneously with the analog video signal by the PLL circuit built in the synchronization signal control circuit 73. A sampling clock and a data clock signal are generated based on the synchronization signal and output to the PDP module 80. The PLE control circuit 77 of the analog interface 70 controls the brightness of the PDP module 80. Specifically, the display luminance is increased when the average luminance level is a predetermined value or less, and the display luminance is decreased when the average luminance level exceeds a predetermined value. In the PLE control circuit 77, brightness control data is set according to the average brightness level, and is sent to a brightness level control circuit (not shown) in the input interface signal processing circuit 84.

  Various control signals are sent from the system control circuit 76 to the PDP module 80. For example, the average luminance level of the R, G, B video signals input to the input interface signal processing circuit 84 is calculated by an input signal average luminance level calculation circuit (not shown) in the input interface signal processing circuit 84, for example, 10 Output as bit data. In the digital signal processing control circuit 81, after these various signals are processed by the input interface signal processing circuit 84, control signals are sent to the panel unit 82. At the same time, a memory control signal and a driver control signal are sent from the memory control circuit 86 and the driver control circuit 87 to the panel unit 82.

  The PDP 92 has, for example, 1365 × 768 pixels. In the PDP 92, scanning electrodes are controlled by the scanning driver 88 and data electrodes are controlled by the data drivers 89A and 89B, thereby controlling lighting or non-lighting of predetermined pixels among these pixels. , Display corresponding to the B video signal is performed. Further, logic power is supplied to the digital signal processing control circuit 81 and the panel unit 82 by the logic power supply. Further, DC power is supplied from the display power supply to the in-module power supply circuit 83, and the voltage of the DC power is converted into a predetermined voltage and then supplied to the panel unit 82.

FIG. 5 is a diagram showing an example of a display screen interpolated by the scanning line interpolation circuit of FIG.
The processing contents of the scanning line interpolation method using the scanning line interpolation circuit of this example will be described with reference to FIGS.
The pixel value of each pixel in FIG.
A (-3) = 0, A (-2) = 0, A (-1) = 0, A (0) = 0,
A (1) = 10, A (2) = 0, A (3) = 10,
B (−3) = 0, B (−2) = 0, B (−1) = 0, B (0) = 10,
B (1) = 0, B (2) = 10, B (3) = 0
Then, the absolute value of the vertical difference is
| A (0) -B (0) | = | 0-10 | = 10,
The absolute value of the diagonal difference is
| A (-1) -B (1) | = | 0-0 | = 0,
The absolute value of the other diagonal difference is
| A (1) -B (-1) | = | 10-0 | = 10
Thus, the correlation in the oblique direction between A (−1) and B (1) where the absolute value of the difference is the minimum value is high.

  However, when the upper and lower pixels of the A side line (upper line) and the B side line (lower line) of the video input signal in are compared, A (−1) = B (−1), but A (0 ) <B (0) and A (1)> Since the magnitude relationship of the pixel values in the vertical direction is reversed as in B (1), the correlation determination circuit 48 may make an erroneous determination. Furthermore, since the magnitudes of the pixel values of the A line and the B line are reversed for each pixel as A (2) <B (2) and A (3)> B (3), the absolute value of the difference If the average value of A (−1) and B (1) which are the minimum values of the interpolation pixel X is generated and the interpolation pixel X is generated in an oblique direction, there is a high possibility of becoming an isolated point. By setting the width designation by the designation signal w to 1 or more, “0” is output as the determination output g of the isolated point removal circuit 47. When the determination output g is “0”, the interpolation using the average value of the vertical pixels of A (0) and B (0) is selected.

Further, the pixel value of each pixel in FIG.
A (-3) = 0, A (-2) = 0, A (-1) = 0, A (0) = 5,
A (1) = 10, A (2) = 10, A (3) = 10,
B (−3) = 0, B (−2) = 5, B (−1) = 10, B (0) = 10,
B (1) = 10, B (2) = 10, B (3) = 10
Then, the absolute value of the vertical difference is
| A (0) -B (0) | = | 5-0 | = 5,
The absolute value of the diagonal difference is
| A (-1) -B (1) | = | 0-10 | = 10,
The absolute value of the other diagonal difference is
| A (1) -B (-1) | = | 10-10 | = 0
Thus, the correlation in the oblique direction between A (1) and B (−1) at which the absolute value of the difference is the minimum value is high. Moreover, when comparing the upper and lower pixels of the A side line and the B side line of the video input signal in,
A (−3) = B (−3), A (1) = B (1), A (2) = B (2),
A (3) = B (3)
In Although,
A (-2) <B (-2), A (-1) <B (-1), A (0) <B (0)
Thus, the magnitude relationship between the upper and lower pixels is not reversed.

  Even if the isolated point removal circuit 47 sets the width designation by the width designation signal w to 1 or more, “1” is output as the determination output g of the isolated point removal circuit. When the determination output g is “1”, average value interpolation by pixels in the oblique direction of A (−1) and B (1), or average by pixels in the oblique direction of A (1) and B (−1) Value interpolation is selected. In the selection in this case, since the absolute value of the difference in the oblique direction in which | A (1) −B (−1) | = 0 based on the result of the determination based on the absolute value of the difference is the smallest, A Interpolation using an average value of pixels in the diagonal direction of (1) and B (-1) is selected. As a result of these processes, a test pattern display screen without noise is obtained as shown in FIG. Further, as shown in FIG. 5A, there is no isolated point in the oblique line.

  As described above, in the first embodiment, the magnitude comparison circuits 51 and 61 compare the magnitudes of the video input signals A and B, and determine whether or not the tilt in the diagonal direction is reversed, thereby obtaining one clock. Since the portion where the amount of change is large (the frequency component of the signal is high) is monitored, the portion that has not been detected as an isolated point in the past is also detected as an isolated point. Further, the result of the magnitude comparison of the video input signals A and B is not only removed by the shift registers 52 and 62, the selectors 53 and 63, and the AND circuits 54 and 64, but also the isolated point having the designated clock width is removed. The output signals k and n of the AND circuits 54 and 64 are further specified by the shift registers 55 and 65, the selectors 56 and 66, and the OR circuits 57 and 67, and the designated clock width that is not an isolated point that has been deleted by the designated clock width. Since the above signals are restored, the signal is not deleted for the determination with the continuous clock width, and the erroneous determination is reduced while maintaining the state of effective interpolation in the oblique direction. Isolated points are removed.

FIG. 6 is a block diagram showing an electrical configuration of a scanning line interpolation circuit for carrying out the scanning line interpolation method according to the second embodiment of the present invention.
The scanning line interpolation circuit of this example is used as, for example, the scanning line interpolation circuit 78 in FIG. 4, and includes a 1-line delay circuit 101, a shift register 102, a shift register 103, a correlation determination circuit 104, an interpolation. The circuit 105 includes a signal characteristic determination circuit 106, a selection circuit 107, and a synthesis circuit 108. The 1-line delay circuit 101 delays the video input signal in by 1 line. The shift register 102 stores a plurality of pixel signals on the first scanning line as a first image signal. The shift register 103 stores a plurality of pixel signals on the second scanning line as a second image signal. The correlation determination circuit 104 determines the correlation between the first image signal stored in the shift register 102 and the second image signal stored in the shift register 103. The interpolation circuit 105 calculates an interpolation display line from the first image signal stored in the shift register 102 and the second image signal stored in the shift register 103. The signal characteristic determination circuit 106 determines whether or not the magnitude relationship in the predetermined arrangement direction between the first image signal stored in the shift register 102 and the second image signal stored in the shift register 103 satisfies a predetermined condition. Determine whether. The selection circuit 107 selects the calculation result of the interpolation circuit 105 based on the correlation determination result by the correlation determination circuit 104 and the determination result by the signal characteristic determination circuit 106 and outputs it as an interpolation signal. The synthesizing circuit 108 synthesizes the interpolation signal and the video input signal in, and performs interpolation display located between the first scanning line and the second scanning line from the first scanning line and the second scanning line. Generate a line.

7 and 8 are diagrams illustrating examples of pixel values of each pixel for explaining the scanning line interpolation method of this example.
The processing contents of the scanning line interpolation method using the scanning line interpolation circuit of this example will be described with reference to these drawings.
As shown in FIG. 7, the pixels A (−4), A (−3), A (−2), and A (−1) of the first line in which the video input signal “in” is delayed by one line by the one-line delay circuit 101. ), A (0), A (1), A (2), A (3),..., And pixels B (-4), B (-3), B (− 2), B (-1), B (0), B (1), B (2), B (3),... Are set. Of the signals between the first line and the second line, the interpolation of the pixel X (0) corresponding to the pixels A (0) and B (0) whose scanning direction is in the scanning direction is performed on the pixel A ( -2), A (-1), A (0), A (1), A (2) and pixels B (-2), B (-1), B (0), B (1), B (2) is used. Each of the shift registers 102 and 103 has a predetermined number of registers (5 pixels). Here, the video input signal in is a 16-gradation signal in which one pixel is composed of 4 bits. Accordingly, the shift registers 102 and 103 are 4-bit parallel input / parallel output configurations, and each parallel bit is shifted by 5 bits.

The correlation between the first line and the second line is determined as follows.
In other words, the correlation determination circuit 104 calculates the absolute value of the difference between the pixel values of the pixels A (0) and B (0) and calculates the correlation in the vertical direction, and the pixels A (-2) and B ( 2) The difference between the pixel values of the pixel A (-1) and the pixel B (1), the pixel A (1) and the pixel B (-1), and the pixel A (2) and the pixel B (-2). Calculate the absolute value. Then, the correlation determination circuit 104 designates the correlation at which the minimum absolute value of these five absolute values is obtained by the pixel position in the scanning line direction, by -2, 1, 0, 1 or 2. And output to the selection circuit 107. However, when a plurality of correlations having the same absolute value are detected, a correlation closer to the inner side, that is, the correlation in the vertical direction is designated. Therefore, when the absolute value of the difference between the pixel values of the pixel A (0) and the pixel B (0) is 0, the correlation between the pixels in the vertical direction is always specified. In this case, a designation signal is output.

The interpolation circuit 105 calculates interpolation values X (0) (n) in the vertical direction and the diagonal direction. That is, the interpolation circuit 105
X (0) (0) = [A (0) + B (0)] / 2
X (−2) (0) = [A (−2) + B (2)] / 2
X (-1) (0) = [A (-1) + B (1)] / 2
X (1) (0) = [A (1) + B (-1)] / 2
X (2) (0) = [A (2) + B (-2)] / 2
The five computation results are output to the selection circuit 107.

  The signal characteristic determination circuit 106 includes a pixel A (−2) and a pixel B (−2), a pixel A (−1) and a pixel B (−1), a pixel A (0) and a pixel B (0), and a pixel A ( 1) Compare the pixel values of the pixel B (1) and the pixel A (2) and the pixel B (2), and among these, at least three sets of consecutive signal size comparison results are all the first. It is determined whether there is a combination in which one line is large or the first line side is small. The size comparison may be a comparison including an equal sign. That is, it may be determined whether or not there are combinations in which the magnitude comparison results of three consecutive sets of signals are such that the first line side is equal to or higher than the second line side, or the first line side is equal to or lower than the second line side. Then, the signal characteristic determination circuit 106 determines that the correlation in the oblique direction is possible if such a condition is satisfied, and determines that the correlation in the oblique direction is impossible if such a condition is not satisfied, and determines the determination signal as The data is output to the selection circuit 107.

  When the determination signal of the signal characteristic determination circuit 106 indicates that the correlation in the oblique direction is possible, the selection circuit 107 performs an interpolation operation value input from the interpolation circuit 105 based on the correlation designated by the correlation determination circuit 104. Is output as an interpolation signal. The synthesizing circuit 108 synthesizes the interpolation signal and the video input signal in, outputs the interpolation pixel X, and generates an interpolation display line.

When the video input signal in is in the state shown in FIG. 7, the interpolation calculation is performed as follows.
That is, since each pixel value is A (−2) <B (−2), A (−1) <B (−1), and A (0) <B (0), the correlation in the oblique direction is possible. Become. Then, the vertical correlation and the four diagonal correlations are compared. That is, pixel A (-2) and pixel B (2), pixel A (-1) and pixel B (1), pixel A (0) and pixel B (0), and pixel A (1) and pixel B ( When the absolute value of the difference between the pixel values of -1) is compared, the difference between the pixel values of the pixels A (-2) and B (2) and between the pixels A (1) and B (-1) is 0. Therefore, the correlation is maximized. In this case, since the two correlations are the same, the one closer to the vertical is selected. Accordingly, the correlation between the pixel A (1) and the pixel B (−1) is selected, and X (0) = (10 + 10) / 2 = 10. Therefore, the pixel value of the interpolation pixel X is 10.

  When the video input signal in is in the state shown in FIG. 8, the interpolation calculation is performed as follows. That is, since A (0) = B (0), the correlation of the pixels in the vertical direction is designated. Therefore, the correlation between A (0) and B (0) is selected, and X (0) = (9 + 9) / 2 = 9. Therefore, the pixel value of the interpolation pixel X is 9.

  As described above, in the second embodiment, the calculation result of the interpolation circuit 105 is selected by the selection circuit 107 on the basis of the correlation determination result by the correlation determination circuit 104 and the determination result by the signal characteristic determination circuit 106. Since it is output as a signal, there are almost the same advantages as in the first embodiment.

In the scanning line interpolation circuit of the third embodiment, a signal characteristic determination circuit 106B (not shown) having a different function is provided instead of the signal characteristic determination circuit 106 in FIG. 6 showing the second embodiment.
The signal characteristic determination circuit 106B differs from the signal characteristic determination circuit 106 in conditions for determining whether or not diagonal interpolation is possible. In other words, the signal characteristic determination circuit 106B has a pixel value including an equal sign between adjacent pixels of the pixels A (-2), A (-1), A (0), A (1), and A (2). And a comparison of pixel values including equal signs of adjacent pixels B (-2), B (-1), B (0), B (1), and B (2). I do. That is, for pixel values of at least three consecutive pixels on the first line side and three consecutive pixels on the second line side,
A (n) ≧ A (n−1) and B (p) ≧ B (p−1) (p is an integer)
Or
A (n) ≦ A (n−1) and B (p) ≦ B (p−1)
If the above condition is satisfied, it is determined that the correlation in the oblique direction is possible. If such a condition is not satisfied, it is determined that the correlation in the oblique direction is not possible, and the determination result is output to the selection circuit 107.

When the video input signal in is in the state shown in FIG. 7, the interpolation calculation is performed as follows.
That is, for each pixel value
A (−2) ≦ A (−1) ≦ A (0) ≦ A (1) ≦ A (2) and B (−2) ≦ B (−1) ≦ B (0)
Therefore, it is determined that the correlation in the oblique direction is possible, and the correlation between A (1) and B (−1) is selected as in the second embodiment, and X (0) = (10 + 10) / 2 = 10. It becomes. Therefore, the pixel value of the interpolation pixel X is 10.

  When the video input signal in is in the state shown in FIG. 8, the signal characteristic determination circuit 106 </ b> B cannot find a pixel that satisfies the above condition, and therefore determines that correlation in the oblique direction is impossible. Accordingly, as in the second embodiment, the vertical correlation between A (0) and B (0) is selected, and X (0) = 9. Therefore, the pixel value of the interpolation pixel X is 9.

  As described above, the third embodiment has substantially the same advantages as the second embodiment.

  The embodiment of the present invention has been described in detail with reference to the drawings. However, the specific configuration is not limited to this embodiment, and even if there is a design change or the like without departing from the gist of the present invention, Included in the invention. For example, in each of the above embodiments, an example in which an interlace signal is converted to a progressive signal has been described. However, the present invention can also be applied to a case where an interpolation pixel is generated to increase the resolution of a display screen.

  The scanning line interpolation method and the scanning line interpolation circuit of the present invention can be applied to, for example, a liquid crystal display device and an EL (electroluminescence) display device in addition to the plasma display device, and can increase the resolution of the display screen.

1 is a block diagram showing an electrical configuration of a scanning line interpolation circuit for implementing a scanning line interpolation method according to a first embodiment of the present invention. FIG. FIG. 2 is a block diagram showing an electrical configuration of an isolated point removal circuit 47 in FIG. 1. 6 is a time chart of signals at various parts for explaining the operation of the isolated point removal circuit 47; It is a block diagram which shows the electrical constitution of the plasma display apparatus in which the scanning line interpolation circuit of FIG. 1 is used. It is a figure which shows the display screen interpolated by the scanning line interpolation circuit of FIG. It is a block diagram which shows the electric constitution of the scanning line interpolation circuit for implementing the scanning line interpolation method which is 2nd Example of this invention. It is a figure which shows the example of the pixel value of each pixel for demonstrating the scanning line interpolation method. It is a figure which shows the example of the pixel value of each pixel for demonstrating the scanning line interpolation method. It is a figure explaining the diagonal correlation adaptive scanning line interpolation method. FIG. 10 is a block diagram showing an electrical configuration of a scanning line interpolation circuit for implementing the scanning line interpolation method shown in FIG. 9. It is a block diagram of the isolated point removal circuit 18 in FIG. FIG. 11 is another configuration diagram of the isolated point removal circuit 18 in FIG. 10. It is a figure which shows the pattern of the input interlace signal. It is a figure which shows the display screen interpolated by the conventional scanning line interpolation circuit.

Explanation of symbols

31, 32, 33, 35, 36, 37 D-FF (delay flip-flop)
34 Line memory 38, 39, 40 Subtractor 41, 42, 43 Average value circuit 44, 45, 46 Absolute value circuit 47 Isolated point removal circuit 48 Correlation determination circuit 49 Selector 51, 61 Size comparison circuit 52, 55, 62, 65 Shift register 53, 56, 63, 66 Selector 54, 64 AND circuit 57, 67 OR circuit 78 Scan line interpolation circuit 101 1 line delay circuit 102, 103 Shift register (memory circuit)
104 Correlation determination circuit 105 Interpolation circuit 106 Signal characteristic determination circuit 107 Selection circuit 108 Synthesis circuit

Claims (6)

The pixel value of the pixel supplied from the vertical direction and the plurality of diagonal directions is set for the pixel supplied on the first scan line and the pixel supplied on the second scan line arranged below the first scan line. An oblique correlation type scanning line interpolation method for detecting a direction having the highest correlation and performing interpolation in the detected direction,
A (0) is a pixel corresponding to the pixel X on the first scanning line above the pixel X to be interpolated,
Pixels A (−1), A (−2),..., A (−N) (in order from the pixel A (0) closer to the pixel A (0) on the left side of the pixel A (0) on the first scanning line. N is a positive integer), and pixels A (1), A (2),... In order from the pixel A (0) on the right side of the pixel A (0) on the first scanning line in order from the pixel A (0). , A (N),
A pixel corresponding to the pixel X of the second scanning line below the pixel X is B (0),
Pixels B (−1), B (−2),..., B (−N) (in order from the pixel closer to the pixel B (0) on the left side of the pixel B (0) on the second scanning line. N is a positive integer), and pixels B (1), B (2),..., In order from the pixel closer to the pixel B (0) in the pixel on the right side of the pixel B (0) on the first scanning line. Let B (N)
A predetermined number or more of continuous pixels A (n) (n is an integer) including the pixels A (0) on the first scanning line, and pixels B (n) supplied on the corresponding second scanning line )about,
Pixel value of A (n)> Pixel value of B (n) (Condition 1)
Or A (n) (n is an integer) that includes at least a predetermined number of pixels A (0) supplied on the first scanning line, and the second scanning line corresponding thereto For supplied pixel B (n),
Pixel value of A (n) <Pixel value of B (n) (Condition 2)
Is established,
In addition, for the pixel X, the correlation of pixel values in the oblique direction between the pixel A (m) and the pixel B (−m) (m is a positive or negative integer), and the pixel A (0) and the pixel B (0 ) And the pixel value in the oblique direction between the pixel A (m) and the pixel B (−m) in which the specific m is designated is the highest among the correlations in the vertical pixel value,
A scanning line interpolation method, wherein the pixel value of the pixel X is interpolated from a pixel A (m) and a pixel B (-m). The pixel value of the pixel supplied from the vertical direction and the plurality of diagonal directions is set for the pixel supplied on the first scan line and the pixel supplied on the second scan line arranged below the first scan line. An oblique correlation type scanning line interpolation method for detecting a direction having the highest correlation and performing interpolation in the detected direction,
A (0) is a pixel corresponding to the pixel X on the first scanning line above the pixel X to be interpolated,
Pixels A (−1), A (−2),..., A (−N) (in order from the pixel A (0) closer to the pixel A (0) on the left side of the pixel A (0) on the first scanning line. N is a positive integer), and pixels A (1), A (2),... In order from the pixel A (0) on the right side of the pixel A (0) on the first scanning line in order from the pixel A (0). , A (N),
A pixel corresponding to the pixel X of the second scanning line below the pixel X is B (0),
Pixels B (−1), B (−2),..., B (−N) (in order from the pixel closer to the pixel B (0) on the left side of the pixel B (0) on the second scanning line. N is a positive integer), and pixels B (1), B (2),..., In order from the pixel closer to the pixel B (0) in the pixel on the right side of the pixel B (0) on the first scanning line. Let B (N)
A predetermined number or more of continuous pixels A (n) (n is an integer) including pixels A (0) supplied on the first scanning line, and pixels B (0) supplied on the second scanning line. Including B (p) (p is an integer) that is continuous for the predetermined number or more.
Pixel value of A (n) ≧ pixel value of A (n−1) and pixel value of B (p) ≧ B (p−1),
Pixel value (Condition 3)
Or
Pixel value of A (n) ≦ pixel value of A (n−1) and pixel value of B (p) ≦ B (p−1)
Pixel value (Condition 4)
Is established,
For the pixel X, the correlation of the pixel values in the oblique direction between the pixel A (m) and the pixel B (−m) (m is a positive or negative integer), and the pixel A (0) and the pixel B (0). When the correlation between the pixel value in the oblique direction between the pixel A (m) and the pixel B (−m) in which the specific m is specified is the highest
A scanning line interpolation method, wherein the pixel value of the pixel X is interpolated from a pixel A (m) and a pixel B (-m). When the condition 1 or the condition 2 is not satisfied,
2. The scanning line interpolation method according to claim 1, wherein the pixel value of the pixel X is interpolated from the pixel A (0) and the pixel B (0). When the condition 3 or 4 is not satisfied,
3. The scanning line interpolation method according to claim 2, wherein the pixel value of the pixel X is interpolated from the pixel A (0) and the pixel B (0). When the condition 1 and the condition 2 are satisfied and the correlation between the pixel values of two or more sets of the pixel A (r) and the pixel B (−r) (r is an integer) is similarly highest,
2. The scanning line interpolation method according to claim 1, wherein the pixel value of the pixel X is interpolated from a pixel A (r) and a pixel B (-r) having a smaller r value. When the condition 3 and the condition 4 are satisfied and the correlation between the pixel values of two or more sets of the pixel A (r) and the pixel B (−r) (r is an integer) is similarly highest,
The scanning line interpolation method according to claim 2, wherein the pixel value of the pixel X is interpolated from a pixel A (r) and a pixel B (-r) having a smaller value of r.

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