JP4236909B2 - Power semiconductor module - Google Patents

Power semiconductor module Download PDF

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Publication number
JP4236909B2
JP4236909B2 JP2002329558A JP2002329558A JP4236909B2 JP 4236909 B2 JP4236909 B2 JP 4236909B2 JP 2002329558 A JP2002329558 A JP 2002329558A JP 2002329558 A JP2002329558 A JP 2002329558A JP 4236909 B2 JP4236909 B2 JP 4236909B2
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JP
Japan
Prior art keywords
current
shunt resistor
circuit pattern
semiconductor element
switching semiconductor
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Expired - Fee Related
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JP2002329558A
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Japanese (ja)
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JP2004165430A (en
Inventor
信義 木本
享 木村
剛司 堀口
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

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  • Inverter Devices (AREA)
  • Power Conversion In General (AREA)

Description

【0001】
【発明の属する技術分野】
この発明は、放熱板上の絶縁基板に取付けられたパワー素子に流れる電流を検出するためのシャント抵抗器を内蔵した電力用半導体モジュールに関するものである。
【0002】
【従来の技術】
大電力向けのシャント抵抗器を絶縁基板上に搭載した従来の構造では、放熱量を少なくするために微小抵抗器を用い、そのような微小抵抗器を得るためには、シャント抵抗器は幅の広い形状になる。そのシャント抵抗から電圧降下を検出するには、シャント抵抗器の一端に設けた接続点と、シャント抵抗器を搭載する基板パターン上の他の接続点が設けられ、両接続点からワイヤが引き出される。
【0003】
シャント抵抗器の抵抗を調節するためにスリットを形成したものがある(例えば、特許文献1参照)。
【0004】
シャント抵抗器の検出精度を上げるために、電圧検出用端子に電流を流さないようにしたものがある(例えば、特許文献2参照)。
【0005】
【特許文献1】
特開2000-174202号公報「電流検出用抵抗器」(段落番号[0008]、図1)
【0006】
【特許文献2】
特開平7-191059号公報「電流検出器」(段落番号[0009]、図1)
【0007】
【発明が解決しようとする課題】
ところで幅広のシャント抵抗器では、前記パターン上を広く分布するように流れ、そのため、前記両接続点間にも流れ、その間で新たに電圧降下が生じる。また、接続点付近にスイッチング電流が流れる、前記ワイヤに誘起電圧が生じる、その結果、(P)側電源→(P)側パワー素子(P側動作)への電流と、次のタイミングでの(N)側パワー素子→(N)側電源(N側動作)への電流との向き(PN間での電流の向き)によって、シャント抵抗器の検出電圧に差が生じる。このシャント抵抗出力値のアンバランスを生じることで抵抗値の精度が悪くなった。このP側動作およびN側動作については後で図を用いて示す。
【0008】
特許文献1のものは、本発明の特徴であるスリットを形成しているが、それはシャント抵抗値を調節するためのものであり、また、特許文献2のものは、スリットを形成したものではなく、複雑な構成となっている。
【0009】
この発明は、高い検出精度のシャント抵抗器を備えた電力半導体モジュールを提供するものである。
【0010】
本発明に係る電力用半導体モジュールは、表主面に第1、第2の回路パターンを有する電力用絶縁基板、前記第1の回路パターン上に搭載され互いに逆並列に接続され第1のスイッチング半導体素子と第1のフリーホイールダイオードとで構成される第1の半導体素子群、前記第2の回路パターン上に搭載され互いに逆並列に接続され且つ第1のスイッチング半導体素子に直列接続された第2のスイッチング半導体素子と第2のフリーホイールダイオードとで構成される第2の半導体素子群、記第1のスイッチング半導体素子と前記第2のスイッチング半導体素子との夫々に流れる電流が互いに選択的且つ互いに逆方向に流れる電流検出用のシャント抵抗器であって、その一端が前記第1の回路パターン接続され、前記第2の回路パターンの第2のスイッチング半導体素子をとおる電流を流すワイヤが前記一端の近傍に接続されるシャント抵抗器、および、前記主電流で生じる電圧を検出する2つの電圧検出用電極部を備えた電力用半導体モジュールにおいて、前記第1のスイッチング半導体素子から第1の回路パターンを通じて前記シャント抵抗器に流れる電流の経路と、前記シャント抵抗器からから第2の回路パターンを通じて第2のスイッチング半導体素子に流れる電流の経路との両経路から外れた位置に、前記電圧検出用電極部を設けると共に、前記第1の回路パターンにおいて、前記電流が前記電圧検出用電極部へ分流しないように、前記電流の経路と、前記電圧検出用電極部との間に、電流の電流方向によらず検出位置間のインピーダンスを等しくするスリットを形成する。
【0011】
【発明の実施の形態】
図9に本発明が適用される電力半導体装置の内部回路図を示す。3相ブリッジ形成された6個のパワー素子12がパッケージ内に収納されており、直流電源端子BPおよびPNと、交流出力端子U、V、Wを備える。その出力端子の各ラインに電流検出用のシャント抵抗4が設けられている。
【0012】
実施の形態1.
図1の(A)に本発明の実施形態1を示しており、これは、図9の電力半導体装置における1相分(例えばU相)のみを示しており、他の2相(V、W相)もこれと同じ構成である。同図中横方向から見て“コ”の字形のシャント抵抗4の(取付け時の)下面4aは、絶縁基板11に形成されたパターン2上に搭載される。シャント抵抗器4の上面4bにはアルミワイヤ5aを通じて電流が供給され(別のタイミングでは引き出され)、シャント抵抗4の下面4aに対して、パターン2を通じてアルミワイヤ5bから電流が引き出される(別のタイミングでは供給される)。
【0013】
そのシャント抵抗器4の上面4bにおいては、アルミワイヤ5aの接続個所の左側に電圧検出用端子Taが設けられ、その端子の左側方のパターン2上に電圧検出用端子Tbが設けられ、両端子Ta、Tbで検出された電圧降下は、電圧検出ワイヤ13を通じて外部の中継端子8に供給される。また、パターン2上には半導体素子や他のパワーモジュール12が搭載される。
【0014】
ここで、シャント抵抗器4に流れる電流の一部がパターン2上の端子Tbの付近にも流れる結果、既述したように、両端子Ta、Tb間にも電圧降下が生じ、また、不要な誘起電圧も発生した。
【0015】
そこで本実施形態1では、端子Tbの近傍に電流が流れないように、端子Tbの右方に図中上下方向に延在するスリット(パターンの切り欠け)16aをパターン2上に形成している。そのスリット16aは、好ましくは、シャント抵抗4の左下端部に回り込むように、スリット下端部から更に右方向に延在する“L”字形としてシャント抵抗器の電流経路から隔てるのが好ましい。
【0016】
図1の(B)は、図1(A)の半導体装置におけるPN間で電流の流れを示しており、太字矢印19は、P側電源(図9のBP)→P側パワー素子への流れ(P側動作)を示し、細字矢印20は、別のタイミングであるN側パワー素子→N側電源(図9のBN)への流れ(N側動作)を示す。
【0017】
このように、P側動作、N側動作において電流の向きが変わっても、両端子Ta、Tb近傍に流れる電流が小さくなるため、上述したような不具合は発生せず、よってシャント抵抗器の出力電圧値のバランスを整えることができる。また、回路パターン形成と同時に切り欠き部を形成できるので、シャント抵抗器にスリットを設け検出位置間のインピーダンスを等しくしたものに比し、製造コストが安価で小型の電力用半導体モジュールを提供できる効果がある。
【0018】
実施の形態2.
図2の(A)に本発明の実施形態2を示している。コの字形のシャント抵抗4をパターン2上に搭載した構造において、そのシャント抵抗器4の上面において、アルミワイヤ5aの接続ポイントの右側に電圧検出用端子Taが設けられ、その端子の下側のパターン2上でかつ、アルミワイヤ5bにおける接続ポイントの右側に電圧検出用端子Tbが設けられる。両端子Ta、Tbで検出された電圧降下は、電圧検出ワイヤ13を通じて外部の中継端子8に供給される。
【0019】
そして、端子Tbがアルミワイヤ5bの接続個所から隔てられるように、上下方向のスリット16bを形成している。そのスリット16bは、好ましくは、端子Tbを端子Taからも隔てられるように、スリット上端部から更に右方向に延在する“L”字形とするのが好ましい。
【0020】
図2(B)は、図2(A)の半導体装置におけるPN間で電流の流れを示しており、太字矢印19は、P側電源(図9のBP)→P側パワー素子への流れ(P側動作)を示し、細字矢印20は、別のタイミングであるN側パワー素子→N側電源(図9のBN)への流れ(N側動作)を示す。
【0021】
このように、P側動作、N側動作において電流の向きが変わっても、両端子Ta、Tb近傍に流れる電流が小さくなるため、上述したような不具合は発生せず、よってシャント抵抗器の出力電圧値のバランスを整えることができる。また、回路パターン形成と同時に切り欠き部を形成できるので、シャント抵抗器にスリットを設け検出位置間のインピーダンスを等しくしたものに比し、製造コストが安価で小型の電力用半導体モジュールを提供できる効果がある。
【0022】
実施の形態3.
図3の(A)に本発明の実施形態3を示している。コの字形のシャント抵抗器4をパターン2上に搭載した構造において、そのシャント抵抗4の上面において、アルミワイヤ5aの接続個所の右側上部に電圧検出用端子Taが設けられ、その端子の下側のパターン2上でかつ、アルミワイヤ5bにおける接続個所の右側上部に電圧検出用端子Tbが設けられる。両端子Ta、Tbで検出された電圧降下は、電圧検出ワイヤ13を通じて外部の中継端子8に供給される。
【0023】
そして、端子Tbがアルミワイヤ5bの接続個所から隔てられるように、水平方向のスリット16cを形成している。そのスリット16cは、好ましくは、スリット左端から更に上方に延在する“L”字形とするのが好ましい。
【0024】
図3(B)は、図3(A)の半導体装置におけるPN間で電流の流れを示しており、太字矢印19は、P側電源(図9のBP)→P側パワー素子への流れ(P側動作)を示し、細字矢印20は、別のタイミングであるN側パワー素子→N側電源(図9のBN)への流れ(N側動作)を示す。
【0025】
このように、P側動作、N側動作において電流の向きが変わっても、両端子Ta、Tb近傍に流れる電流が小さくなるため、上述したような不具合は発生せず、よってシャント抵抗器の出力電圧値のバランスを整えることができる。また、回路パターン形成と同時に切り欠き部を形成できるので、シャント抵抗器にスリットを設け検出位置間のインピーダンスを等しくしたものに比し、製造コストが安価で小型の電力用半導体モジュールを提供できる効果がある。
【0026】
実施の形態4.
図4の(A)に本発明の実施形態4を示している。本実施形態では(側方から見て)門型のシャント抵抗器41が搭載されており、シャント抵抗器41の上面に位置するシャント抵抗材41aの両側には金属板41b、41cが設けられている。金属板41bの上端部にはアルミワイヤ5aを通じて電流が供給され(別のタイミングでは引き出され)、他方の金属板41cの上端部には、パターン2を通じてアルミワイヤ5bから電流が引き出される(別のタイミングでは供給される)。それぞれのアルミワイヤ5a、5bの接続個所の左側において、シャント抵抗器41上に電圧検出用端子Ta、Tbが設けられ、両端子Ta、Tbで検出された電圧降下は、アルミワイヤ13を通じて外部の中継端子8に供給される。前記金属板41b、41cの下端部は互いに絶縁した状態で絶縁基板11もしくはパターン2上に搭載される。
【0027】
そして、両端子Ta、Tbを互いに隔てるように、シャント抵抗器41のシャント抵抗材41a上に水平方向のスリット16dが形成される。この場合のスリットは、シャント抵抗材41aの厚さ方向に貫通した切り欠きである。
【0028】
図4(B)は、図4(A)の半導体装置におけるPN間で電流の流れを示しており、太字矢印19は、P側電源(図9のBP)→P側パワー素子への流れ(P側動作)を示し、細字矢印20は、別のタイミングであるN側パワー素子→N側電源(図9のBN)への流れ(N側動作)を示す。このように、P側動作、N側動作において電流の向きが変わっても、両端子Ta、Tb近傍に流れる電流が小さくなるため、上述したような不具合は発生せず、よってシャント抵抗器の出力電圧値のバランスを整えることができる。
【0029】
実施の形態5.
図5の(A)に本発明の実施形態5を示している。門型のシャント抵抗器41へのアルミワイヤ5a、5bの取付けは図4の場合と同じであるが、それぞれのアルミワイヤ5a、5bの接続個所の右側において、シャント抵抗41上に電圧検出用端子Ta、Tbが設けられ、両端子Ta、Tbで検出された電圧降下は、アルミワイヤ13を通じて外部の中継端子8に供給される。そして、両端子Ta、Tbを互いに隔てるように、シャント抵抗器41のシャント抵抗材41aに水平方向のスリット16eが形成される。
【0030】
図5(B)は、図5(A)の半導体装置におけるPN間で電流の流れを示しており、太字矢印19は、P側電源(図9のBP)→P側パワー素子への流れ(P側動作)を示し、細字矢印20は、別のタイミングであるN側パワー素子→N側電源(図9のBN)への流れ(N側動作)を示す。このように、P側動作、N側動作において電流の向きが変わっても、両端子Ta、Tb近傍に流れる電流が小さくなるため、上述したような不具合は発生せず、よってシャント抵抗器の出力電圧値のバランスを整えることができる。
【0031】
実施の形態6.
図4(A)で示した門型のシャント抵抗器41に対する別の実施形態を図6(A)に示し、その正面図を図6(B)に示す。このシャント抵抗器50は、平板状のシャント抵抗材50aと、その両側に取り付けられた金属板50b、50cとからなり、それらの金属板の上面に上述したアルミワイヤ5a、5bが接続される。そして、そのシャント抵抗材50aの一端にスリット53を形成している(ここまでの構成は図4および図5のシャント抵抗41と同じ)。そして、シャント抵抗材50aの他端に、前記スリット53の形状と同じ大きさの突出部54が形成されている。
【0032】
そして図6(B)に示すように、シャント抵抗材50aの両側に位置する金属板50b、50cは、互いに絶縁した状態で絶縁基板11上のパターン2上にはんだ73によって取付けられる。シャント抵抗器50の上方には、パワー素子を制御するための制御回路を備えた制御基板100が、所定の支持部材72を介して設けられている。
【0033】
このようなシャント抵抗材41を例えば帯状の材料からプレス加工する場合、一回の加工で、シャント抵抗材40aを得ることができ、廃棄する無駄な部材も生じない。
【0034】
実施の形態7.
上述した門型のシャント抵抗器41、50は、図7に示すように、絶縁基板に形成したパターン2上に、はんだ61により固定されるが、そのはんだ61aで示したように、金属板60b、60cを這い上がり、シャント抵抗材60aの面まで達すると、シャント抵抗器の抵抗値が変化し、検出精度が低下する。
【0035】
そこで本実施形態のシャント抵抗器60では、金属板60b、60cおよびシャント抵抗材60aの内面にはんだの付着を防止するコーティング処理62を施しており、これにより、はんだ這い上がりによるシャント抵抗器60の抵抗値のばらつきを防止でき、従って高さ方向にシャント抵抗器の小型化を図ることができる等の効果がある。
【0036】
実施の形態8.
図8に示したシャント抵抗器70は、図7の場合と同様にパターン2上に設けるが、金属板70b、70cの上端部に取付けピン72をはんだ73によって取付けており、それらのピン72の上端を制御基板100に形成したスルーホール100aに挿通し、その挿通部ではんだ74によって制御基板100上のパターンと電気的に接続している。
【0037】
この実施形態では、シャント抵抗器70で生じた降下電圧は、取付けピン72を通じて制御基板100側に取り出すことができ、図7に示した電圧検出ワイヤ13は不要となる。また、シャント抵抗70から制御基板100までの電圧検出経路を短くでき、結果的に、電圧検出値のインダクタンスの低減、他の磁界の影響を受けにくく耐ノイズ性の優れ、シャント抵抗検出精度が向上する。
【0038】
【発明の効果】
この発明によれば、主電流の電流方向によらず検出位置間のインピーダンスを等しくする手段を備えたので、主電流の流れる方向対応の検出電圧値を低減できる効果がある。
【図面の簡単な説明】
【図1】 第1の実施形態に基づくシャント抵抗器を取付けた電力用半導体モジュールの平面図
【図2】 第2の実施形態に基づくシャント抵抗器を取付けた電力用半導体モジュールの平面図
【図3】 第3の実施形態に基づくシャント抵抗器を取付けた電力用半導体モジュールの平面図
【図4】 第4の実施形態に基づくシャント抵抗器を取付けた電力用半導体モジュールの平面図
【図5】 第5の実施形態に基づくシャント抵抗器を取付けた電力用半導体モジュール置の平面図
【図6】 第6の実施形態に基づくシャント抵抗器の斜視図および正面図
【図7】 第7の実施形態に基づくシャント抵抗器の正面図
【図8】 第8の実施形態に基づくシャント抵抗器の正面図
【図9】 本発明が適用される電力半導体装置の内部回路図
【符号の説明】
2 パターン、4 シャント抵抗器、4a シャント抵抗材、4b、4c 金属板、5 アルミワイヤ、11 絶縁基板、13 電圧検出ワイヤ、16 スリット、41、50、60、70 シャント抵抗器、53 スリット、54 突出部、62 コーティング処理、72 取付けピン、100 制御基板、Ta、Tb 電圧検出用端子
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a power semiconductor module incorporating a shunt resistor for detecting a current flowing in a power element attached to an insulating substrate on a heat sink.
[0002]
[Prior art]
In a conventional structure in which a shunt resistor for high power is mounted on an insulating substrate, a minute resistor is used to reduce the amount of heat radiation. To obtain such a minute resistor, the shunt resistor has a width of Wide shape. In order to detect a voltage drop from the shunt resistor, a connection point provided at one end of the shunt resistor and another connection point on the substrate pattern on which the shunt resistor is mounted are provided, and wires are drawn from both connection points. .
[0003]
There is one in which a slit is formed to adjust the resistance of the shunt resistor (see, for example, Patent Document 1).
[0004]
In order to increase the detection accuracy of the shunt resistor, there is one in which no current is supplied to the voltage detection terminal (see, for example, Patent Document 2).
[0005]
[Patent Document 1]
Japanese Patent Laid-Open No. 2000-174202, “Current Detection Resistor” (paragraph number [0008], FIG. 1)
[0006]
[Patent Document 2]
Japanese Patent Laid-Open No. 7-191059 “Current Detector” (paragraph number [0009], FIG. 1)
[0007]
[Problems to be solved by the invention]
By the way, the wide shunt resistor flows so as to be widely distributed on the pattern, and therefore flows between the two connection points, and a new voltage drop occurs between the two connection points. In addition, a switching current flows in the vicinity of the connection point, and an induced voltage is generated in the wire. As a result, the current from the (P) side power source to the (P) side power element (P side operation) and ( The detected voltage of the shunt resistor varies depending on the direction of the current from the N) side power element to the (N) side power supply (N side operation) (direction of current between PN). The imbalance of the shunt resistance output value caused the resistance value accuracy to deteriorate. The P-side operation and N-side operation will be described later with reference to the drawings.
[0008]
Although the thing of patent document 1 forms the slit which is the characteristics of this invention, it is for adjusting a shunt resistance value, and the thing of patent document 2 is not what formed the slit. It has a complicated structure.
[0009]
The present invention provides a power semiconductor module including a shunt resistor with high detection accuracy.
[0010]
The power semiconductor module according to the present invention, first, second power insulating substrate having a circuit pattern, a first switching that will be connected in reverse parallel to each other is mounted on the first circuit pattern on the front main surface A first semiconductor element group comprising a semiconductor element and a first freewheel diode; a first semiconductor element group mounted on the second circuit pattern and connected in antiparallel to each other and connected in series to the first switching semiconductor element; second switching semiconductor element and the second semiconductor element group composed of the second freewheel diode, before Symbol first flow Ru current to each of the switching semiconductor element and the second switching semiconductor elements from each other selectively and a shunt resistor for current detection that flows in opposite directions, one end connected to said first circuit pattern, the second circuit pattern Shunt resistor wire passing a current passing through the second switching semiconductor elements of the emissions is connected to the vicinity of the one end, and, power with two voltage detecting electrode portion for detecting a voltage generated in said main current in the semiconductor module, said first switching semiconductor element and the path of the current flowing to the shunt resistor through the first circuit pattern, the current flowing in the second switching semiconductor element through the second circuit pattern from from the shunt resistor at a position deviated from both paths of the path of, provided with the voltage detection electrode unit in the first circuit pattern, so that the current is not shunted to the voltage detecting electrode portion, before Symbol current and path, between the voltage detecting electrode portion, a slit to equalize the impedance between the detection positions regardless of the current direction of the current Formation to.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 9 shows an internal circuit diagram of a power semiconductor device to which the present invention is applied. Six power elements 12 formed in a three-phase bridge are housed in a package, and include DC power supply terminals BP and PN and AC output terminals U, V, and W. A shunt resistor 4 for current detection is provided on each line of the output terminal.
[0012]
Embodiment 1 FIG.
FIG. 1A shows Embodiment 1 of the present invention, which shows only one phase (for example, U phase) in the power semiconductor device of FIG. 9, and the other two phases (V, W). Phase) has the same configuration. A bottom surface 4 a (when attached) of the “U” -shaped shunt resistor 4 as viewed from the side in the figure is mounted on the pattern 2 formed on the insulating substrate 11. Current is supplied to the upper surface 4b of the shunt resistor 4 through the aluminum wire 5a (extracted at another timing), and current is extracted from the aluminum wire 5b through the pattern 2 to the lower surface 4a of the shunt resistor 4 (another timing). Supplied at timing).
[0013]
On the upper surface 4b of the shunt resistor 4, a voltage detection terminal Ta is provided on the left side of the connection portion of the aluminum wire 5a, and a voltage detection terminal Tb is provided on the pattern 2 on the left side of the terminal. The voltage drop detected by Ta and Tb is supplied to the external relay terminal 8 through the voltage detection wire 13. A semiconductor element and other power modules 12 are mounted on the pattern 2.
[0014]
Here, as a result of a part of the current flowing through the shunt resistor 4 also flowing in the vicinity of the terminal Tb on the pattern 2, as described above, a voltage drop occurs between both terminals Ta and Tb, and is unnecessary. An induced voltage was also generated.
[0015]
Therefore, in the first embodiment, a slit (pattern notch) 16a extending in the vertical direction in the figure is formed on the pattern 2 on the right side of the terminal Tb so that no current flows in the vicinity of the terminal Tb. . The slit 16 a is preferably separated from the current path of the shunt resistor as an “L” shape extending further to the right from the lower end of the slit so as to wrap around the lower left end of the shunt resistor 4.
[0016]
1B shows the flow of current between the PNs in the semiconductor device of FIG. 1A, and the bold arrow 19 indicates the flow from the P-side power supply (BP in FIG. 9) to the P-side power element. A thin arrow 20 indicates a flow (N-side operation) from the N-side power element to the N-side power source (BN in FIG. 9), which is another timing.
[0017]
As described above, even if the direction of the current is changed in the P-side operation and the N-side operation, the current flowing in the vicinity of both terminals Ta and Tb is reduced, so that the above-described problem does not occur, and therefore the output of the shunt resistor. The voltage value can be balanced. In addition, since the notch can be formed at the same time as the circuit pattern formation, it is possible to provide a small-sized power semiconductor module that is less expensive to manufacture than the one in which a slit is provided in the shunt resistor and the impedance between detection positions is equal. There is.
[0018]
Embodiment 2. FIG.
FIG. 2A shows a second embodiment of the present invention. In the structure in which the U-shaped shunt resistor 4 is mounted on the pattern 2, a voltage detection terminal Ta is provided on the upper surface of the shunt resistor 4 on the right side of the connection point of the aluminum wire 5a. The voltage detection terminal Tb is provided on the pattern 2 and on the right side of the connection point of the aluminum wire 5b. The voltage drop detected at both terminals Ta and Tb is supplied to the external relay terminal 8 through the voltage detection wire 13.
[0019]
And the slit 16b of the up-down direction is formed so that the terminal Tb may be separated from the connection location of the aluminum wire 5b. The slit 16b preferably has an "L" shape extending further to the right from the upper end of the slit so that the terminal Tb is also separated from the terminal Ta.
[0020]
FIG. 2B shows a current flow between PNs in the semiconductor device of FIG. 2A, and a bold arrow 19 indicates a flow from the P-side power source (BP in FIG. 9) to the P-side power element ( P-side operation), and a thin arrow 20 indicates a flow (N-side operation) from the N-side power element to the N-side power source (BN in FIG. 9), which is another timing.
[0021]
As described above, even if the direction of the current is changed in the P-side operation and the N-side operation, the current flowing in the vicinity of both terminals Ta and Tb is reduced, so that the above-described problem does not occur, and therefore the output of the shunt resistor. The voltage value can be balanced. In addition, since the notch can be formed at the same time as the circuit pattern formation, it is possible to provide a small-sized power semiconductor module that is less expensive to manufacture than the one in which a slit is provided in the shunt resistor and the impedance between detection positions is equal. There is.
[0022]
Embodiment 3 FIG.
FIG. 3A shows Embodiment 3 of the present invention. In the structure in which the U-shaped shunt resistor 4 is mounted on the pattern 2, a voltage detection terminal Ta is provided on the upper surface of the shunt resistor 4 at the upper right side of the connection point of the aluminum wire 5 a, and the lower side of the terminal The voltage detection terminal Tb is provided on the pattern 2 and on the upper right side of the connection portion of the aluminum wire 5b. The voltage drop detected at both terminals Ta and Tb is supplied to the external relay terminal 8 through the voltage detection wire 13.
[0023]
A horizontal slit 16c is formed so that the terminal Tb is separated from the connection point of the aluminum wire 5b. The slit 16c preferably has an “L” shape extending further upward from the left end of the slit.
[0024]
FIG. 3B shows the flow of current between the PNs in the semiconductor device of FIG. 3A, and the bold arrow 19 indicates the flow from the P-side power source (BP in FIG. 9) to the P-side power element ( P-side operation), and a thin arrow 20 indicates a flow (N-side operation) from the N-side power element to the N-side power source (BN in FIG. 9), which is another timing.
[0025]
As described above, even if the direction of the current is changed in the P-side operation and the N-side operation, the current flowing in the vicinity of both terminals Ta and Tb is reduced, so that the above-described problem does not occur, and therefore the output of the shunt resistor. The voltage value can be balanced. In addition, since the notch can be formed at the same time as the circuit pattern formation, it is possible to provide a small-sized power semiconductor module that is less expensive to manufacture than the one in which a slit is provided in the shunt resistor and the impedance between detection positions is equal. There is.
[0026]
Embodiment 4 FIG.
FIG. 4A shows Embodiment 4 of the present invention. In this embodiment, a gate-type shunt resistor 41 is mounted (as viewed from the side), and metal plates 41 b and 41 c are provided on both sides of the shunt resistor material 41 a located on the upper surface of the shunt resistor 41. Yes. Current is supplied to the upper end portion of the metal plate 41b through the aluminum wire 5a (drawn at another timing), and current is drawn from the aluminum wire 5b to the upper end portion of the other metal plate 41c through the pattern 2 (another time). Supplied at timing). Voltage detection terminals Ta and Tb are provided on the shunt resistor 41 on the left side of the connection points of the aluminum wires 5a and 5b. The voltage drop detected at both terminals Ta and Tb is externally transmitted through the aluminum wire 13. It is supplied to the relay terminal 8. The lower ends of the metal plates 41b and 41c are mounted on the insulating substrate 11 or the pattern 2 while being insulated from each other.
[0027]
A horizontal slit 16d is formed on the shunt resistor 41a of the shunt resistor 41 so as to separate both terminals Ta and Tb from each other. The slit in this case is a notch penetrating in the thickness direction of the shunt resistance material 41a.
[0028]
FIG. 4B shows the flow of current between the PNs in the semiconductor device of FIG. 4A, and the bold arrow 19 indicates the flow from the P-side power supply (BP in FIG. 9) to the P-side power element ( P-side operation), and a thin arrow 20 indicates a flow (N-side operation) from the N-side power element to the N-side power source (BN in FIG. 9), which is another timing. As described above, even if the direction of the current is changed in the P-side operation and the N-side operation, the current flowing in the vicinity of both terminals Ta and Tb is reduced, so that the above-described problem does not occur, and therefore the output of the shunt resistor. The voltage value can be balanced.
[0029]
Embodiment 5 FIG.
FIG. 5A shows Embodiment 5 of the present invention. The aluminum wires 5a and 5b are attached to the gate-type shunt resistor 41 in the same manner as in FIG. 4, but a voltage detection terminal is placed on the shunt resistor 41 on the right side of the connection point of the aluminum wires 5a and 5b. Ta and Tb are provided, and the voltage drop detected at both terminals Ta and Tb is supplied to the external relay terminal 8 through the aluminum wire 13. A horizontal slit 16e is formed in the shunt resistor material 41a of the shunt resistor 41 so as to separate both terminals Ta and Tb from each other.
[0030]
FIG. 5B shows the flow of current between the PNs in the semiconductor device of FIG. 5A, and the bold arrow 19 indicates the flow from the P-side power supply (BP in FIG. 9) to the P-side power element ( P-side operation), and a thin arrow 20 indicates a flow (N-side operation) from the N-side power element to the N-side power source (BN in FIG. 9), which is another timing. As described above, even if the direction of the current is changed in the P-side operation and the N-side operation, the current flowing in the vicinity of both terminals Ta and Tb is reduced, so that the above-described problem does not occur, and therefore the output of the shunt resistor. The voltage value can be balanced.
[0031]
Embodiment 6 FIG.
FIG. 6 (A) shows another embodiment of the gate-type shunt resistor 41 shown in FIG. 4 (A), and FIG. 6 (B) shows a front view thereof. The shunt resistor 50 includes a flat shunt resistor 50a and metal plates 50b and 50c attached to both sides thereof, and the above-described aluminum wires 5a and 5b are connected to the upper surfaces of the metal plates. And the slit 53 is formed in the end of the shunt resistance material 50a (The structure so far is the same as the shunt resistance 41 of FIG. 4 and FIG. 5). And the protrusion 54 of the same magnitude | size as the shape of the said slit 53 is formed in the other end of the shunt resistance material 50a.
[0032]
As shown in FIG. 6B, the metal plates 50b and 50c located on both sides of the shunt resistance member 50a are attached to the pattern 2 on the insulating substrate 11 by solder 73 in a state of being insulated from each other. Above the shunt resistor 50, a control board 100 including a control circuit for controlling the power element is provided via a predetermined support member 72.
[0033]
When such a shunt resistance material 41 is pressed from, for example, a strip-shaped material, the shunt resistance material 40a can be obtained by a single process, and no wasteful members are discarded.
[0034]
Embodiment 7 FIG.
As shown in FIG. 7, the gate-type shunt resistors 41 and 50 described above are fixed on the pattern 2 formed on the insulating substrate by the solder 61. As shown by the solder 61a, the metal plate 60b is used. , 60c, and reaches the surface of the shunt resistor 60a, the resistance value of the shunt resistor changes and the detection accuracy decreases.
[0035]
Therefore, in the shunt resistor 60 of the present embodiment, the coating treatment 62 for preventing the adhesion of solder is applied to the inner surfaces of the metal plates 60b and 60c and the shunt resistor material 60a. Variations in the resistance value can be prevented, and therefore the shunt resistor can be downsized in the height direction.
[0036]
Embodiment 8 FIG.
The shunt resistor 70 shown in FIG. 8 is provided on the pattern 2 in the same manner as in FIG. 7, but mounting pins 72 are attached to the upper end portions of the metal plates 70 b and 70 c by solder 73. The upper end is inserted into a through hole 100a formed in the control board 100, and the insertion portion is electrically connected to the pattern on the control board 100 by solder 74.
[0037]
In this embodiment, the voltage drop generated by the shunt resistor 70 can be taken out to the control board 100 side through the mounting pin 72, and the voltage detection wire 13 shown in FIG. In addition, the voltage detection path from the shunt resistor 70 to the control board 100 can be shortened. As a result, the inductance of the voltage detection value is reduced, it is not easily affected by other magnetic fields, is excellent in noise resistance, and the shunt resistance detection accuracy is improved. To do.
[0038]
【The invention's effect】
According to the present invention, since the means for equalizing the impedance between the detection positions is provided regardless of the current direction of the main current, the detection voltage value corresponding to the direction in which the main current flows can be reduced.
[Brief description of the drawings]
FIG. 1 is a plan view of a power semiconductor module to which a shunt resistor according to a first embodiment is attached. FIG. 2 is a plan view of a power semiconductor module to which a shunt resistor is attached according to a second embodiment. 3] A plan view of a power semiconductor module to which a shunt resistor according to the third embodiment is attached. [FIG. 4] FIG. 4 is a plan view of a power semiconductor module to which a shunt resistor according to the fourth embodiment is attached. FIG. 6 is a plan view of a power semiconductor module device mounted with a shunt resistor according to a fifth embodiment. FIG. 6 is a perspective view and a front view of a shunt resistor according to a sixth embodiment. FIG. 8 is a front view of a shunt resistor based on the eighth embodiment. FIG. 9 is an internal circuit diagram of a power semiconductor device to which the present invention is applied.
2 patterns, 4 shunt resistor, 4a shunt resistor material, 4b, 4c metal plate, 5 aluminum wire, 11 insulating substrate, 13 voltage detection wire, 16 slit, 41, 50, 60, 70 shunt resistor, 53 slit, 54 Protrusion, 62 Coating treatment, 72 Mounting pin, 100 Control board, Ta, Tb Voltage detection terminal

Claims (1)

表主面に第1、第2の回路パターンを有する電力用絶縁基板、
前記第1の回路パターン上に搭載され互いに逆並列に接続され第1のスイッチング半導体素子と第1のフリーホイールダイオードとで構成される第1の半導体素子群、
前記第2の回路パターン上に搭載され互いに逆並列に接続され且つ第1のスイッチング半導体素子に直列接続された第2のスイッチング半導体素子と第2のフリーホイールダイオードとで構成される第2の半導体素子群、
記第1のスイッチング半導体素子と前記第2のスイッチング半導体素子との夫々に流れる電流が互いに選択的且つ互いに逆方向に流れる電流検出用のシャント抵抗器であって、その一端が前記第1の回路パターン接続され、前記第2の回路パターンの第2のスイッチング半導体素子をとおる電流を流すワイヤが前記一端の近傍に接続されるシャント抵抗器、および
記電流で生じる電圧を検出する2つの電圧検出用電極部を備えた電力用半導体モジュールにおいて、
前記第1のスイッチング半導体素子から第1の回路パターンを通じて前記シャント抵抗器に流れる電流の経路と、前記シャント抵抗器からから第2の回路パターンを通じて第2のスイッチング半導体素子に流れる電流の経路との両経路から外れた位置に、前記電圧検出用電極部を設けると共に、
前記第1の回路パターンにおいて、記電流が前記電圧検出用電極部へ分流しないように、前記電流の経路と、前記電圧検出用電極部との間に、電流の電流方向によらず検出位置間のインピーダンスを等しくするスリットを形成した
ことを特徴とする電力用半導体モジュール。
A power insulating substrate having first and second circuit patterns on the front main surface;
The first semiconductor element group composed of the first is mounted on the circuit pattern and the first switching semiconductor elements that will be connected antiparallel to each other the first freewheel diode,
A second semiconductor device comprising a second switching semiconductor element mounted on the second circuit pattern and connected in antiparallel to each other and connected in series to the first switching semiconductor element, and a second freewheeling diode. Element group,
A front Symbol shunt resistor for current detection that flows through the first switching semiconductor element and the second respectively the flow Ru current from each other selectively and mutually opposite directions between the switching semiconductor element, one end of the first It is connected to the first circuit pattern, detecting a second voltage generated by the shunt resistor, and before Symbol current wires flowing the passing current switching semiconductor element is connected to the vicinity of the one end of the second circuit pattern In the power semiconductor module provided with two voltage detection electrode portions,
Said first from the switching semiconductor elements of the current flowing to the shunt resistor through the first circuit pattern path, the path of the current flowing in the second switching semiconductor element through the second circuit pattern from from the shunt resistor While providing the voltage detection electrode portion at a position deviated from both paths,
In the first circuit pattern, as before Symbol current is not shunted to the voltage detecting electrode portion, and the path before Symbol current, between the voltage detecting electrode portion, depending on the current direction of the current A power semiconductor module characterized in that a slit is formed to equalize the impedance between detection positions .
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