JP2008091809A - Semiconductor module - Google Patents

Semiconductor module Download PDF

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JP2008091809A
JP2008091809A JP2006273580A JP2006273580A JP2008091809A JP 2008091809 A JP2008091809 A JP 2008091809A JP 2006273580 A JP2006273580 A JP 2006273580A JP 2006273580 A JP2006273580 A JP 2006273580A JP 2008091809 A JP2008091809 A JP 2008091809A
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negative electrode
wiring conductor
electrode side
side wiring
negative
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Osamu Usui
修 碓井
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor module in which reliability is highly improved by uniforming electric current that flows to each of semiconductor switch devices configuring the semiconductor module. <P>SOLUTION: In the semiconductor module, IGBTs 2a and 2b are placed on base board 6 through positive electrode-side electrode patterns 3a and 3b, respectively; an positive electrode-side external terminal 8 and the positive electrode-side electrode patterns 3a and 3b are connected through a positive electrode-side wiring conductors 10, 10a and 10b; an negative electrode-side external terminal 9 and negative pole-side electrode patterns 4a and 4b are connected through negative electrode-side wiring conductors 11, 11a and 11b; the IGBT 2a and the IGBT 2b are disposed to be symmetrical with regard to a symmetric surface 7; and the negative electrode-side wiring conductor 11b is longer than the negative electrode-side wiring conductor 11a. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

この発明は、ＩＧＢＴ（ｉｎｓｕｌａｔｅｄ ｇａｔｅ ｂｉｐｏｌａｒ ｔｒａｎｓｉｓｔｏｒ）等の複数の半導体スイッチ素子からなる半導体モジュールに関するものであり、特に半導体モジュールの配線構造に関するものである。   The present invention relates to a semiconductor module including a plurality of semiconductor switch elements such as an IGBT (insulated gate bipolar transistor), and more particularly to a wiring structure of the semiconductor module.

複数の半導体スイッチ素子が並列に接続された半導体モジュールにおいては、各半導体スイッチ素子の配線インダクタンス（自己インダクタンスと相互インダクタンスの総和)が異なると各半導体スイッチ素子に流れる電流が不均一となり、半導体モジュールの信頼性が低下するという問題があった。 In a semiconductor module in which a plurality of semiconductor switch elements are connected in parallel, if the wiring inductance (total of self-inductance and mutual inductance) of each semiconductor switch element is different, the current flowing through each semiconductor switch element becomes non-uniform. There was a problem that reliability decreased.

このような問題点を解決するための従来技術として、各半導体スイッチ素子につながっている正極側主回路配線と負極側主回路配線の分岐部から各半導体スイッチ素子までの距離を同じにして、各半導体スイッチ素子に流れる電流のバランスをとる構造がある。（特許文献１）。   As a conventional technique for solving such problems, the distance from the branch portion of the positive-side main circuit wiring and the negative-side main circuit wiring connected to each semiconductor switch element to each semiconductor switch element is the same. There is a structure that balances the current flowing through the semiconductor switch element. (Patent Document 1).

特開平１０−１２５８５６号公報（図３，図４）JP-A-10-125856 (FIGS. 3 and 4)

ＩＧＢＴなどゲートとエミッタ間に電圧を印加することにより、電流を通電させ、あるいは遮断させるための半導体スイッチ素子においては、各ＩＧＢＴの負極側の主回路配線のインダクタンスが同一でない場合、各ＩＧＢＴにおけるゲートとエミッタ間にかかる電圧が相違するようになり、従って各ＩＧＢＴを流れる電流が同一ではなくなる。   In a semiconductor switch element for energizing or interrupting current by applying a voltage between a gate and an emitter, such as an IGBT, if the inductance of the main circuit wiring on the negative electrode side of each IGBT is not the same, the gate in each IGBT And the voltage applied between the emitters becomes different, and therefore the currents flowing through the IGBTs are not the same.

従来技術において、負極側主回路配線の分岐部から各半導体スイッチ素子までの距離を等しくして、それぞれの自己インダクタンスを等しくなるように構成しても、負極側主回路配線の分岐部から各半導体スイッチ素子までの配線と、他の主回路配線、例えば正極側主回路配線や負極側外部端子から負極側主回路配線の分岐部までの配線との間の相互インダクタンスが、各半導体スイッチ素子によって異なる場合があり、このような場合各半導体スイッチ素子に流れる電流を同一にすることはできなかった。   In the prior art, even if the distance from the branch part of the negative-side main circuit wiring to each semiconductor switch element is made equal and the respective self-inductance is made equal, each semiconductor from the branch part of the negative-side main circuit wiring The mutual inductance between the wiring to the switch element and other main circuit wiring, for example, the positive main circuit wiring or the wiring from the negative external terminal to the branch of the negative main circuit wiring varies depending on each semiconductor switch element. In such a case, the current flowing through each semiconductor switch element cannot be made the same.

各半導体スイッチ素子に流れる電流が相違し、特定の半導体スイッチ素子に電流が集中すると、その半導体スイッチ素子の温度が上昇し、熱サイクルに対する半導体モジュールの寿命や短絡耐量を低下させてしまうというような問題があった。   When the current flowing through each semiconductor switch element is different and the current concentrates on a specific semiconductor switch element, the temperature of the semiconductor switch element rises, and the life of the semiconductor module and the short-circuit tolerance with respect to the thermal cycle are reduced. There was a problem.

この発明は、上記のような問題点を解決するためになされたものであり、各半導体スイッチ素子に流れる電流を同一にし、信頼性の高い半導体モジュールを得ることを目的としている。   The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a highly reliable semiconductor module by making the currents flowing through the semiconductor switch elements the same.

この発明に係る半導体モジュールは、ベース板上に正極側電極パターンを介して第１の半導体スイッチ素子群と第２の半導体スイッチ素子群とが載置され、正極側外部端子と正極側電極パターンとは正極側配線導体を介して接続されるとともに、負極側外部端子と第１及び第２の半導体スイッチ素子群とは負極側配線導体を介して接続され、第１の半導体スイッチ素子群はベース板に設定された対称線に関して第２の半導体スイッチ素子群と略対称になるよう配置されるとともに、正極側外部端子は対称線に関して負極側外部端子に対し略対称になるよう配置され、負極側配線導体は第１の半導体スイッチ素子群側へ分岐する第１の負極側配線導体と第２の半導体スイッチ素子群側へ分岐し、対称線に対して負極側外部端子と同じ側に位置する第２の負極側配線導体とを有し、第２の負極側配線導体の自己インダクタンスが第１の負極側配線導体の自己インダクタンスよりも大きくなるように構成したしたものである。   In the semiconductor module according to the present invention, a first semiconductor switch element group and a second semiconductor switch element group are placed on a base plate via a positive electrode pattern, and a positive external terminal, a positive electrode pattern, Are connected via a positive-side wiring conductor, the negative-side external terminal and the first and second semiconductor switch element groups are connected via a negative-side wiring conductor, and the first semiconductor switch element group is a base plate Is arranged so as to be substantially symmetric with respect to the second semiconductor switch element group with respect to the symmetry line set to be, and the positive electrode side external terminal is arranged to be substantially symmetric with respect to the negative electrode side external terminal with respect to the symmetry line. The conductor branches to the first negative electrode side wiring conductor branching to the first semiconductor switch element group side and the second semiconductor switch element group side, and is located on the same side as the negative electrode external terminal with respect to the symmetry line. And a second negative-side wiring conductor, in which self-inductance of the second negative-side wiring conductor is configured to be larger than the self-inductance of the first negative-side wiring conductor.

また、この発明に係る半導体モジュールは、ベース板上に負極側電極パターンを介して第１の半導体スイッチ素子群と第２の半導体スイッチ素子群とが載置され、負極側外部端子と負極側電極パターンとは負極側配線導体を介して接続されるとともに、正極側外部端子と上記第１及び第２の半導体スイッチ素子群とは正極側配線導体を介して接続され、第１の半導体スイッチ素子群はベース板に設定された対称線に関して第２の半導体スイッチ素子群と略対称になるよう配置されるとともに、正極側外部端子は対称線に関して負極側外部端子に対し略対称になるよう配置され、負極側配線導体は第１の半導体スイッチ素子群側へ分岐する第１の負極側配線導体と第２の半導体スイッチ素子群側へ分岐し、対称線に対して負極側外部端子と同じ側に位置する第２の負極側配線導体とを有し、第２の負極側配線導体の自己インダクタンスが第１の負極側配線導体の自己インダクタンスよりも大きくなるように構成したものである。   In the semiconductor module according to the present invention, the first semiconductor switch element group and the second semiconductor switch element group are mounted on the base plate via the negative electrode pattern, and the negative external terminal and the negative electrode are disposed. The pattern is connected through a negative-side wiring conductor, the positive-side external terminal and the first and second semiconductor switch element groups are connected through a positive-side wiring conductor, and the first semiconductor switch element group Is arranged so as to be substantially symmetrical with the second semiconductor switch element group with respect to the symmetry line set on the base plate, and the positive external terminal is substantially symmetrical with respect to the negative external terminal with respect to the symmetry line, The negative electrode side wiring conductor branches to the first negative electrode side wiring conductor and the second semiconductor switching element group side branching to the first semiconductor switch element group side, and is the same as the negative electrode side external terminal with respect to the symmetry line And a second negative-side wiring conductors located, in which self-inductance of the second negative-side wiring conductor is configured to be larger than the self-inductance of the first negative-side wiring conductor.

この発明に係る半導体モジュールによれば、ベース板上に正極側電極パターンを介して第１の半導体スイッチ素子群と第２の半導体スイッチ素子群とが載置され、正極側外部端子と正極側電極パターンとは正極側配線導体を介して接続されるとともに、負極側外部端子と第１及び第２の半導体スイッチ素子群とは負極側配線導体を介して接続され、第１の半導体スイッチ素子群はベース板に設定された対称線に関して第２の半導体スイッチ素子群と略対称になるよう配置されるとともに、正極側外部端子は対称線に関して負極側外部端子に対し略対称になるよう配置され、負極側配線導体は第１の半導体スイッチ素子群側へ分岐する第１の負極側配線導体と第２の半導体スイッチ素子群側へ分岐し、対称線に対して負極側外部端子と同じ側に位置する第２の負極側配線導体とを有し、第２の負極側配線導体の自己インダクタンスが第１の負極側配線導体の自己インダクタンスよりも大きくなるように構成したので、各半導体スイッチ素子に流れる電流を同一にし、信頼性の高い半導体モジュールを得ることができる。   According to the semiconductor module of the present invention, the first semiconductor switch element group and the second semiconductor switch element group are placed on the base plate via the positive electrode pattern, and the positive external terminal and the positive electrode The pattern is connected via a positive-side wiring conductor, the negative-side external terminal and the first and second semiconductor switch element groups are connected via a negative-side wiring conductor, and the first semiconductor switch element group is The symmetrical line set on the base plate is arranged so as to be substantially symmetrical with the second semiconductor switch element group, and the positive external terminal is arranged so as to be substantially symmetrical with respect to the negative external terminal with respect to the symmetrical line. The side wiring conductor branches to the first negative electrode side wiring conductor branching to the first semiconductor switch element group side and the second semiconductor switch element group side, and is on the same side as the negative electrode side external terminal with respect to the symmetry line Each of the semiconductor switch elements is configured so that the self-inductance of the second negative-side wiring conductor is larger than the self-inductance of the first negative-side wiring conductor. A highly reliable semiconductor module can be obtained with the same current flowing.

また、この発明に係る半導体モジュールによれば、ベース板上に負極側電極パターンを介して第１の半導体スイッチ素子群と第２の半導体スイッチ素子群とが載置され、負極側外部端子と負極側電極パターンとは負極側配線導体を介して接続されるとともに、正極側外部端子と上記第１及び第２の半導体スイッチ素子群とは正極側配線導体を介して接続され、第１の半導体スイッチ素子群はベース板に設定された対称線に関して第２の半導体スイッチ素子群と略対称になるよう配置されるとともに、正極側外部端子は対称線に関して負極側外部端子に対し略対称になるよう配置され、負極側配線導体は第１の半導体スイッチ素子群側へ分岐する第１の負極側配線導体と第２の半導体スイッチ素子群側へ分岐し、対称線に対して負極側外部端子と同じ側に位置する第２の負極側配線導体とを有し、第２の負極側配線導体の自己インダクタンスが第１の負極側配線導体の自己インダクタンスよりも大きくなるように構成したので、各半導体スイッチ素子に流れる電流を同一にし、信頼性の高い半導体モジュールを得ることができる。   According to the semiconductor module of the present invention, the first semiconductor switch element group and the second semiconductor switch element group are placed on the base plate via the negative electrode pattern, and the negative external terminal and the negative electrode The side electrode pattern is connected via a negative electrode wiring conductor, the positive external terminal and the first and second semiconductor switch element groups are connected via a positive electrode wiring conductor, and the first semiconductor switch The element group is arranged so as to be substantially symmetrical with the second semiconductor switch element group with respect to the symmetry line set on the base plate, and the positive electrode side external terminal is arranged so as to be substantially symmetrical with respect to the negative electrode side external terminal with respect to the symmetry line. And the negative electrode side wiring conductor branches to the first negative electrode side wiring conductor and the second semiconductor switch element group side, branching to the first semiconductor switch element group side. Since the second negative electrode side wiring conductor is located on the same side, and the self-inductance of the second negative electrode side wiring conductor is larger than the self inductance of the first negative electrode side wiring conductor, each semiconductor A highly reliable semiconductor module can be obtained with the same current flowing through the switch elements.

実施の形態１．
以下この発明の一実施形態を図に基づいて説明する。図１はこの発明の実施の形態１による半導体モジュール１の内部配線構造を示す斜視図、図２は同じく平面図である。複数の半導体スイッチ素子であるＩＧＢＴ２ａ，２ｂは正極側電極パターン３ａ，３ｂ上に載置されるとともに、各ＩＧＢＴ２ａ，２ｂの正極側電極であるコレクタ電極と正極側電極パターン３ａ，３ｂははんだ等により接続されている。 Embodiment 1 FIG.
Hereinafter, an embodiment of the present invention will be described with reference to the drawings. 1 is a perspective view showing an internal wiring structure of a semiconductor module 1 according to Embodiment 1 of the present invention, and FIG. 2 is a plan view of the same. The IGBTs 2a and 2b, which are a plurality of semiconductor switch elements, are placed on the positive electrode patterns 3a and 3b, and the collector electrodes and the positive electrode patterns 3a and 3b that are positive electrodes of the IGBTs 2a and 2b are made of solder or the like. It is connected.

正極側電極パターン３ａ，３ｂと負極側電極パターン４ａ，４ｂは絶縁層５ａ，５ｂ上に配置されるとともに、正極側電極パターン３ａ，３ｂと負極側電極パターン４ａ，４ｂとの間には一定の絶縁距離が設けられている。   The positive electrode patterns 3a and 3b and the negative electrode patterns 4a and 4b are disposed on the insulating layers 5a and 5b, and a certain amount is provided between the positive electrode patterns 3a and 3b and the negative electrode patterns 4a and 4b. An insulation distance is provided.

負極側電極パターン４ａ，４ｂとＩＧＢＴ２ａ，２ｂの負極側電極であるエミッタ電極はボンディングワイヤ１２ａ，１２ｂによって接続される。ＩＧＢＴ２ａ，２ｂ、正極側電極パターン３ａ，３ｂ、負極側電極パターン４ａ，４ｂ、絶縁層５ａ，５ｂはベース板６上に載置されるとともに、更にはＩＧＢＴ２ａとＩＧＢＴ２ｂはベース板６上に設置された所定の対称線に対し垂直な面７（以下対称面と呼ぶ）に関して略対称になるように配置される。そして正極側電極パターン３ａと３ｂ、負極側電極パターン４ａと４ｂ、及び絶縁層５ａと５ｂの関係も上記対称面に関して略対称となる位置関係にある。尚図１においては、対称線がベース板６の中央軸線と一致するように示されているが、対称線は中央軸線である必要はなく、ベース板６上に設置された任意の直線でよい。   The negative electrode patterns 4a and 4b and the emitter electrode which is the negative electrode of the IGBTs 2a and 2b are connected by bonding wires 12a and 12b. The IGBTs 2a and 2b, the positive electrode patterns 3a and 3b, the negative electrode patterns 4a and 4b, and the insulating layers 5a and 5b are placed on the base plate 6, and further, the IGBT 2a and the IGBT 2b are placed on the base plate 6. Further, they are arranged so as to be substantially symmetrical with respect to a plane 7 (hereinafter referred to as a symmetry plane) perpendicular to a predetermined symmetry line. The relationship between the positive electrode patterns 3a and 3b, the negative electrode patterns 4a and 4b, and the insulating layers 5a and 5b is also substantially symmetrical with respect to the symmetry plane. In FIG. 1, the symmetry line is shown to coincide with the central axis of the base plate 6, but the symmetry line need not be the central axis, and may be an arbitrary straight line installed on the base plate 6. .

また、正極側外部端子８と負極側外部端子９も対称面７に対して略対称になるように配置される。正極側外部端子８と正極側電極パターン３ａ，３ｂは正極側配線導体１０，１０ａ，１０ｂを介して接続され、負極側外部端子９と負極側電極パターン４ａ，４ｂは負極側配線導体１１，１１ａ，１１ｂを介して接続される。図３は正極側配線導体１０，１０ａ、１０ｂを示す斜視図、図４は負極側配線導体１１，１１ａ、１１ｂを示す斜視図である。   Further, the positive electrode side external terminal 8 and the negative electrode side external terminal 9 are also arranged so as to be substantially symmetrical with respect to the symmetry plane 7. The positive side external terminal 8 and the positive side electrode patterns 3a, 3b are connected via the positive side wiring conductors 10, 10a, 10b, and the negative side external terminal 9 and the negative side electrode patterns 4a, 4b are connected to the negative side wiring conductors 11, 11a. , 11b. 3 is a perspective view showing the positive electrode side wiring conductors 10, 10a and 10b, and FIG. 4 is a perspective view showing the negative electrode side wiring conductors 11, 11a and 11b.

正極側配線導体１０は、対称面７に関して正極側外部端子８と同じ側に位置し、ＩＧＢＴ２ａ側へ分岐する第１の正極側配線導体１０ａと、対称面７に関して負極側外部端子９と同じ側に位置し、ＩＧＢＴ２ｂ側に分岐する第２の正極側配線導体１０ｂの２方向に分岐する。   The positive electrode side wiring conductor 10 is positioned on the same side as the positive electrode side external terminal 8 with respect to the symmetry plane 7, and the same side as the negative electrode side external terminal 9 with respect to the symmetry plane 7 and the first positive electrode side wiring conductor 10 a branching to the IGBT 2 a side. Branching in two directions of the second positive electrode side wiring conductor 10b that branches to the IGBT 2b side.

同様に負極側配線導体１１は、対称面７に位置する分岐点１３で、対称面７に関して正極側外部端子８と同じ側に位置し、ＩＧＢＴ２ａ側に分岐する第１の負極側配線導体１１ａと、負極側外部端子９と同じ側に位置し、ＩＧＢＴ２ｂ側に分岐する第２の負極側配線導体１１ｂの２方向に分岐する。   Similarly, the negative electrode side wiring conductor 11 is located at the branch point 13 located on the symmetry plane 7, located on the same side as the positive electrode side external terminal 8 with respect to the symmetry plane 7, and the first negative electrode side wiring conductor 11 a that branches to the IGBT 2 a side. The second negative electrode side wiring conductor 11b is branched in two directions, which are located on the same side as the negative electrode side external terminal 9 and branch to the IGBT 2b side.

第２の負極側配線導体１１ｂの自己インダクタンスが第１の負極側配線導体１１ａの自己インダクタンスより大きくなるように、第２の負極側配線導体１１ｂの長さは、第１の負極側配線導体１１ａの長さより大きくなるように構成される。又半導体モジュール１には、図示していないがＩＧＢＴ２ａ，２ｂのゲートを制御するための制御用配線が設けられている。   The length of the second negative electrode side wiring conductor 11b is set so that the self inductance of the second negative electrode side wiring conductor 11b is larger than the self inductance of the first negative electrode side wiring conductor 11a. It is comprised so that it may become larger than the length of. Although not shown, the semiconductor module 1 is provided with a control wiring for controlling the gates of the IGBTs 2a and 2b.

図２において、正極側電極パターン３ａ，３ｂからＩＧＢＴ２ａ，２ｂ内を流れた電流は、ＩＧＢＴ２ａ，２ｂに設けられたエミッタ電極からボンディングワイヤ１２ａ，１２ｂ、負極側電極パターン４ａ，４ｂ、負極側配線導体１１ａ，１１ｂ，１１を介して負極側外部端子９に至る。   In FIG. 2, the currents flowing in the IGBTs 2a and 2b from the positive electrode patterns 3a and 3b are transferred from the emitter electrodes provided in the IGBTs 2a and 2b to the bonding wires 12a and 12b, the negative electrode patterns 4a and 4b, and the negative electrode wiring conductors. It reaches the negative external terminal 9 via 11a, 11b, 11.

そして各導体を交流が流れるので、発生する磁束が時間変化し、それらが自己インダクタンス及び相互インダクタンスの発生原因となる。尚各導体を流れる電流の大きさは、抵抗とインダクタンスの大きさによって決定されるが、高周波の電流が流れるので、インダクタンス値が抵抗値よりもはるかに大きく、抵抗値による影響は無視できるものである。   Since alternating current flows through each conductor, the generated magnetic flux changes with time, and these cause generation of self-inductance and mutual inductance. The magnitude of the current flowing through each conductor is determined by the magnitude of the resistance and inductance, but since the high-frequency current flows, the inductance value is much larger than the resistance value, and the influence of the resistance value can be ignored. is there.

矢印Ａで示される第２の負極側配線導体１１ｂを流れる電流の向きは、矢印Ｂで示される第２の正極側配線導体１０ｂを流れる電流の向き、及び矢印Ｃで示される負極側配線導体１１を流れる電流の向きとは逆方向であるので、矢印Ａで示される電流によって発生する磁束は、矢印Ｂ及び矢印Ｃで示される電流によって発生する磁束によって減少させられることとなる。   The direction of the current flowing through the second negative electrode side wiring conductor 11b indicated by arrow A is the direction of the current flowing through the second positive electrode side wiring conductor 10b indicated by arrow B and the negative electrode side wiring conductor 11 indicated by arrow C. Therefore, the magnetic flux generated by the current indicated by arrow A is reduced by the magnetic flux generated by the current indicated by arrows B and C.

一方矢印Ｄで示される第１の負極側配線導体１１ａを流れる電流に関しては、矢印Ｅで示される第１の正極側配線導体１０ａを流れる電流の向きと、矢印Ｆで示される正極側配線導体１０を流れる電流の向きが逆であるので、この部分で磁束は相殺される方向に働くが、矢印Ｆの電流は矢印Ｅの電流より大きいので、矢印Ｆの電流による磁束のほうが大きく、従って第１の負極側配線導体１１ａ部分においては、矢印Ｄの電流によって発生する磁束に矢印Ｆの電流によって発生する磁束が加算されることとなる。   On the other hand, regarding the current flowing through the first negative electrode side wiring conductor 11a indicated by arrow D, the direction of the current flowing through the first positive electrode side wiring conductor 10a indicated by arrow E and the positive electrode side wiring conductor 10 indicated by arrow F are shown. Since the direction of the current flowing in the direction is opposite, the magnetic flux acts in this direction to cancel out, but since the current of the arrow F is larger than the current of the arrow E, the magnetic flux due to the current of the arrow F is larger, so the first In the negative electrode side wiring conductor 11a, the magnetic flux generated by the current indicated by the arrow F is added to the magnetic flux generated by the current indicated by the arrow D.

このため、矢印Ａで示される部分における第２の負極側配線導体１１ｂで発生する相互インダクタンスは、第２の負極側配線導体１１ｂ全体の配線インダクタンス（自己インダクタンスと相互インダクタンスの総和、以下同じ)を小さくする。一方、矢印Ｄで示される部分における第１の負極側配線導体１１ａで発生する相互インダクタンスは、第１の負極側配線導体１１ａ全体の配線インダクタンスを大きくする。   For this reason, the mutual inductance generated in the second negative-side wiring conductor 11b in the portion indicated by the arrow A is the wiring inductance of the entire second negative-side wiring conductor 11b (the sum of self-inductance and mutual inductance, hereinafter the same). Make it smaller. On the other hand, the mutual inductance generated in the first negative electrode side wiring conductor 11a in the portion indicated by the arrow D increases the wiring inductance of the entire first negative electrode side wiring conductor 11a.

また、第１の負極側配線導体１１ａと第２の負極側配線導体１１ｂを対称面７に関して略対称の形状にした場合、負極側外部端子９から負極側配線導体１１及び第２の負極側配線導体１１ｂを介して負極側電極パターン４ｂに至るまでの最短距離が、負極側外部端子９から負極側配線導体１１及び第１の負極側配線導体１１ａを介して負極側電極パターン４ａに至るまでの最短距離より短くなり、自己インダクタンスも小さくなる。   Further, when the first negative electrode side wiring conductor 11a and the second negative electrode side wiring conductor 11b are substantially symmetrical with respect to the symmetry plane 7, the negative electrode side wiring conductor 11 and the second negative electrode side wiring are connected from the negative electrode side external terminal 9. The shortest distance to reach the negative electrode pattern 4b via the conductor 11b is from the negative external terminal 9 to the negative electrode pattern 4a via the negative electrode conductor 11 and the first negative electrode conductor 11a. Shorter than the shortest distance, the self-inductance is also reduced.

そこで以上の点を考慮し、本発明においては、第２の負極側配線導体１１ｂにおいて、第１の負極側配線導体１１ａより長くなる部分１１ｂ１を設けるように構成したものである。このように構成することにより、第２の負極側配線導体１１ｂの自己インダクタンスが第１の負極側配線導体１１ａの自己インダクタンスより大きくなり、第１の負極側配線導体１１ａ及び第２の負極側配線導体１１ｂの矢印部分Ａ、Ｄにおいて発生した相互インダクタンスの差を相殺することができる。   In view of the above, in the present invention, the second negative electrode side wiring conductor 11b is provided with a portion 11b1 which is longer than the first negative electrode side wiring conductor 11a. With this configuration, the self-inductance of the second negative-side wiring conductor 11b is larger than the self-inductance of the first negative-side wiring conductor 11a, and the first negative-side wiring conductor 11a and the second negative-side wiring A difference in mutual inductance generated in the arrow portions A and D of the conductor 11b can be canceled out.

これにより負極側外部端子９から対称面７に関して負極側外部端子９と同じ側にあるＩＧＢＴ２ｂまでに至る配線インダクタンスと、負極側外部端子９から対称面７に関して正極側外部端子８と同じ側にあるＩＧＢＴ２ａまでに至る配線インダクタンスとのバランスをとることができ、対称面７に関して略対称に配置されたＩＧＢＴ２ａ，２ｂに流れる電流を同一にすることができる。   As a result, the wiring inductance from the negative external terminal 9 to the IGBT 2b on the same side as the negative external terminal 9 with respect to the symmetry plane 7, and the positive external terminal 8 with respect to the symmetry plane 7 from the negative external terminal 9 are on the same side. It is possible to balance the wiring inductance up to the IGBT 2a and to make the currents flowing through the IGBTs 2a and 2b arranged substantially symmetrically with respect to the symmetry plane 7 the same.

また、第２の負極側配線導体１１ｂの自己インダクタンスを変化させるだけでなく、ボンディングワイヤ１２ｂ及び負極側電極パターン４ｂの自己インダクタンスを、ボンディングワイヤ１２ａ及び負極側電極パターン４ａの自己インダクタンスより大きくすることにより、第１の負極側配線導体１１ａ及び第２の負極側配線導体１１ｂの矢印部分Ａ、Ｄにおいて発生した相互インダクタンスの差を相殺することもできる。   In addition to changing the self-inductance of the second negative electrode-side wiring conductor 11b, the self-inductance of the bonding wire 12b and the negative electrode-side electrode pattern 4b is made larger than the self-inductance of the bonding wire 12a and the negative electrode-side electrode pattern 4a. Thus, the mutual inductance difference generated in the arrow portions A and D of the first negative electrode side wiring conductor 11a and the second negative electrode side wiring conductor 11b can be offset.

これにより、負極側外部端子９から対称面７に関して負極側外部端子９と同じ側にあるＩＧＢＴ２ｂまでに至る配線インダクタンスと、負極側外部端子９から対称面７に関して正極側外部端子８と同じ側にあるＩＧＢＴ２ａまでに至る配線インダクタンスとのバランスをとることができる。   As a result, the wiring inductance from the negative electrode side external terminal 9 to the IGBT 2b on the same side as the negative electrode side external terminal 9 with respect to the symmetry plane 7 and the negative electrode side external terminal 9 to the same side as the positive electrode side external terminal 8 with respect to the symmetry surface 7 It is possible to balance the wiring inductance up to a certain IGBT 2a.

次に上記実施の形態の場合に１１b１の長さを具体的にどのような値に設定するかについて以下説明する。図５に示すような細線に電流が流れた場合の相互インダクタンスＭは（1)式のように示される。
M=μ0・l・{ln（2・l/D)−1}/（2・π) ・・・（1)
また、図６に示すような長さLe、幅w、厚さtを有する自己インダクタンスLは(2)式のように示される。
L=μ0・Le・[ln{2・Le/(w＋t)}＋0.5]/(2・π) ・・・(2) Next, a specific value for setting the length of 11b1 in the case of the above embodiment will be described below. The mutual inductance M when a current flows through a thin line as shown in FIG. 5 is expressed by equation (1).
M = μ 0 · l · {ln (2 · l / D) −1} / (2 · π) (1)
Further, a self-inductance L having a length Le, a width w, and a thickness t as shown in FIG.
L = μ 0・ Le ・ [ln {2 ・ Le / (w + t)} + 0.5] / (2 ・ π) (2)

次に図７に示すように、第１の負極側配線導体１１ａを流れる電流Ｄと正極側配線導体１０を流れる電流Ｆとの間の相互インダクタンスＭ１及び第２の負極側配線導体１１ｂを流れる電流Ａと負極側配線導体１１を流れる電流Ｃとの間の相互インダクタンスＭ２は、(1)式より、
M1=μ0・l・{ln(2・l/D1)−1}/(2・π)
M2=μ0・l・{ln(2・l/D2)−1}/(2・π) ・・・(4)
となる。 Next, as shown in FIG. 7, the mutual inductance M1 between the current D flowing through the first negative electrode side wiring conductor 11a and the current F flowing through the positive electrode side wiring conductor 10 and the current flowing through the second negative electrode side wiring conductor 11b. A mutual inductance M2 between A and the current C flowing through the negative electrode side wiring conductor 11 is expressed by the following equation (1).
M1 = μ 0・ l ・ {ln (2 ・ l / D1) −1} / (2 ・ π)
M2 = μ 0・ l ・ {ln (2 ・ l / D2) −1} / (2 ・ π) (4)
It becomes.

尚電流Ｅと電流Ｂは大きさが同じで、しかも電流Ｄ及び電流Ａに対し向きが逆であるので、相互インダクタンスの差は相殺されることとなり、考慮する必要はない。又第１の負極側配線導体１１ａの自己インダクタンスをL1、第２の負極側配線導体１１ｂの自己インダクタンスをL2とすると、図８に示すように、１１ａ側の配線インダクタンスは、L1＋M1、１１ｂ側の配線インダクタンスはL2−M2となる。   Since the current E and the current B have the same magnitude and opposite directions with respect to the current D and the current A, the mutual inductance difference is canceled out and need not be considered. Further, if the self-inductance of the first negative-side wiring conductor 11a is L1 and the self-inductance of the second negative-side wiring conductor 11b is L2, the wiring inductance on the 11a side is L1 + M1, 11b side as shown in FIG. The wiring inductance is L2-M2.

１１ｂ側配線のうち、１１ａ側配線より長い部分１１ｂ1の自己インダクタンスをL3とすると、L2−M2=L1＋L3−M2となる。
１１ａ側の配線インダクタンスと１１ｂ側の配線インダクタンスを同じにするためには、L1＋M1=L1＋L3−M2とする必要があり、従ってL3=M1＋M2とする必要がある。 If the self-inductance of the portion 11b1 longer than the 11a side wiring among the 11b side wiring is L3, L2−M2 = L1 + L3−M2.
In order to make the wiring inductance on the 11a side the same as the wiring inductance on the 11b side, it is necessary to set L1 + M1 = L1 + L3-M2, and therefore L3 = M1 + M2.

(4)式より、
L3=μ0・l・{ln(2・l/D1)−1}/(2・π)＋μ0・l・{ln(2・l/D2)−1}/(2・π)
=μ0・l・[{ln(2・l/D1)−1}＋{ln(2・l/D2)−1}]/(2・π) ・・・(5)
また、(2)式より、
L3=μ0・Le・[ln{2・Le/(w＋t)}＋0.5]/(2・π) ・・・(6)
(5)，(6)式より、
μ0・l・[{ln(2・l/D1)−1}＋{ln(2・l/D2)−1}]/(2・π)=
μ0・Le・[ln{2・Le/(w＋t)}＋0.5]/(2・π)
Le・[ln{2・Le/(w＋t)}＋0.5}]=l・[{ln(2・l/D1)−1}＋{ln(2・l/D2)−1}]となるように１１b１の形態を決定すればよい。
ここで例えば、w=8[mm]，t=1[mm]，l=25[mm]，D1=10[mm]，D2=15[mm]の場合、
Le=13.0[mm]となる。 From equation (4)
L3 = μ 0・ l ・ {ln (2 ・ l / D1) −1} / (2 ・ π) + μ 0・ l ・ {ln (2 ・ l / D2) −1} / (2 ・ π)
= μ 0・ l ・ [{ln (2 ・ l / D1) −1} + {ln (2 ・ l / D2) −1}] / (2 ・ π) (5)
Also, from equation (2)
L3 = μ 0・ Le ・ [ln {2 ・ Le / (w + t)} + 0.5] / (2 ・ π) (6)
From equations (5) and (6),
μ 0・ l ・ [{ln (2 ・ l / D1) −1} + {ln (2 ・ l / D2) −1}] / (2 ・ π) =
μ 0・ Le ・ [ln {2 ・ Le / (w + t)} + 0.5] / (2 ・ π)
Le · [ln {2 · Le / (w + t)} + 0.5}] = l · [{ln (2 · l / D1) −1} + {ln (2 · l / D2) −1}] Thus, the form of 11b1 may be determined.
Here, for example, when w = 8 [mm], t = 1 [mm], l = 25 [mm], D1 = 10 [mm], D2 = 15 [mm]
Le = 13.0 [mm].

実施の形態２．
図９はこの発明の実施の形態２による半導体モジュールの内部配線構造を示す斜視図、図１０は配線導体を取り除いた状態を示す平面図である。対称面７に関して正極側外部端子８と同じ側に２個のＩＧＢＴ２ａ１及びＩＧＢＴ２ａ２が設けられるとともに、負極側外部端子９と同じ側に２個のＩＧＢＴ２ｂ１及びＩＧＢＴ２ｂ２が配置される。 Embodiment 2. FIG.
9 is a perspective view showing an internal wiring structure of a semiconductor module according to Embodiment 2 of the present invention, and FIG. 10 is a plan view showing a state in which the wiring conductor is removed. Two IGBTs 2 a 1 and IGBT 2 a 2 are provided on the same side as the positive external terminal 8 with respect to the symmetry plane 7, and two IGBTs 2 b 1 and IGBT 2 b 2 are arranged on the same side as the negative external terminal 9.

実施の形態１の場合と同様第２の負極側配線導体１１ｂの自己インダクタンスが第１の負極側配線導体１１ａの自己インダクタンスより大きくなるように、第２の負極側配線導体１１ｂの長さは第１の負極側配線導体１１ａの長さより長くなるように構成される。即ち図９に示すように、第２の負極側配線導体１１ｂの先端部を折り曲げて構成することにより、第２の負極側配線導体１１ｂの長さを第１の負極側配線導体１１ａの長さより長くなるようにしたものである。   As in the first embodiment, the length of the second negative electrode side wiring conductor 11b is set so that the self inductance of the second negative electrode side wiring conductor 11b is larger than the self inductance of the first negative electrode side wiring conductor 11a. 1 is configured to be longer than the length of the negative electrode side wiring conductor 11a. That is, as shown in FIG. 9, the length of the second negative electrode wiring conductor 11b is made longer than the length of the first negative electrode wiring conductor 11a by bending the tip of the second negative electrode wiring conductor 11b. It is designed to be long.

また、図１０で示すように、第１の負極側配線導体１１ａと負極側電極パターン４ａとの接続点２１ａは、ＩＧＢＴ２ａ１とＩＧＢＴ２ａ２から等しい距離に配置されるとともに、第２の負極側配線導体１１ｂと負極側電極パターン４ｂの接続点２１ｂもＩＧＢＴ２ｂ１とＩＧＢＴ２ｂ２から等しい距離に配置される。これにより各ＩＧＢＴに至るまでの自己インダクタンスが等しくなるので、流れる電流も等しくなる。   As shown in FIG. 10, the connection point 21a between the first negative electrode side wiring conductor 11a and the negative electrode side electrode pattern 4a is disposed at an equal distance from the IGBT 2a1 and the IGBT 2a2, and the second negative electrode side wiring conductor 11b. The connection point 21b between the negative electrode pattern 4b and the negative electrode pattern 4b is also disposed at an equal distance from the IGBT 2b1 and the IGBT 2b2. As a result, since the self-inductance up to each IGBT becomes equal, the flowing currents also become equal.

以上のように構成することにより、実施の形態１の場合と同様、負極側外部端子９からＩＧＢＴ２ｂまでの配線インダクタンスと、負極側外部端子９からＩＧＢＴ２ａまでの配線インダクタンスを同じにすることができ、対称面７に対し対称に配置されたＩＧＢＴ２ａとＩＧＢＴ２ｂに流れる電流を同じにすることができる。本実施形態においては、さらにＩＧＢＴ２ａ１とＩＧＢＴ２ａ２に流れる電流を同じにするとともに、ＩＧＢＴ２ｂ１とＩＧＢＴ２ｂ２に流れる電流を同じにすることができる。   By configuring as described above, the wiring inductance from the negative external terminal 9 to the IGBT 2b and the wiring inductance from the negative external terminal 9 to the IGBT 2a can be made the same as in the case of the first embodiment. The currents flowing through the IGBT 2a and the IGBT 2b arranged symmetrically with respect to the symmetry plane 7 can be made the same. In the present embodiment, the currents flowing in the IGBT 2a1 and the IGBT 2a2 can be made the same, and the currents flowing in the IGBT 2b1 and the IGBT 2b2 can be made the same.

次に上記のように形成した第２の負極側配線導体１１ｂの長さを具体的にどのように設定するかについて以下説明する。
図１１に示すように、導体を折り返し構造とした場合、自己インダクタンスＬは
L=μ0・Le・d/wとなる。
従って図８に示したL3は
L3=μ0・Le・d/w ・・・(7)となる。 Next, how to specifically set the length of the second negative electrode side wiring conductor 11b formed as described above will be described.
As shown in FIG. 11, when the conductor has a folded structure, the self-inductance L is
L = μ 0 · Le · d / w.
Therefore, L3 shown in FIG.
L3 = μ 0 · Le · d / w (7)

(5)，(7)式より、
μ0・l・[{ln(2・l/D1)−1}＋{ln(2・l/D2)−1}]/(2・π)=μ0・Le・d/w
Le・d/w=l・[{ln(2・l/D1)−1}＋{ln(2・l/D2)−1}]/(2・π)
Le=w・l・[{ln(2・l/D1)−1}＋{ln(2・l/D2)−1}]/(2・π・d)
ここで例えば、w=8[mm]，d=3[mm]，l=25[mm]，D1=10[mm]，D2=15[mm]の場合、
Le=8.6[mm]となる。 From equations (5) and (7)
μ 0・ l ・ [{ln (2 ・ l / D1) −1} + {ln (2 ・ l / D2) −1}] / (2 ・ π) = μ 0・ Le ・ d / w
Le ・ d / w = l ・ [{ln (2 ・ l / D1) −1} + {ln (2 ・ l / D2) −1}] / (2 ・ π)
Le = w ・ l ・ [{ln (2 ・ l / D1) −1} + {ln (2 ・ l / D2) −1}] / (2 ・ π ・ d)
Here, for example, when w = 8 [mm], d = 3 [mm], l = 25 [mm], D1 = 10 [mm], D2 = 15 [mm]
Le = 8.6 [mm].

実施の形態３．
図１２はこの発明の実施の形態３による半導体モジュールの内部配線構造を示す斜視図、図１３は同じく平面図である。負極側配線導体１１は、分岐点１３において、対称面７に関して正極側外部端子８と同じ側に位置する第１の負極側配線導体１１ａと、負極側外部端子９と同じ側に位置する第２の負極側配線導体１１ｂとの２方向に分岐する。 Embodiment 3 FIG.
12 is a perspective view showing an internal wiring structure of a semiconductor module according to Embodiment 3 of the present invention, and FIG. 13 is a plan view of the same. The negative electrode side wiring conductor 11 has a first negative electrode side wiring conductor 11 a located on the same side as the positive electrode side external terminal 8 with respect to the symmetry plane 7 at the branch point 13 and a second side located on the same side as the negative electrode side external terminal 9. Branches in two directions with the negative-side wiring conductor 11b.

そして第２の負極側配線導体１１ｂの自己インダクタンスが第１の負極側配線導体１１ａの自己インダクタンスより大きくなるように、第２の負極側配線導体１１ｂの導体幅は第１の負極側配線導体１１ａの導体幅より小さくなるように構成される。   The conductor width of the second negative electrode wiring conductor 11b is set so that the self inductance of the second negative electrode wiring conductor 11b is larger than the self inductance of the first negative electrode wiring conductor 11a. It is comprised so that it may become smaller than the conductor width of this.

図１３において、正極側電極パターン３ａ，３ｂからＩＧＢＴ２ａ，２ｂ内を流れた電流は、ＩＧＢＴ２ａ，２ｂに設けられたエミッタ電極からボンディングワイヤ１２ａ，１２ｂ、負極側電極パターン４ａ，４ｂ、負極側配線導体１１ａ，１１ｂ，１１を介して負極側外部端子９に至る。   In FIG. 13, the currents flowing in the IGBTs 2a and 2b from the positive electrode patterns 3a and 3b are transferred from the emitter electrodes provided in the IGBTs 2a and 2b to the bonding wires 12a and 12b, the negative electrode patterns 4a and 4b, and the negative electrode conductors. It reaches the negative external terminal 9 via 11a, 11b, 11.

矢印Ａで示される第２の負極側配線導体１１ｂを流れる電流の向きは、矢印Ｂで示される第２の正極側配線導体１０ｂを流れる電流の向き、及び矢印Ｃで示される負極側配線導体１１を流れる電流の向きとは逆方向であり、互いの磁束を相殺する方向に流れる。   The direction of the current flowing through the second negative electrode side wiring conductor 11b indicated by arrow A is the direction of the current flowing through the second positive electrode side wiring conductor 10b indicated by arrow B and the negative electrode side wiring conductor 11 indicated by arrow C. Is opposite to the direction of the current flowing through, and flows in the direction of canceling out the mutual magnetic flux.

一方矢印Ｄで示される第１の負極側配線導体１１ａを流れる電流に関しては、矢印Ｅで示される第１の正極側配線導体１０ａを流れる電流の向きと、矢印Ｆで示される正極側配線導体１０を流れる電流の向きが逆であるので、この部分で磁束は相殺される方向に働くが、矢印Ｆの電流は矢印Ｅより大きいので、矢印Ｆの電流による磁束のほうが大きく、従って第１の負極側配線導体１１ａ部分の磁束は増える方向に働く。   On the other hand, regarding the current flowing through the first negative electrode side wiring conductor 11a indicated by arrow D, the direction of the current flowing through the first positive electrode side wiring conductor 10a indicated by arrow E and the positive electrode side wiring conductor 10 indicated by arrow F are shown. Since the direction of the current flowing in the direction is opposite, the magnetic flux acts in this direction to cancel out, but since the current of the arrow F is larger than the arrow E, the magnetic flux due to the current of the arrow F is larger, and therefore the first negative electrode The magnetic flux in the side wiring conductor 11a portion increases.

このため、矢印Ａで示される部分における第２の負極側配線導体１１ｂで発生する相互インダクタンスは、第２の負極側配線導体１１ｂ全体の配線インダクタンスを小さくする。一方、矢印Ｄで示される部分における第１の負極側配線導体１１ａで発生する相互インダクタンスは、第１の負極側配線導体１１ａ全体の配線インダクタンスを大きくする。   For this reason, the mutual inductance generated in the second negative electrode side wiring conductor 11b in the portion indicated by the arrow A reduces the wiring inductance of the entire second negative electrode side wiring conductor 11b. On the other hand, the mutual inductance generated in the first negative electrode side wiring conductor 11a in the portion indicated by the arrow D increases the wiring inductance of the entire first negative electrode side wiring conductor 11a.

また、第１の負極側配線導体１１ａと第２の負極側配線導体１１ｂを対称面７に関して略対称の形状にした場合、負極側外部端子９から負極側配線導体１１及び第２の負極側配線導体１１ｂを介して負極側電極パターン４ｂに至るまでの最短距離が、負極側外部端子９から負極側配線導体１１及び第１の負極側配線導体１１ａを介して負極側電極パターン４ａに至るまでの最短距離より短くなり、自己インダクタンスも小さくなる。   Further, when the first negative electrode side wiring conductor 11a and the second negative electrode side wiring conductor 11b are substantially symmetrical with respect to the symmetry plane 7, the negative electrode side wiring conductor 11 and the second negative electrode side wiring are connected from the negative electrode side external terminal 9. The shortest distance to reach the negative electrode pattern 4b via the conductor 11b is from the negative external terminal 9 to the negative electrode pattern 4a via the negative electrode conductor 11 and the first negative electrode conductor 11a. Shorter than the shortest distance, the self-inductance is also reduced.

そこで以上の点を考慮し、本実施形態においては、第２の負極側配線導体１１ｂの導体幅が第１の負極側配線導体１１ａの導体幅より小さくなるようにして、第２の負極側配線導体１１ｂの自己インダクタンスを第１の負極側配線導体１１ａの自己インダクタンスよりも大きくなるようにする。   Therefore, in consideration of the above points, in the present embodiment, the second negative electrode side wiring is formed such that the conductor width of the second negative electrode side wiring conductor 11b is smaller than the conductor width of the first negative electrode side wiring conductor 11a. The self-inductance of the conductor 11b is made larger than the self-inductance of the first negative electrode side wiring conductor 11a.

このように構成することにより、第２の負極側配線導体１１ｂの自己インダクタンスが第１の負極側配線導体１１ａの自己インダクタンスより大きくなり、第１の負極側配線導体１１ａ及び第２の負極側配線導体１１ｂの矢印部分Ａ、Ｄにおいて発生した相互インダクタンスの差を相殺することができる。   With this configuration, the self-inductance of the second negative-side wiring conductor 11b is larger than the self-inductance of the first negative-side wiring conductor 11a, and the first negative-side wiring conductor 11a and the second negative-side wiring A difference in mutual inductance generated in the arrow portions A and D of the conductor 11b can be canceled out.

これにより負極側外部端子９から対称面７に関して負極側外部端子９と同じ側にあるＩＧＢＴ２ｂまでに至る配線インダクタンスと、負極側外部端子９から対称面７に関して正極側外部端子８と同じ側にあるＩＧＢＴ２ａまでに至る配線インダクタンスとのバランスをとることができ、対称面７に関して略対称に配置されたＩＧＢＴ２ａ，２ｂに流れる電流を同一にすることができる。   As a result, the wiring inductance from the negative external terminal 9 to the IGBT 2b on the same side as the negative external terminal 9 with respect to the symmetry plane 7, and the positive external terminal 8 with respect to the symmetry plane 7 from the negative external terminal 9 are on the same side. It is possible to balance the wiring inductance up to the IGBT 2a and to make the currents flowing through the IGBTs 2a and 2b arranged substantially symmetrically with respect to the symmetry plane 7 the same.

次に上記のように形成した導体の幅を具体的にどのような値に設定するかについて以下説明する。第１の負極側配線導体１１ａの導体幅をw1、第２の負極側配線導体１１ｂの導体幅をw2としたとき、(2)式より
L1=μ0・Le・[ln{2・Le/(w1＋t)}＋0.5]/(2・π)，
L2=μ0・Le・[ln{2・Le/(w2＋t)}＋0.5]/(2・π)
図８に示すように、L1＋M1=L2−M2であるから
μ0・Le・[ln{2・Le/(w1＋t)}＋0.5]/(2・π)＋μ0・l・{ln(2・l/D1)−1}/(2・π)=
μ0・Le・[ln{2・Le/(w2＋t)}＋0.5]/(2・π)−μ0・l・{ln(2・l/D2)−1}/(2・π) Next, the specific value of the width of the conductor formed as described above will be described below. When the conductor width of the first negative electrode side wiring conductor 11a is w1, and the conductor width of the second negative electrode side wiring conductor 11b is w2,
L1 = μ 0 · Le · [ln {2 · Le / (w1 + t)} + 0.5] / (2 · π),
L2 = μ 0・ Le ・ [ln {2 ・ Le / (w2 + t)} + 0.5] / (2 ・ π)
As shown in FIG. 8, since L1 + M1 = L2-M2, μ 0 · Le · [ln {2 · Le / (w1 + t)} + 0.5] / (2 · π) + μ 0 · l · {ln (2・ L / D1) −1} / (2 ・ π) =
μ 0・ Le ・ [ln {2 ・ Le / (w2 + t)} + 0.5] / (2 ・ π) −μ 0・ l ・ {ln (2 ・ l / D2) −1} / (2 ・ π)

Le・[ln{2・Le/(w1＋t)}＋0.5]＋l・{ln(2・l/D1)−1}=
Le・[ln{2・Le/(w2＋t)}＋0.5]−l・{ln(2・l/D2)−1}
Le・[ln{2・Le/(w1＋t)}−ln{2・Le/(w2＋t)}]=
−l・{ln(2・l/D1)−1＋ln(2・l/D2)−1}
Le・ln{(w2＋t)/(w1＋t)}=−l・[ln{4・l^2/(D1・D2)}−2]
(w2＋t)/(w1＋t)=exp(−l・[ln{4・l^2/(D1・D2)}−2]/Le)
w2=(w1＋t)・exp(−l・[ln{4・l^2/(D1・D2)}−2]/Le)−t
ここで例えば、Le=40[mm]，t=1[mm]，l=25[mm]，D1=10[mm]，D2=15[mm]，
w1=10[mm]の場合、
w2=5.6[mm]となる。 Le ・ [ln {2 ・ Le / (w1 + t)} + 0.5] + l ・ {ln (2 ・ l / D1) −1} =
Le ・ [ln {2 ・ Le / (w2 + t)} + 0.5] −l ・ {ln (2 ・ l / D2) −1}
Le ・ [ln {2 ・ Le / (w1 + t)} − ln {2 ・ Le / (w2 + t)}] =
−l ・ {ln (2 ・ l / D1) −1 + ln (2 ・ l / D2) −1}
Le ・ ln {(w2 + t) / (w1 + t)} = − l ・ [ln {4 ・ l ^ 2 / (D1 ・ D2)}-2]
(w2 + t) / (w1 + t) = exp (−l ・ [ln {4 ・ l ^ 2 / (D1 ・ D2)} − 2] / Le)
w2 = (w1 + t) ・ exp (−l ・ [ln {4 ・ l ^ 2 / (D1 ・ D2)} − 2] / Le) −t
Here, for example, Le = 40 [mm], t = 1 [mm], l = 25 [mm], D1 = 10 [mm], D2 = 15 [mm],
When w1 = 10 [mm]
w2 = 5.6 [mm].

実施の形態４．
図１４はこの発明の実施の形態４による半導体モジュールの内部配線構造を示す斜視図、図１５は平面図、図１６は図１５におけるＧ−Ｇ線断面図、図１７は図１５におけるＨ−Ｈ線断面図、図１８は正極側配線導体１０，１０ａ，１０ｂを示す斜視図、図１９は負極側配線導体１１，１１ａ，１１ｂを示す斜視図である。 Embodiment 4 FIG.
14 is a perspective view showing an internal wiring structure of a semiconductor module according to Embodiment 4 of the present invention, FIG. 15 is a plan view, FIG. 16 is a cross-sectional view taken along line GG in FIG. 15, and FIG. 18 is a perspective view showing the positive electrode side wiring conductors 10, 10a and 10b, and FIG. 19 is a perspective view showing the negative electrode side wiring conductors 11, 11a and 11b.

図において、正極側配線導体１０は、対称面７に関して正極側外部端子８と同じ側に位置する第１の正極側配線導体１０ａと、負極側外部端子９と同じ側に位置する第２の正極側配線導体１０ｂの２方向に分岐する。   In the figure, a positive electrode side wiring conductor 10 is a first positive electrode side wiring conductor 10 a located on the same side as the positive electrode side external terminal 8 with respect to the symmetry plane 7 and a second positive electrode located on the same side as the negative electrode side external terminal 9. Branches in two directions of the side wiring conductor 10b.

同様に、負極側配線導体１１は、分岐点１３において、対称面７に関して正極側外部端子８と同じ側に位置する第１の負極側配線導体１１ａと、負極側外部端子９と同じ側に位置する第２の負極側配線導体１１ｂの２方向に分岐する。   Similarly, the negative electrode side wiring conductor 11 is positioned on the same side as the first negative electrode side wiring conductor 11 a and the negative electrode side external terminal 9 at the branch point 13 on the same side as the positive electrode side external terminal 8 with respect to the symmetry plane 7. Branches in two directions of the second negative electrode side wiring conductor 11b.

第１の負極側配線導体１１ａと第２の負極側配線導体１１ｂは対称面７に関して略対称になるように配置される。正極側配線導体１０，１０ａ，１０ｂと負極側配線導体１１，１１ａ，１１ｂは、一定の絶縁距離を隔てて配置されるとともに、正極側配線導体１０，１０ａ，１０ｂに流れる電流の向きは負極側配線導体１１，１１ａ，１１ｂに流れる電流の向きと逆である。   The first negative electrode side wiring conductor 11 a and the second negative electrode side wiring conductor 11 b are arranged so as to be substantially symmetric with respect to the symmetry plane 7. The positive electrode side wiring conductors 10, 10a, 10b and the negative electrode side wiring conductors 11, 11a, 11b are arranged with a certain insulation distance therebetween, and the direction of the current flowing through the positive electrode side wiring conductors 10, 10a, 10b is negative. The direction of current flowing through the wiring conductors 11, 11a, 11b is opposite.

また、図１６、図１７に示すように、第２の正極側配線導体１０ｂと第２の負極側配線導体１１ｂの間に発生する相互インダクタンスが第１の正極側配線導体１０ａと第１の負極側配線導体１１ａの間に発生する相互インダクタンスより小さくなるように、第２の正極側配線導体１０ｂと第２の負極側配線導体１１ｂの間の距離は第１の正極側配線導体１０ａと第１の負極側配線導体１１ａの間の距離より大きく構成される。   Further, as shown in FIGS. 16 and 17, the mutual inductance generated between the second positive electrode side wiring conductor 10b and the second negative electrode side wiring conductor 11b is caused by the first positive electrode side wiring conductor 10a and the first negative electrode. The distance between the second positive electrode side wiring conductor 10b and the second negative electrode side wiring conductor 11b is smaller than the mutual inductance generated between the side wiring conductors 11a. It is comprised larger than the distance between the negative electrode side wiring conductors 11a.

図１５において、正極側電極パターン３ａ、３ｂからＩＧＢＴ２ａ，２ｂに流れた電流は、ＩＧＢＴ２ａ，２ｂに設けられたエミッタ電極からボンディングワイヤ１２ａ，１２ｂ、負極側電極パターン４ａ，４ｂ、負極側配線導体１１ａ，１１ｂ，１１を介して負極側外部端子９に至る。   In FIG. 15, the currents flowing from the positive electrode patterns 3a and 3b to the IGBTs 2a and 2b are transferred from the emitter electrodes provided on the IGBTs 2a and 2b to the bonding wires 12a and 12b, the negative electrode patterns 4a and 4b, and the negative electrode conductor 11a. , 11b, 11 to the negative external terminal 9.

矢印Ａで示される第２の負極側配線導体１１ｂを流れる電流の向きは、矢印Ｃで示される負極側配線導体１１を流れる電流の向きとは逆方向であり、互いの磁束を相殺する方向に流れる。一方矢印Ｄで示される第１の負極側配線導体１１ａを流れる電流の向きは、矢印Ｆで示される正極側配線導体１０の向きとは同方向である。   The direction of the current flowing through the second negative electrode side wiring conductor 11b indicated by the arrow A is opposite to the direction of the current flowing through the negative electrode side wiring conductor 11 indicated by the arrow C, and in a direction to cancel each other's magnetic flux. Flowing. On the other hand, the direction of the current flowing through the first negative electrode side wiring conductor 11a indicated by the arrow D is the same as the direction of the positive electrode side wiring conductor 10 indicated by the arrow F.

このため、矢印Ａで示される部分における第２の負極側配線導体１１ｂで発生する相互インダクタンスは、第２の負極側配線導体１１ｂ全体の配線インダクタンスを小さくする。一方、矢印Ｄで示される部分における第１の負極側配線導体１１ａで発生する相互インダクタンスは、第１の負極側配線導体１１ａ全体の配線インダクタンスを大きくする。   For this reason, the mutual inductance generated in the second negative electrode side wiring conductor 11b in the portion indicated by the arrow A reduces the wiring inductance of the entire second negative electrode side wiring conductor 11b. On the other hand, the mutual inductance generated in the first negative electrode side wiring conductor 11a in the portion indicated by the arrow D increases the wiring inductance of the entire first negative electrode side wiring conductor 11a.

また、負極側外部端子９から負極側配線導体１１及び第２の負極側配線導体１１ｂを介して負極側電極パターン４ｂに至るまでの最短距離が、負極側外部端子９から負極側配線導体１１及び第１の負極側配線導体１１ａを介して負極側電極パターン４ａに至るまでの最短距離より短くなるので、自己インダクタンスも小さくなる。   Further, the shortest distance from the negative electrode side external terminal 9 to the negative electrode side electrode pattern 4b via the negative electrode side wiring conductor 11 and the second negative electrode side wiring conductor 11b is the negative electrode side wiring conductor 11 and Since the distance is shorter than the shortest distance from the first negative electrode wiring conductor 11a to the negative electrode pattern 4a, the self-inductance is also reduced.

一方、図１６、図１７に示すように、第１の正極側配線導体１０ａを流れる電流の向きは第１の負極側配線導体１１ａを流れる電流の向きとは逆方向であり、更に第２の正極側配線導体１０ｂを流れる電流の向きは、第２の負極側配線導体１１ｂを流れる電流の向きとは逆方向であるので、それぞれ互いの磁束を相殺する方向に電流が流れることとなる。   On the other hand, as shown in FIGS. 16 and 17, the direction of the current flowing through the first positive electrode side wiring conductor 10a is opposite to the direction of the current flowing through the first negative electrode side wiring conductor 11a. Since the direction of the current flowing through the positive electrode side wiring conductor 10b is opposite to the direction of the current flowing through the second negative electrode side wiring conductor 11b, the current flows in a direction in which the magnetic fluxes cancel each other.

従って両者の間に発生する相互インダクタンスは、配線インダクタンス全体の値を小さくする方向に働く。このため、本実施形態においては、図１６、図１７に示すように、第２の正極側配線導体１０ｂと第２の負極側配線導体１１ｂ間の距離を第１の正極側配線導体１０ａと第１の負極側配線導体１１ａ間の距離より大きくすることにより、第２の正極側配線導体１０ｂと第２の負極側配線導体１１ｂの間に発生する相互インダクタンスを第１の正極側配線導体１０ａと第１の負極側配線導体１１ａの間に発生する相互インダクタンスより小さくするものである。   Therefore, the mutual inductance generated between the two works in the direction of reducing the overall value of the wiring inductance. Therefore, in the present embodiment, as shown in FIGS. 16 and 17, the distance between the second positive electrode side wiring conductor 10b and the second negative electrode side wiring conductor 11b is set to the first positive electrode side wiring conductor 10a and the second positive electrode side wiring conductor 10b. The mutual inductance generated between the second positive electrode side wiring conductor 10b and the second negative electrode side wiring conductor 11b is made larger than the distance between the first negative electrode side wiring conductor 11a and the first positive electrode side wiring conductor 10a. The mutual inductance generated between the first negative electrode side wiring conductors 11a is made smaller.

これにより第１の負極側配線導体１１ａ及び第２の負極側配線導体１１ｂの矢印部分Ａ、Ｄにおいて発生した相互インダクタンスの差を相殺することができるとともに、負極側外部端子９から負極側電極パターン４ａに至るまでの自己インダクタンスと、負極側外部端子９から負極側電極パターン４ｂに至るまでの自己インダクタンスとの差を相殺することができる。   Thus, the difference between the mutual inductances generated in the arrow portions A and D of the first negative electrode side wiring conductor 11a and the second negative electrode side wiring conductor 11b can be canceled, and the negative electrode side electrode pattern can be connected to the negative electrode side external terminal 9 from the negative electrode side external terminal 9. The difference between the self-inductance up to 4a and the self-inductance from the negative external terminal 9 to the negative electrode pattern 4b can be offset.

これにより負極側外部端子９から対称面７に関して負極側外部端子９と同じ側に位置するＩＧＢＴ２ｂまでに至る配線インダクタンスと、負極側外部端子９から対称面７に関して正極側外部端子８と同じ側に位置するＩＧＢＴ２ｂまでに至る配線インダクタンスとのバランスをとることができ、対称面７に関して略対称に配置されたＩＧＢＴ２ａ，２ｂに流れる電流を同一にすることができる。   As a result, the wiring inductance extending from the negative electrode side external terminal 9 to the IGBT 2b located on the same side as the negative electrode side external terminal 9 with respect to the symmetry plane 7, and the negative electrode side external terminal 9 on the same side as the positive electrode side external terminal 8 with respect to the symmetry surface 7 It is possible to balance the wiring inductance up to the IGBT 2b that is positioned, and the currents flowing in the IGBTs 2a and 2b arranged substantially symmetrically with respect to the symmetry plane 7 can be made the same.

上記のように本実施形態によれば、第２の負極側配線導体１１ｂと第２の正極側配線導体１０ｂとの間隔が、第１の負極側配線導体１１ａと第１の正極側配線導体１０ａとの間隔よりも大きくなるようにしたものである。   As described above, according to the present embodiment, the distance between the second negative electrode side wiring conductor 11b and the second positive electrode side wiring conductor 10b is such that the first negative electrode side wiring conductor 11a and the first positive electrode side wiring conductor 10a. It is made larger than the interval.

次に第２の正極側配線導体１０ｂと第２の負極側配線導体１１ｂの間の距離ｄ2及び第１の正極側配線導体１０ａと第１の負極側配線導体１１ａの間の距離ｄ1を具体的にどのような値に設定するかについて以下説明する。   Next, the distance d2 between the second positive electrode side wiring conductor 10b and the second negative electrode side wiring conductor 11b and the distance d1 between the first positive electrode side wiring conductor 10a and the first negative electrode side wiring conductor 11a are specifically described. The following is a description of what values are set in

第１の負極側配線導体１１ａ側における第１の正極側配線導体１０ａとの相互インダクタンスも含めた自己インダクタンスをＬ1、第２の負極側配線導体１１ｂ側における第２の正極側配線導体１０ｂとの相互インダクタンスも含めた自己インダクタンスをＬ2とすると、図１１に示したモデルにより、L1=μ0・Le・d1/w， L2=μ0・Le・d2/wとなる。 The self-inductance including the mutual inductance with the first positive electrode side wiring conductor 10a on the first negative electrode side wiring conductor 11a side is L1, and the second positive electrode side wiring conductor 10b on the second negative electrode side wiring conductor 11b side. Assuming that the self-inductance including the mutual inductance is L2, L1 = μ 0 · Le · d1 / w and L2 = μ 0 · Le · d2 / w according to the model shown in FIG.

図８に示すように、L1＋M1=L2−M2であるから、
μ0・Le・d1/w＋μ0・l・{ln(2・l/D1)−1}/(2・π)
=μ0・Le・d2/w−μ0・l・{ln(2・l/D2)−1}/(2・π)
Le・(d1−d2)/w=−l・{ln(2・l/D1)＋ln(2・l/D2)−2}/(2・π)
Le・(d1−d2)/w=−l・[ln{4・l^2/(D1・D2)}−2]/(2・π)
d2−d1=w・l・[ln{(4・l^2/(D1・D2)}−2]/(2・π・Le)
ここで例えば、Le=40[mm]，l=25[mm]，w=8[mm]，D1=10[mm]，D2=15[mm]の場合、
d2−d1=0.65[mm] となる。 As shown in FIG. 8, since L1 + M1 = L2-M2,
μ 0・ Le ・ d1 / w + μ 0・ l ・ {ln (2 ・ l / D1) −1} / (2 ・ π)
= μ 0・ Le ・ d2 / w−μ 0・ l ・ {ln (2 ・ l / D2) −1} / (2 ・ π)
Le ・ (d1−d2) / w = −l ・ {ln (2 ・ l / D1) + ln (2 ・ l / D2) −2} / (2 ・ π)
Le ・ (d1−d2) / w = −l ・ [ln {4 ・ l ^ 2 / (D1 ・ D2)} − 2] / (2 ・ π)
d2−d1 = w ・ l ・ [ln {(4 ・ l ^ 2 / (D1 ・ D2)} − 2] / (2 ・ π ・ Le)
Here, for example, when Le = 40 [mm], l = 25 [mm], w = 8 [mm], D1 = 10 [mm], D2 = 15 [mm]
d2−d1 = 0.65 [mm].

尚上記実施の形態１〜４において、正極と負極とを逆になるように構成しても良い。即ち正極側電極パターン３ａ、３ｂ、正極側外部端子８，正極側配線導体１０を負極になるよう構成するとともに、負極側電極パターン４ａ、４ｂ、負極側外部端子９，負極側配線導体１１を正極になるよう構成して、電流の向きが逆になるように構成することもできる。   In the first to fourth embodiments, the positive electrode and the negative electrode may be reversed. In other words, the positive electrode patterns 3a and 3b, the positive electrode external terminal 8, and the positive electrode wiring conductor 10 are configured to be negative electrodes, and the negative electrode patterns 4a and 4b, the negative electrode external terminals 9 and the negative electrode wiring conductor 11 are positive electrodes. So that the direction of the current is reversed.

この発明の実施の形態１による半導体モジュールを示す斜視図である。1 is a perspective view showing a semiconductor module according to Embodiment 1 of the present invention. この発明の実施の形態１による半導体モジュールを示す平面図である。It is a top view which shows the semiconductor module by Embodiment 1 of this invention. 正極側配線導体を示す斜視図である。It is a perspective view which shows a positive electrode side wiring conductor. 負極側配線導体を示す斜視図である。It is a perspective view which shows a negative electrode side wiring conductor. 配線状態を示す側面図である。It is a side view which shows a wiring state. 導体を示す斜視図である。It is a perspective view which shows a conductor. 配線状態を示す概念図である。It is a conceptual diagram which shows a wiring state. 配線状態を示す概念図である。It is a conceptual diagram which shows a wiring state. この発明の実施の形態２による半導体モジュールを示す斜視図である。It is a perspective view which shows the semiconductor module by Embodiment 2 of this invention. この発明の実施の形態２による半導体モジュールを示す平面図である。It is a top view which shows the semiconductor module by Embodiment 2 of this invention. 導体を示す斜視図である。It is a perspective view which shows a conductor. この発明の実施の形態３による半導体モジュールを示す斜視図である。It is a perspective view which shows the semiconductor module by Embodiment 3 of this invention. この発明の実施の形態３による半導体モジュールを示す平面図である。It is a top view which shows the semiconductor module by Embodiment 3 of this invention. この発明の実施の形態４による半導体モジュールを示す斜視図である。It is a perspective view which shows the semiconductor module by Embodiment 4 of this invention. この発明の実施の形態４による半導体モジュールを示す平面図である。It is a top view which shows the semiconductor module by Embodiment 4 of this invention. 図１５におけるＧ―Ｇ線断面図である。It is the GG sectional view taken on the line in FIG. 図１５におけるＨ―Ｈ線断面図である。It is the HH sectional view taken on the line in FIG. 正極側配線導体を示す斜視図である。It is a perspective view which shows a positive electrode side wiring conductor. 負極側配線導体を示す斜視図である。It is a perspective view which shows a negative electrode side wiring conductor.

符号の説明Explanation of symbols

１ 半導体モジュール、３ａ，３ｂ 正極側電極パターン、６ ベース板、
８ 正極側外部端子、９ 負極側外部端子、１０，１０ａ，１０ｂ 正極側配線導体、
１１，１１ａ，１１ｂ 負極側配線導体。 1 semiconductor module, 3a, 3b positive electrode pattern, 6 base plate,
8 positive side external terminal, 9 negative side external terminal, 10, 10a, 10b positive side wiring conductor,
11, 11a, 11b Negative electrode side wiring conductor.

Claims (5)

ベース板上に正極側電極パターンを介して第１の半導体スイッチ素子群と第２の半導体スイッチ素子群とが載置され、
正極側外部端子と上記正極側電極パターンとは正極側配線導体を介して接続されるとともに、負極側外部端子と上記第１及び第２の半導体スイッチ素子群とは負極側配線導体を介して接続され、
上記第１の半導体スイッチ素子群は上記ベース板に設定された対称線に関して上記第２の半導体スイッチ素子群と略対称になるよう配置されるとともに、上記正極側外部端子は上記対称線に関して上記負極側外部端子に対し略対称になるよう配置され、
上記負極側配線導体は上記第１の半導体スイッチ素子群側へ分岐する第１の負極側配線導体と上記第２の半導体スイッチ素子群側へ分岐し、上記対称線に対して上記負極側外部端子と同じ側に位置する第２の負極側配線導体とを有し、
上記第２の負極側配線導体の自己インダクタンスが上記第１の負極側配線導体の自己インダクタンスよりも大きくなるように構成したことを特徴とする半導体モジュール。 The first semiconductor switch element group and the second semiconductor switch element group are placed on the base plate via the positive electrode pattern,
The positive external terminal and the positive electrode pattern are connected via a positive wiring conductor, and the negative external terminal and the first and second semiconductor switch element groups are connected via a negative wiring conductor. And
The first semiconductor switch element group is disposed so as to be substantially symmetric with respect to the second semiconductor switch element group with respect to a symmetry line set on the base plate, and the positive electrode-side external terminal is configured with the negative electrode with respect to the symmetry line. It is arranged so as to be substantially symmetrical with respect to the side external terminal,
The negative electrode side wiring conductor branches to the first negative electrode side wiring conductor branching to the first semiconductor switch element group side and the second semiconductor switch element group side, and the negative electrode side external terminal with respect to the symmetry line A second negative-side wiring conductor located on the same side as
A semiconductor module, wherein the self-inductance of the second negative electrode side wiring conductor is larger than the self inductance of the first negative electrode side wiring conductor. ベース板上に負極側電極パターンを介して第１の半導体スイッチ素子群と第２の半導体スイッチ素子群とが載置され、
負極側外部端子と上記負極側電極パターンとは負極側配線導体を介して接続されるとともに、正極側外部端子と上記第１及び第２の半導体スイッチ素子群とは正極側配線導体を介して接続され、
上記第１の半導体スイッチ素子群は上記ベース板に設定された対称線に関して上記第２の半導体スイッチ素子群と略対称になるよう配置されるとともに、上記正極側外部端子は上記対称線に関して上記負極側外部端子に対し略対称になるよう配置され、
上記負極側配線導体は上記第１の半導体スイッチ素子群側へ分岐する第１の負極側配線導体と上記第２の半導体スイッチ素子群側へ分岐し、上記対称線に対して上記負極側外部端子と同じ側に位置する第２の負極側配線導体とを有し、
上記第２の負極側配線導体の自己インダクタンスが上記第１の負極側配線導体の自己インダクタンスよりも大きくなるように構成したことを特徴とする半導体モジュール。 The first semiconductor switch element group and the second semiconductor switch element group are placed on the base plate via the negative electrode pattern,
The negative external terminal and the negative electrode pattern are connected via a negative wiring conductor, and the positive external terminal and the first and second semiconductor switch element groups are connected via a positive wiring conductor. And
The first semiconductor switch element group is disposed so as to be substantially symmetric with respect to the second semiconductor switch element group with respect to a symmetry line set on the base plate, and the positive electrode-side external terminal is configured with the negative electrode with respect to the symmetry line. It is arranged so as to be substantially symmetrical with respect to the side external terminal,
The negative electrode side wiring conductor branches to the first negative electrode side wiring conductor branching to the first semiconductor switch element group side and the second semiconductor switch element group side, and the negative electrode side external terminal with respect to the symmetry line A second negative-side wiring conductor located on the same side as
A semiconductor module, wherein the self-inductance of the second negative electrode side wiring conductor is larger than the self inductance of the first negative electrode side wiring conductor. 上記第２の負極側配線導体の長さが、上記第１の負極側配線導体の長さよりも長いことを特徴とする請求項１又は請求項２記載の半導体モジュール。 3. The semiconductor module according to claim 1, wherein a length of the second negative electrode side wiring conductor is longer than a length of the first negative electrode side wiring conductor. 4. 上記第２の負極側配線導体の幅が、上記第１の負極側配線導体の幅よりも小さいことを特徴とする請求項１又は請求項２記載の半導体モジュール。 3. The semiconductor module according to claim 1, wherein a width of the second negative electrode side wiring conductor is smaller than a width of the first negative electrode side wiring conductor. 上記正極側配線導体は上記第１の半導体スイッチ素子群側へ分岐する第１の正極側配線導体と上記第２の半導体スイッチ素子群側へ分岐する第２の正極側配線導体とを有し、
上記第２の負極側配線導体と上記第２の正極側配線導体との間隔が、上記第１の負極側配線導体と上記第１の正極側配線導体との間隔よりも大きいことを特徴とする請求項１又は請求項２記載の半導体モジュール。 The positive electrode side wiring conductor has a first positive electrode side wiring conductor branched to the first semiconductor switch element group side and a second positive electrode side wiring conductor branched to the second semiconductor switch element group side,
An interval between the second negative electrode side wiring conductor and the second positive electrode side wiring conductor is larger than an interval between the first negative electrode side wiring conductor and the first positive electrode side wiring conductor. The semiconductor module according to claim 1 or 2.
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