JP4228914B2 - Manufacturing method of silicon epitaxial wafer - Google Patents

Description

  The present invention relates to a method for manufacturing a silicon epitaxial wafer in which a silicon epitaxial layer is formed on a main surface of a silicon single crystal substrate.

  Conventionally, when a low resistivity buried layer is formed on a silicon single crystal substrate, a silicon epitaxial layer is vapor-phase grown on the main surface of the silicon single crystal substrate on which the impurity diffusion region is formed. Is embedded in the lower portion of the silicon epitaxial layer.

By the way, during the vapor phase growth, the dopant once released into the gas phase from the impurity diffusion region is doped into the growing silicon epitaxial layer, that is, autodoping occurs. When the impurity profile in the depth direction of the silicon epitaxial layer becomes gentle rather than steep (longitudinal autodoping), the dopant diffuses from the surface of the impurity diffusion region to the peripheral region, and the non-diffusion region In some cases, impurities are doped at the interface between the silicon single crystal substrate and the silicon epitaxial layer (lateral auto-doping). Therefore, as a technique for preventing autodoping, a thin silicon epitaxial layer, a so-called cap layer, is vapor-grown on the impurity diffusion region before vapor phase growth, and this cap layer causes the impurity diffusion region to be removed from the impurity diffusion region. Although there is a technology to reduce the influence of vertical auto-doping, it is impossible to prevent the dopant released from the silicon single crystal substrate from diffusing into the peripheral region until the cap layer is formed. On the other hand, it is not an effective means. On the other hand, a technique for reducing lateral autodoping by lowering the baking (baking) until the cap layer is formed has been proposed (for example, see Patent Document 1).
JP-A-9-120947

However, in the embodiment described in Patent Document 1, in order to realize vapor phase growth of the cap layer at a low temperature, removal of the natural oxide film made of silicon dioxide (SiO ₂ ) by hydrofluoric acid and vapor phase growth are the same. By performing it in the vapor phase growth apparatus, the silicon single crystal substrate is prevented from being exposed to the atmosphere, and as a result, the natural oxide film once removed with hydrofluoric acid is prevented from being regenerated, and the baking temperature is lowered. Realized. For this reason, there is a problem that the conventional vapor phase growth apparatus cannot be used because the vapor phase growth apparatus is assumed to be a cluster tool.

  The object of the present invention is that the baking temperature can be lowered even though the silicon single crystal substrate is exposed to the atmosphere between the cleaning step for removing the natural oxide film and the vapor phase growth step. As a result, a method for producing a silicon epitaxial wafer capable of suppressing autodoping is provided.

The method for producing a silicon epitaxial wafer of the present invention includes a cleaning step of removing the natural oxide film from the surface of the silicon single crystal substrate in the final chemical bath for wet cleaning, and hydrogen-terminating the surface of the silicon single crystal substrate,
After the cleaning step, a transporting step of transporting the silicon single crystal substrate to the vapor phase growth apparatus in the air while keeping the time for exposing the silicon single crystal substrate to the atmosphere within 60 minutes;
A baking step of performing baking in a hydrogen gas atmosphere higher than 850 ° C. and lower than 950 ° C. to remove a natural oxide film formed on the surface of the silicon single crystal substrate;
At higher 950 ° C. temperature below than 850 ° C., they have rows and vapor phase growth step in this order to initiate the vapor phase growth of a silicon epitaxial layer on the main surface of the silicon single crystal substrate,
A sub-epitaxial layer having a thickness of 0.05 μm or more and less than 0.5 μm formed without supplying a dopant gas immediately after the baking step, and a main epitaxial layer formed while supplying a dopant gas after the formation of the sub-epitaxial layer, To form the silicon epitaxial layer,
During the formation of the sub-epitaxial layer, the silicon single crystal substrate is heated.
As the silicon single crystal substrate, used as the impurity diffusion region formed on the main surface, characterized by the formation child buried layer by the vapor phase growth step.

  According to the present invention, in the final chemical bath for wet cleaning, the natural oxide film is removed from the surface of the silicon single crystal substrate, and the silicon atoms on the outermost surface are terminated with hydrogen atoms to be hydrogen terminated. Even if the silicon single crystal substrate is exposed to the atmosphere after the completion, the natural oxide film is hardly re-formed. However, since the re-formation of the natural oxide film cannot be prevented completely, the time for exposing the silicon single crystal substrate to the atmosphere is preferably as short as possible.

  The natural oxide film re-formed by exposing the silicon single crystal substrate to the air after the cleaning process can be removed by baking the silicon single crystal substrate in a hydrogen gas atmosphere. However, when the baking temperature is higher than 950 ° C., the amount of dopant released from the silicon single crystal substrate into the gas phase becomes so large that it cannot be ignored. On the other hand, when the baking temperature is 850 ° C. or lower, the natural oxide film is sufficiently etched. Therefore, baking is performed in a temperature range higher than 850 ° C. and lower than 950 ° C.

When baking in this temperature range, if the thickness of the natural oxide film formed on the surface of the silicon single crystal substrate is too thick, the natural oxide film cannot be completely removed, and the crystallinity of the silicon epitaxial layer Adversely affect.
The thickness of the natural oxide film to be formed depends on the time during which the silicon single crystal substrate is exposed to the atmosphere. As described above, when the surface of the silicon single crystal substrate is hydrogen-terminated, the natural oxide film is difficult to be re-formed. However, if the time for exposing the silicon single crystal substrate to the atmosphere is longer than 60 minutes, When baking is performed at a high temperature range of 950 ° C. or lower, the natural oxide film may not be completely removed by etching.
That is, when a silicon single crystal substrate is hydrogen baked in a temperature range higher than 850 ° C. and lower than 950 ° C., the time of exposure to the atmosphere must be kept within 60 even if the surface of the silicon single crystal substrate is hydrogen-terminated. is there.

  As described above, when the baking temperature is higher than 950 ° C., the amount of dopant released from the silicon single crystal substrate into the vapor phase becomes so large that it cannot be ignored, and auto-generated during vapor phase growth of the silicon epitaxial layer. Doping becomes noticeable. Therefore, the vapor phase growth of the silicon epitaxial layer is started at a temperature higher than 850 ° C. and lower than 950 ° C., and the main surface of the silicon single crystal substrate is coated at a low temperature to prevent vertical and horizontal auto-doping. In this state, a silicon epitaxial layer can be formed. When the vapor phase growth temperature is 850 ° C. or lower, the growth temperature of the silicon epitaxial layer becomes too low, which is not practical.

The release of the dopant from the silicon single crystal substrate into the gas phase can be stopped by coating the main surface of the silicon single crystal substrate with the sub-epitaxial layer. At that time, if a dopant having the same conductivity type as the dopant released from the silicon single crystal substrate is supplied during the growth of the sub-epitaxial layer, the influence of auto-doping is increased. Conversely, when a dopant having a conductivity type opposite to that emitted from the silicon single crystal substrate is supplied during the growth of the sub-epitaxial layer, a pn junction is formed when the supply amount is larger than the emission amount. Will end up. Therefore, the sub-epitaxial layer is formed without supplying the dopant gas. The vapor phase growth of the silicon epitaxial layer is performed by diluting a silicon raw material such as dichlorosilane (SiH ₂ Cl ₂ ), trichlorosilane (SiHCl ₃ ), monosilane (SiH ₄ ), silicon tetrachloride (SiCl ₄ ) with hydrogen gas. Then, it can be carried out by supplying the silicon single crystal substrate heated to a desired temperature.

  Once the main surface of the silicon single crystal substrate is coated with the sub-epitaxial layer, dopant emission from the silicon single crystal substrate into the gas phase substantially stops, so the thickness of the sub-epitaxial layer should be at least 0.05 μm. It ’s fine. However, if the thickness of the sub-epitaxial layer is 0.5 μm or more, the thickness of the sub-epitaxial layer may be larger than the outward diffusion width of the dopant from the silicon single crystal substrate, and the existence of the sub-epitaxial layer is apparent. Will affect the characteristics of the silicon epitaxial wafer.

Since the growth of the sub-epitaxial layer is started in a low temperature region higher than 850 ° C. and lower than 950 ° C., the growth rate at the start of the growth is small. Also, the sub-epitaxial layer is indistinguishable from the silicon single-crystal substrate and the sub-epitaxial layer due to the out-diffusion of the dopant from the silicon single-crystal substrate that occurs during the series of heat treatments performed after the sub-epitaxial layer growth. The thickness and resistance are not so important.
Therefore, it is efficient to form the sub-epitaxial layer while continuously increasing the growth rate. The growth rate increases when the supply amount of the silicon source gas is increased, but it increases even when the growth temperature is increased, so when the sub-epitaxial layer is formed while raising the silicon single crystal substrate to the growth temperature of the main epitaxial layer, Productivity of the silicon epitaxial wafer can be increased.

  If the baking time is increased, the amount of dopant released from the silicon single crystal substrate into the gas phase before the formation of the sub-epitaxial layer increases, and auto-doping may not be suppressed in the sub-epitaxial layer. Therefore, it is preferable to form the sub-epitaxial layer within 5 minutes after the start of the baking process.

  When, for example, hydrofluoric acid (HF) is used as the chemical solution in the final chemical solution tank, the natural oxide film can be surely removed from the surface of the silicon single crystal substrate and the surface of the silicon single crystal substrate can be terminated with hydrogen. In addition, when a sodium hydroxide (NaOH) or potassium hydroxide (KOH) aqueous solution is used as the chemical solution in the final chemical solution tank, the adhesion of particles can be suppressed more than when hydrofluoric acid is used.

  The present invention uses a silicon single crystal substrate having an impurity diffusion region formed on the main surface, and when forming a buried layer by a vapor phase growth process, the vertical and horizontal impurity profiles must be steep. It is particularly effective in some cases.

  According to the present invention, the baking temperature can be lowered even though the silicon single crystal substrate is exposed to the atmosphere between the cleaning step for removing the natural oxide film and the vapor phase growth step. As a result, the auto-doping in the vertical direction and the horizontal direction can be suppressed.

  Hereinafter, an embodiment of a method for producing a silicon epitaxial wafer according to the present invention will be described with reference to the drawings. In the present embodiment, a case where a silicon epitaxial wafer having a buried layer is manufactured by vapor-phase growth of a silicon epitaxial layer on an impurity diffusion region previously formed on the main surface of a silicon single crystal substrate will be described. To do.

First, an example of a vapor phase growth apparatus that can be used in the method for producing a silicon epitaxial wafer of the present invention will be described. As shown in FIG. 1, the vapor phase growth apparatus 1 loads a silicon single crystal substrate 21 into the vapor phase growth apparatus 1 and loads the silicon epitaxial wafer 20 out of the vapor phase growth apparatus 1. , 10b.
Although these load lock chambers 10a and 10b can be substituted for each other, in the present embodiment, the load lock chamber 10a is used only for loading the silicon single crystal substrate 21, and the load lock chamber 10b is a silicon epitaxial wafer. It will be used only for carrying out 20 items. The inside of the load lock chambers 10a and 10b is kept in a clean atmosphere because the atmosphere is excluded by supplying an inert gas such as nitrogen (N ₂ ).

  A transfer chamber 13 for transferring the silicon single crystal substrate 21 or the silicon epitaxial wafer 20 inside is connected to the load lock chambers 10a and 10b. The transfer chamber 13 is connected to a vapor phase growth furnace 11 described below. Gate valves 15a, 15b, and 15c that can be opened and closed are interposed between the transfer chamber 13, the load lock chambers 10a and 10b, and the vapor phase growth furnace 11, and the inside of the transfer chamber 13 is inert such as nitrogen. The gas is kept in a clean atmosphere. A handler 14 is disposed inside the transfer chamber 13.

  The handler 14 carries the silicon single crystal substrate 21 or the silicon epitaxial wafer 20 between the load lock chambers 10 a and 10 b and the vapor phase growth furnace 11.

  The vapor phase growth furnace 11 is configured to form a silicon epitaxial layer 24 on the main surface of a silicon single crystal substrate 21. Specifically, the vapor phase growth furnace 11 includes a heating device (not shown) for heating the silicon single crystal substrate 21 and a silicon raw material such as trichlorosilane on the surface of the silicon single crystal substrate 21 as a carrier gas such as hydrogen gas. And a gas supply device (not shown) to be supplied together.

  Hereinafter, a procedure for forming a buried layer by vapor-phase growth of a silicon epitaxial layer on an impurity diffusion region on a main surface of a silicon single crystal substrate using the method for manufacturing a silicon epitaxial wafer according to the present invention will be described with reference to FIGS. This will be described with reference to FIG. In the present embodiment, the impurity diffusion region 22 in which boron (B), phosphorus (P) arsenic (As), or antimony (Sb) is partially diffused in advance on the main surface of the silicon single crystal substrate 21. It is assumed that is formed. 2 corresponds to each step of manufacturing a silicon epitaxial wafer (see FIG. 2B) and a sectional view of the silicon single crystal substrate 21 or the silicon epitaxial wafer 20 (see FIG. 2A). Are shown.

  Before performing vapor phase growth for forming the buried layer 25, as shown in FIG. 2, first, a cleaning process is performed on the silicon single crystal substrate 21 (step S1).

Specifically, for example, as shown in FIG. 3, a chemical tank B1 containing ammonia-hydrogen peroxide solution and a chemical tank B3 containing hydrochloric acid-hydrogen peroxide solution are placed on the silicon single crystal substrate 21 with an SC-1. Wash and SC-2 wash. The SC-1 cleaning mainly removes organic substances and particles. The SC-2 cleaning mainly removes metal and ionic impurities.
Then, the natural chemical film formed on the surface of the silicon single crystal substrate is removed by the final chemical bath B5 containing hydrofluoric acid, and the surface of the silicon single crystal substrate 21 is hydrogen-terminated.

  As a condition for cleaning hydrofluoric acid in the final chemical bath B5, for example, the silicon single crystal substrate 21 is immersed in 1% dilute hydrofluoric acid for 150 seconds. However, as long as it is an aqueous solution containing hydrofluoric acid, other concentrations of hydrofluoric acid, buffered hydrofluoric acid (aqueous ammonium fluoride solution), or the like may be used. Alternatively, vapor containing hydrofluoric acid may be sprayed onto the surface of the silicon single crystal substrate 21.

After washing in the chemical baths B1, B3, and B5, rinsing is performed in rinse baths B2, B4, and B6 containing pure water, respectively. A plurality of rinse tanks B2, B4, and B6 may be used side by side.
After rinsing in the rinsing tank B6 following the hydrofluoric acid cleaning in the chemical solution tank B5, the silicon single crystal substrate 21 is dried with IPA (isopropyl alcohol) or the like, and the cleaning step S1 is completed.

After the cleaning step S1, the silicon single crystal substrate 21 is transferred to the vapor phase growth apparatus 1 while being exposed to the atmosphere (transfer step: step S2). Even when the silicon single crystal substrate 21 is housed and transported in a box, it goes without saying that the silicon single crystal substrate 21 is exposed to the air if the atmosphere in the box is air.
At this time, the silicon single crystal substrate 21 is prevented from being exposed to the atmosphere for longer than 60 minutes. Thereby, the natural oxide film 23 which is exposed to the air and re-formed on the surface of the silicon single crystal substrate 21 can be surely removed by baking at a low temperature higher than 850 ° C. and lower than 950 ° C. in the subsequent process. it can.

After the silicon single crystal substrate 21 is stored in the load lock chamber 10a of the vapor phase growth apparatus 1, the atmosphere in the load lock chamber 10a is purged with an inert gas such as N ₂ gas to stop the formation of a natural oxide film. Next, the silicon single crystal substrate 21 is moved into the vapor phase growth furnace 11, heated to a temperature higher than 850 ° C. and lower than 950 ° C., for example, 900 ° C., and the silicon single crystal substrate 21 is baked in an atmosphere of H ₂ gas. (Baking process: step S3). As a result, the natural oxide film 23 formed again during the transfer process in the air in step S2 is completely removed by etching with hydrogen gas.
Thus, before performing the baking process (step S3), the natural oxide film 23 is removed from the silicon single crystal substrate 21 and hydrogen terminated in advance in the final chemical bath (B5) of step S1. Even if the crystal substrate 21 is exposed to the atmosphere for about 60 minutes, the natural oxide film 23 grows only slightly. Therefore, the silicon single crystal substrate 21 is also baked at a relatively low temperature in the range of 850 ° C. to 950 ° C. The natural oxide film 23 formed on the surface is easily removed. That is, in a state where the release of the dopant from the impurity diffusion region 22 formed on the main surface of the silicon single crystal substrate 21 into the gas phase and the surface diffusion of the dopant to the peripheral region of the impurity diffusion region 22 are extremely reduced. The oxide film 23 can be removed. As a result, vertical and horizontal auto-doping can be suppressed when forming the silicon epitaxial layer.

Immediately after the completion of the baking process (step S3) of the silicon single crystal substrate 21, a source gas is supplied together with a carrier gas onto the main surface of the silicon single crystal substrate 21 in which the impurity diffusion region 22 is formed. While the temperature is raised to a desired temperature, for example, 1100 ° C., the sub-epitaxial layer 24a having a thickness of 0.05 μm or more and less than 0.5 μm is vapor-phase grown to form the buried layer 25 (sub-epitaxial layer forming step: step S4) ). After reaching a desired temperature (for example, 1100 ° C.), the temperature rise is stopped and maintained at a constant temperature, and the main epitaxial layer 24b is vapor-phase grown on the sub-epitaxial layer 24a (main epitaxial layer forming step: step S5). Since the growth rate of the silicon epitaxial layer is continuously increased by vapor-phase-growing the sub-epitaxial layer 24a during the temperature rise in this way, the silicon epitaxial layer formed in the initial stage that is easily affected by auto-doping. The thickness of the silicon epitaxial layer formed in the second half can be increased while reducing the thickness of the auto-dope and the effect of auto-doping in the vertical and horizontal directions can be further suppressed. An epitaxial layer can be grown.
Further, by forming the main epitaxial layer 24b at a temperature higher than that of the sub-epitaxial layer 24a, it is possible to optimally control pattern shift and pattern sag, which are problematic when the silicon epitaxial layer 24 is grown in the impurity diffusion region 22. it can.
Further, purging is omitted between the baking step (step S3) and the sub-epitaxial layer forming step (step S4), and the sub-epitaxial layer 24a is grown during the temperature rise after the baking step, thereby reducing the temperature by low temperature growth. The decrease in productivity due to the decrease in growth rate can be compensated.
Through the series of steps described above, the silicon epitaxial wafer 20 including the buried layer 25 is manufactured.

  After the vapor phase growth is completed, the manufactured silicon epitaxial wafer 20 is cooled (cooled down) to room temperature and taken out from the vapor phase growth apparatus 1 (cooling step: step S6).

In the above embodiment, the single-wafer type vapor phase growth apparatus 1 has been described as an example. However, the present invention can also be applied to a batch type vapor phase growth apparatus.
Moreover, although it demonstrated as putting hydrofluoric acid in the last chemical | medical solution tank B5, you may put NaOH aqueous solution or KOH aqueous solution. However, since these alkaline aqueous solutions have a strong etching ability with respect to the silicon single crystal substrate 21, it is preferable to use a solution diluted to such an extent that the surface roughness of the surface of the silicon single crystal substrate 21 does not become remarkable.

  Hereinafter, the present invention will be described more specifically by giving examples and comparative examples.

<Example>
From the main surface of the n-type silicon single crystal substrate having an impurity concentration of about 6 × 10 ¹⁵ cm ⁻³ , phosphorus is diffused to a concentration of about 5 × 10 ¹⁹ cm ⁻³ to form an impurity diffusion region 22. After preparing the crystal substrate 21 and performing SC-1 cleaning, SC-2 cleaning and hydrofluoric acid cleaning, the silicon single crystal substrate 21 was transported to the vapor phase growth apparatus 1 in the atmosphere. The time from the end of this cleaning process until the atmospheric purging with nitrogen gas in the vapor phase growth apparatus 1 was within 60 minutes. After placing the silicon single crystal substrate 21 on the susceptor in the vapor phase growth furnace 11, baking is performed at 900 ° C. in a hydrogen atmosphere, and the sub-epitaxial layer 24a is about 0.05 μm at 900 ° C. without supplying a dopant gas. After the vapor phase growth, the main epitaxial layer 24b having an impurity concentration of about 1 × 10 ¹⁵ cm ⁻³ is vapor grown at 1150 ° C. to manufacture the silicon epitaxial wafer 20 having the silicon epitaxial layer 24 having a thickness of about 4 μm. did.
In order to measure lateral autodoping in the manufactured silicon epitaxial wafer, SR (Spreading Resistance) measurement was performed in the depth direction at a position 2 mm away from the edge of the buried layer 25 (see FIG. 5A). . The result is shown in FIG. The peak value of the impurity concentration at the interface between the silicon single crystal substrate 21 and the silicon epitaxial layer 24 was about 2 × 10 ¹⁶ cm ⁻³ .

<Comparative example>
A silicon epitaxial wafer was manufactured under the same conditions as in the example except that the sub-epitaxial layer 24a was not formed and the silicon epitaxial layer was vapor-phase grown at a constant temperature of 1150 ° C. As a result of SR measurement in the depth direction at a position 2 mm away from the edge of the buried layer, the peak value of the impurity concentration at the interface between the silicon single crystal substrate and the silicon epitaxial layer is as shown in FIG. It was about 5 × 10 ¹⁶ cm ⁻³ .

It is a top view which shows schematic structure of a vapor phase growth apparatus. (A) is sectional drawing of a silicon single crystal substrate or a silicon epitaxial wafer, (b) is process drawing which shows the manufacturing process of a silicon epitaxial wafer. It is a conceptual diagram which shows the washing tank used for a washing process. It is a figure which shows the temperature of the silicon single crystal substrate for every process. (A) is a figure which shows the position of SR measurement, (b) is a figure which shows the magnitude | size of the auto-doping of the horizontal direction in an Example and a comparative example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Vapor growth apparatus 10a, 10b Load lock chamber 11 Vapor growth furnace 20 Silicon epitaxial wafer 21 Silicon single crystal substrate 22 Impurity diffusion region 23 Natural oxide film 24 Silicon epitaxial layer 25 Embedded layer

Claims (4)

In the final chemical bath for wet cleaning, a natural oxide film is removed from the surface of the silicon single crystal substrate, and a cleaning step for terminating the surface of the silicon single crystal substrate with hydrogen,
After the cleaning step, a transporting step of transporting the silicon single crystal substrate to the vapor phase growth apparatus in the air while keeping the time for exposing the silicon single crystal substrate to the atmosphere within 60 minutes;
A baking step of performing baking in a hydrogen gas atmosphere higher than 850 ° C. and lower than 950 ° C. to remove a natural oxide film formed on the surface of the silicon single crystal substrate;
At higher 950 ° C. temperature below than 850 ° C., they have rows and vapor phase growth step in this order to initiate the vapor phase growth of a silicon epitaxial layer on the main surface of the silicon single crystal substrate,
A sub-epitaxial layer having a thickness of 0.05 μm or more and less than 0.5 μm formed without supplying a dopant gas immediately after the baking step, and a main epitaxial layer formed while supplying a dopant gas after the formation of the sub-epitaxial layer, To form the silicon epitaxial layer,
During the formation of the sub-epitaxial layer, the silicon single crystal substrate is heated.
Examples silicon single crystal substrate, used as the impurity diffusion region formed on the main surface, a manufacturing method of a silicon epitaxial wafer, comprising the formation child buried layer by the vapor phase growth step. The formation of the sub-epitaxial layer, the manufacturing method of a silicon epitaxial wafer according to claim 1, wherein the starting within 5 minutes after the baking process.   2. The method for producing a silicon epitaxial wafer according to claim 1, wherein hydrofluoric acid is used as the chemical solution in the final chemical solution tank.   2. The method for producing a silicon epitaxial wafer according to claim 1, wherein a sodium hydroxide aqueous solution or a potassium hydroxide aqueous solution is used as the chemical solution in the final chemical solution tank.

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