JP2701793B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for treating a surface of a semiconductor substrate.

[0002]

2. Description of the Related Art Removal of a natural oxide film formed on the surface of a semiconductor substrate is an essential technique in a process of manufacturing a semiconductor device such as an VLSI. For example, there is a process of performing silicon epitaxial growth on a silicon substrate by a chemical vapor deposition (CVD) method. In this process, it is necessary to remove a natural oxide film in a growth apparatus. In a dynamic RAM (DRAM), there is a process of burying a contact hole with polysilicon in order to form a contact between a device active layer and a wiring layer on a silicon substrate. In this process, the contact resistance is also reduced. For the purpose, it is necessary to remove a natural oxide film on the substrate surface before growing polysilicon. In addition, in a process of growing a thin film on a semiconductor substrate, a natural oxide film residue at a substrate / thin film interface often causes a problem in device characteristics.
There is a need for a technique for removing a native oxide film on a substrate surface before forming a thin film.

Conventionally, as a method of removing a natural oxide film formed on the surface of a substrate, many technologies for a silicon substrate have been researched and developed. Therefore, here, a case of growing a silicon thin film on a silicon substrate will be described. Developed hydrogen reduction, high vacuum annealing, silane reduction, or GeH
Conventional methods such as ₄ reduction will be described by taking epitaxial growth and polysilicon growth as examples.

[0004] Silicon epitaxial growth is performed by a substrate cleaning step, a natural oxide film removing step in a growth furnace, and an epitaxial film growing step. Usually, the substrate is cleaned by heating H ₂ O ₂ , ammonia water, H
Using a mixed solution of ₂ 0, and at the same time to remove contaminants on the substrate surface, to form a natural oxide film to protect the surface from contamination. Thereafter, the natural oxide film is removed by hydrogen reduction, silane reduction, or annealing in a high vacuum in an epitaxial growth furnace, and a low pressure CVD (LPCV) using a silane-based gas is performed.
An epitaxial film is grown by D). The hydrogen reduction method is performed by heating a substrate temperature to 900 ° C. or higher and supplying hydrogen gas to the substrate surface under normal pressure or a reduced pressure of several tens of Torr. This method is the most commonly used technology in the conventional LSI manufacturing process because a natural oxide film on the substrate surface can be relatively easily removed. The high vacuum annealing method is a method used in a molecular beam epitaxy (MBE) apparatus having a high vacuum chamber with a degree of ultimate vacuum of 1 × 10 ⁻⁹ Torr or less, and a high vacuum of about 1 × 10 ⁻⁹ Torr. The natural oxide film is removed by heating the substrate to about 950 ° C. under vacuum. However, due to recent demands for element miniaturization accompanying high integration of LSIs, it is necessary to lower the manufacturing process temperature, and a silane reduction method capable of removing a natural oxide film at a lower temperature has been studied. in this way,
For example, the substrate temperature is set to 850 ° C. and 1 × 10 ⁻⁴ Torr
The natural oxide film is removed by supplying SiH ₄ gas under reduced pressure. GeH ₄ reduction, which supplies GeH ₄ gas instead of SiH ₄ , is also used in special processes such as SiGe thin film growth.

In the step of burying a contact hole between a substrate and a wiring layer with polysilicon, dilute hydrofluoric acid (H
F) After removing the natural oxide film on the substrate surface with the solution, the substrate is introduced into a polysilicon growth furnace. At this time, the substrate surface is reoxidized during the period from the dilute HF treatment to the introduction into the growth furnace.
Then, similarly to the epitaxial growth, after removing the natural oxide film by hydrogen reduction or silane reduction in a growth furnace, a polysilicon thin film is grown by LPCVD using a silane-based gas. In the case of forming such a contact hole buried with polysilicon, the purpose is to reduce the contact resistance. Therefore, it is not necessary to completely remove the natural oxide film as in the case of epitaxial growth, but it is sufficient to partially remove the natural oxide film. Therefore, processing can be performed at a lower temperature than in the case of epitaxial growth. For example, in the case of hydrogen reduction, the substrate temperature is 750 ° C. or higher, and in the case of silane reduction, the substrate temperature is 650 ° C.
The effect of reducing the contact resistance has been observed by treating at a temperature of not less than ℃.

A silane reduction method capable of reducing the temperature will be described with reference to FIG. FIG. 7 is a sectional view in the order of steps of a method of removing a natural oxide film formed on the surface of a silicon substrate by a silane reduction method.

As shown in FIG. 7A, a natural oxide film 102 having a thickness of about 0.5 nm is usually formed on the surface of a silicon substrate 101 taken out of an HF solution and washed with pure water. . The natural oxide film 102 is a porous silicon oxide film. Such a silicon substrate 101 is heat-treated at a temperature of 650 ° C. in an H ₂ gas atmosphere containing a small amount of SiH ₄ .

In this heat treatment, the natural oxide film 102 on the silicon substrate 101 is made of SiH ₄ by the chemical reaction of the formula (1).
It is reduced and removed by the gas.

[0009]

Here, SiO, which is a reaction product, has a high volatility, and scatters in the gas phase as shown in FIG. 7 (b). Then, the porous natural oxide film is removed. However, the natural oxide film 102 is not simultaneously removed over the entire region within the surface of the silicon substrate 101 because the thickness of the natural oxide film 102 on the surface of the silicon substrate 101 is not constant. In other words, the thin portion of the natural oxide film is removed first, and a region where the oxide film is completely removed on the substrate surface and a region where the oxide film remains and the remaining natural oxide film 103 remains are generated.

If the silane reduction is continued in this state, the removal of the native oxide film proceeds in the region where the native oxide film remains, while the growth of the silicon thin film 104 starts in the region where the silicon substrate 101 is exposed. . Then, when the natural oxide film 102 is completely removed, as shown in FIG. 7C, a silicon thin film 104 having a thickness of several tens nm is formed in a partial region of the surface of the silicon substrate 101. .

[0012]

As described above,
Methods for removing the natural oxide film on the substrate surface include methods such as hydrogen reduction, high vacuum annealing, silane-based gas reduction, and GeH ₄ gas reduction, but the processing temperature is reduced due to the demand for miniaturization of semiconductor element dimensions. It is necessary to use a silane-based gas reduction method or a GeH ₄ gas reduction method. However, the above-mentioned conventional silane reduction method and GeH ₄
The reduction method has a problem that irregularities are formed on the surface of a thin film formed after the reduction treatment, and this becomes a barrier to further high integration of LSI. This will be described in detail below in the case of the silane reduction method. The GeH ₄ reduction method is the same as the silane reduction method.

As described above, in the method of removing the natural oxide film by silane reduction, the removal of the natural oxide film and the growth of the silicon thin film occur simultaneously on the surface of the silicon substrate, so that irregularities are formed on the surface of the silicon substrate. The level difference of the unevenness depends on the conditions of silane reduction, but reaches up to about 50 nm under the condition of 650 ° C. described in the section of the prior art.

Hereinafter, a problem in the production of the ULSI caused by the formation of the unevenness of the silicon thin film will be described with reference to an example of forming a contact hole buried in polysilicon.

[0015] With the high integration of semiconductor memories such as DRAM, the contact diameter is also reduced. For example, the finished dimensions of a contact hole in a ULSI having a design standard of 0.25 μm are about 0.15 μm in diameter and 1 μm in height.
It becomes about μm. In the case of filling such a high aspect ratio contact hole with a polysilicon film, the method of filling the contact hole with non-doped polysilicon and then introducing the impurity by phosphorus diffusion or ion implantation sufficiently introduces the impurity to the bottom of the contact hole. Can not do it. For this reason, a method of doping impurities at the same time as film formation is used. For example, burying the contact hole with a phosphorus-doped or boron-doped polycrystalline silicon film by LPCVD of SiH ₄ -PH ₃ system or SiH ₄ -B ₂ H ₆ system.

In the case where a phosphorus-doped polysilicon is buried in a contact hole by using a method of removing a natural oxide film by a silane reduction method, a phosphorus-doped polysilicon film is successively removed after removing a natural oxide film on a contact bottom surface by a silane reduction treatment. To bury the contact hole. However, in the conventional silane reduction method, a silicon film of several tens of nm has already grown during the silane reduction treatment, and most of the contact holes having a diameter of 0.15 μm are buried with the non-doped polysilicon film. For this reason, even if the phosphorus-doped polysilicon film is grown after the silane reduction treatment, there is a problem that the average phosphorus concentration of the polysilicon in the contact hole decreases and the polysilicon resistance increases. Also in the case of boron doping, there is a problem that the polysilicon resistance increases as in the case of phosphorus doping.

Further, a method for forming a channel layer of an insulated gate field effect transistor (hereinafter, referred to as a MOS transistor) on a silicon epitaxial film deposited on a silicon substrate to suppress a short channel effect of a fine MOS transistor has been studied. However, if the surface of the silicon epitaxial film has irregularities, there arise problems such as deterioration of the gate oxide film breakdown voltage of the MOS transistor, lowering of mobility of electric charges and lowering of operation speed.

An object of the present invention is to solve the above-mentioned problems, and it is an object of the present invention to reduce silane-based gas, GeH
Provided is a reduction method that does not form the above-described surface unevenness even when a natural oxide film is removed using a reducing gas such as a _4- gas reduction.

[0019]

According to the present invention, there is provided:
In a processing method for removing a natural oxide film formed on a main surface of a semiconductor substrate or a surface of a semiconductor material, a mixed gas of a silane-based gas and a PH ₃ gas or a mixed gas of a GeH ₄ gas and a PH ₃ gas is used.
The semiconductor substrate or the semiconductor thin film is heated in a reduced-pressure gas atmosphere containing a gas mixture or a gas atmosphere diluted with the gas mixture to reduce and remove the natural oxide film.

Here, SiH _{4 is used} as the silane-based gas.
Alternatively, Si ₂ H ₆ gas is used.

[0021] Alternatively, the present invention includes the steps of forming a contact hole in an insulating film on the diffusion layer constituting the source and the drain of the insulated gate field effect transistor formed on a semiconductor substrate, the silane-based gas and PH ₃ gas Heating the semiconductor substrate in a reduced-pressure gas atmosphere containing a mixed gas or a mixed gas of GeH ₄ gas and PH ₃ gas or a diluting gas atmosphere of the mixed gas, and filling the contact holes after heating the semiconductor substrate. Depositing a semiconductor film containing an impurity by the method.

Alternatively, according to the present invention, a silane-based gas and PH
_The semiconductor substrate is heated in a reduced-pressure gas atmosphere containing a mixed gas of ₃ gases or a mixed gas of GeH ₄ gas and PH ₃ gas or a diluted gas atmosphere of the mixed gas to reduce and remove a natural oxide film on a main surface of the semiconductor substrate. And removing the natural oxide film, and depositing a single crystal semiconductor thin film on the main surface of the semiconductor substrate.

In the removal of a natural oxide film by reduction with a mixed gas of SiH ₄ gas and PH ₃ gas, the S
The partial pressure ratio of PH ₃ gas to iH ₄ gas is 2.5 × 10
Set to ^-2 or higher.

[0024]

As described above, the natural oxide film is changed into SiO and H ₂ gas by the chemical reaction of the formula (1) with the SiH ₄ gas, and is removed from the surface of the silicon substrate. That is, the natural oxide film is reduced and removed. However, in this case, the removal of the native oxide film is uneven, and a region where the native oxide film is removed and a region where the native oxide film is not removed are formed on the silicon substrate surface. Then, the SiH ₄ gas is supplied to the exposed portion of the silicon substrate surface, and a silicon thin film is formed in that region.

On the other hand, in the present invention, a silane-based gas such as SiH ₄ gas or G
mixing a PH ₃ gas eH ₄ gas. The PH ₃ gas generally suppresses the formation of a silicon film or a germanium film due to thermal decomposition of a silane-based gas or a GeH ₄ gas. Such a suppressing power of the PH ₃ gas becomes more remarkable as its concentration is higher.

More specifically, when a PH ₃ gas is mixed into a silane-based gas or a GeH ₄ gas for reducing and removing a natural oxide film as described above, the natural oxide film is removed non-uniformly and silicon PH ₂ is chemically adsorbed preferentially to a region where the surface of a semiconductor substrate such as a substrate is exposed. Then, the attachment of Si atoms or SiH ₂ to the region where the natural oxide film has been removed is prevented.
In this way, the formation of a silicon thin film as in the prior art is suppressed, and the irregularities on the surface of the semiconductor substrate are greatly reduced.

[0027]

Next, the present invention will be described in detail with reference to FIG. FIG. 1 is a sectional view in the order of steps in a case where a natural oxide film formed on the surface of a silicon substrate is removed by the method of the present invention.

As described in the prior art, FIG.
As shown in (a), the surface of the silicon substrate 1 which has been taken out of the dilute HF solution and washed with pure water usually has a film thickness of 0.
A native oxide film 2 of about 5 nm is formed. The natural oxide film 2 is a porous silicon oxide film. Such a silicon substrate 1 is heat-treated at a temperature of 600 to 700 ° C. and an H ₂ gas containing an atmosphere of PH ₃ and SiH ₄ .

By this heat treatment, the natural oxide film 2 on the silicon substrate 1 is reduced and removed by the SiH ₄ gas by the chemical reaction of the above-mentioned formula (1).

Here, FIG. 7 (b) illustrating the prior art.
As shown in (1), the natural oxide film 2 is not simultaneously removed over the entire region within the silicon substrate 1 because the thickness of the natural oxide film 1 on the surface of the silicon substrate 1 is not constant. . That is, the thin portion of the natural oxide film is removed first, and a region where the oxide film is completely removed and a region where the oxide film still remains are generated on the substrate surface.

However, in the case of the present invention, as shown in FIG. 1B, the P atoms of the PH ₃ gas introduced simultaneously with the SiH ₄ gas are bonded to the exposed region of the silicon substrate 1. Therefore, the growth of the silicon thin film on the silicon substrate surface in the region where the natural oxide film 2 has been removed is suppressed.

Next, the effect of the addition of the PH ₃ gas will be described with reference to FIG. FIG. 2 shows that SiH ₄ is formed on a silicon substrate.
And PH ₃ gas are supplied at the same time, in which the growth rate in the case of performing growth of the silicon thin film i.e. polysilicon film was measured by the LPCVD method. Here, the growth reaction tube temperature was 650 ℃, PH ₃ / SiH ₄ min pressure ratio 1 × 10 _-5 ~2.5 × 10 so as to _-1 PH ₃
And SiH ₄ gas were supplied. At this time, in any growth, the degree of vacuum in the reaction tube was 0.2 Torr.
An appropriate amount of hydrogen gas was supplied so that Specifically, the hydrogen gas flow rate was ₂ slm, and Si diluted 50 times with H ₂ was used.
An H ₄ gas flow rate of 20 sccm and a PH ₃ gas diluted with H ₂ are supplied at a predetermined flow rate. Thus, the amount of the SiH ₄ gas contained in the substantial H ₂ gas is 0.02 vol%.

As shown in FIG. 2, as the partial pressure ratio of the PH ₃ gas to the SiH ₄ gas increases, the growth rate of the silicon thin film decreases. Although not shown, the growth rate of the silicon thin film in the case of using only SiH ₄ gas is PH ₃ / Si
This is almost the same as when the H ₄ partial pressure ratio is 1 × 10 ₋₅ . FIG.
By supplying 2.5% of PH ₃ gas to SiH ₄ gas, the growth rate of the silicon thin film is reduced to 1/10.
It can be seen that it can be reduced to about 0.

When silane reduction is continued in this state, FIG.
As shown in (c), while the removal of the remaining native oxide film 3 proceeds, the growth of the silicon thin film is suppressed in the region where the silicon substrate 1 is exposed. Then, when the natural oxide film 2 is completely removed, a silicon surface having high smoothness is formed on the surface of the silicon substrate 1 as shown in FIG.

Next, the effect of the present invention will be described with reference to FIG. Here, FIG. 3 shows that an SiH ₄ gas and a PH ₃ gas are simultaneously supplied to perform a silane reduction treatment, and then an amorphous silicon film is grown.
It was measured in. In this film growth, first, a silicon substrate was heated to 70 ° C., H ₂ O ₂ , ammonia water, H ₂
After cleaning with a mixed solution of O, a furnace temperature of 650 ° C. and a SiH ₄ and PH ₃ gas are simultaneously supplied in an LPCVD apparatus to remove a natural oxide film on the silicon substrate surface.
An SiH ₄ gas was supplied at 50 ° C. to grow an amorphous silicon film to a thickness of 100 nm.

As shown in FIG. 3, PH ₃ / SiH ₄
By setting the partial pressure ratio to 2.5 × 10 ⁻² or more, the surface unevenness is greatly improved. That is, the surface unevenness is 1n.
m or less. This amorphous silicon film is converted to polysilicon by, for example, crystallization heat treatment at 850 ° C. for 30 minutes, but it was also confirmed that no increase in surface irregularities due to crystallization was observed.

As described above, the natural oxide film on the surface of the silicon substrate can be removed by the method of the present invention. And
It was confirmed that a polysilicon film having small surface irregularities could be formed.

In the above reduction method, the case where PH ₃ and SiH ₄ gases are diluted with H ₂ gas has been described. The same effect can be obtained by using an inert gas such as He or Ar or an N ₂ gas instead of the H ₂ gas. In this reduction method, an LPCVD furnace is used and the degree of vacuum of the atmosphere gas is 0.2 Torr.
If the H ₃ or SiH ₄ gas is diluted, the same effect can be obtained even when the atmospheric gas is at normal pressure.

Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 4 is a sectional view in the order of steps when polysilicon is buried in the contact holes of the source and drain regions of a MOS transistor by using the method of the present invention.

As shown in FIG. 4, first, the plane orientation (10
0), a field oxide film 12 is selectively formed on a P-type silicon substrate 11 having a resistivity of 1 Ω · cm by a LOCOS method. Next, the gate oxide film 13 and the gate electrode 14
Is formed, and a source diffusion layer 15 and a drain diffusion layer 16 are formed to form a MOS transistor. Further, after forming an interlayer insulating film 17 by the CVD method, a contact hole 18 connected to the diffusion layer is formed. Here, the completed diameter of the contact hole is 0.15 μm and the depth thereof is 1 μm.

After the above, as described in the first embodiment, the substrate is washed with a mixed solution of H ₂ O ₂ , ammonia water, and H ₂ O, and then the furnace temperature is set to 650 using an LPCVD apparatus. Temperature, PH ₃ / SiH ₄ partial pressure ratio 2.5 × 10 ₋₂ , total gas pressure 0.2 Torr.
Next, at 550 ° C., the SiH ₄ gas and PH _{3
A 3} / SiH ₄ partial pressure ratio of 1 × 10 _-3 and a total pressure of 0.2 Torr were supplied to grow a phosphorus-doped amorphous silicon film to a thickness of 100 nm. As shown in FIG. It is buried at 19. Next, the amorphous silicon film 19 on the interlayer insulating film 17 is removed by a chemical mechanical polishing (CMP) method. In addition, 85
A heat treatment is performed at 0 ° C. for 30 minutes to crystallize the amorphous silicon film 19 and activate phosphorus atoms at the same time.
As shown in FIG. 1C, a contact plug 20 made of phosphorus-doped polysilicon is formed.

Finally, a source / drain electrode 21 of the MOS transistor is formed so as to be electrically connected to the contact plug 20.

In the contact plug formed by the above-described method of the present invention, there is no natural oxide film at the interface between the source / drain diffusion layer and the phosphorus-doped polysilicon, and the electrically active phosphorus is contained in the polysilicon to be the contact plug. Because there are enough atoms, the contact resistance is greatly reduced. For example, the interface resistance of the diffusion layer / contact plug is:
This is reduced to about 1/5 of the case where a contact plug is formed without performing silane reduction. In this case, the overall contact resistance is reduced to 60%. In addition, the resistance at the interface between the diffusion layer and the contact plug is reduced to almost half as compared with the case where the natural oxide film is removed by the conventional silane reduction method. Then, the overall contact resistance is reduced to 75%.

The above description is an example in which the present invention is applied to the case where a contact plug is formed in a source or drain diffusion layer of a MOS transistor. Other than this
A similar effect can be obtained by applying the present invention to the formation of a memory cell composed of one MOS transistor and one capacitor in AM. In this case, the phosphorus-doped polysilicon buried in one contact hole of the MOS transistor is electrically connected to the lower electrode of the capacitor as it is.

In this embodiment, an example of phosphorus-doped polysilicon has been described. However, the present invention is also effective when applied to the growth of boron-doped polysilicon by LPCVD using a SiH ₄ -B ₂ H ₆ gas. In this case, since PH ₃ is added at the time of removing the natural oxide film, there is a concern that phosphorus remains in the boron-doped polysilicon film, but as described above, the film growth at the time of removing the natural oxide film is slight. Therefore, the net phosphorus concentration is sufficiently low and does not pose a problem in device operation.

In the above embodiment, the case where polysilicon is buried in the contact hole of the diffusion layer on the surface of the silicon substrate has been described. In addition, a contact hole on the polysilicon film or silicide layer used for the gate electrode, etc.
Note that polysilicon can be buried in the same manner as in the embodiment.

Next, a third embodiment of the present invention will be described with reference to FIGS.
An example will be described. Here, FIG. 5 is a cross-sectional view of a structure in which a silicon epitaxial layer is formed on a silicon substrate, and FIG. 6 is a graph showing uneven steps on the surface of the silicon epitaxial layer.

Firstly, the silicon substrate 31 shown in FIG. 5 H ₂
The substrate is washed with a mixed solution of O ₂ , aqueous ammonia, and H ₂ O. Next, it was introduced into a load lock chamber of a high vacuum CVD apparatus, and 1 ×
After evacuating to a degree of vacuum of 10 ^-6 Torr or less, the silicon substrate 3
1 is transferred to a silicon epitaxial growth chamber. next,
After the degree of vacuum in the growth chamber reaches 1 × 10 ⁻⁸ Torr or less, the silicon substrate 31 is heated to 650 ° C. and the PH ₃ /
The natural oxide film is removed by setting the partial pressure ratio of SiH ₄ to 1 × 10 ^{−5 to} 2.5 × 10 ⁻² and the total gas pressure to 1 × 10 ⁻⁴ Torr.

Next, while keeping the temperature of the silicon substrate 31 the same, Si ₂ H was introduced into the above-mentioned silicon epitaxial growth chamber.
₆ gas and B ₂ H ₆ gas are introduced. Where B ₂ H
The partial pressure ratio of ₆ / Si ₂ H ₆ is 5 × 10 ^-4 and the total gas pressure is 1
A boron-doped silicon epitaxial film 32 is grown at a setting of × 10 ^-4 Torr. The thickness of the silicon epitaxial film 32 thus grown is 100 n
It is set to a predetermined value between m and 1 μm.

Next, in order to examine the effect of the present invention, the surface irregularities of the epitaxial surface 33 of the silicon epitaxial film 32 grown under the above conditions were measured by AFM. Here, the thickness of the silicon epitaxial film 32 is 500 n
m. FIG. 6 shows PH ₃ / Si of the step of the surface unevenness.
The H ₄ partial pressure ratio dependency is shown. As can be seen from FIG. 6, PH ₃
When the / SiH ₄ partial pressure ratio is 1 × 10 ⁻² or more, the surface unevenness becomes 1 nm or less, and the silicon epitaxial film 32 having a very flat surface is formed.

Further, the crystallinity of the silicon epitaxial film 32 and the amount of impurities at the interface between the silicon epitaxial film and the silicon substrate were measured by a transmission electron microscope (TEM) and
It was evaluated by IMS. From TEM observation, no crystal defects such as lattice defects and precipitates were found in the silicon epitaxial film, and it was confirmed that the film was a good crystalline film. SIMS measurement confirmed that there was no impurity such as oxygen or carbon remaining at the silicon epitaxial film / silicon substrate interface.

From the above, it was confirmed that the method of the present invention completely removed the natural oxide film on the silicon substrate surface and formed a silicon epitaxial film having high surface flatness.

This low-temperature epitaxial growth technique uses MO
The present invention facilitates application of a silicon epitaxial film to a channel portion for the purpose of suppressing a short channel effect of an S transistor, application of a silicon epitaxial film to a source and drain region that enables a shallow junction of a diffusion layer, and the like.

In this embodiment, the growth of the silicon epitaxial film has been described. However, the growth of the germanium (Ge) film or the Si _1-x Ge _x film, which is an alloy of silicon and germanium, is similar to the growth of the silicon epitaxial film. Has been confirmed to be effective.

In the above embodiment, the case where a mixed gas of SiH ₄ and PH ₃ is used as the reducing gas has been described. However, the same effect can be obtained by using Si ₂ H ₆ gas instead of SiH ₄ gas. . In the case of using this Si ₂ H ₄ gas, the processing temperature for removing the natural oxide film is lower by about 100 ° C. than in the case of using the SiH ₄ gas. However, in this case, the gas partial pressure ratio of PH ₃ / Si ₂ H ₆ is PH ₃ / SiH
_It is necessary to make the gas partial pressure ratio larger than ₄ . This is S
This is because i ₂ H ₆ gas is more likely to be thermally decomposed than SiH ₄ gas.

The same effect can be obtained by using a mixed gas of GeH ₄ and PH ₃ instead of a mixed gas of SiH ₄ and PH ₃ as the reducing gas. In this case, the processing temperature of the natural oxide film removal or the gas partial pressure ratio of PH ₃ / GeH ₄ is:
The conditions may be set under the same conditions as in the case of the SiH ₄ -PH ₃ system.

[0057]

According to the method for removing a native oxide film on a semiconductor substrate according to the present invention, the native oxide film on the surface of the semiconductor substrate is removed by heating the semiconductor substrate under reduced pressure and supplying a silane-based gas or a GeH ₄ gas. In the semiconductor substrate surface treatment method described above, a PH ₃ gas is supplied simultaneously with the silane-based gas or GeH ₄ gas.

Therefore, even if a semiconductor thin film such as polysilicon or single crystal silicon is grown after removing a natural oxide film such as silane reduction or GeH ₄ reduction, surface irregularities on the surface of these semiconductor thin films are not formed. .

By applying the method of forming a semiconductor thin film according to the present invention to the formation of a contact plug of a ULSI, the contact resistance can be greatly reduced.

Further, by applying the present invention to semiconductor epitaxial growth, a semiconductor epitaxial film having good surface flatness and excellent crystallinity at a low temperature can be grown.

[Brief description of the drawings]

FIG. 1 is a sectional view in the order of steps for explaining a first embodiment of the present invention.

FIG. 2 is a graph showing processing conditions in the first embodiment of the present invention.

FIG. 3 is a graph for explaining the effect of the first embodiment of the present invention.

FIG. 4 is a sectional view in the order of steps for explaining a second embodiment of the present invention.

FIG. 5 is a sectional view for explaining a third embodiment of the present invention.

FIG. 6 is a graph for explaining the effect of the third embodiment of the present invention.

FIG. 7 is a cross-sectional view in the order of steps for explaining a conventional technique.

[Explanation of symbols]

 Reference Signs List 1,11,31,101 Silicon substrate 2,102 Natural oxide film 3,103 Remaining native oxide film 12 Field oxide film 13 Gate oxide film 14 Gate electrode 15 Source diffusion layer 16 Drain diffusion layer 17 Interlayer insulation film 18 Contact hole 19 Amorphous Silicon film 20 Contact plug 21 Electrode 32 Silicon epitaxial film 33 Epitaxial surface 104 Silicon thin film

Claims (5)

(57) [Claims] In a processing method for removing a natural oxide film formed on a main surface of a semiconductor substrate or a surface of a semiconductor material, a mixed gas of silane-based gas and PH ₃ gas or GeH
_The semiconductor device according to claim 1, wherein the semiconductor substrate or the semiconductor thin film is heated in a reduced-pressure gas atmosphere containing a mixed gas of ₄ gas and PH ₃ gas or a diluted gas atmosphere of the mixed gas to reduce and remove the natural oxide film. Production method. 2. The method according to claim 1, wherein the silane-based gas is SiH ₄ or S
_{2. The} method according to claim 1, wherein the gas is i ₂ H ₆ gas. 3. A step of forming a contact hole in an insulating film on a diffusion layer constituting a source / drain of an insulated gate field effect transistor formed on a semiconductor substrate; a mixed gas of silane-based gas and PH ₃ gas or GeH ₄ gas and PH
Heating the semiconductor substrate in a reduced-pressure gas atmosphere containing a mixed gas of ₃ gases or a diluent gas atmosphere of the mixed gas, and after heating the semiconductor substrate, burying the contact holes to form a semiconductor film containing impurities. Depositing a semiconductor device. 4. The semiconductor substrate is heated in a reduced-pressure gas atmosphere containing a mixed gas of a silane-based gas and a PH ₃ gas, a mixed gas of a GeH ₄ gas and a PH ₃ gas, or a diluted gas atmosphere of the mixed gas. Manufacturing a semiconductor device, comprising: a step of reducing and removing a natural oxide film on a main surface of the semiconductor device; and a step of depositing a single-crystal semiconductor thin film on the main surface of the semiconductor substrate after removing the natural oxide film. Method. 5. The semiconductor according to claim 1, wherein a partial pressure ratio of the PH ₃ gas to the SiH ₄ gas is 2.5 × 10 ⁻² or more. Device manufacturing method.