JP4227966B2 - Power supply monitoring circuit and method - Google Patents

Description

  The present invention relates to a power supply monitoring circuit for performing power supply state monitoring (battery insertion / extraction monitoring) in a power saving state by hardware control in a power supply monitoring circuit of a portable terminal.

  The configuration of a conventional power supply monitoring circuit for a portable terminal will be described with reference to FIG. A battery lock detection signal is input from the main battery 1 to the CPU 6. When the CPU 6 detects opening / closing of the battery lock, the CPU 6 shifts to a power saving state. However, the main battery insertion / extraction cannot be detected under the power saving state.

  Further, in a power saving state in which the CPU 6 is restored by a signal from the high load device 9, the power supply of the high load device 9 is provided in order to safely save the CPU and memory that are backed up by inserting and removing the main battery. Stop.

  Alternatively, a dedicated power control CPU can always operate to monitor power (monitored by software).

In addition, a switching means for switching the power source to the battery pack or the spare battery and a voltage detection means for detecting the voltage level of the battery pack are provided, and when the battery pack is replaced, the power source is switched from the battery pack to the spare battery. There is a mobile phone device with a battery pack replacement processing function that instructs to switch the power source from the spare battery to the battery pack when the voltage detection means detects that the battery pack has been replaced. For example, see Patent Document 1).
JP 2000-165514 A

  However, the configuration of the prior art has the following problems.

  The first problem is that the insertion / extraction of the main battery cannot be detected because the software is stopped (suspended) in the power saving mode.

  The second problem is that it is impossible to supply power to the device by inserting / removing the main battery, so that it is necessary to restart when returning from the abnormal state, and this restart takes time.

  Accordingly, an object of the present invention is to provide a power supply monitoring circuit and method for protecting memory data backed up in a power saving state and detecting insertion / removal of a main battery.

  In order to solve the above-described problems, the present invention provides a power supply circuit that receives power supply from a main battery, a main power supply insertion / removal detection circuit that detects insertion / removal of the main battery, and a high load device that receives power supply from the power supply circuit. A power supply monitoring circuit including a power supply control circuit for supplying power, wherein the main power supply insertion / extraction detection circuit includes an external power supply by a logical AND circuit having a main battery current detection signal and an external power supply current detection signal as inputs. When the current is off, it detects the insertion and removal of the main power supply, and holds the insertion and removal state of the main battery by inputting the output of the logical AND circuit and the system enable signal indicating the power saving mode of the device to the signal latch circuit, When the CPU returns from the power saving mode, the main battery insertion / extraction state is notified, and a power supply control mask signal for restricting power supply when the main battery is removed is sent to the power supply control circuit. And outputting the.

  With the above configuration, when the main battery is inserted / removed when the CPU is in the power saving state, the backed up CPU and memory data are secured safely, the power supply of the high load device is stopped, and the main battery The insertion / extraction state is stored.

  When the CPU detects this state at the next start-up, only the initialization of the device is additionally processed to shorten the start-up time when the power supply is abnormal, and the process immediately before the power saving state can be performed.

  According to the first effect of the present invention, since the main battery insertion / removal is monitored by the hardware in the power saving mode of the CPU, it is possible to detect a power supply abnormality even when the program is stopped. It is.

  The second effect is that after the power supply abnormality is detected by inserting / removing the main battery, it is possible to start up with the minimum re-initialization of the device at the next start-up.

  Next, the best mode of the present invention will be described with reference to the drawings.

  FIG. 1 is a schematic configuration diagram of a power supply monitoring circuit according to the present invention. The main battery 1 and the external power source 2 (AC adapter or the like) are power sources for operating the apparatus, and supply power to the power source circuit 3 via routes S1-1 and S2-1, respectively.

  The power detection signals S1-2 and S2-2 are input to the main battery insertion / removal detection circuit 4, and the main battery insertion / removal detection circuit 4 notifies the CPU 6 of the insertion / removal state of the main battery and supplies power to the high load device 9. The power supply control circuit 5 has a function of giving a control signal.

  The wake detection circuit 8 is a circuit that receives the signal S9-1 from the high load device 9 and outputs a wake signal S8-1 for returning the CPU 6 in the power saving state.

  FIG. 2 shows a detailed configuration of the main battery insertion / extraction detection circuit constituting the power supply monitoring circuit. The main battery insertion / removal detection circuit 4 includes a logical AND circuit 41 and a signal latch circuit 42, and detects that the main battery is inserted / removed at the next start-up when the CPU 6 is not powered by an external power supply and the CPU 6 is in a power saving state. Is possible.

  The main battery current detection signal S1-2 and the external power supply current detection signal S2-2 are input to the logical AND circuit 41, and the outputs thereof are input to the signal latch circuit. The logical AND circuit 41 masks (logically ANDs) the main battery current detection signal S1-2 with the external power supply current detection signal S2-2, so that the main battery insertion / extraction detection is possible in the absence of external power supply. Become. That is, when the external power supply current detection signal S2-2 is in an off state and the main battery current detection signal S1-2 is in an off state, it is detected that the main battery has been removed.

  The signal latch circuit 42 receives the output from the logical AND circuit 41 and the system enable signal S0-1 and outputs a notification signal S4-1 to the CPU 6 and also supplies a power supply control mask signal S4- to the power supply control circuit 5. 2 is output. The system enable signal S0-1 represents the power saving mode of the apparatus. When this signal becomes active, the system power supply is turned on, and the backup system power supply by the sub-battery 7 such as CPU and memory is switched to the normal power supply. The notification signal clear signal S6-1 is output from the CPU 6 and input to the signal latch circuit 42.

  By inputting the system enable signal S0-1 as a control signal to the signal latch circuit 42, the output of the logical AND circuit 41 is masked by the system enable signal S0-1. As a result, when the system enable signal S0-1 indicates the power saving mode of the apparatus, it is held that the output of the logical AND circuit 41 is in a state indicating that the main battery has been removed, and the insertion / extraction detection of the main battery is detected. Make it possible.

  Power supply control is performed by outputting a power supply control mask signal S4-2 to the power supply control circuit 5 in order to safely protect backed up data while the high load device 9 is operating. Is possible. When the main battery 1 is removed in the power saving mode and then the main battery 1 is connected, power is supplied to the CPU, memory, etc., and power is not supplied to the high load device 9. When the apparatus is restarted in this state, power supply to the high load device 9 is started by software.

  In portable terminals that need to be reduced in size and weight, the main battery is very large and heavy, and a backup secondary battery is usually small and has a small supply current. For this reason, if the main battery is removed, sufficient current for the operation of the device cannot be obtained, and the current that can be supplied by the secondary battery is small. The power supply is stopped, the memory data is destroyed, and only the return by the initial activation is performed. If the data is destroyed while the file is open, the system software must be reinstalled.

  The power supply control of the high load device 9 in operation is controlled by the power supply control mask signal S4-2, and the data of the memory 61 being backed up and the protection of the CPU 6 are implemented by hardware. That is, when the main battery 1 is removed in the power saving mode, the power supply of the high load device 9 is controlled to be turned off, and the memory data and the like are backed up by the sub battery 7.

  After that, if the main battery 1 is connected and data protection is ensured, the apparatus is restarted and a process for returning the state of the apparatus to the state before the main battery is removed is performed. That is, at the next start-up, the CPU 6 detects that the main battery 1 has been inserted / removed based on the state of the notification signal S4-1, initializes the main battery insertion / removal detection circuit 4, and supplies power to the high load device 9. After resuming, this can be initialized and returned to the state before the main battery insertion / removal.

  Note that the high-load device 9 of the present embodiment is a communication device or the like, and is a device that can output a signal that causes the CPU 6 to wake up in response to external access (communication).

  In this way, in this embodiment, it is possible to safely control the power supply by controlling the power supply of the heavily loaded device 9 and monitoring the insertion / removal of the main battery under the power saving state of the CPU 6.

  In the configuration of FIG. 1, the power supply circuit, the backup circuit, and the like are well known and are not directly related to the present invention.

  FIG. 3 shows the configuration of the second embodiment of the present invention. The basic configuration is the same as that of the first embodiment, but the power supply control circuit 5 controls the plurality of devices 9 to 11. In the present embodiment, the main battery insertion / removal detection circuit 4 can control a plurality of load devices based on the set priority order. The basic operation of each circuit is the same as that of the first embodiment.

It is a schematic block diagram of the power supply monitoring circuit of this invention. It is a block diagram of a main battery insertion / extraction detection circuit. It is a block diagram of Example 2 of this invention. It is a block diagram of the power supply monitoring circuit of the conventional portable terminal.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Main battery 2 External power supply 3 Power supply circuit 4 Main battery insertion / extraction detection circuit 5 Power supply control circuit 6 CPU
7 Sub battery 8 Wake detection circuit 9 High load device

Claims (6)

A power circuit that receives power from the main battery;
A main power supply insertion / removal detection circuit for detecting insertion / removal of the main battery;
A power supply monitoring circuit comprising a power supply control circuit that receives power supply from the power supply circuit and supplies power to a high load device,
The main power supply insertion / extraction detection circuit outputs a signal for notifying the CPU of the main battery insertion / extraction state, and outputs a power supply control mask signal for restricting power supply to the power supply control circuit when the main battery is removed. A power supply monitoring circuit characterized by that. The main power supply insertion / extraction detection circuit has a logical AND circuit that inputs a main battery current detection signal and an external power supply current detection signal,
2. The power supply monitoring circuit according to claim 1, wherein when the external power supply current is off, insertion / extraction of the main power supply is detected. A signal latch circuit having as inputs an output of the logical AND circuit and a system enable signal representing a power saving mode of the device;
The signal latch circuit holds the main battery insertion / removal state when the system enable signal indicates the power saving mode, and notifies the main battery insertion / removal state when the CPU returns from the power saving mode. The power supply monitoring circuit according to claim 2.   The power supply monitoring circuit according to claim 1, further comprising a Wake detection circuit that receives a signal from the high-load device and outputs a Wake signal for returning the CPU in the power saving state. Power supply monitoring by a power supply circuit that receives power supply from the main battery, a main power supply insertion / removal detection circuit that detects insertion / removal of the main battery, and a power supply control circuit that receives power supply from the power supply circuit and supplies power to the high load device A method,
The main power supply insertion / removal detection circuit outputs a signal notifying the CPU of the main battery insertion / removal state, and outputs a power supply control mask signal for restricting power supply to the power supply control circuit when the main battery is removed. The power supply monitoring method characterized by the above-mentioned. The main power supply insertion / extraction detection circuit detects the insertion / extraction of the main power supply when the external power supply current is off by the logical AND of the main battery current detection signal and the external power supply current detection signal,
6. The main battery insertion / removal state is maintained when the system enable signal of the apparatus indicates the power saving mode, and the main battery insertion / removal state is notified when the CPU returns from the power saving mode. The power supply monitoring method described.

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