JP7198065B2 - Computer system and control method - Google Patents

Description

The present invention relates to computer systems and control methods.

For example, Patent Literature 1 describes a control circuit 10 that operates by receiving power supplied from the power supply device 2 via a capacitor 53, a low voltage detection unit 55 that detects that the power supply device 2 has been switched off, and a low voltage A printer is disclosed that includes a CPU 11 as a control unit that increases the power consumption of the control circuit 10 when the detection unit 55 detects that the power supply device 2 has been switched off.

JP 2014-112279

It is an object of the present invention to provide a computer system that shortens the time until power can be turned on again.

A computer system according to the present invention includes a computer device, a power supply device that supplies power to the computer device in a normal operation mode or a power saving mode, and a backup power supply device that backs up the power supply from the power supply device. The computer device includes a state management unit that prohibits the power supply device from shifting to the power saving mode, and a backup power supply device that prohibits power supply when the computer device shuts down. and a power management unit.

Preferably, the computer device operates according to the Advanced Configuration and Power Interface standard, and the state management unit maintains State S0 even after the computer device shuts down.

Preferably, the power management unit notifies the backup power supply device of a backup inhibition signal for inhibiting backup operation during a shutdown sequence of the computer device.

Preferably, the computing device includes an operating system, a BIOS, a memory, a chipset, and a monitoring device, wherein the chipset enables the BIOS when a shutdown sequence of the operating system is initiated. hardware interrupt is instructed, the BIOS instructs the chipset to notify a backup inhibit signal when the hardware interrupt is instructed, and the chipset inhibits backup in response to the instruction from the BIOS Generate a signal to notify the backup power supply.

Preferably, the power supply device includes a capacitor, and supplies electric power stored in the capacitor to the computer device when external power supply is stopped.

A control method according to the present invention includes a computer device, a power supply device that supplies power to the computer device in a normal operation mode or a power saving mode, and a backup power supply device that backs up the power supply from the power supply device. wherein the computer device inhibits the power supply from transitioning to the power saving mode; and when the computer device shuts down, the backup power supply is powered off. and prohibiting supply.

It is possible to provide a computer system that shortens the time until power can be turned on again.

2 is a diagram illustrating the configuration of an embedded computer 2; FIG. 4 is a flowchart for explaining shutdown processing (S10) of the embedded computer 2 in this embodiment. 3 is a diagram showing changes in signals and states exchanged in the embedded computer 2 in the shutdown process (S10) of FIG. 2; FIG. FIG. 10 is a diagram for explaining the operation of an embedded computer in Comparative Example 1;

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a diagram illustrating the configuration of an embedded computer 2. As shown in FIG. Embedded computer 2 is an example of a computer system according to the present invention.
As illustrated in FIG. 1, the embedded computer 2 has a motherboard 20, an ATX power supply 30, and a UPS battery 40, and operates according to the ACPI (Advanced Configuration and Power Interface) standard. Motherboard 20 is an example of a computer device according to the present invention.
Motherboard 20 has hardware 200 , BIOS 210 and OS 220 , hardware 200 includes CPU 202 , PCH 204 , monitoring device 206 and memory 208 .

CPU 202 is, for example, a central processing unit.
PCH 204 is, for example, a chipset.
The monitoring device 206 is, for example, a device that monitors the operating state of the motherboard 20 or the power supply state.
The memory 208 is, for example, a volatile memory and functions as a main memory.

The BIOS 210 is a Basic Input Output System, and is a program that controls boot processing and input/output processing of the OS 220 .
The OS 220 is an operating system and basic software for operating the embedded computer 2 . The OS 220 of this example performs power management according to the ACPI standard.

The ATX power supply 30 is an example of a power supply device according to the present invention. For example, the ATX power supply 30 includes a capacitor and converts AC power (primary side power supply) supplied from the outside via the AC cable 300 and the outlet 302 into DC power (secondary side power supply), which is supplied to the motherboard 20. Supply DC power. The ATX power supply 30 of this example complies with the ATX standard, and supplies the resident power supply and the non-resident power supply when the motherboard 20 is in the normal operation mode, and supplies only the resident power supply when the motherboard 20 is in the power saving mode. supply.

UPS battery 40 is an example of a backup power supply device according to the present invention. For example, the UPS battery 40 supplies backup power to the motherboard 20 according to the monitoring results of the monitoring device 206 . More specifically, the UPS battery 40 supplies backup power to the motherboard 20 when the power supply from the ATX power supply 30 is lost while the motherboard 20 is in operation or on standby, and after the motherboard 20 shuts down, Even if the power supply from the ATX power supply 30 stops, the backup power supply is not supplied.

Next, the background of the present invention will be described.
FIG. 4 is a diagram for explaining the operation of the embedded computer in Comparative Example 1. FIG.
Embedded computers are often operated to start up/shut down by turning on/off AC power. As a method for realizing this operation, we adopted a chipset that enables automatic power-on of the embedded computer (transition to State S0) by turning on the AC power from the AC power-off state (State G3). ing.
The ATX power supply, which is mainly used in embedded computers, has a large-capacity capacitor inside, and even after the AC power is turned off, there is no resident power supply for several tens of seconds until the charge in the capacitor is completely discharged. Continue to feed the secondary side. Since the chipset monitors the state of the power supply and controls the automatic ON of the system power supply, it cannot recognize that the AC power supply has been turned off (shifted to State G3) in the power holding state by the capacitor described above.
Therefore, the system power cannot be automatically turned on for several tens of seconds after the AC power is turned off even if the AC power is turned on again. In other words, it is necessary to set aside time as the time when the power cannot be turned on again.
This re-starting disabled time hinders early recovery from an equipment failure, and is a problem in terms of operation.

More specifically, as exemplified in FIG. 4, when the OS is shut down, the state in which both the non-resident power supply and the resident power supply are normally supplied (State S0) is changed to the state in which only the resident power supply is supplied (State S5). Because of the shift, the power consumption on the secondary side becomes smaller and the discharge time becomes longer.
Therefore, the setting is changed so that the state remains in State S0 even after the OS is shut down. By cutting off the AC power supply in this state, the charge stored in the capacitor inside the ATX power supply continues to supply not only the resident power supply but also the non-resident power supply, so that the discharge time can be shortened.

A problem also arises when a UPS battery is installed. A general UPS battery controls a backup inhibition signal during OS shutdown in order to distinguish between power failure and normal system power shutdown (transition to State S5 due to OS shutdown). The backup inhibit signal is controlled starting from OS shutdown (transition to State S5), and controls not to shift to the battery backup state during normal OS shutdown. When State S5 is disabled (that is, when the setting is changed so that State S0 remains in State S0 even after OS shutdown), the backup inhibition signal cannot be output, and even in the case of normal OS shutdown, , the UPS battery erroneously recognizes that a power failure has occurred, and shifts to the battery backup state. In other words, when State S5 is set to invalid, there is a problem that the UPS battery cannot be used.

In addition, by adding a discharge circuit that connects discharge parts between the resident power supply and GND to increase the current consumption of the resident power supply line, the charge stored in the capacitor inside the ATX power supply when the AC power supply is cut off. Discharge time can be shortened. This method does not affect the battery backup control because it is a discharge method by adding an analog discharge component.
However, since the current always flows to the discharge parts, the power consumption increases, the discharge parts become abnormally hot, which poses a safety problem, and multiple discharge parts with a large mounting area are added. It is not suitable for small embedded computers because it requires a space for

Therefore, in the embedded computer 2 of this embodiment, the motherboard 20 prohibits the ATX power supply 30 from shifting to the power saving mode, maintains the normal operation mode even after the OS 220 shuts down, and when the OS 220 shuts down Then, the mother board 20 outputs a backup inhibition signal to the UPS battery 40 to inhibit power supply.
As a result, the electric charge stored inside the ATX power supply 30 is discharged quickly, and the power supply to the embedded computer 2 can be quickly turned on again.

FIG. 2 is a flowchart for explaining shutdown processing (S10) of the embedded computer 2 in this embodiment.
FIG. 3 is a diagram showing changes in signals and states exchanged in the embedded computer 2 in the shutdown process (S10) of FIG.
It should be noted that the BIOS 210 (state management unit) stores setting information for disabling State S5 in the memory 208 via ACPI at the time of startup processing of the embedded computer 2. It is notified in advance that S5 will be invalidated.
At step 100 (S100), the embedded computer 2 waits until the user performs a shutdown operation (S100: No), and when the user performs a shutdown operation (S100: Yes), the process proceeds to S105.

At step 105 (S105), the OS 220 of the embedded computer 2 starts shutdown processing.
At step 110 (S110), the OS 220 accesses the control register of the PCH 204 upon execution of shutdown.

At step 115 (S115), the PCH 204 generates a hardware interrupt (SMI) and notifies the BIOS 210 in response to the state of the controlled register.
At step 120 (S120), the BIOS 210 accesses the control register of the PCH 204 upon receipt of the hardware interrupt.
At step 125 (S125), the PCH 204 (power management unit) receives the state of the controlled register, generates a backup inhibit signal, and notifies the UPS battery 40 of the generated backup inhibit signal.

At step 130 (S130), the UPS battery 40 receives the backup inhibition signal notified from the PCH 204 and operates so as not to shift to the battery backup mode.
At step 135 (S135), the motherboard 20 disables the transition to State S5 and waits in State S0 according to the settings in advance.

At step 140 (S140), the motherboard 20 causes the monitor (not shown) to display that the power can be cut off when the shutdown of the OS 220 is completed.
At step 145 (S145), when the AC cable 300 is removed, the supply of the primary side power of the ATX power supply 30 is stopped.
At step 150 (S150), the ATX power supply 30 supplies the resident power supply and non-resident power supply to the motherboard 20 in State S0 to discharge the electric charge accumulated in the internal capacitor.

As described above, even when the UPS battery 40 is installed, the embedded computer 2 of the present embodiment shuts down the OS 220 while prohibiting the transition to the power saving mode, and the internal ATX power supply 30 Charged charges can be discharged early. Therefore, the time during which the power cannot be turned on again is shortened.
Furthermore, even if the AC power supply is turned off in the State S5 disabled state, the embedded computer 2 can shift to the power OFF state (State G3) without erroneously shifting to the battery backup mode.

2 Embedded computer 20 Motherboard 200 Hardware 210 BIOS
220 OS
30... ATX power supply 40... UPS battery

Claims (6)

a computer device;
a power supply device that supplies power to the computer device in a normal operation mode or a power saving mode;
a backup power supply that backs up power supplied by the power supply,
The computer device comprises:
a state management unit that prohibits the power supply device from shifting to the power saving mode;
a power management unit that prohibits power supply to the backup power supply when the computer device shuts down ;
The power supply device includes a capacitor, and supplies the power stored in the capacitor to the computer device in the normal operation mode when the external power supply is stopped.
computer system. a computer device;
a power supply device that supplies power to the computer device in a normal operation mode or a power saving mode;
a backup power supply that backs up power supply from the power supply;
has
The computer device comprises:
a state management unit that prohibits the power supply device from shifting to the power saving mode;
a power management unit that prohibits power supply to the backup power supply when the computer shuts down;
including
the computing device operates according to the Advanced Configuration and Power Interface standard;
The computer system, wherein the state management unit maintains State S0 even after the computer device shuts down. 2. The computer system according to claim 1, wherein said power management unit notifies said backup power supply device of a backup inhibition signal for inhibiting backup operation during a shutdown sequence of said computer device. a computer device;
a power supply device that supplies power to the computer device in a normal operation mode or a power saving mode;
a backup power supply that backs up power supply from the power supply;
has
The computer device comprises:
a state management unit that prohibits the power supply device from shifting to the power saving mode;
a power management unit that prohibits power supply to the backup power supply when the computer shuts down;
including
The power management unit notifies the backup power supply device of a backup inhibition signal that inhibits backup operation during a shutdown sequence of the computer device,
the computing device includes an operating system, a BIOS, a memory, a chipset, and a monitoring device;
the chipset directs a hardware interrupt to the BIOS when a shutdown sequence of the operating system is initiated;
the BIOS instructs the chipset to notify a backup inhibit signal when a hardware interrupt is indicated;
A computer system in which the chipset generates a backup inhibit signal and notifies a backup power supply device according to an instruction from the BIOS. 5. The computer system according to claim 4, wherein the power supply device includes a capacitor, and supplies electric power stored in the capacitor to the computer device when external power supply stops. A computer system that includes a computer device, a power supply device that supplies power to the computer device in a normal operation mode or a power saving mode, and a backup power supply device that backs up the power supply from the power supply device,
a step in which the computer device prohibits the power supply device from shifting to the power saving mode;
and disabling power supply to the backup power supply when the computer device shuts down ;
The power supply device includes a capacitor, and supplies the power stored in the capacitor to the computer device in the normal operation mode when the external power supply is stopped.
control method.

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