JP4221019B2 - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
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- JP4221019B2 JP4221019B2 JP2006254166A JP2006254166A JP4221019B2 JP 4221019 B2 JP4221019 B2 JP 4221019B2 JP 2006254166 A JP2006254166 A JP 2006254166A JP 2006254166 A JP2006254166 A JP 2006254166A JP 4221019 B2 JP4221019 B2 JP 4221019B2
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Description
本発明は半導体装置(以下、LSIという)に係り、詳しくは、パッケージLSIにおいて、パッケージの外部に露出するリード電極とボンディングによりワイヤを介して接続されるチップの入出力端子(I/Oパッド)の構造に関する。 The present invention relates to a semiconductor device (hereinafter referred to as an LSI), and more specifically, in a package LSI, an input / output terminal (I / O pad) of a chip connected to a lead electrode exposed outside the package via a wire. Related to the structure.
近年のICは、高集積化の要望から多層配線化され、ますますの微細化が進められている。そのため、チップ上面に形成されるパッドと配線とのコンタクトも複雑化・微細化が進み、パッドの構造が弱くなりつつある。このようにパッドの構造が弱くなると、パッドがチップから剥離するおそれがあり、リード電極との接続が不良となるおそれがある。一方で、パッドとワイヤの接合は確実なことが常に要求されているため、近年のLSIでは、パッドの構造を強固にすることと、パッドとワイヤの接合を確実にすることの2つを両立することが必要となっている。 In recent years, ICs have been made into multi-layer wiring due to the demand for high integration, and further miniaturization is being promoted. For this reason, the contact between the pad and the wiring formed on the upper surface of the chip is becoming more complicated and finer, and the pad structure is becoming weaker. If the structure of the pad becomes weak in this way, the pad may be peeled off from the chip, and the connection with the lead electrode may be poor. On the other hand, since there is always a need for reliable bonding between the pad and the wire, in recent LSIs, both the strengthening of the pad structure and the reliable bonding of the pad and the wire are compatible. It is necessary to do.
従来、チップ上面の外周部には複数のI/Oパッドが形成されている。このパッドは、チップ中央部に構成される内部論理回路の電源及び信号の入出力を行うものである。そして、このようなパッドは、パッケージの外部に露出するリード電極に対しボンディングワイヤにより接続される。 Conventionally, a plurality of I / O pads are formed on the outer peripheral portion of the upper surface of the chip. This pad is used for power supply and signal input / output of an internal logic circuit formed at the center of the chip. Such a pad is connected to a lead electrode exposed outside the package by a bonding wire.
図5は、多層配線構造のチップにおけるI/Oパッド部の一例を示す。尚、図5(a)はその平面図であり、図5(b)は図5(a)のC−C断面図である。
略正方形状に形成されたパッド11は層間膜(酸化膜)12上に形成され、その層間膜12の下層には配線13が形成されている。パッド11は、層間膜12を挟んで配線13と複数のコンタクト14で接続されている。そして、コンタクト14は、そのパッド11の周辺部において辺に沿って1列に配置されている。
FIG. 5 shows an example of an I / O pad portion in a chip having a multilayer wiring structure. 5A is a plan view thereof, and FIG. 5B is a cross-sectional view taken along the line C-C in FIG. 5A.
The
このように形成されたパッド11には、図示しない自動ワイヤボンディング装置によって、ボンディングワイヤ15の一端が当該パッド11の略全面にわたりボンディングされる。
One end of the
ここで、コンタクト14が位置するパッド11の上面には、そのパッド11形成時に僅かな窪み16が発生する。しかしながら、コンタクト14はパッド11周辺部に配置されているので、パッド11の上面は平面度が高く、パッド11とワイヤ15の接合が確実になされる。
Here, a
ところで、自動ワイヤボンディング装置がパッド11に対して前記ワイヤ15をボンディングするとき、当該パッド11には前記ワイヤ15を介して上向きの応力が作用する。しかしながら、上記したパッド11はその周辺のみに配置されるコンタクト14によって配線13に接続されているので、パッド11と配線13との接続箇所が少なく、その構造が強固ではない。従って、パッド11に対して応力が作用すると、当該パッド11が層間膜12から、又は層間膜12が配線13から剥離するおそれがある。
By the way, when the automatic wire bonding apparatus bonds the
特に、上記構成のパッド11では、その中央部がコンタクト14の配置された位置から離れているため応力に対して弱く、その中央部からパッド11全体が層間膜12から剥離し易い。
In particular, the
上記した上向きの応力に対して高い強度を持つパッド構造を図6に示す。尚、図6(a)はその平面図であり、図6(b)は図6(a)のD−D断面図である。
図6に示すパッド11aでは、その全面にわたりコンタクト14が等間隔かつ密に配置され、コンタクト14の数が増やされている。このようにすれば、パッド11aと配線13との接続箇所が増えるため、当該パッド11aは層間膜12(配線13)に対して確実に固定される。従って、パッド11aに作用する応力によって、当該パッド11aが層間膜12から剥離することを防止することができる。
FIG. 6 shows a pad structure having a high strength against the upward stress described above. 6A is a plan view thereof, and FIG. 6B is a sectional view taken along the line DD of FIG. 6A.
In the
ところが、パッド11aの全面にわたりコンタクト14を配置すると、それらコンタクト14による窪み16によってパッド11a上面の平面度が低くなってしまう。すると、パッド11a上面とボンディングワイヤ15との接合面積が狭くなり、パッド11aからワイヤ15が剥がれやすくなる。このことは、LSIの信頼性を大きく低下させる原因の1つとなる。
However, when the
本発明は、上記問題点を解決するためになされたものであって、その目的は、パッドに作用する応力に対して強い構造としながら、パッドとワイヤの接合強度を高めることができる半導体装置を提供することにある。 The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a semiconductor device capable of increasing the bonding strength between a pad and a wire while making the structure strong against stress acting on the pad. It is to provide.
請求項1に記載の発明は、チップに形成された配線と、その配線に対し層間膜を挟んで配置され、ボンディングワイヤを接合する四角形状のパッドとを、コンタクトを介して接続した半導体装置であって、前記四角形状のパッドの4辺から第1の距離に環状かつ等間隔に配置された第1のコンタクト列と、前記四角形状のパッドの対角線上に配置された第2,第3のコンタクト列のみを有する。
The invention according to
(作用)
請求項1に記載の発明によれば、四角形状のパッドの4辺から第1の距離に環状かつ等間隔に配置された第1のコンタクト列と、四角形状のパッドの対角線上に配置された第2,第3のコンタクト列のみが備えられる。この請求項に記載の発明では、パッドと配線との接続箇所が比較的多くなるため、パッドに作用する応力に対して強い強度を持つ構造となり、しかも、パッド上面の平面度が大きく低下しないため、パッドとワイヤの接合強度が高くなる。
(Function)
According to the invention described in
本発明によれば、パッドに作用する応力に対して強い構造としながら、パッドとワイヤの接合強度を高めることができる半導体装置を提供することができる。 ADVANTAGE OF THE INVENTION According to this invention, the semiconductor device which can raise the joint strength of a pad and a wire can be provided, making it a structure strong with respect to the stress which acts on a pad.
以下、本発明を具体化した一実施の形態を図1及び図2に従って説明する。
図1は、パッケージLSIを示す。チップ1は多層配線構造のチップであって、その中央部の領域2には内部論理回路を構成する素子が形成され、更にチップ1上面の外周部には複数のI/Oパッド3が形成されている。このパッド3は、内部論理回路の電源及び信号の入出力を行うものである。そして、このようなパッド3は、パッケージ4の外部に露出するリード電極5に対しボンディングワイヤ6により接続される。
Hereinafter, an embodiment of the present invention will be described with reference to FIGS.
FIG. 1 shows a package LSI. The
図2は、前記チップ1におけるI/Oパッド部を示す。尚、図2(a)はその平面図であり、図2(b)は図2(a)のA−A断面図である。
略正方形状に形成されたパッド3は層間膜(酸化膜)7上に形成され、その層間膜7の下層には配線8が形成されている。パッド3は、層間膜7を挟んで配線8と複数のコンタクト9で接続されている。そして、本実施の形態では、コンタクト9は、そのパッド3の周辺部において辺に沿って1列に配置されるとともに、その中央部に所定の数(図2において4個)だけ配置されている。即ち、本実施の形態では、コンタクト9は、パッド3の4隅(4方の角部)を含めた周辺部と中央部に密に配置されている。
FIG. 2 shows an I / O pad portion in the
The
ここで、本実施の形態では、パッド3の中央部に配置されるコンタクトの数は、その数とパッドの剥がれ不良度の相関関係と、その数とパッド・ワイヤ間接合強度の相関関係とに基づいて、ともに良好となる範囲内で決めている。つまり、パッド3の中央部には、ワイヤ6を接合する領域(図2(a)に示す破線内の領域)に対応する数のコンタクト9が配置される。
Here, in the present embodiment, the number of contacts arranged in the central portion of the
図2は、パッド3に対するコンタクト9の配置位置を模式的に示している。因みに、パッド3は、1辺が80[μm]の正方形である。又、コンタクト9は、1辺が0.6[μm]の正方形である。更に、隣接するコンタクト9の間隙は、1.2[μm]である。従って、実際には、図2に示す数よりも多くのコンタクト9がパッド3に形成されている。
FIG. 2 schematically shows an arrangement position of the
このように形成されたパッド3は、その周辺部と中央部に密に配置されるコンタクト9によって配線8に接続されるので、当該パッド3は層間膜7(配線8)に対して確実に固定される。特に、上記構成のパッド3では、その周辺部及び中央部が応力に対して強い強度を持つ、即ち図5に示すパッド構造に比べて強い構造になっている。そのため、ワイヤ6を介してパッド3に上向きの応力が作用しても、その応力によりパッド3が層間膜7から剥離することが図5の従来例に比べて抑えられる。
Since the
しかも、コンタクト9はパッド3の周辺部と中央部にのみ密に配置されるので、パッド3の上面に生じる窪み10を多くすることなく、その上面の平面度を大きく低下させるものではない。そのため、パッド3に対して前記ワイヤ6の一端をボンディングしたとき、本実施の形態では、パッド3とワイヤ6との接合面積が図6に示すパッド構造の接合面積に比べて広いので、パッド3とワイヤ6の接合強度が図6の従来例に比べて高くなる。従って、本実施の形態では、パッド3とワイヤ6は確実に接合される。
In addition, since the
上記したように、本実施の形態では、以下に示す作用効果を得ることができる。
(1)本実施の形態のパッド3は、その周辺部と中央部に密に配置されるコンタクト9によって配線8に接続されるので、パッド3に作用する応力に対して強い強度を持つ。しかも、パッド3上面の平面度が大きく低下しないため、パッド3とワイヤ6の接合強度が高い。従って、パッド3の層間膜7からの剥離を抑えることができ、しかも、パッド3とワイヤ6の接合を確実にすることができる。
As described above, in the present embodiment, the following operational effects can be obtained.
(1) Since the
(2)本実施の形態では、パッド3の中央部に配置されるコンタクトの数は、その数とパッドの剥がれ不良度の相関関係と、その数とパッド・ワイヤ間接合強度の相関関係とに基づいて、ともに良好となる範囲内で決めている。従って、パッド3を応力に対して確実に強い強度を持つ構造とすることができ、かつパッド3とワイヤ6の接合強度を確実に高くすることができる。
(2) In the present embodiment, the number of contacts arranged in the center portion of the
尚、本発明の実施の形態は以下のように変更してもよい。
○上記実施の形態では、図2に示すように、コンタクト9をパッド3の周辺部と中央部にのみ配置したが、以下のようにコンタクト9を配置しても上記と同様の作用効果がある。
In addition, you may change embodiment of this invention as follows.
In the above embodiment, as shown in FIG. 2, the
図3(a)に示すように、コンタクト9をパッド3の周辺部、特に4隅(4方の角部)と中央部に密に配置し、更に対角線上に等間隔に配置してもよい。
図3(b)に示すように、コンタクト9をパッド3の周辺部と、中心部を避けた中央部に等間隔に配置してもよい。
As shown in FIG. 3A, the
As shown in FIG. 3B, the
図3(c)に示すように、コンタクト9をパッド3の4隅(4方の角部)と中央部に密に配置し、更に対角線上に等間隔に配置してもよい。
As shown in FIG. 3C, the
即ち、コンタクト9は、少なくともパッド3の4隅(4方の角部)と中央部に密に配置することが望ましい。
又、図4(図4(a)はその平面図、図4(b)は図4(a)のB−B断面図)に示すように、コンタクト9はパッド3の周辺部と中央部に環状かつ帯状に連続して配置してもよい。このようにしても、パッド3eを層間膜7(配線8)に確実に固定することができる。
That is, it is desirable that the
Further, as shown in FIG. 4 (FIG. 4 (a) is a plan view thereof, and FIG. 4 (b) is a sectional view taken along line BB of FIG. 4 (a)), the
○上記実施の形態では、パッド3を正方形状に形成したが、パッド3を正方形以外の四角形状、又は四角形以外の形状で形成してもよい。
In the above embodiment, the
1 チップ
3,3a〜3e パッド
6 ボンディングワイヤ
7 層間膜
8 配線
9 コンタクト
1
Claims (1)
前記四角形状のパッドの4辺から第1の距離に環状かつ等間隔に配置された第1のコンタクト列と、 A first contact row arranged annularly and equidistantly at a first distance from four sides of the quadrangular pad;
前記四角形状のパッドの対角線上に配置された第2,第3のコンタクト列のみを有することを特徴とする半導体装置。 A semiconductor device having only second and third contact rows arranged on a diagonal line of the quadrangular pad.
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