JP4210840B2 - Inverter device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an inverter device, and more particularly to an inverter device that supplies a desired high-frequency power controlled by superimposing a frequency and a pulse width to a resonant load circuit.
[0002]
[Prior art]
The conventional inverter device shown in FIG. 4 includes an AC conversion circuit (1) and a switching circuit (13) that performs a switching operation for converting DC power supplied from the DC power supply (1) into high-frequency AC power. 2), a resonant load circuit (3) connected to the output terminal of the AC converter circuit (2), and a control pulse signal (V _G ) that causes the switching circuit (13) of the AC converter circuit (2) to perform a switching operation. And a control circuit (4) for supplying high frequency power to the resonant load circuit (3).
[0003]
The DC power source (1) is composed of an AC power source (10) such as a commercial power source, a rectifier circuit (11) configured by bridge-connecting diodes to convert AC power of the AC power source (10) into DC power, and a rectifier circuit. And a capacitor (12) for smoothing the output of (11). The switching circuit (13) includes a first switching element (13a) of IGBT (insulated gate bipolar transistor) type and a second switching connected in series to the positive side terminal and the negative side terminal of the rectifier circuit (11). It has an element (13b) and snubber diodes (13c, 13d) connected in antiparallel to the first switching element (13a) and the second switching element (13b), respectively. The resonant load circuit (3) connected in parallel to the second switching element (13b) is a heating unit that inductively heats an object to be heated made of metal such as iron by high-frequency power supplied from the AC conversion circuit (2). A coil (3a) and a resonance capacitor (3b) connected in series to the heating coil (3a) are provided.
[0004]
The control circuit (4) includes a power setting circuit (21) that generates an output representing a reference power value to the resonant load circuit (3), and an effective power supplied from the AC converter circuit (2) to the resonant load circuit (3). A power detection circuit (22) that detects the power value, and a power that generates an adjustment output by calculating the deviation from the active power value detected by the power detection circuit (22) and the reference power value of the power setting circuit (21) An adjustment circuit (23), a PFM circuit (42) for generating a control signal for determining a pulse frequency of a control pulse signal (V _G ) that decreases a deviation according to an adjustment output of the power adjustment circuit (23), and a PFM circuit (42 ) And a drive circuit (25) for outputting a control pulse signal (V _G ) for switching the switching circuit (13) of the AC conversion circuit (2).
[0005]
The power detection circuit (22) includes a voltage detection circuit (14) for detecting the voltage across the capacitor (12) input to the AC conversion circuit (2), and a DC power supply (1) to the AC conversion circuit (2). It is connected to a current detection circuit (15) that detects a current flowing through the path. The power detection circuit (22) outputs a multiplication value of the detection voltage value of the voltage detection circuit (14) and the detection current value of the current detection circuit (15) to the power adjustment circuit (23) as a detection value of active power. Does not have a multiplication circuit.
[0006]
The inverter device (2) shown in FIG. 4 is called a half-bridge voltage source inverter device, and is composed of an anti-parallel circuit of an IGBT and a diode by a control pulse signal (V _G ) of the drive circuit (25). The first switching element (13a) and the second switching element (13b) are alternately turned on and off. At that time, the logic "H" level and logic at a period higher than the frequency equal to the period of the resonance frequency (f _c ) derived from the heating coil (3a) and the resonance capacitor (3b) of the resonance load circuit (3). A pulse signal that repeats “L” level is generated from the PFM circuit (42). At this time, the switching operation is repeated at a frequency close to the resonance frequency (f _c ) to supply power to the resonance load circuit (3), and the control is performed by repeatedly turning on and off at a frequency higher than the resonance frequency (f _c ). As a result, an object to be heated (not shown) in the heating coil (3a) is inductively heated, and the active power supplied to the resonant load circuit (3) is adjusted to the reference power value.
[0007]
FIG. 5 includes a switching circuit (41) that switches to PWM control when the active power value exceeds the reference power value, and switches to PFM control when the active power value is less than the reference power value. Another conventional inverter device disclosed in Patent Document 1 below, which controls the output power to) in a wider range, is shown.
[0008]
In the inverter device shown in FIG. 5, a switching circuit (41) and a PWM circuit (24) are added to the inverter device of FIG. The power adjustment circuit (23) performs a proportional-integral (PI) calculation so that the deviation between the reference power value of the power setting circuit (21) and the active power value of the power detection circuit (22) is zero. When the calculated active power value makes the time ratio λ value in the PWM circuit (24) 0.1 or less, the value that makes the active power value the time ratio λ = 0.1 is the reference power value, and λ <0. The switching circuit (41) switches the PWM circuit (24) to the PFM circuit (42) so that the active power value corresponding to .1 is separately input to the PFM circuit (42).
[0009]
The PFM circuit (42) performs frequency modulation (PFM) calculation based on the input active power value, and generates a pulse signal composed of the logic "H" level and logic "L" level of the calculated frequency. Output to 25). At this time, the duty ratio λ in the PFM circuit (42) is an arbitrary value at which the inverter device operates stably, and is derived from the heating coil (3a) and the resonance capacitor (3b) of the resonant load circuit (3). By changing the repetition period of the pulse signal in a direction smaller than the period of the resonance frequency (fc), the effective power supplied to the resonance load circuit (3) can be reduced in a wider range in the stable operation region of the inverter device. .
[0010]
[Patent Document 1]
JP 2001-128462 (FIG. 1, page 3)
[0011]
[Problems to be solved by the invention]
In the inverter device shown in FIG. 4, for example, it is necessary to adjust the output high-frequency power to a frequency that is significantly higher than the resonance frequency (fc). However, the IGBT constituting the switching elements (13a, 13b) has a slow switching speed, If the frequency is increased, the tracking operation cannot be sufficiently performed, and the operation of the switching circuit (13) may become unstable. As a result, there is a difficulty that the high frequency power necessary for the inverter device, that is, the effective power that can be injected into the resonant load circuit (3) cannot be adjusted over a wide range.
[0012]
As a countermeasure, in FIG. 5, the switching circuit (41) switches to PWM control when the active power value exceeds the reference power value, and switches to PFM control when the active power value is less than the reference power value. The output power to 3) is controlled over a wider range, but when the time ratio λ is narrowed down by the PWM control near the resonance frequency (fc), the frequency control becomes impossible, and if the time ratio is excessively reduced, the resonant load circuit (3) There is a serious difficulty that the switching element is broken because there is a limit in the control of the minimum duty ratio, and the resonance is shifted.
An object of this invention is to provide the inverter apparatus which can adjust the active electric power inject | poured into a resonant load circuit in a wider range.
[0013]
[Means for Solving the Problems]
An inverter device according to the present invention includes a DC power supply (1), an AC conversion circuit (2) having a switching circuit (13) that performs a switching operation for converting DC power supplied from the DC power supply (1) into high-frequency AC power, and A resonance load circuit (3) connected to the output terminal of the AC conversion circuit (2), and a control circuit (4) connected to the AC conversion circuit (2). The control circuit (4) includes a power setting circuit (21) that generates an output representing a reference power value, and a power detection circuit that detects an active power value supplied from the AC conversion circuit (2) to the resonant load circuit (3). (22), a power adjustment circuit (23) that generates a power adjustment signal by calculating a deviation from the active power value detected by the power detection circuit (22) and the reference power value of the power setting circuit (21), A PWM circuit (24) that generates a control signal and a control pulse signal (V _G ) that receives the control signal of the PWM circuit (24) and switches the switching circuit (13) of the AC conversion circuit (2). The drive circuit (25) for supplying high frequency power to the resonant load circuit (3) and the power adjustment signal of the power adjustment circuit (23) are received and the control pulse signal (V _G ) of the drive circuit (25) is received. storing a frequency PFM circuit (42) for generating a frequency control signal to the PWM circuit (24) for determining a (f), a preset upper limit frequency (f _MAX), control When the pulse signal (V _G) frequency (f) of the reaches upper limit frequency (f _MAX), and a frequency setting circuit (43) for outputting a hold signal to the PFM circuit (42). When receiving the hold signal of the frequency setting circuit (43), the PFM circuit (42) holds the frequency (f) of the control pulse signal (V _G ) of the drive circuit (25) at the upper limit frequency (f _MAX ). The PWM circuit (24) determines the time ratio (λ) of the control pulse signal (V _G ) of the drive circuit (25) with the frequency control signal of the frequency determined by the PFM circuit (42), and the PFM circuit (42 ) Is superimposed on the power adjustment signal of the power adjustment circuit (23) on the frequency control signal generated from the power adjustment circuit (23), and the pulse width control signal that reduces the deviation of the power adjustment signal of the power adjustment circuit (23) Give. The PFM circuit (42) generates an optimum frequency output by the power adjustment signal of the power adjustment circuit (23), and the PWM circuit (24) determines the pulse width of the frequency output generated from the PFM circuit (42) as a power adjustment circuit. Since it is controlled by superimposing it on the power adjustment signal of (23), there is no need for a switching circuit for individually controlling the PWM circuit (24) and the PFM circuit (42), avoiding switching loss and simplifying the circuit configuration. Can be In addition, the resonant frequency (f _C ) of the resonant load circuit (3) is always set to the optimum value, and the power supply is adjusted over a wide range and continuously to efficiently supply power to the resonant load circuit (3). it can. Further, when the frequency (f) of the control pulse signal (V _G ) of the drive circuit (25) controlled by the PFM circuit (42) reaches the upper limit frequency (f _MAX ), the control pulse signal (V _G ) Since the frequency (f) is held at the upper limit frequency (f _MAX ) and the time ratio (λ) of the control pulse signal (V _G ) is controlled by the PWM circuit (24), the resonant frequency (3) of the resonant load circuit (3) The time ratio (λ) of the control pulse signal (V _G ) can be narrowed even at the upper limit frequency (f _MAX ) sufficiently higher than f _C ). Further, it is possible to control the pulse signal frequency (V _G) (f) is without rise above the upper limit frequency (f _MAX), controlled in a wide range the ratio (lambda) when the control pulse signal (V _G) .
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of an inverter device according to the present invention will be described below with reference to FIGS. In FIG. 1, the same parts as those shown in FIG. 4 and FIG.
As shown in FIG. 1, in the present invention, a preset upper limit frequency (f _MAX ) is stored, and when the frequency (f) of the control pulse signal (V _G ) reaches the upper limit frequency (f _MAX ), the PFM is stored. A frequency setting circuit (43) that outputs a holding signal to the circuit (42) and a frequency control signal that receives the adjustment output of the power adjustment circuit (23) and determines the frequency (f) of the control pulse signal (V _G ). The ratio (λ) of the generated PFM circuit (42) and the control pulse signal (V _G ) at the frequency (f) determined by the PFM circuit (42) given the frequency control signal of the PFM circuit (42). A PWM circuit (24) for determination is provided in the inverter device.
[0015]
When the holding signal of the frequency setting circuit (43) is received, the PFM circuit (42) holds the frequency (f) of the control pulse signal (V _G ) at the upper limit frequency (f _MAX ). The PWM circuit (24) forms an output for determining a pulse width signal from the frequency received from the PFM circuit (42) and the power adjustment signal received from the power adjustment circuit (23), and outputs the output to the drive circuit (25). Give. The PFM circuit (42) generates an optimum frequency output based on the adjustment output of the power adjustment circuit (23), and the PWM circuit (24) performs control by superimposing the pulse width on the frequency generated from the PFM circuit (42). Therefore, a switching circuit for individually controlling the PWM circuit (24) and the PFM circuit (42) is not required, and switching loss can be avoided and the circuit configuration can be simplified. In addition, the resonant frequency (f _C ) of the resonant load circuit (3) is always set to the optimum value, and the power supply is adjusted over a wide range and continuously to efficiently supply power to the resonant load circuit (3). It becomes possible.
[0016]
When the frequency (f) of the control pulse signal (V _G ) controlled by the PFM circuit (42) reaches the upper limit frequency (f _MAX ), the frequency (f) of the control pulse signal (V _G ) is changed to the upper limit frequency ( f _MAX ), and the PWM circuit (24) controls the time ratio (λ) of the control pulse signal (V _G ), so it is sufficiently higher than the resonant frequency (f _C ) of the resonant load circuit (3) Even at the upper limit frequency (f _MAX ), the time ratio (λ) of the control pulse signal (V _G ) can be narrowed down. Further, it is possible to control the pulse signal frequency (V _G) (f) is without rise above the upper limit frequency (f _MAX), controlled in a wide range the ratio (lambda) when the control pulse signal (V _G) . For example, when induction heating an object to be heated such as an iron pan used as an electromagnetic cooker, the level and frequency of the high frequency power supplied to the heating coil (3a) and the amount of heating to the object to be heated are more extensive. Can be adjusted.
[0017]
In the power adjustment circuit (23), proportional-integral (PI) calculation is performed so that the deviation between the reference power value and the detected active power value becomes zero, and the active power value of the inverter device (4) as the calculation result is PFM. The frequency of the circuit (24) is varied, but when the frequency of the PFM circuit (24) reaches an arbitrary preset maximum frequency of the frequency setting circuit (43), further frequency increase is prevented and PWM is used instead. The circuit 24 operates to adjust the time ratio λ (on-period ratio in one cycle) to the reference power value. The PWM circuit (24) performs a pulse width modulation (PWM) calculation based on the input active power value, and outputs a pulse signal as a result of the calculation to the drive circuit (25). At this time, the oscillation frequency (upper limit frequency (f _MAX )) of the pulse frequency modulation (PFM) is sufficiently higher than the resonance frequency (f _C ) of the resonant load circuit (3). By performing pulse width modulation by the PWM circuit (24), it is possible to perform power control over a wider range of effective power injected into the resonant load circuit (3) in a region where the operation of the inverter device (4) is stable.
[0018]
FIG. 2 is a graph showing the operating characteristics of the inverter device shown in FIG. The horizontal axis of FIG. 2 shows the output of the power adjustment circuit (23) as the output voltage setting value to the switching circuit (13), and the vertical axis shows the pulse which is the output of the PFM circuit (42) or the PWM circuit (24). The frequency of the signal and the time ratio λ value are shown. The frequency near the resonance frequency (f _c ) is output at the maximum load, the frequency is controlled when the output power is large, and the frequency increases as the load becomes lighter.
[0019]
If the frequency setting circuit (43) exceeds an arbitrary maximum frequency preset in advance, the subsequent frequency increase is suppressed, and instead the PWM circuit time ratio λ (on period ratio in one cycle) is adjusted, Operates toward the reference power value. As the output decreases, the duty ratio λ decreases while maintaining the highest frequency.
[0020]
On the contrary, at the time of the minimum output, as shown in FIG. 3C, the output of the PFM circuit (42) has the highest frequency, and the time ratio λ of the output of the PWM circuit (24) becomes the minimum value. As shown in FIG. 3B, as the output increases, the output of the PFM circuit (42) maintains the highest frequency, and the duty ratio λ of the output of the PWM circuit (24) increases. When the time ratio λ reaches the maximum value, as shown in FIG. 3A, the time ratio λ is fixed to the maximum value for the subsequent outputs, and the frequency output from the PFM circuit 42 is set to the resonance frequency (f _c ) At maximum load, the output frequency is reduced to a frequency close to the resonance frequency (f _c ).
[0021]
By adjusting as described above, the active power supplied to the resonant load circuit (3) can be adjusted in a wider range, and the switching circuit (13) can be used during the continuous control operation of the PWM circuit (24) and the PFM circuit (42). ) Can be operated smoothly.
[0022]
In the description of the embodiment shown in FIGS. 1 to 3, the half-bridge voltage source inverter device has been described. However, the full-bridge voltage source inverter device, the voltage source using two resonance capacitors in the half-bridge method. The control method of the present invention can also be implemented in the inverter device. In the inverter apparatus according to the present invention, the heating power can be adjusted in a wider range and the object to be heated can be induction-heated. For example, the heating apparatus has a wide variety of heating power and the heating power covers a wide range. It is suitable as.
[0023]
【The invention's effect】
As described above, the present invention does not require a switching circuit for individually controlling the PWM circuit and the PFM circuit, avoids switching loss and simplifies the circuit configuration. In addition, the resonance frequency of the resonance load circuit is always set to the optimum value, and the supplied power is adjusted continuously over a wide range, so that the power can be efficiently supplied to the resonance load circuit with the optimum frequency output.
[Brief description of the drawings]
1 is a circuit diagram of an inverter device according to an embodiment of the present invention. FIG. 2 is a graph showing operating characteristics of the inverter device shown in FIG. 1. FIG. 3 is a time chart in each mode of the inverter device shown in FIG. FIG. 4 is a circuit diagram showing a conventional inverter device. FIG. 5 is a circuit diagram showing another conventional inverter device.
(1) ・ ・ DC power supply, (2) ・ ・ AC converter circuit, (3) ・ Resonant load circuit, (4) ・ ・ Control circuit, (13) ・ ・ Switching circuit, (21) ・ ・ Power setting circuit , (22) ... Power detection circuit, (23) ... Power adjustment circuit, (24) ... PWM circuit, (25) ... Drive circuit, (42) ... PFM circuit, (43) ... Frequency setting circuit,

Claims (1)

A DC power supply, an AC conversion circuit having a switching circuit for performing a switching operation for converting DC power supplied from the DC power supply into high-frequency AC power, a resonant load circuit connected to an output terminal of the AC conversion circuit, A control circuit connected to the AC conversion circuit,
The control circuit includes a power setting circuit that generates an output representing a reference power value, a power detection circuit that detects an effective power value supplied from the AC conversion circuit to the resonant load circuit, and the power detection circuit detects A deviation is calculated from the effective power value and the reference power value of the power setting circuit, and a power adjustment circuit for generating a power adjustment signal, a PWM circuit for generating a control signal, and a control signal for the PWM circuit are received. A drive circuit that outputs a control pulse signal for switching the switching circuit of the AC converter circuit to supply high-frequency power to the resonant load circuit; and a power adjustment signal of the power adjustment circuit that receives the power adjustment signal of the drive circuit. A PFM circuit that generates a frequency control signal for determining the frequency of the control pulse signal in the PWM circuit, a preset upper limit frequency are stored, and a control pulse of the drive circuit is stored. When the frequency of the signal reaches the upper limit frequency, and a frequency setting circuit for outputting a hold signal to said PFM circuit,
When the PFM circuit receives the holding signal of the frequency setting circuit, the PFM circuit holds the frequency of the control pulse signal of the control circuit at the upper limit frequency,
The PWM circuit determines the time ratio of the control pulse signal of the drive circuit with the frequency control signal of the frequency determined by the PFM circuit, and adjusts the power adjustment circuit power to the frequency control signal generated from the PFM circuit. An inverter device, wherein a control signal having a pulse width that superimposes on a signal to reduce the deviation of the power adjustment signal of the power adjustment circuit is applied to the drive circuit.

Images