JP4209377B2 - Semiconductor device - Google Patents

Description

  The present invention relates to power control of a semiconductor device, and more particularly, to a technique effective when applied to power control of a semiconductor data processing device that requires low power consumption and high-speed operation represented by a microprocessor.

  Conventionally, there has been a great demand for improving the performance of electronic equipment, and digital electronic circuits, which are currently mainstream, have responded to this demand by improving the operating clock frequency. Since the power consumption of the electronic device is proportional to the clock frequency, it can be said that this works in the direction of increasing the power consumption. Moreover, in the semiconductor integrated circuit, a technique called SOC (System-On-a-Chip), in which the entire system is designed and manufactured as a single LSI due to the improvement in the degree of integration, has been taken to improve the system performance and reduce the size. Has been realized. Since this SOC design incorporates the functions of a plurality of semiconductor circuits, it works in the direction of increasing the power consumption that can be consumed by one semiconductor integrated circuit. The increase in power consumption described here means an increase in current consumption when the power supply voltage determined by the device is considered constant. This consumption current acts in the direction of lowering the power supply voltage of the circuit due to the resistance component of the electronic circuit and wiring, and consequently reducing the operation speed of the electronic circuit.

  On the other hand, reducing the power consumption of electronic circuits has become an important issue due to demands for extending the continuous use time (battery life) of portable devices and saving energy, and there are conflicting demands. Especially for small portable devices, in addition to the requirement for continuous use time, it is not possible to install a power supply unit that can supply sufficient current to reduce the size and cost of the system. There are often severe restrictions. If this current limit is not observed, the voltage supplied to the electronic circuit will drop and the circuit will malfunction. Therefore, in order to ensure that the electronic circuit does not malfunction, the maximum current that can be consumed when all the functional blocks of the integrated circuit operate in parallel is calculated by simulation, and the operating frequency does not exceed the capacity of the power supply. In the past, it was determined to limit the specifications.

  As a solution to such a voltage drop, Patent Document 1 arranges a cell for detecting a power supply voltage in an integrated circuit, and corrects the output voltage of the external power supply device when the voltage drop is detected, or an operation clock frequency. It is described that the control for correcting the power supply drop is performed by reducing the power supply. In particular, the voltage drop is detected only at one location of the LSI.

JP 2001-332699 A

  In a large-scale SOC or the like having a large number of functional blocks, a large voltage drop must be assumed in order to ensure that no malfunction occurs even when all the functional blocks installed are assumed to operate in parallel. However, in an actual system, the frequency with which all functional blocks are used simultaneously is low, and a large difference occurs between the maximum current and the average current. For this reason, there is a problem that a large cost is paid to the power supply device and the accompanying power supply regulator because of the SOC. With respect to this point, the present inventor determined an operating frequency specification for ensuring that no malfunction occurs based on the current consumption when, for example, about half of the functional blocks are operated in parallel, and the speed specification is excessive. To take measures to prevent the occurrence of malfunction when excessive power consumption occurs.

  First, the case of correcting the external power supply voltage when excessive power consumption occurs was examined. In order to correct the external power supply voltage when a voltage drop is detected, the system must have an external power supply with sufficient capacity. For example, a battery-powered device such as a portable device has insufficient power supply capacity. It is not applicable in some cases.

  Secondly, the case where the operating frequency is corrected slowly when excessive power consumption occurs is examined. It is well known that a voltage drop of a semiconductor device is locally generated especially around an active logic circuit portion. If the operating frequency of the entire semiconductor device is lowered immediately after a voltage drop is detected in a certain functional block, the system performance is significantly lowered. Even if a voltage drop locally occurs in some functional blocks, the voltage drop does not always occur near another functional block that is located away from the relevant functional block. If the voltage and frequency correction processing is performed in units of the entire device, the performance or operating efficiency of the semiconductor device is reduced. In the technique described in Patent Document 1, the detection point of the voltage drop is only in one place of the semiconductor device, and only voltage and frequency correction processing is performed for the entire LSI.

  Thirdly, an appropriate distribution of current capacity in consideration of the weight of processing by the functional block was examined. For example, the functional blocks mounted on the SOC include functional blocks such as a processor whose own processing performance greatly affects the system performance, and other functional blocks that have little influence on the system performance. As described above, the present inventor has found that there is a possibility of contributing to performance improvement by appropriately allocating a given current capacity to a semiconductor device having priority in processing contents.

  An object of the present invention is to provide a semiconductor device capable of preventing malfunction of a circuit due to a voltage drop.

  Another object of the present invention is to provide a semiconductor device capable of minimizing the deterioration in processing performance caused by adopting control for reducing the data processing speed in order to prevent malfunction of the circuit due to voltage drop. is there.

  Still another object of the present invention is to suppress an excessive margin related to the maximum operating frequency and the power supply capacity in consideration of the malfunction prevention due to the voltage drop, to substantially improve the operating frequency, to substantially reduce the maximum power consumption, and to improve the power supply device. An object of the present invention is to provide a semiconductor device that can contribute to cost reduction.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  The following is a brief description of an outline of typical inventions disclosed in the present application.

  [1] A semiconductor device includes a first functional block having a first voltage drop detection circuit, a first current suppression circuit connected to the first voltage drop circuit, and a first data processing unit for processing data; A second voltage drop detection circuit; a second current suppression circuit connected to the second voltage drop detection circuit; and a second functional block having a second data processing unit for processing data. The first voltage drop detection circuit detects that the operating voltage supplied to the first voltage drop detection circuit is lower than a predetermined voltage, and outputs a first current inhibition signal to the first current inhibition circuit. . The first current suppression circuit receives the first current suppression signal and controls the first data processing unit to reduce the circuit operation amount per unit time processed by the first data processing unit. The second voltage drop detection circuit detects that the operating voltage supplied to the second voltage drop detection circuit is lower than a predetermined voltage, and outputs a second current suppression signal to the second current suppression circuit. . The second current suppression circuit receives the second current suppression signal and controls the second data processing unit to reduce the circuit operation amount per unit time of the second data processing unit. According to the semiconductor device, since the voltage drop is locally detected and the data processing speed is reduced with respect to the detected functional block, the malfunction due to the voltage drop can be prevented, and the local data processing speed can be prevented. With this control, it is possible to suppress a decrease in processing performance of the entire semiconductor device.

  As a specific form of the present invention, the first voltage drop detection circuit includes a plurality of first flip-flop circuits, a logic circuit that receives the outputs of the plurality of first flip-flop circuits, and performs a logic operation; A second flip-flop circuit for inputting output data obtained by a logic operation by the logic circuit; and a comparison circuit for comparing the output data of the second flip-flop circuit with expected value data. And the second flip-flop circuit fetches data by the same clock signal, and the comparison circuit outputs the first current suppression signal when the data fetched by the second flip-flop circuit differs from the expected value data. . When a voltage drop occurs, a transmission delay occurs in the clock signal, but the frequency does not change. At this time, the logic circuit causes an operation delay. Therefore, when a voltage drop occurs, the logic operation of the logic circuit does not keep up with the input timing of the flip-flop, and the data fetched into the second flip-flop circuit does not match the expected value data. According to this, a voltage drop can be detected with high accuracy by using a logic circuit as a dummy circuit in accordance with an actual circuit.

  As another specific form of the present invention, the first voltage drop detection circuit includes a voltage comparator to which an operating voltage and a reference voltage of the first voltage drop detection circuit are input, and the voltage comparator is When the potential difference between the operating voltage and the reference voltage is greater than a predetermined potential difference, the first current suppression signal is output. In this case, an analog circuit is required.

  As yet another specific form of the present invention, the first voltage drop detection circuit includes a ring oscillator that operates at an operating voltage of the first voltage drop detection circuit, a counter connected to the ring oscillator, and the counter A comparator connected to the counter, the comparator compares a count value held in the counter every predetermined period with a predetermined reference value, and the count value is smaller The first current suppression signal is output.

  As yet another specific form of the present invention, the first data processing unit performs a pipeline operation to process data in a plurality of stages, and the first current suppression circuit includes the first current suppression signal. The first data processing unit is controlled so that a stall is generated in the pipeline. Stall is to stop the transition to the target instruction stage.

  As yet another specific form of the present invention, the first data processing unit can process a plurality of data in parallel, and the first current suppression circuit receives the first current suppression signal. The number of data to be processed in parallel is reduced.

  As yet another specific form of the present invention, the semiconductor device further includes a memory, and the first current suppression circuit receives the first current suppression signal from the first data processing unit when receiving the first current suppression signal. Stop access to the memory. Stopping access means extending an access cycle, inserting a wait cycle, or intermittently starting an access cycle.

  As yet another specific form of the present invention, the semiconductor device includes a memory capable of outputting a first number of bits in parallel to the first data processing unit, and the first current suppression circuit includes the first current suppressing circuit. When receiving the 1 current suppression signal, control is performed so that the number of bits smaller than the first number of bits is output in parallel to the first data processing unit.

  [2] A semiconductor device according to another aspect of the present invention includes a first functional block having a first voltage drop detection circuit and a first data processing unit for processing data, a second voltage drop detection circuit, and data processing. A second functional block having a second data processing unit, a bus connected to the first functional block and the second functional block, and a bus control logic circuit connected to the bus. The first voltage drop detection circuit detects that the operating voltage supplied to the first voltage drop detection circuit is lower than a predetermined voltage, and outputs a first current suppression signal to the bus control logic circuit. The second voltage drop detection circuit detects that the operating voltage supplied to the second voltage drop detection circuit has become smaller than a predetermined voltage, and outputs a second current suppression signal to the bus control logic circuit. The bus control logic circuit controls not to give a bus right to the first functional block when receiving the first current suppression signal, and when receiving the second current suppression signal, Control is performed so that the bus right is not given to the second function block. When the functional block is a bus master, the bus control logic circuit can be effectively used to prevent malfunction due to voltage drop.

  [3] A semiconductor device according to still another aspect of the present invention includes a plurality of functional blocks including a voltage drop detection circuit, a current control determination circuit, and a current suppression circuit. The voltage drop detection circuit detects whether the operating voltage supplied to the voltage drop detection circuit has dropped below a predetermined voltage. The current suppression circuit receives a current suppression request generated by the current control determination circuit of the functional block including itself, and reduces the circuit operation amount per unit time of the data processing unit in the functional block including the current suppression circuit. In this way, the data processing unit is controlled. The current control determination circuit is included in response to a detection of a voltage drop by the voltage drop detection circuit in the functional block in which it is included or a current suppression request generated by a current control determination circuit in another adjacent circuit block. Based on the control for giving a current suppression request to the current suppression circuit of the function block to be detected and the detection of the voltage drop by the voltage drop detection circuit in the other functional block, the current suppression request is given to the current suppression circuit of the functional block including itself Control. Considering that the locally generated voltage drop spreads around the voltage drop, it is possible to prevent the influence of the voltage drop.

  As a specific form of the present invention, the current control determination circuit refers to the priority level of the processing according to the operation content of the functional block in which the current control determination circuit is included, and the current by the current suppression circuit in the functional block in which the current control determination circuit is included. When it is determined that processing corresponding to the referenced priority level is not performed with reference to the suppression history, a current suppression request is output to the adjacent block. As a result of comparing the priority level of the function block with the operation history, if the processing corresponding to the priority level is not performed, the operation capability of the other function block with a lower priority level is reduced, and the circuit block with a higher priority level. Can be prioritized. Even in a situation where voltage drops frequently occur at a plurality of locations in a semiconductor device, it is possible to perform a current suppression operation in consideration of processing contents such as real-time characteristics.

  An effect obtained by a typical invention among the inventions disclosed in the present application is that malfunction of a circuit can be prevented.

<< First example of semiconductor device >>
FIG. 1 shows an example of a semiconductor device to which the present invention is applied. Reference numeral 101 denotes a semiconductor device (LSI), in which two functional blocks (FBLKa) 102 and a functional block (FBLKb) 103 are representatively shown. The functional block 102 and the functional block B103 include a processor or a logic circuit (data processing unit) that performs data processing similar thereto, and in particular, a central processing unit (CPU) that performs pipeline processing, a fixed point arithmetic unit (FPU), digital A signal processing unit (DSP) is used.

  In the functional block 102, a voltage drop detection circuit (VDTCT) 104 for detecting a drop in the power supply voltage inside the functional block 102, a current suppression circuit (CRDCT) 105 connected thereto, and data processing are performed. A data processing unit 110 (DPRS) is arranged. When current is consumed by the operation of the functional block 102 and the power supply voltage around the functional block 102 starts to drop, the voltage drop detection circuit 104 detects the change and outputs a current suppression signal 108 to notify the current suppression circuit 105. To do. In response to this, the current suppression circuit 105 functions to suppress the current consumption of the functional block 102 and performs control to suppress malfunction of the functional block 102 due to a voltage drop. That is, the current suppression circuit 105 controls the data processing unit 110 so as to reduce the circuit operation amount per unit time processed by the data processing unit 110.

  Similarly, a voltage drop detection circuit (VDTCT) 106, a current suppression circuit (CRDCT) 107, and a call data processing unit (DPRS) 111 are arranged inside the functional block 103, and the voltage drop detection circuit 106 and the current suppression circuit 107 operate in a coordinated manner. As a result, malfunction due to a voltage drop in the functional block 103 is prevented in the same manner as described above.

  FIG. 14 shows a more specific example of the semiconductor device. A semiconductor device 1401 shown in the figure includes a microprocessor (MPU) 1409, a bus control circuit (BSC) 1406, an image encoding / decoding circuit (MPEGM) 1407, a drawing and display control circuit (GFCS) 1408, and a bus 1440. . Bus 1440 carries address, data and control signals. The microprocessor 1409 includes a central processing unit (CPU) 1402, a digital signal processing unit (DSP) 1404, a floating point arithmetic unit (FPU) 1403, and a cache memory (CACH) 1405. The CPU 1402, the FPU 1403, the DSP 1404, the CACH 1405, the BSC 1406, the MPEGM 1407, and the GFCS 1408 are specific examples of functional blocks represented by 102 and 103 in FIG. Reference numerals 1410 to 1415 denote voltage drop detection circuits represented by 104 and 106 in FIG. In FIG. 14, for convenience, the voltage drop detection circuits 1410 to 1415 are illustrated outside the corresponding functional blocks 1402 to 1405, 1407, and 1408.

  For example, the CPU 1402 includes an instruction control unit that fetches and decodes instructions and controls the order of instruction execution, and an instruction execution unit that executes instructions by performing address operations and data operations in accordance with the control of the instruction control unit. At this time, the current suppression circuit is executed to reduce the circuit operation amount per unit time in response to the current suppression request in the circuit portion that controls the pipeline installation and the access condition such as the data size in the instruction control unit. It has a control logic for controlling the unit. The DSP 1404 includes an operation sequence control unit that fetches and decodes a DSP instruction (DSPCMD) from the CPU 1402 and controls the operation order, and an operation unit that performs a product-sum operation according to the control of the operation sequence control unit. At this time, the current suppression circuit controls the arithmetic unit to reduce the circuit operation amount per unit time in response to the current suppression request in the circuit part that performs pipeline installation control of digital signal processing in the arithmetic sequence control unit. It has a control logic to make it. The FPU 1403 includes an operation sequence control unit that fetches and decodes an FPU instruction (FPUCMD) from the CPU 1402 and controls an operation order and the like, and an operation unit that performs a floating point operation according to the control of the operation sequence control unit. At this time, the current suppression circuit includes a calculation unit in the calculation sequence control unit that controls the pipeline installation of the floating-point arithmetic processing and the like so that the circuit operation amount per unit time is reduced according to the current suppression request. It has a control logic to be controlled.

  FIG. 2 shows the internal configuration of the voltage drop detection circuits 104 and 106. This logic detects the voltage drop using the feature that the power supply voltage drop of the electronic circuit increases the operating time. That is, the delay evaluation circuit (DEVL) 201 is a logic circuit surrounded by flip-flops (F / F) 203, and is a logic that operates more slowly than the critical path logic of the normal logic in the functional block. Alternatively, a delay circuit may be simply arranged. Input data of the delay evaluation circuit 201 is given from the flip-flop 201. Output data of the delay evaluation circuit 201 is received by the flip-flop 204. When the comparator (CMP) 202 compares the output data of the flip-flop 204 and the expected value data (EXPTV) generated by the logic having a timing margin (higher speed) than the delay evaluation circuit 201, a mismatch occurs. Is determined to be caused by an increase in delay due to a voltage drop, and a voltage drop detection signal (VFD) is output. In the example of FIG. 1, the voltage drop detection signal VFD is supplied to the current suppression circuit 105 (107) as the current suppression signal 108 (109). When a voltage drop occurs, a transmission delay occurs in the clock signal CLK, but the frequency does not change. At this time, the delay evaluation circuit 201 causes an operation delay. Therefore, when a voltage drop occurs, the logical operation of the delay evaluation circuit 201 is not in time for the input timing of the flip-flop 203, and the data fetched into the flip-flop 203 does not match the expected value data EXPTV. According to this, a voltage drop can be detected with high accuracy by using a delay evaluation circuit as a dummy circuit adapted to an actual circuit. Note that the clock signal input to the flip-flop 203 may be a clock signal having the same frequency as the clock signal input to the flip-flop 202, or a lock signal for dividing the clock signal input to the flip-flop 202. . Further, although a plurality of flip-flops 202 are described, one flip-flop 202 may be used.

  FIG. 3 shows the current suppression operation of the current suppression circuit 105. In the function block 102 of FIG. 1, internal processing is pipelined in order to improve the logic operating frequency. As an example, an example in which the functional block 102 in FIG. 1 corresponds to the DSP 1404 in FIG. 14 will be described. The DSP recognizes the processing content at the D stage and divides it into three stages E1, E2, and E3 and executes the requested arithmetic processing. When the current suppression signal 108 in FIG. 1 is notified, the DSP 1404 recognizes it at the D stage and stalls the subsequent E1 to E3 stages. As a result, the amount of arithmetic processing data per unit time in the DSP 1404 is reduced and the current consumption is reduced, whereby the DSP 1404 is prevented from malfunctioning due to a voltage drop. In short, during this stall period, there is no work to be processed in the E1 to E3 stages, so the operating current of the circuits related to the DSP 1404 is reduced. That is, control is performed so as to reduce current consumption by stalling the DSP pipeline. The CPU 1402 is notified by the stall signal 1423 in FIG. 14 that the computation in the DSP 1404 is stopped during the stall period, and this corresponds to the period during which the CPU 1402 cannot obtain the computation result from the DSP 1404 that is dependent on its own processing. Then, stall your own pipeline to deal with it. Processing that does not use the calculation result of the DSP 1404 can be processed by the CPU regardless of the stall signal 1423 from the DSP. The current suppression operation is similarly performed for the current suppression circuit 107 of the functional block 103 in FIG. In general, a data processing apparatus similar to a processor includes a mechanism for stalling execution by detecting a resource conflict or the like, and thus it is easy to implement this current suppression control in a processor. In FIG. 14, 1422 is a stall notification signal from the FPU 1403 to the CPU 14502. The CACH 1405 notifies the CPU 1402 of the control result for the current suppression request depending on when the response (ACK) 1427 to the access request 1426 is returned.

  In the current suppression operation, the two voltage drop detection circuits 104 and 106 in FIG. 1 independently detect and notify the voltage change around the functional blocks 102 and 103, respectively. It is extremely rare that the voltage drop phenomenon causes the current block control of the functional block 103, that is, the processing performance of the functional block 103 is temporarily lowered. FIG. 15 schematically shows the state of voltage drop when the vicinity of the operating point 1502 is particularly activated in the semiconductor device (LSI, 1501). As described above, it is well known that the voltage drop is locally generated particularly around the active logic portion. In addition, if a correction process such as reducing the operating frequency of the entire semiconductor immediately after detecting a voltage drop in a certain functional block, the system performance is degraded. For example, even if a voltage drop locally occurs around one functional block such as MPEGM 1407 in FIG. 14, the vicinity of the functional block such as the CPU 1402 that is located away from the corresponding functional block. However, a voltage drop does not always occur. If processing such as current suppression or frequency reduction is performed over the entire semiconductor device under this situation, the processing performance of the entire LSI is significantly reduced. In the configuration described above, when a voltage drop occurs locally due to the operation of the functional block 102, the data processing performance of the functional block at that part is reduced and dealt with. The decrease can be kept small.

<< Second Example of Semiconductor Device >>
A second example of the semiconductor device will be described. The voltage drop detection circuit employs the analog circuit configuration shown in FIG. In the semiconductor device of FIG. 1, the voltage drop detection circuits 104 and 106 are replaced with the voltage comparison circuit of FIG. Also in this case, the CPU, FPU, DSP, etc. of FIG. A power supply voltage (VSMP) 401 in FIG. 4 is a power supply voltage of the circuit in the functional blocks 102 and 103 in FIG. A reference voltage (VREF) 402 indicates a power supply voltage when no voltage drop occurs, and is supplied via a special power supply line that is different from the power supply used in normal logic. The voltage comparator (VCMP) 403 is a circuit that compares the two voltages, and outputs a voltage drop detection signal (VFD) when the potential difference spreads beyond a specified level. In this example, the accuracy of detection can be expected because the voltage drop is directly measured, but it is necessary to pay close attention to supplying the reference voltage accurately.

<< Third Example of Semiconductor Device >>
A third example of the semiconductor device will be described. The voltage drop detection circuit employs the counter system shown in FIG. In the semiconductor device of FIG. 1, the voltage drop detection circuits 104 and 106 are replaced with the circuit of FIG. Also in this case, the CPU, FPU, DSP, etc. of FIG. The ring oscillator (OSC) 501 in FIG. 5 is formed of a closed loop including an odd number of inverters. The cycle correlates with the power supply voltage, and the higher the operating voltage, the faster the operation. The counter (CNT) 502 digitizes the cycle by counting the number of changes every predetermined period. The predetermined period is a fixed period defined by a predetermined number of cycles of the clock signal. The comparator (CMP) 503 compares the count value of the counter 502 with the reference value STD, and if they match, it is determined that the oscillation period of the ring oscillator 501 has increased by a certain number or more, that is, the operating voltage has decreased. A drop detection signal VFD is output.

<< Fourth Example of Semiconductor Device >>
A fourth example of the semiconductor device will be described. Here, in the semiconductor device of FIG. 1, the processing contents of the current suppression circuits 105 and 107 are replaced with the processing contents of FIG. Also in this case, the CPU, FPU, DSP, etc. of FIG. In this example, the internal pipelines of the functional blocks 102 and 103 are configured to be capable of simultaneous processing of up to 3 parallel processes. PIPE means pipeline operation. The DSP in FIG. 14 will be described as an example. Normally, three processes are interpreted at the D stage, but when the current suppression signal is input, the processes are interpreted one by one at the D stage. Change control. The number of consumed instructions is notified to the CPU 1402 by a consumed instruction number notifying signal 1425 in FIG. The CPU 1402 can recognize a delay in the timing at which the calculation result can be acquired according to the notified number of consumed instructions. As a result of this change in operation, the logic operation of the E1 to E3 stages of the DSP 1404 becomes one third, and the current consumption also decreases in proportion thereto. The example described here is an example suitable for a processor having a plurality of execution units represented by a superscalar processor.

<< Fifth Example of Semiconductor Device >>
A fifth example of the semiconductor device will be described. Here, in the semiconductor device of FIG. 1, the processing contents of the current suppression circuits 105 and 107 are replaced with the processing contents of FIG. In this example, focusing on the fact that the current consumed by the memory is large among the components of the semiconductor device, the cache memory 1405 in FIG. 14 will be described as an example. Normally, memory access can be performed every cycle, but intermittent operation (ACTitmt) is controlled so that memory access can be performed only once every two cycles when the current suppression signal 1431 is input. STP means a stop period. MRY means memory operation. At this time, a response signal (ACK) 1427 to the access request (REQ) 1426 is negated to notify the CPU 1402 that the memory operation is not completed. For example, a cache memory of a general processor has a mechanism for waiting for a lower priority side when cache line replacement control conflicts. This current suppression control can be easily implemented by using this mechanism to make it appear that a conflict has occurred once every two cycles.

  This example is suitable for a memory access circuit capable of linearly controlling the operation scale of the circuit. The concept of this control method can also be applied to an arithmetic unit. For example, the current consumption can be similarly reduced by intermittently operating a floating point arithmetic unit having a relatively large current consumption.

<< Sixth Example of Semiconductor Device >>
A sixth example of the semiconductor device will be described. Here, in the semiconductor device of FIG. 1, the processing contents by the current suppression circuits 105 and 107 are replaced with the processing contents of FIG. Similar to the fifth example, this example is suitable for the cache memory 1405 of FIG. Note that this example also consumes a large amount of current in the memory as in the fifth example. Normally, the bit width of the memory access is 32 bits at maximum, but when the current suppression signal is input, control is performed so that access is possible only at the maximum 16 bits width. If 32-bit access occurs during current suppression, the memory access processing is divided into two cycles of upper 16 bits and lower 16 bits, thereby reducing the current consumed per unit time. . This concept of control can also be applied to an arithmetic unit. For example, a control such as operating a 32-bit adder in a plurality of cycles or processing in a plurality of cycles by reducing the parallelism of a SIMD (Single Instruction Multiple Data) type arithmetic unit. By performing the above, it is possible to similarly control to reduce the current consumption.

<< Seventh Example of Semiconductor Device >>
A seventh example of the semiconductor device will be described. Here, the control method is suitable for functional blocks connected via the bus 1440, such as MPEGM 1407 and GFCS 1408 in FIG. In FIG. 9, reference numeral 901 denotes a semiconductor device, and the inside thereof is composed of two functional blocks (FBLKa) 902 and a functional block (FBLKb) 903. The functional blocks 902 and 903 are connected to other functional blocks via a bus (BUS) 904, receive an operation instruction via the bus 904, and return processing results via the bus 904. Transfers on the bus 904 are managed by the bus control logic (BSC) 905 through the bus right (BR) 906 and the bus right (BR) 907.

  A voltage drop detection logic (VDTCT) 104 for detecting a drop in power supply voltage related to the functional block 902 and a voltage drop detection logic (VDTCT) 105 for detecting a drop in source voltage related to the functional block 903 are arranged. . In FIG. 9, the upper voltage drop detection circuits 104 and 105 are arranged outside the function blocks 902 and 903. These voltage drop detection circuits 104 and 105 notify the bus control logic 905 when a voltage drop is detected. When the bus control logic 905 receives the voltage drop notification, the bus control logic 905 changes the control so that the bus right is not given to the corresponding functional block that issued the notification. Since the corresponding functional block cannot accept the processing request and cannot respond to the processing result, the operation is automatically stopped, and the current consumed as a result is reduced. In this example, the current suppression method by bus control uses a circuit module such as an IP module created by an external vendor for the function blocks 902 and 903, which makes it difficult to add a logic change for suppressing current inside the function block. Suitable for Therefore, in this example, the upper voltage drop detection circuits 104 and 105 are arranged outside the functional blocks 902 and 903.

<< Eighth Example of Semiconductor Device >>
An eighth example of the semiconductor device will be described. Here, the purpose is to connect the individual functional blocks described so far to perform more advanced power control. Reference numeral 1001 denotes a semiconductor device (LSI), which is composed of a plurality of functional blocks including a functional block (FBLKa) 1002, a functional block (FBLKb) 1003, a functional block (FBLKc) 1004, a functional block (FBLKd) 1005,. It has a communication path for connecting the upper, lower, left and right functional blocks to each other. Considering the functional block (FBLKd) 1005 as the center, there are four paths of communication paths (COM) 1006, 1007, 1008, and 1009 vertically and horizontally.

  FIG. 11 shows a detailed example of the inside of the functional block (FBLKd) 1005 and the communication paths 1006 to 1009. The voltage drop detection circuit 1 (VDTCT) 101 is configured by the logic circuit that operates as shown in FIG. 2, FIG. 4, FIG. 5 or equivalent described in the above examples, and has separate functional blocks (adjacent functions) A voltage drop detection signal (φvd) 1104 is supplied to the current control determination circuit (CCTRL) 1102 of the block) and its own function block (own function block). Two communication signals are connected from the current control determination circuit 1102 to the adjacent upper, lower, left, and right adjacent functional blocks, and the breakdown is represented by the voltage drop detection signal (φvdi) 1106 from the adjacent functional block, representing the communication path 1007. This is a current suppression request signal (φcri) 1107. Also, a current suppression signal (φcr) 1108 is output to the current suppression circuit (CRDCT) 1103 of the current control determination circuit (CCTRL) 1102 own function block, and a current suppression request signal (φcro) 1105 is output to the adjacent function block. .

  FIG. 12 shows the internal structure of the current suppression determination circuit 1102. A priority level circuit (PLVL) 1201 is a logic circuit that outputs a processing priority set in advance based on the operation content of its own functional block. An operation history circuit (HIST) 1202 is a logic circuit that stores a history of current suppression operation of the own function block. Outputs of the priority level circuit 1201 and the operation history circuit 1202 are connected to a determination logic circuit (JDG) 1203. In addition to this, the determination logic circuit 1203 includes a voltage drop detection signal (φvd) 1104 of its own block in FIG. 11, a voltage drop signal (φvdi) 1106 from the adjacent functional block, and a current suppression signal (φcri) from the adjacent functional block. 1107 is input. The determination logic 1203 determines these input signals, and outputs a current suppression signal (φcr) 1108 of its own function block and a current suppression signal (φcro) 1105 to the adjacent function block.

The determination logic 1203 determines current suppression according to the following rule. First, when the self-function block has a voltage drop or there is a current suppression request from an adjacent function block, the self-function block is requested to suppress current. Second, when the voltage drop detection signal from the adjacent functional block is supplied from a specified value or more, for example, from two or more locations, the current function block is requested to suppress current. Third, as a result of comparing the priority level of the own function block with the operation history, when it is determined that the processing corresponding to the priority level is not performed, the adjacent function block is requested to suppress current. The third current suppression function refers to the priority level of the processing according to the operation content of the own function block, and refers to the history of current suppression by the current suppression circuit in the own function block, and matches the referenced priority level. When it is determined that the process is not performed, a current suppression request is output to the adjacent function block. As a result of comparing the priority level of the function block with the operation history, if the processing corresponding to the priority level has not been performed, the function block of the function block with a higher priority is dropped by reducing the operation capability of the function block with a lower priority level. Can be prioritized. Even in a situation where voltage drops frequently occur at a plurality of locations in a semiconductor device, it is possible to perform a current suppression operation in consideration of processing contents such as real-time characteristics. For example, when performing encryption processing that frequently uses digital signal processing, the priority level circuit of the DSP outputs a high priority level. At this time, when current suppression is frequently instructed to the DSP by another function module, the power consumption is reduced somewhere in the LSI by grasping such a situation while referring to the operation history. Even if this is necessary, it is possible to avoid current suppression for the DSP. This makes it possible to maintain the necessary data processing capability while realizing the necessary power consumption reduction for the entire LSI.

<< Ninth Example of Semiconductor Device >>
A ninth example of the semiconductor device will be described. The semiconductor device according to the ninth example shown in FIG. 13 is obtained by adding active power consumption control to the eighth example. A semiconductor device (LSI) 1301 includes two functional blocks (FBLKa) 1302, a functional block (FBLKb) 1303, and a current consumption control circuit (PCTRL) 1304. The current consumption control circuit 1304 outputs power reduction signals 1305 and 1306 for the function blocks 1302 and 1303 in accordance with instructions of the software program. The functional block 1302 is different from the functional block 102 of FIG. 1 shown in the first example in that the current suppression circuit 105 is operated under the logical sum condition of the two requirements of the voltage drop detection circuit 104 and the power reduction signal 1305. . The same applies to the function block 1303.

  In this example, it is possible to perform active power consumption reduction control in addition to preventing logic malfunction due to voltage drop. Conventional power consumption control methods such as reducing the clock frequency have problems such as poor response and control only with an integer ratio to the external clock. Since the current consumption control circuit 1304 can control whether to suppress the current every clock cycle, it has a feature of high responsiveness and high degree of freedom of control.

  According to various types of semiconductor devices described above, the following functions and effects can be obtained.

  [1] By locally resolving the voltage drop that occurs in the semiconductor device, in a semiconductor device equipped with a plurality of functional blocks such as SOC, malfunctions due to the voltage drop while minimizing the performance degradation of the entire system are minimized. Can be prevented.

  [2] By performing control while exchanging information between a plurality of voltage effect detection circuits and current suppression circuits, it is possible to autonomously perform current consumption distribution in consideration of priorities such as real-time processing.

  [3] When the same power supply device and circuit design are performed, the application of the present invention can prevent malfunction due to increase in current consumption with minimal performance degradation, and can effectively improve the operating frequency. For example, in a semiconductor processing apparatus that supplies 1.2 V power, when all modules on the SOC operate to prevent malfunction, the operating frequency is limited by estimating that a voltage drop of 0.2 V from the average voltage will occur. Therefore, the application of the present invention makes it possible to remove the limitation, and a frequency improvement of about 5 to 10% can be expected. Further, since the power supply voltage decreases as the process becomes finer, the improvement rate tends to increase.

  [4] When the same operating frequency and circuit design are performed, it is possible to operate normally even if the power supply voltage is lowered by applying the present invention, which contributes to a reduction in power consumption of the system. Using the example of effect 3, by applying the present invention, the same operating frequency can be achieved with a power supply voltage as low as 0.2 V, and the power consumption can be reduced by about 30%.

  [5] Since the control of the present invention is independent for each functional block, it is compatible with a design method in which many functional blocks are mounted as an IP, such as an SOC, and an IP module to which the present invention is applied once is connected to an adjacent block. It will contribute to the improvement of design efficiency because it functions correctly.

  Although the invention made by the present inventor has been specifically described based on the embodiments, it is needless to say that the present invention is not limited thereto and can be variously modified without departing from the gist thereof.

  For example, the voltage drop detection circuit of the first example to the third example, the current suppression circuit of the first example or the fourth example to the sixth example, the current suppression method by the bus control of the seventh example, the eighth The current suppression control mode in cooperation with the adjacent functional block in the example of FIG. 9 and the active current consumption control logic of the ninth example can be applied in any combination. The functional blocks of the semiconductor device are not limited to those described above, and can be changed as appropriate.

It is a block diagram of a semiconductor device concerning the 1st example to which the present invention is applied. It is a block diagram which shows an example of a voltage drop detection circuit. It is a timing chart which shows the current suppression operation of a current suppression circuit. It is a circuit diagram which shows another example of the voltage drop detection circuit applied to the semiconductor device which concerns on the 2nd example to which this invention is applied. It is a circuit diagram which shows another example of the voltage drop detection circuit applied to the semiconductor device which concerns on the 3rd example to which this invention is applied. It is a timing chart which shows the processing content by the current suppression circuit applied to the semiconductor device which concerns on the 4th example to which this invention is applied. It is a timing chart which shows the processing content by the current suppression circuit applied to the semiconductor device concerning the 5th example to which the present invention is applied. It is a timing chart which shows the processing content by the current suppression circuit applied to the semiconductor device which concerns on the 6th example to which this invention is applied. It is a block diagram of the semiconductor device which concerns on the 7th example to which this invention is applied. It is a block diagram of the semiconductor device which concerns on the 8th example to which this invention is applied. FIG. 11 is a block diagram illustrating a logical configuration for performing power consumption control in cooperation with adjacent functional blocks in FIG. 10. It is a block diagram which shows a detailed example of the current suppression determination circuit of FIG. It is a block diagram which shows the semiconductor device which concerns on the 9th example to which this invention is applied. FIG. 2 is a block diagram illustrating a more specific configuration of the semiconductor device in FIG. 1. It is explanatory drawing which shows typically the mode of the voltage drop when the vicinity of an operating point is especially activated in a semiconductor device.

Explanation of symbols

1 101, 901, 1001, 1301, 1401, 1501: Semiconductor devices 102, 103, 902, 903, 1002, 1003, 1004, 1005, 1302, 1303: Functional blocks 104, 106, 1101, 1410, 1411, 1412, 1413 1414: Voltage drop detection circuits 105, 107, 1103: Current suppression circuits 108, 109, 1107, 1430, 1431: Current suppression signals 201: Delay evaluation circuits 202, 503: Expected value comparator 401: Power supply voltage in the functional block 402: Reference power supply voltage 403: Voltage comparator 501: Ring oscillator 502: Counter 904: Bus 905, 1406: Bus control circuit 906, 907: Bus rights 1006, 1007, 1008, 1009: Function block communication path 1102: Current control Judgment Circuit 1104: Voltage drop detection signal (φvd) for self-function block generation
1106: Voltage drop detection signal (φvdi) from the adjacent functional block
1105: Current suppression signal to adjacent functional block (φcro)
1107: Current suppression signal (φcri) from the adjacent functional block
1108: Current suppression signal (φcr) to its own function block
1201: Priority level circuit 1202: Operation history circuit 1203: Current suppression operation determination circuit 1304: Current consumption control circuit 1305, 1306: Power reduction signal 1402: CPU
1403: FPU
1404: DSP
1405: Cache memory 1407: Image encoding / decoding circuit 1408: Drawing and display control circuit 1409: Microprocessor 1426: Memory access request 1427: Memory access response signal 1422, 1423: Stall notification signal 1424, 1425: Consumption instruction number notification signal 1502 : Circuit operating point

Claims (7)

A first voltage drop detection circuit, a first current suppression circuit connected to the first voltage drop circuit, and a first data process for processing data by performing a pipeline operation that processes data divided into a plurality of stages A first functional block having a portion;
A second voltage drop detection circuit, a second current suppression circuit connected to the second voltage drop detection circuit, and a second functional block having a second data processing unit for processing data,
The first voltage drop detection circuit detects that the operating voltage supplied to the first voltage drop detection circuit is lower than a predetermined voltage, and outputs a first current suppression signal to the first current suppression circuit. ,
When the first current suppression circuit receives the first current suppression signal , the first current suppression circuit controls the first data processing unit so as to generate a stall in the pipeline. small comb circuit operation of,
The second voltage drop detection circuit detects that the operating voltage supplied to the second voltage drop detection circuit is lower than a predetermined voltage, and outputs a second current suppression signal to the second current suppression circuit. ,
The semiconductor device, wherein the second current suppression circuit receives the second current suppression signal and controls the second data processing unit so as to reduce a circuit operation amount per unit time of the second data processing unit. In claim 1,
The first voltage drop detection circuit receives a first flip-flop circuit, a logic circuit that receives the output of the first flip-flop circuit, performs a logic operation, and receives output data obtained by the logic operation of the logic circuit. 2 flip-flop circuit, and a comparison circuit for comparing the output data of the second flip-flop circuit with expected value data,
The comparison circuit outputs the first current suppression signal when the data fetched into the second flip-flop circuit and the expected value data are different. In claim 1,
The first voltage drop detection circuit includes a voltage comparator to which an operation voltage of the first voltage drop detection circuit and a reference voltage are input, and the voltage comparator has a potential difference between the operation voltage and the reference voltage. A semiconductor device that outputs the first current suppression signal when the potential difference becomes larger than a predetermined potential difference. In claim 1,
The first voltage drop detection circuit includes a ring oscillator that operates at an operating voltage of the first voltage drop detection circuit, a counter connected to the ring oscillator, and a comparator connected to the counter.
The comparator compares a count value held in the counter every predetermined period with a predetermined reference value, and outputs the first current suppression signal when the count value is smaller apparatus. In claim 1,
The first data processing unit is capable of processing a plurality of data in parallel.
The semiconductor device that reduces the number of data to be processed in parallel when the first current suppression circuit receives the first current suppression signal . In claim 1,
The semiconductor device further includes a memory,
The first current suppression circuit is a semiconductor device that stops access to the memory from the first data processing unit when receiving the first current suppression signal . In claim 1,
The semiconductor device includes a memory capable of outputting the first number of bits in parallel to the first data processing unit,
When the first current suppression circuit receives the first current suppression signal, the first current suppression circuit controls the first data processing unit to output a bit number smaller than the first bit number in parallel to the first data processing unit .

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