JP4206185B2 - High frequency semiconductor device - Google Patents

High frequency semiconductor device Download PDF

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Publication number
JP4206185B2
JP4206185B2 JP2000024762A JP2000024762A JP4206185B2 JP 4206185 B2 JP4206185 B2 JP 4206185B2 JP 2000024762 A JP2000024762 A JP 2000024762A JP 2000024762 A JP2000024762 A JP 2000024762A JP 4206185 B2 JP4206185 B2 JP 4206185B2
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frequency semiconductor
frequency
semiconductor circuit
dielectric
electrode
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JP2001210752A (en
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麿明 前谷
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Kyocera Corp
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Kyocera Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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Description

【0001】
【発明の属する技術分野】
本発明は高周波帯域において動作する高周波半導体回路素子を複数個搭載実装して構成された高周波半導体装置に関し、特に高周波特性が良好で個々の高周波半導体回路素子を容易に交換可能とした、装置全体の良品率の改善が容易な高周波半導体装置に関する。
【0002】
【従来の技術】
一般に、通信機器やセンサ等における無線部を構成する高周波半導体装置においては、増幅器や周波数変換器・発振器といった各種の高周波半導体回路素子が用いられている。マイクロ波帯以上の高周波、特にミリ波帯以上の周波数帯域においては、これらの半導体回路として、例えばガリウムひ素(GaAs)等のIII−V族化合物半導体によるモノリシック集積回路(MMIC)の形態を有する回路素子が主として使用される。このような高周波半導体回路素子は、その回路自体を保護し、また高周波装置の製造工程における取り扱いを容易化する目的から、半導体パッケージに封止して使用されるか、または無線部もしくは装置全体が封止されている状態としてキャリア基板(外部電気回路基板)に実装して使用されている。
【0003】
これまでは、高周波半導体回路素子単体の良品率が高周波半導体装置全体の良品率に与える影響を小さくするために、複数の半導体回路素子を各々半導体パッケージもしくはキャリア基板に実装し、各半導体回路素子単体の特性を検査した後に、高周波半導体装置全体として組み立てる必要があった。この場合、各半導体回路素子の検査において不良品が見つかれば、検査工程において取り除くことにより、高周波半導体装置全体の組立てには良品である高周波半導体回路素子のみを使用できるという利点が得られることになる。
【0004】
しかしながら、このように高周波半導体回路素子単体レベルの検査のために半導体回路素子の各々を半導体パッケージもしくはキャリア基板に実装することは、それにより部品点数が増加し、また高周波半導体装置全体として大型化してしまうという問題点がある。また、半導体回路素子間の接続において、半導体回路素子と半導体パッケージもしくはキャリア基板間の相互接続、または半導体パッケージもしくはキャリア基板間の相互接続、さらには半導体パッケージもしくはキャリア基板と装置におけるマザーボードもしくは接続用基板間の相互接続といった接続上の冗長性が生じてしまうために、高周波半導体装置としての高周波特性が劣化してしまうという問題点も生じることとなる。
【0005】
このため、複数の高周波半導体回路素子を単一の半導体パッケージもしくはキャリア基板に実装することにより、部品点数の削減・装置の小型化・高周波特性の改善を図ろうとするマルチチップ実装が近年提案されている。かかる実装形態は、従来は計算機のような情報機器内部の半導体装置を構成する際に用いられていた実装形態であるが、近年は通信機器内部の高周波半導体装置に対しても応用されつつある。
【0006】
一方、通信機器の無線部等を構成する高周波半導体装置は、装置構成の要件として前述したように発振器や増幅器等の半導体回路を有しているが、中でも搬送波を発生する目的で用いられる発振器とその周辺回路部位は、不要高周波信号の干渉を避ける目的から、低雑音増幅器や周波数変換器およびその周辺回路から成る受信系回路部位、ならびに送信用電力増幅器や周波数変換器およびその周辺回路からなる送信系回路部位と電気的に隔離された構成をとる場合が多い。したがって、高周波半導体装置全体の構造としては、受信系回路部位と送信系回路部位と発振回路部位とを独立した筐体構造に各々収納するような形態を有することが望ましい。
【0007】
また、前述のような高周波半導体装置において、部品点数の削減・装置の小型化・高周波特性の向上を目的としてマルチチップ実装を行なう場合は、複数の高周波半導体回路素子が実装可能な構造を有する半導体パッケージもしくはキャリア基板を、さらに前述のような受信系回路部位と送信系回路部位と発振回路部位とを電気的に隔離できるような複数の筐体構造を有する構造として実現する必要が生じる。
【0008】
このような構造の従来例として、鉄−ニッケル−コバルト合金等の金属ベース上に、鉄−ニッケル−コバルト合金等からなる枠体を銀ロウ等により複数個接合し、無線回路の構成に応じた接続を実現するために該当する枠体の一部に切り欠き部を設け、この切り欠き部にマイクロストリップ線路/ストリップ線路/マイクロストリップ線路変換構造を有する入出力接続用部品を嵌合・接着しているような構造を有する、いわゆるメタルウォールパッケージがある。
【0009】
かかるメタルウォールパッケージによるマルチチップパッケージにおいては、各半導体回路素子は単体で個別に評価しておき、良品であることが確認された半導体回路素子のみを用いてこれを金スズ等を用いて金属ベース上に実装し、半導体回路素子の電極を入出力接続用部品に直接もしくは線路基板を介して金リボンもしくは金ワイヤ等により相互接続することにより、枠体外部との電気的接続を実現する構造となっている。
【0010】
【発明が解決しようとする課題】
しかしながら前述のようなメタルウォールパッケージは、枠体に設けた切り欠き部に入出力接続用部品を嵌合・接着しているような構造であるために、気密性を保証し、かつ良好な高周波特性を実現するためには、高い工作精度を必要とし、製作が困難なものとなってしまうという問題点があった。また、特にミリ波のような高周波帯において使用できる部品は製造における良品率が低く、そのため一般に製造コストが高くなってしまうという問題点もあった。
【0011】
本発明は上記従来技術における問題点に鑑みてなされたものであり、その目的は、部品点数の削減および装置の小型化を目的としたマルチチップ実装を実現しつつ、所望の高周波半導体回路素子間を電気的に隔離して良好な高周波特性を実現し、しかも製造コストを低く抑えることができる高周波半導体装置を提供することにある。
【0012】
【課題を解決するための手段】
本発明の高周波半導体装置は、誘電体基板の上面に複数の高周波半導体回路素子の電極が電気的に接続される電極配線が形成された複数の搭載部を設け、この各搭載部に高周波半導体回路素子を搭載してその電極を前記電極配線に電気的に接続し、前記誘電体基板上に、下面に前記搭載部に対応する複数の凹部を設けるとともにこの凹部間に接続配線が形成された誘電体蓋体を取着して、前記搭載部毎に前記凹部内に前記高周波半導体回路素子を収容するとともに前記搭載部間の前記電極配線同士を前記接続配線で電気的に接続したことを特徴とするものである。
【0013】
【発明の実施の形態】
本発明の高周波半導体装置によれば、上記構成により、個々の高周波半導体回路素子の特性評価による検査は、この誘電体基板上にこの高周波半導体回路素子が実装された状態の、誘電体蓋体を取り付ける前の段階で行ない、実装された各高周波半導体回路素子が良品であることを確認した後に誘電体蓋体を誘電体基板上に取着することにより、高周波半導体装置として完成させることができる。このとき、誘電体蓋体に形成された凹部に収納される各高周波半導体回路素子の電極と電気的に接続されている電極配線の端部に設けられた接続配線との接続用領域と、誘電体蓋体の下面に形成された凹部間を電気的に接続するための接続配線の端部に設けられた電極配線との接続用領域とを導電性接着剤等により接着して電気的に接続することにより、凹部内に収容された各高周波半導体回路素子間の電気的接続を実現して高周波回路を構成し、かつ、例えば発振回路・受信系回路・送信系回路等をそれぞれ搭載部毎に凹部内へ収納することにより電気的に隔離することが可能となる。そのため、従来のような特にミリ波のような高周波帯において使用できる部品の良品率が低く、また製造コストが高いメタルウォールパッケージを用いた場合と比較して、部品点数の削減、装置の小型化を目的としたマルチチップ実装を実現しつつ、所望の高周波半導体回路素子間を電気的に隔離して良好な高周波特性を実現し、しかも製造コストを低く抑えることができる高周波半導体装置を提供することができる。
【0014】
以下、図面に基づいて本発明の高周波半導体装置を詳細に説明する。
【0015】
図1は本発明の高周波半導体装置の実施の形態の一例の概略構成を示す分解斜視図である。図1において、1は誘電体基板であり、41・42は、誘電体基板1の上面に設けられた搭載部に実装搭載された高周波半導体回路素子である。これら複数の高周波半導体回路素子41・42のそれぞれの入出力用電極(図示せず)は、ウェハプローブによる評価を実施できるように、素子の下面において信号導体および信号導体の両側に接地導体が同一平面上に形成されているコプレーナ線路の形態を有している。
【0016】
101〜103・111〜113・121〜123・131〜133は、それぞれ誘電体基板1の上面の搭載部に形成された、高周波半導体回路素子41・42の電極が電気的に接続される電極配線である。ここでは、コプレーナ線路の形態となっている高周波半導体回路素子41・42の電極に対応して、高周波用線路導体として形成された信号用電極101・111・121・131とその両側の接地用電極102・103・112・113・122・123・132・133とが形成されている。誘電体基板1上に形成されたこれら信号用電極101・111・121・131および接地用電極102・103・112・113・122・123・132・133によって構成されるコプレーナ線路の特性インピーダンスは、誘電体基板1の厚みと比誘電率、ならびに信号用電極の幅、および信号用電極と接地用電極の間隔により決定される。通常は、高周波半導体回路素子41・42の入出力用電極の特性インピーダンスと整合するようにその値が決定される。
【0017】
なお、誘電体基板1上面の搭載部において、高周波半導体回路素子41・42は基板表面と同一面上に搭載されていてもよく、基板上面に形成した凹部内に搭載されていてもよい。また、高周波半導体回路素子41・42と各電極配線101〜103・111〜113・121〜123・131〜133との電気的な接続は、ワイヤボンディングによってもよく、いわゆるフリップチップ実装法によって行なってもよい。
【0018】
2は誘電体蓋体であり、31・32は、誘電体蓋体2の下面に設けられた、下面に開口を有する凹部31・32である。これら複数の凹部31・32は、誘電体基板1の上面の搭載部毎にそれぞれ高周波半導体回路素子41・42を実装した後に、誘電体蓋体2を誘電体基板1に取り付けた状態において、搭載部毎にその内部にそれぞれ高周波半導体回路素子41・42が収容される位置および大きさに形成されている。
【0019】
201〜203は誘電体蓋体2の下面の凹部31・32間に形成された接続配線である。これら接続配線201〜203は、その両端部がそれぞれ両端側の搭載部31・32の各電極配線111〜113・121〜123と電気的に接続されて搭載部間でそれら電極配線111〜113・121〜123同士を電気的に接続する位置に、高周波用線路導体として形成されている。ここでは、コプレーナ線路の形態の電極配線111〜113・121〜123に対応させて、高周波用線路導体としての信号用電極201および接地用電極202・203が形成されている。これにより、誘電体蓋体2を誘電体基板1に取り付けた状態において、図2に要部斜視図で示すように、誘電体基板1上に形成されている電極配線の信号用電極111と121、および接地用電極112と122・113と123が、接続配線の信号用電極201および接地用電極202・203が当接されることによりそれぞれ電気的に接続される。これら各当接部には、電気的接続をより確実なものとするために半田や導電性接着剤等を併用してもよい。
【0020】
なお、この例では、電極配線101〜103および131〜133が電気的に接続される他の接続配線または外部電気回路基板との接続については図示を省略している。
【0021】
以上のような構成によれば、誘電体蓋体2を取り付ける前においては、誘電体基板1上の各搭載部に形成されている電極配線、すなわち信号用電極111と121、接地用電極112と122・113と123はそれぞれ切り離された状態にあり、これら電極の組をウェハプローブにより接続することにより、各電極配線に電極が接続された各高周波半導体回路素子41・42をそれぞれ搭載部毎に独立に評価することが可能となる。また、各高周波半導体回路素子41・42を評価して良品であることを確認した後に、誘電体蓋体2を誘電体基板1に取り付けた際には、誘電体蓋体2に形成されている接続配線すなわち信号用電極201および接地用電極202・203により、誘電体基板1上の搭載部間の電極配線同士すなわち信号用電極111と121、接地用電極112と122・113と123がそれぞれ電気的に接続されることとなる。このとき、誘電体蓋体2の比誘電率や凹部31・32以外の部分の厚み、および信号用電極201の幅、信号用電極201と接地用電極202・203の間隔は、誘電体蓋体2を誘電体基板1に取り付けた後の状態において、誘電体基板1上に形成されている信号用電極111と121、接地用電極112と122・113と123によって構成されるコプレーナ線路の特性インピーダンスに整合するようにそれぞれの値を決定することにより、搭載部間で各高周波半導体回路素子41・42同士を電気的に隔離しつつ、それらの間の相互接続において良好な高周波伝送特性を実現することが可能となる。
【0022】
本発明の高周波半導体装置において、誘電体基板1には、従来から半導体パッケージやキャリア基板等に用いられている各種の誘電体材料を用いることが可能である。具体的な誘電体としては、例えば酸化アルミニウム質焼結体や窒化アルミニウム質焼結体を始めとする各種セラミックスやガラスセラミックス、あるいはPTFEやガラスエポキシ、ポリイミド等の有機樹脂系誘電体等を用いることができる。中でも、酸化アルミニウム質焼結体や窒化アルミニウム質焼結体等のセラミックス等の気密封止が可能な材料を用いた場合には、蓋体にも同様の材料を用いることにより、高周波半導体回路素子を収容して良好に気密封止することが可能となる。
【0023】
また、その搭載部および電極配線101〜103・111〜113・121〜123・131〜133は、搭載される高周波半導体回路素子41・42の実装形態に応じた構成にすればよい。例えば、ワイヤボンディング技術を用いて、高周波半導体回路素子と外部回路とを相互に接続する形態をとる場合であれば、誘電体基板1の表面にダイアタッチ用パターンを形成し、実装すべき高周波半導体回路素子41・42の入出力用電極に対応する位置に信号用電極および接地用電極を設ければよい。また、フリップチップ技術を用いて、高周波半導体回路素子41・42と外部回路とを相互に接続する形態をとる場合であれば、実装すべき高周波半導体回路素子41・42の入出力用電極に対応する位置に信号用電極および接地用電極を設ければよい。
【0024】
誘電体蓋体2には、凹部を設けるために積層法で作製可能な誘電体材料等を用いればよく、具体的な誘電体としては、誘電体基板1と同様に、例えば酸化アルミニウム質焼結体や窒化アルミニウム質焼結体を始めとする各種セラミックスやガラスセラミックス、あるいは前述したような有機樹脂系誘電体材料等を用いることができる。中でも、酸化アルミニウム質焼結体や窒化アルミニウム質焼結体等のセラミックス等の気密封止が可能な材料を用いた場合には、前述したように高周波半導体回路素子を収容して良好な気密封止を実現することが可能となる。また、誘電体基板1で用いた誘電体材料の誘電率よりも低い誘電率を有する誘電体材料を用いれば、誘電体蓋体2を誘電体基板1に取り付ける前と取り付けた後との電極配線におけるインピーダンスの変化を抑えられる効果もある。
【0025】
また、誘電体蓋体2の下面に形成する凹部31・32は、誘電体基板1に誘電体蓋体2を取り付けた際に、高周波半導体回路素子41・42を収容できる位置に設け、寸法は収容すべき高周波半導体回路素子41・42の体積よりも大きければよいが、誘電体蓋体2の取り付け後に誘電体蓋体2の凹部31・32と誘電体基板1の表面とによって形成される空間において不要な共振等が発生しないように、なるべく小さく設定することが望ましい。また、誘電体蓋体2内における凹部31・32の周囲に、ヴィアホール等の貫通導体を使用周波数に対応する管内波長に対して十分小さな間隔で取り囲むように配設し、誘電体蓋体2の表面に、そのヴィアホールと導通するとともに半導体装置の接地とも導通している導体を形成することにより、高周波半導体回路素子41・42を収容する凹部31・32の電磁的なシールド効果を持たせることが可能となる。
【0026】
凹部31・32の形成は、例えばセラミックスの場合であれば、焼成前のいわゆるグリーンシートの段階でパンチングやレーザ加工によりくりぬき部を設けた層を積層すればよい。また、有機系樹脂材料の場合であれば、くりぬき部を設けた層を積層したり、あるいはエッチング等の化学的プロセスを用いて凹部31・32を形成することも可能である。
【0027】
そして、接続配線201〜203は、前記の電極配線と同一の線幅、線間距離とすればよく、配線長は短ければ短いほどよいが、配線長は凹部31・32間の距離によるために、誘電体蓋体2の機械的強度に劣化が生じない範囲で短くすればよい。
【0028】
【実施例】
次に、本発明の高周波半導体装置について具体例を説明する。
【0029】
厚み0.2mm、比誘電率8.8のアルミナセラミックスからなる誘電体基板1の上面に、2箇所の高周波半導体回路素子の搭載部を設け、それぞれに幅0.13mmの信号用電極111・121を形成するとともにその両側にそれぞれ0.065mmの間隔で幅0.2mmの接地用電極112・113・122・123を形成することにより、コプレーナ線路の形態の電極配線を作製した。このときコプレーナ線路の特性インピーダンスは約50オームに設定した。
【0030】
また厚み1.0mm、比誘電率4.9のガラスセラミック基板から成る誘電体蓋体2の下面に、誘電体基板1の搭載部に対応した、高周波半導体回路素子を収容するための凹部を形成し、この凹部間に、幅0.17mmの信号用電極201を形成するとともにその両側にそれぞれ0.05mmの間隔で幅0.2mmの接地用電極202・203を形成した。
【0031】
そして、この誘電体蓋体2を誘電体基板1上に凹部と搭載部とを対応させて取着し、誘電体蓋体2の下面に形成した信号用電極201および接地用電極202・203の各端部と、誘電体基板1の上面に形成した信号用電極101・111および接地用電極112・113・122・123の各端部とがそれぞれ重なる部位をハンダ付けにより接着し、搭載部間の電極配線同士を接続配線で電気的に接続した、本発明の高周波半導体装置における伝送線路構造を形成した。
【0032】
この伝送線路構造における高周波信号の伝送特性をネットワークアナライザを用いて測定した。その結果を図3に線図で示す。図3において、横軸は周波数(単位:GHz)を、縦軸はSパラメータS11およびS21の絶対値を対数表示した値(単位:dB)を表し、特性曲線のうち破線はS11の周波数特性を、実線はS21の周波数特性を示している。この結果より分かるように、反射係数であるS11は広帯域にわたって低く抑えられており、一方、通過特性を示すS21の特性曲線が示すように極めて良好な伝送特性を有している。
【0033】
さらに、それぞれ対応する凹部31・32で封止された構造の搭載部間における電気的な隔離の状態について、送信系回路部位と発振回路部位とをそれぞれ近接させて配置した凹部31・32に収容し、それらが近接した状態において各高周波半導体回路素子を動作させたところ、各高周波半導体回路素子は正常に動作し、送信機としても正常に動作していることから、各搭載部間は各凹部31・32により電気的に良好に隔離されていることが確認できた。これにより、誘電体基板1上において各搭載部を近接させて配置することが可能となり、高周波半導体装置のより一層の小型化を図ることができるものであることが確認できた。
【0034】
なお、以上はあくまで本発明の実施の形態の例示であって、本発明はこれらに限定されるものではなく、本発明の要旨を逸脱しない範囲で種々の変更や改良を加えることは何ら差し支えない。例えば、上記の例では各搭載部および各凹部内にそれぞれ1個ずつの高周波半導体回路素子を搭載実装し収容した例を示したが、高周波回路の仕様に応じてそれぞれ複数個の高周波半導体回路素子を搭載実装し収容してもよいことは言うまでもない。
【0035】
【発明の効果】
以上のように、本発明の高周波半導体装置によれば、誘電体基板の上面に複数の高周波半導体回路素子の電極が電気的に接続される電極配線が形成された複数の搭載部を設け、この各搭載部に高周波半導体回路素子を搭載してその電極を電極配線に電気的に接続し、この誘電体基板上に、下面に搭載部に対応する複数の凹部を設けるとともにこの凹部間に接続配線が形成された誘電体蓋体を取着して、搭載部毎に凹部内に高周波半導体回路素子を収容するとともに搭載部間の電極配線同士を接続配線で電気的に接続したことから、以下のような有利な効果を有するものである。
【0036】
まず、個々の高周波半導体回路素子の特性評価による検査は、この誘電体基板上にこの高周波半導体回路素子が実装された状態の、誘電体蓋体を取り付ける前の段階で行ない、実装された各高周波半導体回路素子が良品であることを確認した後に誘電体蓋体を誘電体基板上に取着することにより、高周波半導体装置として完成させることができる。
【0037】
また、誘電体蓋体に形成された凹部に収納される各高周波半導体回路素子の電極と電気的に接続されている電極配線同士を各搭載部間で誘電体蓋体の下面に形成された凹部間を電気的に接続するための接続配線により電気的に接続することにより、凹部内に収容された各高周波半導体回路素子間の電気的接続を実現して高周波回路を構成し、かつ、各搭載部間同士すなわち凹部間同士をそれぞれ良好に電気的に隔離することが可能となる。
【0038】
したがって、従来のマルチチップパッケージ等を用いた高周波半導体装置と比較して、部品点数の削減および装置の小型化を目的としたマルチチップ実装を実現しつつ、所望の高周波半導体回路素子間を電気的に隔離して良好な高周波特性を実現し、しかも製造コストを低く抑えることができる高周波半導体装置を提供することができる。
【0039】
また、搭載部毎の高周波半導体回路素子の封止と各高周波半導体回路間の電気的な接続を誘電体蓋体の取付けにより同時に行なえるため、組立工数の削減といった製造上有利な効果をも有するものである。
【図面の簡単な説明】
【図1】本発明の高周波半導体装置の実施の形態の一例の概略構成を示す分解斜視図である。
【図2】図1に示す高周波半導体装置について誘電体基板に誘電体蓋体を取着した状態を示す要部斜視図である。
【図3】本発明の高周波半導体装置における電極配線と接続配線とによる伝送線路構造の反射特性および伝送特性を示す線図である。
【符号の説明】
1・・・・・・・・・・・・・・・・・・・・・誘電体基板
101、111、121、131・・・・・・・・・・・・・信号用電極(電極配線)
102、103、112、113、122、123、132、133・・・接地用電極(電極配線)
2・・・・・・・・・・・・・・・・・・・・・誘電体蓋体
31、32・・・・・・・・・・・・・・・・・・・凹部
201・・・・・・・・・・・・・・・・・・・・・信号用電極(接続配線)
202、203・・・・・・・・・・・・・・・・・・接地用電極(接続配線)
41、42・・・・・・・・・・・・・・・・・・・高周波半導体回路素子
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a high-frequency semiconductor device configured by mounting and mounting a plurality of high-frequency semiconductor circuit elements that operate in a high-frequency band, and in particular, the high-frequency characteristics are excellent and individual high-frequency semiconductor circuit elements can be easily replaced. The present invention relates to a high-frequency semiconductor device that can easily improve the yield rate.
[0002]
[Prior art]
Generally, various high-frequency semiconductor circuit elements such as amplifiers, frequency converters, and oscillators are used in a high-frequency semiconductor device that constitutes a wireless unit in a communication device or a sensor. In a high frequency band higher than the microwave band, particularly in a frequency band higher than the millimeter wave band, as these semiconductor circuits, for example, a circuit having a monolithic integrated circuit (MMIC) configuration using a III-V group compound semiconductor such as gallium arsenide (GaAs). Elements are mainly used. Such a high-frequency semiconductor circuit element is used by being sealed in a semiconductor package for the purpose of protecting the circuit itself and facilitating the handling in the manufacturing process of the high-frequency device, or the radio unit or the entire device. It is used by being mounted on a carrier substrate (external electric circuit substrate) as a sealed state.
[0003]
Up to now, in order to reduce the influence of the non-defective product rate of the high-frequency semiconductor circuit element on the non-defective product rate of the entire high-frequency semiconductor device, a plurality of semiconductor circuit elements are each mounted on a semiconductor package or carrier substrate, After inspecting the characteristics, it was necessary to assemble the entire high-frequency semiconductor device. In this case, if a defective product is found in the inspection of each semiconductor circuit element, it is possible to obtain an advantage that only a high-frequency semiconductor circuit element that is a non-defective product can be used for assembling the entire high-frequency semiconductor device by removing it in the inspection process. .
[0004]
However, mounting each of the semiconductor circuit elements on the semiconductor package or carrier substrate for the inspection of the high-frequency semiconductor circuit element unit level in this way increases the number of parts, and increases the size of the entire high-frequency semiconductor device. There is a problem that. Further, in the connection between the semiconductor circuit elements, the interconnection between the semiconductor circuit element and the semiconductor package or the carrier substrate, or the interconnection between the semiconductor package or the carrier substrate, and further, the mother board or the connection substrate in the semiconductor package or the carrier substrate and the apparatus. As a result, there arises a problem that the high-frequency characteristics of the high-frequency semiconductor device are deteriorated.
[0005]
For this reason, in recent years, multi-chip mounting has been proposed in which a plurality of high-frequency semiconductor circuit elements are mounted on a single semiconductor package or carrier substrate, thereby reducing the number of components, downsizing the apparatus, and improving high-frequency characteristics. Yes. Such a mounting form is a mounting form that has been conventionally used when configuring a semiconductor device inside an information device such as a computer, but in recent years it is also being applied to a high-frequency semiconductor device inside a communication device.
[0006]
On the other hand, a high-frequency semiconductor device that constitutes a radio unit or the like of a communication device has a semiconductor circuit such as an oscillator or an amplifier as described above as a requirement of the device configuration, and among them, an oscillator used for the purpose of generating a carrier wave For the purpose of avoiding interference of unnecessary high frequency signals, the peripheral circuit part is a reception system circuit part composed of a low noise amplifier, a frequency converter and its peripheral circuit, and a transmission power amplifier, a frequency converter and a peripheral circuit thereof. In many cases, it is configured to be electrically isolated from the system circuit part. Therefore, it is desirable that the overall structure of the high-frequency semiconductor device has a configuration in which the reception system circuit part, the transmission system circuit part, and the oscillation circuit part are respectively housed in independent housing structures.
[0007]
In addition, in the high-frequency semiconductor device as described above, when performing multi-chip mounting for the purpose of reducing the number of components, downsizing the device, and improving high-frequency characteristics, a semiconductor having a structure capable of mounting a plurality of high-frequency semiconductor circuit elements It is necessary to realize the package or carrier substrate as a structure having a plurality of housing structures that can electrically isolate the receiving system circuit part, the transmitting system circuit part, and the oscillation circuit part as described above.
[0008]
As a conventional example of such a structure, a plurality of frames made of iron-nickel-cobalt alloy or the like are joined on a metal base such as iron-nickel-cobalt alloy by silver brazing or the like, and according to the configuration of the radio circuit. In order to realize the connection, a notch is provided in a part of the corresponding frame, and an input / output connection component having a microstrip line / strip line / microstrip line conversion structure is fitted and bonded to the notch. There is a so-called metal wall package having such a structure.
[0009]
In such a multi-chip package using a metal wall package, each semiconductor circuit element is individually evaluated, and only a semiconductor circuit element that has been confirmed to be non-defective is used. A structure that realizes electrical connection with the outside of the frame body by being mounted on and interconnecting the electrodes of the semiconductor circuit element directly to the input / output connection component or via a line substrate with a gold ribbon or gold wire, etc. It has become.
[0010]
[Problems to be solved by the invention]
However, the metal wall package as described above has a structure in which input / output connection parts are fitted and bonded to the notch provided in the frame body, so that airtightness is ensured and good high frequency is achieved. In order to realize the characteristics, there is a problem that high machining accuracy is required and the manufacture becomes difficult. In addition, parts that can be used particularly in a high-frequency band such as millimeter waves have a low yield rate in manufacturing, which generally increases the manufacturing cost.
[0011]
The present invention has been made in view of the above-described problems in the prior art, and the object thereof is to achieve desired inter-frequency semiconductor circuit elements while realizing multichip mounting for the purpose of reducing the number of components and downsizing the apparatus. It is an object of the present invention to provide a high-frequency semiconductor device capable of electrically isolating the above and realizing good high-frequency characteristics and reducing the manufacturing cost.
[0012]
[Means for Solving the Problems]
The high-frequency semiconductor device of the present invention is provided with a plurality of mounting portions in which electrode wirings to which electrodes of a plurality of high-frequency semiconductor circuit elements are electrically connected are formed on the upper surface of a dielectric substrate, and each of the mounting portions has a high-frequency semiconductor circuit. A dielectric in which an element is mounted and its electrode is electrically connected to the electrode wiring, and a plurality of concave portions corresponding to the mounting portion are provided on the lower surface of the dielectric substrate, and a connection wiring is formed between the concave portions. A body lid is attached, the high-frequency semiconductor circuit element is accommodated in the recess for each mounting portion, and the electrode wirings between the mounting portions are electrically connected by the connection wiring. To do.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
According to the high frequency semiconductor device of the present invention, due to the above configuration, the inspection by the characteristic evaluation of each high frequency semiconductor circuit element is performed by using the dielectric lid in a state where the high frequency semiconductor circuit element is mounted on the dielectric substrate. The high frequency semiconductor device can be completed by attaching the dielectric lid on the dielectric substrate after confirming that each mounted high frequency semiconductor circuit element is a non-defective product. At this time, a region for connection with the connection wiring provided at the end of the electrode wiring electrically connected to the electrode of each high-frequency semiconductor circuit element housed in the recess formed in the dielectric lid, and the dielectric An electrical connection is made by bonding the connection area with the electrode wiring provided at the end of the connection wiring for electrically connecting the recesses formed on the lower surface of the body lid with a conductive adhesive or the like. By configuring the high-frequency circuit by realizing electrical connection between the high-frequency semiconductor circuit elements accommodated in the recesses, for example, an oscillation circuit, a reception system circuit, a transmission system circuit, etc. It can be electrically isolated by storing in the recess. Therefore, the number of non-defective parts that can be used in the high-frequency band such as millimeter waves is low, and the number of parts is reduced and the equipment is downsized compared to the case of using a metal wall package that has a high manufacturing cost. To provide a high-frequency semiconductor device that realizes good high-frequency characteristics by electrically isolating desired high-frequency semiconductor circuit elements while realizing multi-chip mounting for the purpose, and that can keep manufacturing costs low Can do.
[0014]
Hereinafter, a high-frequency semiconductor device of the present invention will be described in detail with reference to the drawings.
[0015]
FIG. 1 is an exploded perspective view showing a schematic configuration of an example of an embodiment of a high-frequency semiconductor device according to the present invention. In FIG. 1, reference numeral 1 denotes a dielectric substrate, and reference numerals 41 and 42 denote high-frequency semiconductor circuit elements mounted and mounted on a mounting portion provided on the upper surface of the dielectric substrate 1. The input / output electrodes (not shown) of the plurality of high-frequency semiconductor circuit elements 41 and 42 have the same ground conductor on both sides of the signal conductor and the signal conductor on the lower surface of the element so that the evaluation by the wafer probe can be performed. It has the form of a coplanar line formed on a plane.
[0016]
101 to 103, 111 to 113, 121 to 123, and 131 to 133 are electrode wirings formed on the mounting portion on the upper surface of the dielectric substrate 1 to which the electrodes of the high-frequency semiconductor circuit elements 41 and 42 are electrically connected. It is. Here, corresponding to the electrodes of the high-frequency semiconductor circuit elements 41 and 42 in the form of a coplanar line, signal electrodes 101, 111, 121, and 131 formed as high-frequency line conductors and grounding electrodes on both sides thereof 102, 103, 112, 113, 122, 123, 132, 133 are formed. The characteristic impedance of the coplanar line formed by these signal electrodes 101, 111, 121, 131 and the ground electrodes 102, 103, 112, 113, 122, 123, 132, 133 formed on the dielectric substrate 1 is It is determined by the thickness and relative dielectric constant of the dielectric substrate 1, the width of the signal electrode, and the distance between the signal electrode and the ground electrode. Usually, the value is determined so as to match the characteristic impedance of the input / output electrodes of the high-frequency semiconductor circuit elements 41 and.
[0017]
In the mounting portion on the top surface of the dielectric substrate 1, the high-frequency semiconductor circuit elements 41 and 42 may be mounted on the same surface as the substrate surface, or may be mounted in a recess formed on the top surface of the substrate. The electrical connection between the high-frequency semiconductor circuit elements 41 and 42 and the respective electrode wirings 101 to 103, 111 to 113, 121 to 123, and 131 to 133 may be performed by wire bonding or by a so-called flip chip mounting method. Also good.
[0018]
Reference numeral 2 denotes a dielectric lid, and reference numerals 31 and 32 denote recesses 31 and 32 provided on the lower surface of the dielectric lid 2 and having an opening on the lower surface. The plurality of recesses 31 and 32 are mounted in a state where the dielectric lid 2 is attached to the dielectric substrate 1 after the high-frequency semiconductor circuit elements 41 and 42 are mounted on the respective mounting portions on the upper surface of the dielectric substrate 1. Each part is formed in a position and a size in which the high-frequency semiconductor circuit elements 41 and 42 are accommodated.
[0019]
Reference numerals 201 to 203 denote connection wirings formed between the recesses 31 and 32 on the lower surface of the dielectric lid 2. These connection wirings 201 to 203 are electrically connected to the electrode wirings 111 to 113 and 121 to 123 of the mounting portions 31 and 32 on both ends, respectively, so that the electrode wirings 111 to 113. It is formed as a high-frequency line conductor at a position where 121 to 123 are electrically connected to each other. Here, corresponding to the electrode wirings 111 to 113 and 121 to 123 in the form of coplanar lines, signal electrodes 201 and grounding electrodes 202 and 203 as high-frequency line conductors are formed. Thus, in a state where the dielectric lid 2 is attached to the dielectric substrate 1, as shown in a perspective view of the main part in FIG. 2, the signal electrodes 111 and 121 of the electrode wiring formed on the dielectric substrate 1 are provided. , And the grounding electrodes 112, 122, 113, and 123 are electrically connected to each other by contacting the signal electrode 201 and the grounding electrodes 202, 203 of the connection wiring. Each of these abutting portions may be used in combination with solder, a conductive adhesive or the like in order to make the electrical connection more reliable.
[0020]
In this example, illustration of connection with other connection wirings or external electric circuit boards to which the electrode wirings 101 to 103 and 131 to 133 are electrically connected is omitted.
[0021]
According to the above configuration, before the dielectric lid 2 is attached, the electrode wiring formed on each mounting portion on the dielectric substrate 1, that is, the signal electrodes 111 and 121, the ground electrode 112, 122, 113, and 123 are separated from each other, and by connecting these electrode sets with a wafer probe, each high-frequency semiconductor circuit element 41, 42 having an electrode connected to each electrode wiring is connected to each mounting part. It becomes possible to evaluate independently. When the dielectric lid 2 is attached to the dielectric substrate 1 after evaluating the high-frequency semiconductor circuit elements 41 and 42 and confirming that they are non-defective, the dielectric lid 2 is formed on the dielectric lid 2. The connection wiring, that is, the signal electrode 201 and the grounding electrodes 202 and 203 electrically connect the electrode wirings between the mounting portions on the dielectric substrate 1, that is, the signal electrodes 111 and 121, and the grounding electrodes 112 and 122, 113, and 123, respectively. Will be connected. At this time, the relative permittivity of the dielectric lid 2, the thickness of the portions other than the recesses 31 and 32, the width of the signal electrode 201, and the interval between the signal electrode 201 and the ground electrodes 202 and 203 are as follows: In the state after 2 is attached to the dielectric substrate 1, the characteristic impedance of the coplanar line constituted by the signal electrodes 111 and 121 and the ground electrodes 112, 122, 113 and 123 formed on the dielectric substrate 1 By determining the respective values so as to match each other, the high-frequency semiconductor circuit elements 41 and 42 are electrically isolated from each other between the mounting parts, and good high-frequency transmission characteristics are realized in the interconnection between them. It becomes possible.
[0022]
In the high-frequency semiconductor device of the present invention, the dielectric substrate 1 can be made of various dielectric materials conventionally used for semiconductor packages, carrier substrates and the like. Specific dielectrics include various ceramics and glass ceramics such as aluminum oxide sintered bodies and aluminum nitride sintered bodies, or organic resin dielectrics such as PTFE, glass epoxy and polyimide. Can do. In particular, when a material that can be hermetically sealed, such as ceramics such as an aluminum oxide sintered body or an aluminum nitride sintered body, is used, a high-frequency semiconductor circuit element can be obtained by using the same material for the lid. It becomes possible to store the air and seal hermetically well.
[0023]
The mounting portion and the electrode wirings 101 to 103, 111 to 113, 121 to 123, and 131 to 133 may be configured according to the mounting form of the high frequency semiconductor circuit elements 41 and 42 to be mounted. For example, in the case where a high-frequency semiconductor circuit element and an external circuit are connected to each other using wire bonding technology, a die attach pattern is formed on the surface of the dielectric substrate 1, and the high-frequency semiconductor to be mounted. A signal electrode and a ground electrode may be provided at positions corresponding to the input / output electrodes of the circuit elements 41 and 42. In addition, if flip-chip technology is used to connect the high-frequency semiconductor circuit elements 41 and 42 to external circuits, it corresponds to the input / output electrodes of the high-frequency semiconductor circuit elements 41 and 42 to be mounted. A signal electrode and a ground electrode may be provided at the position where the signal is to be applied.
[0024]
The dielectric lid 2 may be made of a dielectric material or the like that can be produced by a laminating method in order to provide a concave portion. As a specific dielectric, for example, an aluminum oxide sintered material is used in the same manner as the dielectric substrate 1. Various ceramics and glass ceramics such as an aluminum body and an aluminum nitride sintered body, or an organic resin dielectric material as described above can be used. In particular, when materials that can be hermetically sealed, such as ceramics such as aluminum oxide sintered bodies and aluminum nitride sintered bodies, are used, the high-frequency semiconductor circuit element is accommodated as described above to provide a good airtightness. Can be achieved. If a dielectric material having a dielectric constant lower than that of the dielectric material used in the dielectric substrate 1 is used, electrode wiring before and after the dielectric lid 2 is attached to the dielectric substrate 1 This also has the effect of suppressing changes in impedance.
[0025]
The recesses 31 and 32 formed on the lower surface of the dielectric lid 2 are provided at positions where the high frequency semiconductor circuit elements 41 and 42 can be accommodated when the dielectric lid 2 is attached to the dielectric substrate 1. The space formed by the concave portions 31 and 32 of the dielectric lid 2 and the surface of the dielectric substrate 1 after the dielectric lid 2 is attached may be larger than the volume of the high-frequency semiconductor circuit elements 41 and 42 to be accommodated. It is desirable to set as small as possible so that unnecessary resonance or the like does not occur. In addition, a through conductor such as a via hole is disposed around the recesses 31 and 32 in the dielectric lid 2 so as to surround at a sufficiently small interval with respect to the in-tube wavelength corresponding to the operating frequency. By forming a conductor that is electrically connected to the via hole and also to the ground of the semiconductor device on the surface of the metal, the electromagnetic shielding effect of the recesses 31 and 32 that accommodate the high-frequency semiconductor circuit elements 41 and 42 is provided. It becomes possible.
[0026]
For example, in the case of ceramics, the concave portions 31 and 32 may be formed by laminating a layer provided with a hollow portion by punching or laser processing at a so-called green sheet stage before firing. In the case of an organic resin material, it is also possible to form the recesses 31 and 32 by laminating a layer provided with a hollow portion or by using a chemical process such as etching.
[0027]
The connection wirings 201 to 203 may have the same line width and distance as the electrode wiring, and the shorter the wiring length, the better. However, the wiring length depends on the distance between the recesses 31 and 32. The mechanical strength of the dielectric lid 2 may be shortened as long as no deterioration occurs.
[0028]
【Example】
Next, specific examples of the high-frequency semiconductor device of the present invention will be described.
[0029]
Two high-frequency semiconductor circuit element mounting portions are provided on the upper surface of a dielectric substrate 1 made of alumina ceramics having a thickness of 0.2 mm and a relative dielectric constant of 8.8, and signal electrodes 111 and 121 each having a width of 0.13 mm are formed. Electrode wirings in the form of coplanar lines were produced by forming grounding electrodes 112, 113, 122, 123 having a width of 0.2 mm on both sides at intervals of 0.065 mm. At this time, the characteristic impedance of the coplanar line was set to about 50 ohms.
[0030]
A recess for accommodating a high-frequency semiconductor circuit element corresponding to the mounting portion of the dielectric substrate 1 is formed on the lower surface of the dielectric lid 2 made of a glass ceramic substrate having a thickness of 1.0 mm and a relative dielectric constant of 4.9. A signal electrode 201 having a width of 0.17 mm was formed between the recesses, and ground electrodes 202 and 203 having a width of 0.2 mm were formed on both sides thereof at intervals of 0.05 mm.
[0031]
Then, the dielectric lid 2 is attached on the dielectric substrate 1 so that the recesses and the mounting portions correspond to each other, and the signal electrode 201 and the ground electrodes 202 and 203 formed on the lower surface of the dielectric lid 2. The parts where each end overlaps with each end of the signal electrodes 101 and 111 and the ground electrodes 112, 113, 122, and 123 formed on the upper surface of the dielectric substrate 1 are bonded together by soldering. The transmission line structure in the high-frequency semiconductor device of the present invention was formed in which the electrode wirings were electrically connected by connection wiring.
[0032]
The transmission characteristics of high frequency signals in this transmission line structure were measured using a network analyzer. The results are shown graphically in FIG. In FIG. 3, the horizontal axis represents the frequency (unit: GHz), the vertical axis represents the logarithm of the absolute values of the S parameters S11 and S21 (unit: dB), and the broken line in the characteristic curve represents the frequency characteristic of S11. The solid line indicates the frequency characteristic of S21. As can be seen from this result, the reflection coefficient S11 is kept low over a wide band, while it has a very good transmission characteristic as shown by the characteristic curve of S21 indicating the pass characteristic.
[0033]
Furthermore, the electrical isolation state between the mounting parts of the structure sealed by the corresponding recesses 31 and 32 is accommodated in the recesses 31 and 32 arranged so that the transmission system circuit part and the oscillation circuit part are close to each other. When each high-frequency semiconductor circuit element is operated in a state where they are close to each other, each high-frequency semiconductor circuit element operates normally and also operates normally as a transmitter. It was confirmed that 31 and 32 were electrically isolated well. As a result, it was confirmed that the mounting portions can be arranged close to each other on the dielectric substrate 1 and the high-frequency semiconductor device can be further reduced in size.
[0034]
Note that the above are merely examples of the embodiments of the present invention, and the present invention is not limited to these embodiments, and various modifications and improvements may be added without departing from the scope of the present invention. . For example, in the above example, an example in which one high-frequency semiconductor circuit element is mounted and mounted in each mounting portion and each recess is shown. However, a plurality of high-frequency semiconductor circuit elements are provided according to the specifications of the high-frequency circuit. It goes without saying that can be mounted and accommodated.
[0035]
【The invention's effect】
As described above, according to the high-frequency semiconductor device of the present invention, a plurality of mounting portions in which electrode wirings to which the electrodes of a plurality of high-frequency semiconductor circuit elements are electrically connected are provided on the upper surface of the dielectric substrate. A high-frequency semiconductor circuit element is mounted on each mounting portion, and the electrode is electrically connected to the electrode wiring. On the dielectric substrate, a plurality of recesses corresponding to the mounting portion are provided on the lower surface, and connection wiring is provided between the recesses. Since the dielectric lid body formed by attaching the high-frequency semiconductor circuit element in the recess for each mounting portion and electrically connecting the electrode wirings between the mounting portions with the connection wiring, the following It has such an advantageous effect.
[0036]
First, the inspection by the characteristic evaluation of each high-frequency semiconductor circuit element is performed at the stage where the high-frequency semiconductor circuit element is mounted on the dielectric substrate and before the dielectric lid is mounted. After confirming that the semiconductor circuit element is a non-defective product, the dielectric lid is attached onto the dielectric substrate, whereby the high-frequency semiconductor device can be completed.
[0037]
In addition, a recess formed on the lower surface of the dielectric lid between the mounting portions between the electrode wirings electrically connected to the electrodes of each high-frequency semiconductor circuit element housed in the recess formed in the dielectric lid. By electrically connecting with the connection wiring for electrically connecting each other, electrical connection between each high-frequency semiconductor circuit element accommodated in the recess is realized to constitute a high-frequency circuit, and each mounting It is possible to electrically isolate the portions, that is, the recesses, from each other satisfactorily.
[0038]
Therefore, compared to conventional high-frequency semiconductor devices using a multi-chip package or the like, while realizing multi-chip mounting for the purpose of reducing the number of parts and downsizing the device, the desired high-frequency semiconductor circuit elements can be electrically connected. Therefore, it is possible to provide a high-frequency semiconductor device that achieves good high-frequency characteristics and can be manufactured at a low cost.
[0039]
In addition, since the high-frequency semiconductor circuit element for each mounting portion can be sealed and the electrical connection between the high-frequency semiconductor circuits can be performed simultaneously by attaching the dielectric lid, there is also an advantageous manufacturing effect such as reduction in the number of assembly steps. Is.
[Brief description of the drawings]
FIG. 1 is an exploded perspective view showing a schematic configuration of an example of an embodiment of a high-frequency semiconductor device of the present invention.
2 is a perspective view of a main part showing a state in which a dielectric lid is attached to a dielectric substrate in the high-frequency semiconductor device shown in FIG.
FIG. 3 is a diagram showing reflection characteristics and transmission characteristics of a transmission line structure by electrode wiring and connection wiring in the high-frequency semiconductor device of the present invention.
[Explanation of symbols]
1 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Dielectric substrate
101, 111, 121, 131 ..... Signal electrode (electrode wiring)
102, 103, 112, 113, 122, 123, 132, 133 ... Grounding electrode (electrode wiring)
2 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Dielectric lid
31, 32 ...
201 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Signal electrode (connection wiring)
202, 203 ... Grounding electrode (connection wiring)
41, 42 ... ・ ・ ・ ・ ・ High frequency semiconductor circuit elements

Claims (1)

誘電体基板の上面に複数の高周波半導体回路素子の電極が電気的に接続される電極配線が形成された複数の搭載部を設け、該各搭載部に高周波半導体回路素子を搭載してその電極を前記電極配線に電気的に接続し、前記誘電体基板上に、下面に前記搭載部に対応する複数の凹部を設けるとともに該凹部間に接続配線が形成された誘電体蓋体を取着して、前記搭載部毎に前記凹部内に前記高周波半導体回路素子を収容するとともに前記搭載部間の前記電極配線同士を前記接続配線で電気的に接続したことを特徴とする高周波半導体装置。A plurality of mounting portions having electrode wirings electrically connected to electrodes of a plurality of high-frequency semiconductor circuit elements are provided on the upper surface of the dielectric substrate, and the high-frequency semiconductor circuit elements are mounted on the respective mounting portions and the electrodes are mounted Electrically connecting to the electrode wiring, and providing a plurality of recesses corresponding to the mounting portion on the lower surface of the dielectric substrate, and attaching a dielectric lid having connection wires formed between the recesses; The high-frequency semiconductor device is characterized in that the high-frequency semiconductor circuit element is accommodated in the recess for each mounting portion, and the electrode wirings between the mounting portions are electrically connected by the connection wiring.
JP2000024762A 2000-01-28 2000-01-28 High frequency semiconductor device Expired - Fee Related JP4206185B2 (en)

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