JP4203247B2 - Method for forming solar cell element - Google Patents

Method for forming solar cell element Download PDF

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JP4203247B2
JP4203247B2 JP2002078194A JP2002078194A JP4203247B2 JP 4203247 B2 JP4203247 B2 JP 4203247B2 JP 2002078194 A JP2002078194 A JP 2002078194A JP 2002078194 A JP2002078194 A JP 2002078194A JP 4203247 B2 JP4203247 B2 JP 4203247B2
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output extraction
extraction portion
solar cell
forming
cell element
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JP2003282898A (en
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健司 伏谷
宏明 高橋
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Kyocera Corp
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Kyocera Corp
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Description

【0001】
【発明の属する技術分野】
本発明は太陽電池素子の形成方法に関し、特に裏面電極を帯状の出力取出部と集電部とで構成した太陽電池素子の形成方法に関する。
【0002】
【従来の技術】
従来のシリコン太陽電池を図4に示す。図4に示すように、P型半導体基板1の表面近傍全面に一定の深さまでN型不純物を拡散させてN型を呈する拡散層2を形成するとともに、この拡散層2の表面に反射防止膜3を形成したものである。また、表面側には表面電極4が形成され、裏面側には出力取出部5と集電部6から成る裏面電極5、6が形成されている。
【0003】
この裏面電極5、6の形成方法については、特開平5−326990号公報、あるいは特表平6−509910号公報に開示されているように、半導体基板1の裏面の一領域に銀ペースト(5)を塗布して乾燥した後、その領域の周辺部の一部に重なるようにアルミニウムペースト(6)を塗布して乾燥して同時に焼成する方法、すなわち同時焼成法(一段階焼成)が用いられている。この従来の太陽電池素子では、裏面電極の出力取出部5は10μm程度の厚みに形成され、集電部6は50μm程度の厚みに形成され、重なり部は60μm程度の総厚に形成される。
【0004】
このようにして製造された太陽電池素子では、複数の素子同士を配線材を用いて直列に接続して電圧を昇圧して使用するのが一般的である。この素子間の接続にははんだが必要となるため、表面電極4と裏面電極5、6にはんだコーティングを行っている。このとき裏面電極の出力取出部5にはんだ濡れ性が良好な素材を用いてこれに配線材(不図示)をはんだ付けしている。
【0005】
【発明が解決しようとする課題】
ところが、上記のような裏面電極5、6の構造では、図5に示すように、出力取出部5と集電部6を同時焼成するときに、集電部6の成分が出力取出部5の一部に拡散して合金層7が形成されるが、この合金層7は焼結による収縮率が大きいため、これと接合する半導体基板1との界面8で引張り応力が発生し、半導体基板1の一部に応力集中が起こる。そのため、焼成後の工程で出力取出部5と集電部6の重なり部を起点とするセル割れが多発するという問題があった。
【0006】
上記のような問題を回避するために、裏面電極の出力取出部5の焼成後の厚みを2μm以上6μm以下にすると有効であることが分かっている。しかし、裏面電極5、6の出力取出部5の全体の厚みを薄くすると、出力取出部5と半導体基板1の接着強度が低下するため、はんだコーティングやモジュール作成の際に出力取出部5aが剥離しやすくなるという問題があった。
【0007】
本発明は上記問題に鑑みてなされたものであり、出力取出部と集電部を一部重ねてスクリーン印刷して焼成して電極を形成すると、出力取出部と集電部との重なり部分を起点とするセル割れが発生するという従来の問題点を解消した太陽電池素子の形成方法を提供することを目的とする。
【0008】
【課題を解決するための手段】
上記目的を達成するために、請求項1に係る太陽電池の形成方法では、半導体基板の裏面に、形成された帯状の出力取出部と該出力取出部が形成された領域以外の略全面に形成された集電部とで構成される裏面電極を、前記集電部が前記出力取出部の周縁部に重なるように形成する太陽電池素子の形成方法において、前記半導体基板の裏面に前記出力取出部を形成するための出力取出部形成用ペーストを塗布する工程と、前記集電部を形成するための集電部形成用ペーストを前記出力取出部形成用ペーストと一部重なるように塗布する工程と、これらのペーストを焼成する工程とを有し、前記出力取出部の重なり部分におけるガラスフリット含有量を前記出力取出部のそれ以外の領域のガラスフリット含有量よりも少なくしたことを特徴とする。
【0009】
上記太陽電池素子の形成方法では、前記出力取出部が銀を主成分とし、かつ前記集電部がアルミニウムを主成分とすることを特徴とする。
【0010】
また、請求項3に係る太陽電池素子の形成方法では、前記出力取出部の重なり部分を実質的にガラスフリットを含有しない銀ペーストを用いて形成するとともに、前記出力取出部のそれ以外の領域をガラスフリットを含有する銀ペーストを用いて形成するようにしたことを特徴とする
【0011】
【発明の実施の形態】
以下、本発明の実施形態を詳細に説明する。
本発明の太陽電池素子も基本構造は図4に示す従来の太陽電池素子の構造と同じである。すなわち、一導電型例えばP型の半導体基板1の表面近傍全面に一定の深さまで逆導電型例えばN型不純物を拡散させて逆導電型例えばN型を呈する拡散層2を形成するとともに、この拡散層2の表面に反射防止膜3を形成したものである。また、表面側には表面電極4が形成され、裏面側には出力取出部5と集電部6から成る裏面電極5、6が形成されている。
【0012】
半導体基板1は単結晶もしくは多結晶のシリコン基板などで構成される。この半導体基板1はp型、n型いずれでもよい。単結晶シリコンの場合は引き上げ法などで形成され、多結晶シリコンの場合は鋳造法などで形成される。多結晶シリコンは、大量生産が可能で製造コスト面で単結晶シリコンよりもきわめて有利である。引き上げ法や鋳造法で形成されたシリコンブロックを10cm×10cmもしくは15cm×15cm程度の大きさに切断してインゴットとし、300μm程度の厚みにスライスして半導体基板1とする。
【0013】
半導体基板1の表面側には、逆導電型半導体不純物が拡散された拡散層2が形成されている。この逆導電型半導体不純物が拡散された拡散層2は、半導体基板1内に半導体接合部を形成するために設けるものであり、例えばn型の不純物を拡散させる場合、POCl3を用いた気相拡散法、P25を用いた塗布拡散法、およびP+イオンを電界で基板1に直接導入するイオン打ち込み法などで形成される。この逆導電型半導体不純物を含有する拡散層2は0.3〜0.5μm程度の深さに形成される。
【0014】
また、半導体基板1の表面側には、反射防止膜3が形成されている。この反射防止膜3は、半導体基板1の表面で光が反射するのを防止して、半導体基板1内に光を有効に取り込むために設ける。この反射防止膜3は半導体基板1との屈折率差等を考慮して屈折率が2程度の材料で構成され、厚み500〜2000Å程度の窒化シリコン膜や酸化シリコン(SiO2)膜などで構成される。
【0015】
半導体基板1の裏面側には、一導電型半導体不純物が高濃度に拡散されたBSF層(不図示)を形成することが望ましい。この一導電型半導体不純物が高濃度に拡散されたBSF層は、半導体基板1の裏面近くでキャリアの再結合による効率の低下を防ぐために、半導体基板1の裏面側に内部電界を形成するものである。
【0016】
つまり、半導体基板1の裏面近くで発生したキャリアがこの電界で加速される結果、電力が有効に取り出されることとなり、特に長波長の光感度が増大すると共に、高温における太陽電池特性の低下を軽減できる。このように一導電型半導体不純物が高濃度に拡散されたBSF層が形成された半導体基板1の裏面側のシート抵抗は15Ω/□程度になる。
【0017】
半導体基板1の表面側および裏面側には、表面電極4および裏面電極5、6が形成されている。この表面電極4および裏面電極5、6は主にAg紛、バインダー、ガラスフリットなどからなるAgペーストをスクリーン印刷して焼成し、その上にはんだ層を形成する。表面電極4は、例えば幅200μm程度に、またピッチ3mm程度に形成される多数のフィンガー電極(不図示)と、この多数のフィンガー電極を相互に接続する2本のバスバー電極で構成される。この表面電極4は厚み10〜30μm程度に形成される。
【0018】
裏面電極は、例えば半導体基板1の略全長にわたって例えば幅10mm程度に形成された帯状の出力取出部5とこの出力取出部5以外の略全面にわたって形成された集電部6とで構成される。この出力取出部5は焼成後の厚みで10μm程度、集電部6は焼成後の厚みで50μm程度に形成される。
【0019】
本発明の太陽電池素子では、図1よび図2に示すように、帯状の出力取出部5とこの出力取出部5が形成された領域以外の略全面に形成された集電部6とから成る裏面電極5、6を、この集電部6が出力取出部5の周縁部に重なるように設けている。
【0020】
この出力取出部5と集電部6との重なり部分においては、重なり部分における出力取出部5aのガラスフリット含有量をこの出力取出部5のそれ以外の領域5bのガラスフリット含有量よりも少なくする。例えば集電部6と出力取出部5の重なり部分以外の領域5bには1重量%以下でガラスフリットを含有する銀ペーストを塗布し、集電部6と出力取出部5と重なり部分5aにはフリットレスの銀ペーストを塗布する。しかし、焼成することによって拡散が生じるため、完成品ではこの領域5aにも若干ガラスフリットを含有することになるが、他の領域5bよりも多くはならない。したがって、集電部6と出力取出部5の重なり部分5aはそれ以外の領域5bよりもガラスフリットの含有量が少なくなる。
【0021】
このように構成すると、焼成によって形成される合金層7と半導体基板1の界面の接着力が低下して一部が剥離するため、半導体基板1に発生する応力集中が軽減され、裏面電極5、6の重なり部分を起点とする半導体基板1の割れの発生率を低下させることができる。また、出力取出部5と集電部6が重なる部分以外の出力取出部5bはガラスフリットを多く含有しているため、出力取出部5bと半導体基板1の間に十分な接着強度があり、出力取出部5の剥離を防止できる。
【0022】
また、出力取出部5にはんだ塗れ性のよい銀を用いることで配線材のはんだ付けを容易にすると共に、集電部6にアルミニウムを用いることで、焼成時に半導体裏面にP+層を形成してキャリア再結合を防ぎ、セル特性を向上させることができる。
【0023】
次に、本発明に係る太陽電池素子の形成方法を説明する。まず、図3(a)のように一導電型例えばP型半導体基板を準備する。そして、図3(b)に示すように半導体基板1を逆導電型例えばN型不純物雰囲気中で熱処理などして、半導体基板1の表面近傍全面に一定の深さまでN型不純物を拡散させてN型を呈する拡散層2を形成する。次に、図3(c)に示すように、半導体基板1の表面にプラズマCVD法などで反射防止膜3を形成する。
【0024】
次に、拡散層2を分離した後、表面電極4を印刷して乾燥させる。その後に、図1(a)に示したパターンのようにガラスフリットを含む銀ペースト(5b)を印刷して乾燥して、さらにその周囲にガラスフリットを実質的に含まない銀ペースト(5a)を印刷して乾燥させる。その後、ガラスフリットを実質的に含まない銀ペースト(5a)の一部と重なるようにアルミニウムペースト(6)をスクリーン印刷して焼成することにより図3(d)に示すような太陽電池素子を得ることができる。なお、ガラスフリットを含む銀ペースト(5b)とガラスフリットを含まない銀ペースト(5a)のプリント順は逆でもよい。焼成によって銀電極5のガラスフリットを含まない部分5aに、アルミニウムペースト(6)や銀電極5をガラスフリットを含む部分(5b)からガラスフリットが若干拡散されるが、元々ガラスフリットを含んでいた部分に比べるとその量は少なくなる。
【0025】
その後、半導体基板1をベルト炉等の焼成炉において焼成することによって、表面電極4および裏面電極5、6が同時に形成される。このとき、アルミニウムから成る集電部6からアルミニウムが銀から成る出力取出部5に拡散してAg/Al合金層7が形成される。Ag/Al合金層7はガラスフリット含有量が比較的少ない部分5aに形成されるため、Ag/Al合金層7と半導体基板1の接着強度は弱く、これら界面に働く応力は比較的小さくなる。その後、各電極4、5、6が形成された半導体基板1をはんだ槽に浸漬して表面電極4と裏面電極の出力取出部5にはんだコーティング層(不図示)を形成する。
【0026】
本発明は上記実施形態に限定されるものではなく本発明の範囲内で上記実施形態に多くの修正および変更を加えうることはもちろんである。例えばアルミニウムペーストに代わる金属ペーストとして、ガリウム、インジウムをベースとした金属ペーストを使用することも可能である。また銀ペーストに代わる金属ペーストとして銅、金、白金をベースとした金属ペーストを使用することも可能である。また、図1の裏面電極パターンは例であって、この形状に制限されるものではない。
【0027】
【実施例】
次に、本発明の実施例を示す。図3(a)に示すように半導体基板1として15cm角で厚さ0.3mm、比抵抗1.5Ω・cmのP型シリコン基板を準備した。そして、図3(b)に示すように、熱拡散法でオキシ塩化リン(POCl3)を拡散源として深さ0.5μmのN型拡散層2を形成した。
【0028】
次に、表面にプラズマCVD法で窒化シリコンから成る反射防止膜3を800Åの厚さで形成した後、拡散層2を分離した。
【0029】
次に、一部のセルに、図3(d)に示す構造で裏面にガラスフリットを含まない銀ペースト(5a、5b)を印刷・焼成した。また、残りのセルに、図1(e)に示す構造で裏面にガラスフリットを含まない銀ペースト(5a)、ガラスフリットを含む銀ペースト(5b)、アルミニウムペースト(6)をスクリーン印刷した。また、表面にも銀ペースト(4)をスクリーン印刷して焼成することで電極4、5、6を形成した。このとき、図1(b)に示すように、銀から成る出力取出用部5(5a、5b)とアルミニウムから成る集電部6との重なり部とその周辺の約0.5mmの領域に合金層7が形成された。
【0030】
その後、200℃のはんだ浴槽に上記基板1を浸漬して引き上げることで、表面電極4と裏面電極の出力取出部5にはんだ被覆して太陽電池素子を作成した。また、その太陽電池素子を用いて太陽電池モジュールを作成した。この太陽電池素子の焼成後工程における出力取出部5と集電部6との重なり部を起点とする割れと剥離の発生率および光電変換効率を従来の方法と比較して表1に示した。
【0031】
【表1】

Figure 0004203247
【0032】
表1に示す通り、本発明の方法を用いた場合は、従来に比べて焼成後に発生する出力取出部5と集電部6との重なり部を起点とする割れを軽減することができた。また、出力取出部5と集電部6との重なり部のみガラスフリットを含まないペーストを用いた場合は、割れが低減すると共に、出力取出部5の剥離もなかった。また、これらの太陽電池素子の光電変換効率は従来の方法を用いた場合とほぼ同等であった。
【0033】
以上のように、本発明に係る太陽電池素子の形成方法によれば、裏面電極の集電部を出力取出部の周縁部に重なるように設けるとともに、出力取出部の重なり部分におけるガラスフリット含有量をこの出力取出部のそれ以外の領域のガラスフリット含有量よりも少なくしたことから、この重なり部分を起点とする太陽電池素子の割れを防止できるとともに、裏面電極と半導体基板との間に十分な接着強度が強固となって裏面電極の剥離を防止することもできる。また、太陽電池素子の光電変換効率を損なうこともない。
【図面の簡単な説明】
【図1】本発明に係る太陽電池素子の焼成前後の裏面電極構造を説明するための図である。
【図2】本発明に係る太陽電池素子の裏面電極パターンを説明するための図である。
【図3】本発明に係る太陽電池素子の形成方法の工程を説明するための図である。
【図4】従来の太陽電池素子を示す図である。
【図5】従来の太陽電池素子の裏面電極部分を拡大して示す図である。
【符号の説明】
1・・・半導体基板、2・・・n型拡散層、2a・・・接合分離部、3・・・反射防止膜、4・・・表面電極、5・・・出力取出部、6・・・集電部、5a・・・出力取出部の集電部との重なり部[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for forming a solar cell element, and more particularly to a method for forming a solar cell element in which a back electrode is composed of a strip-shaped output extraction portion and a current collector.
[0002]
[Prior art]
A conventional silicon solar cell is shown in FIG. As shown in FIG. 4, an N-type diffusion layer 2 is formed by diffusing an N-type impurity to a certain depth over the entire surface near the surface of a P-type semiconductor substrate 1, and an antireflection film is formed on the surface of the diffusion layer 2. 3 is formed. Further, the front surface electrode 4 is formed on the front surface side, and the back surface electrodes 5 and 6 including the output extraction portion 5 and the current collecting portion 6 are formed on the back surface side.
[0003]
As for the method of forming the back electrodes 5 and 6, as disclosed in JP-A-5-326990 or JP-A-6-509910, a silver paste (5 ) Is applied and dried, and then the aluminum paste (6) is applied so as to overlap a part of the peripheral portion of the region, dried and simultaneously fired, that is, a simultaneous firing method (one-step firing) is used. ing. In this conventional solar cell element, the output extraction portion 5 of the back electrode is formed to a thickness of about 10 μm, the current collecting portion 6 is formed to a thickness of about 50 μm, and the overlapping portion is formed to a total thickness of about 60 μm.
[0004]
In the solar cell element manufactured in this way, it is general to use a plurality of elements connected in series using a wiring material to boost the voltage. Since solder is required for the connection between the elements, the front electrode 4 and the back electrodes 5 and 6 are coated with solder. At this time, a wiring material (not shown) is soldered to the output extraction portion 5 of the back electrode using a material having good solder wettability.
[0005]
[Problems to be solved by the invention]
However, in the structure of the back electrodes 5 and 6 as described above, as shown in FIG. 5, when the output extraction unit 5 and the current collection unit 6 are fired simultaneously, the components of the current collection unit 6 are the components of the output extraction unit 5. The alloy layer 7 is formed by being diffused partially, but since the alloy layer 7 has a large shrinkage rate due to sintering, a tensile stress is generated at the interface 8 between the alloy layer 7 and the semiconductor substrate 1 to be bonded to the semiconductor substrate 1. Stress concentration occurs in a part of the area. Therefore, there has been a problem that cell cracks frequently occur from the overlapping portion of the output extraction portion 5 and the current collecting portion 6 in the process after firing.
[0006]
In order to avoid the above problems, it has been found that it is effective to set the thickness of the output extraction portion 5 of the back electrode after firing to 2 μm or more and 6 μm or less. However, if the overall thickness of the output extraction portion 5 of the back electrodes 5 and 6 is reduced, the adhesive strength between the output extraction portion 5 and the semiconductor substrate 1 is reduced, so that the output extraction portion 5a is peeled off during solder coating or module creation. There was a problem that it was easy to do.
[0007]
The present invention has been made in view of the above problems, and when the electrode is formed by screen printing by partially overlapping the output extraction portion and the current collection portion, the overlapping portion between the output extraction portion and the current collection portion is formed. It aims at providing the formation method of the solar cell element which eliminated the conventional problem that the cell crack which makes the starting point generate | occur | produces.
[0008]
[Means for Solving the Problems]
In order to achieve the above object, in the method for forming a solar cell according to claim 1, the strip-shaped output extraction portion formed on the back surface of the semiconductor substrate and substantially the entire surface other than the region where the output extraction portion is formed. In the method of forming a solar cell element, wherein the current collector is formed so that the current collector overlaps a peripheral edge of the output extraction part, the output extraction part is formed on the rear surface of the semiconductor substrate. Applying an output extraction portion forming paste for forming the current extraction portion; and applying a current collection portion formation paste for forming the current collection portion so as to partially overlap the output extraction portion formation paste; , and a step of firing the pastes, to characterized in that the glass frit content in the overlapping portion of the output extraction portion was less than the glass frit content of the other areas of the output extraction portion .
[0009]
In the method for forming a solar cell element, the output extraction portion is mainly composed of silver, and the current collecting portion is mainly composed of aluminum.
[0010]
Further, in the method for forming a solar cell element according to claim 3, the overlapping portion of the output extraction portion is formed using a silver paste that does not substantially contain glass frit, and other regions of the output extraction portion are formed. It is characterized by being formed using a silver paste containing glass frit .
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail.
The basic structure of the solar cell element of the present invention is the same as that of the conventional solar cell element shown in FIG. That is, a diffusion layer 2 exhibiting a reverse conductivity type, for example, N-type is formed by diffusing a reverse conductivity type, for example, N-type impurity, to a certain depth over the entire surface near the surface of a semiconductor substrate 1 of one conductivity type, for example, P-type. The antireflection film 3 is formed on the surface of the layer 2. Further, the front surface electrode 4 is formed on the front surface side, and the back surface electrodes 5 and 6 including the output extraction portion 5 and the current collecting portion 6 are formed on the back surface side.
[0012]
The semiconductor substrate 1 is composed of a monocrystalline or polycrystalline silicon substrate. The semiconductor substrate 1 may be either p-type or n-type. In the case of single crystal silicon, it is formed by a pulling method or the like, and in the case of polycrystalline silicon, it is formed by a casting method or the like. Polycrystalline silicon can be mass-produced and is extremely advantageous over single-crystal silicon in terms of manufacturing cost. A silicon block formed by a pulling method or a casting method is cut into a size of about 10 cm × 10 cm or 15 cm × 15 cm to form an ingot, and sliced to a thickness of about 300 μm to form a semiconductor substrate 1.
[0013]
On the surface side of the semiconductor substrate 1, a diffusion layer 2 in which reverse conductivity type semiconductor impurities are diffused is formed. The diffusion layer 2 in which the reverse conductivity type semiconductor impurity is diffused is provided to form a semiconductor junction in the semiconductor substrate 1. For example, when diffusing an n-type impurity, a gas phase using POCl 3 is used. It is formed by a diffusion method, a coating diffusion method using P 2 O 5 , or an ion implantation method in which P + ions are directly introduced into the substrate 1 by an electric field. The diffusion layer 2 containing the reverse conductivity type semiconductor impurity is formed to a depth of about 0.3 to 0.5 μm.
[0014]
An antireflection film 3 is formed on the surface side of the semiconductor substrate 1. The antireflection film 3 is provided to prevent light from being reflected from the surface of the semiconductor substrate 1 and to effectively take light into the semiconductor substrate 1. The antireflection film 3 is made of a material having a refractive index of about 2 in consideration of a difference in refractive index with the semiconductor substrate 1, and is made of a silicon nitride film or a silicon oxide (SiO 2 ) film having a thickness of about 500 to 2000 mm. Is done.
[0015]
On the back side of the semiconductor substrate 1, it is desirable to form a BSF layer (not shown) in which one conductivity type semiconductor impurity is diffused at a high concentration. The BSF layer in which the one-conductivity-type semiconductor impurity is diffused at a high concentration forms an internal electric field on the back surface side of the semiconductor substrate 1 in order to prevent a decrease in efficiency due to carrier recombination near the back surface of the semiconductor substrate 1. is there.
[0016]
That is, carriers generated near the back surface of the semiconductor substrate 1 are accelerated by this electric field. As a result, electric power is effectively extracted. In particular, photosensitivity of a long wavelength is increased, and deterioration of solar cell characteristics at high temperature is reduced. it can. As described above, the sheet resistance on the back surface side of the semiconductor substrate 1 on which the BSF layer in which one conductivity type semiconductor impurity is diffused at a high concentration is formed is about 15Ω / □.
[0017]
A front surface electrode 4 and back surface electrodes 5 and 6 are formed on the front surface side and the back surface side of the semiconductor substrate 1. The front electrode 4 and the back electrodes 5 and 6 are screen-printed and fired with an Ag paste mainly composed of Ag powder, a binder, glass frit and the like, and a solder layer is formed thereon. The surface electrode 4 is composed of, for example, a large number of finger electrodes (not shown) formed with a width of about 200 μm and a pitch of about 3 mm, and two bus bar electrodes that connect the large number of finger electrodes to each other. The surface electrode 4 is formed to a thickness of about 10 to 30 μm.
[0018]
The back electrode is composed of, for example, a strip-shaped output extraction portion 5 formed to have a width of, for example, about 10 mm over the substantially entire length of the semiconductor substrate 1 and a current collector portion 6 formed over substantially the entire surface other than the output extraction portion 5. The output extraction portion 5 is formed with a thickness after firing of about 10 μm, and the current collecting portion 6 is formed with a thickness after firing of about 50 μm.
[0019]
As shown in FIG. 1 and FIG. 2, the solar cell element of the present invention comprises a strip-shaped output extraction portion 5 and a current collector portion 6 formed on substantially the entire surface other than the region where the output extraction portion 5 is formed. The back electrodes 5 and 6 are provided so that the current collector 6 overlaps the peripheral edge of the output extraction portion 5.
[0020]
In the overlapping portion of the output extraction portion 5 and the current collector 6, the glass frit content of the output extraction portion 5a in the overlapping portion is made smaller than the glass frit content of the other region 5b of the output extraction portion 5. . For example, a silver paste containing 1% by weight or less of glass frit is applied to the region 5b other than the overlapping portion of the current collecting portion 6 and the output extracting portion 5, and the overlapping portion 5a of the current collecting portion 6 and the output extracting portion 5 is applied to the overlapping portion 5a. Apply fritless silver paste. However, since the diffusion occurs by firing, the finished product will contain some glass frit in the region 5a, but not more than the other regions 5b. Therefore, the overlapping portion 5a of the current collector 6 and the output extraction portion 5 has a smaller glass frit content than the other region 5b.
[0021]
If comprised in this way, since the adhesive force of the interface of the alloy layer 7 formed by baking and the semiconductor substrate 1 falls and a part peels, the stress concentration which generate | occur | produces in the semiconductor substrate 1 is reduced, the back surface electrode 5, The crack generation rate of the semiconductor substrate 1 starting from the overlapping portion of 6 can be reduced. Further, since the output extraction portion 5b other than the portion where the output extraction portion 5 and the current collector 6 overlap each other contains a large amount of glass frit, there is sufficient adhesive strength between the output extraction portion 5b and the semiconductor substrate 1, and the output It is possible to prevent the take-out part 5 from peeling off.
[0022]
In addition, the use of silver with good solderability for the output extraction part 5 facilitates the soldering of the wiring material, and the use of aluminum for the current collection part 6 forms a P + layer on the back surface of the semiconductor during firing. Thus, carrier recombination can be prevented and cell characteristics can be improved.
[0023]
Next, a method for forming a solar cell element according to the present invention will be described. First, as shown in FIG. 3A, one conductivity type, for example, a P-type semiconductor substrate is prepared. Then, as shown in FIG. 3B, the semiconductor substrate 1 is heat-treated in a reverse conductivity type, for example, N-type impurity atmosphere to diffuse N-type impurities to the entire surface near the surface of the semiconductor substrate 1 to a certain depth. A diffusion layer 2 having a mold is formed. Next, as shown in FIG. 3C, an antireflection film 3 is formed on the surface of the semiconductor substrate 1 by a plasma CVD method or the like.
[0024]
Next, after separating the diffusion layer 2, the surface electrode 4 is printed and dried. Thereafter, a silver paste (5b) containing glass frit is printed and dried as in the pattern shown in FIG. 1 (a), and further a silver paste (5a) substantially free of glass frit is formed around the silver paste (5a). Print and dry. Thereafter, the aluminum paste (6) is screen-printed and fired so as to overlap with a part of the silver paste (5a) substantially free of glass frit, thereby obtaining a solar cell element as shown in FIG. be able to. The silver paste (5b) containing glass frit and the silver paste (5a) not containing glass frit may be printed in reverse order. Although the glass frit is slightly diffused from the portion (5b) containing the glass frit to the portion 5a of the silver electrode 5 that does not contain the glass frit by firing, the glass frit was originally contained. The amount is less than the part.
[0025]
Thereafter, the semiconductor substrate 1 is baked in a baking furnace such as a belt furnace, whereby the front electrode 4 and the back electrodes 5 and 6 are formed simultaneously. At this time, aluminum diffuses from the current collector 6 made of aluminum to the output extraction portion 5 made of silver, and an Ag / Al alloy layer 7 is formed. Since the Ag / Al alloy layer 7 is formed in the portion 5a having a relatively low glass frit content, the adhesive strength between the Ag / Al alloy layer 7 and the semiconductor substrate 1 is weak, and the stress acting on these interfaces is relatively small. Thereafter, the semiconductor substrate 1 on which the electrodes 4, 5, 6 are formed is immersed in a solder bath to form a solder coating layer (not shown) on the front electrode 4 and the output extraction part 5 of the back electrode.
[0026]
The present invention is not limited to the above-described embodiment, and it goes without saying that many modifications and changes can be made to the above-described embodiment within the scope of the present invention. For example, a metal paste based on gallium or indium can be used as a metal paste instead of an aluminum paste. It is also possible to use a metal paste based on copper, gold or platinum as a metal paste instead of the silver paste. Moreover, the back surface electrode pattern of FIG. 1 is an example, Comprising: It does not restrict | limit to this shape.
[0027]
【Example】
Next, examples of the present invention will be described. As shown in FIG. 3A, a P-type silicon substrate having a 15 cm square, a thickness of 0.3 mm, and a specific resistance of 1.5 Ω · cm was prepared as the semiconductor substrate 1. Then, as shown in FIG. 3B, an N-type diffusion layer 2 having a depth of 0.5 μm was formed using phosphorus oxychloride (POCl 3 ) as a diffusion source by a thermal diffusion method.
[0028]
Next, an antireflection film 3 made of silicon nitride was formed on the surface with a thickness of 800 mm by plasma CVD, and then the diffusion layer 2 was separated.
[0029]
Next, a silver paste (5a, 5b) having a structure shown in FIG. 3D and not including glass frit on the back surface was printed and fired on some cells. Further, a silver paste (5a) containing no glass frit on the back surface, a silver paste containing glass frit (5b), and an aluminum paste (6) having the structure shown in FIG. Moreover, the electrodes 4, 5, and 6 were formed by screen-printing and baking silver paste (4) also on the surface. At this time, as shown in FIG. 1 (b), an alloy is formed in an overlap portion of the output extraction portion 5 (5a, 5b) made of silver and the current collector portion 6 made of aluminum and a region of about 0.5 mm around the overlap portion. Layer 7 was formed.
[0030]
Then, the said board | substrate 1 was immersed in a 200 degreeC solder bath, and it pulled up, the soldering was carried out to the output extraction part 5 of the surface electrode 4 and a back surface electrode, and the solar cell element was created. Moreover, the solar cell module was created using the solar cell element. Table 1 shows the rate of occurrence of cracks and delamination and the photoelectric conversion efficiency starting from the overlapping portion of the output extraction portion 5 and the current collecting portion 6 in the post-firing step of the solar cell element as compared with the conventional method.
[0031]
[Table 1]
Figure 0004203247
[0032]
As shown in Table 1, when the method of the present invention was used, it was possible to reduce cracks starting from the overlapping portion between the output extraction portion 5 and the current collecting portion 6 that occurred after firing as compared with the conventional method. Moreover, when the paste which does not contain a glass frit only in the overlapping part of the output extraction part 5 and the current collection part 6 was used, the crack reduced and there was no peeling of the output extraction part 5. Moreover, the photoelectric conversion efficiencies of these solar cell elements were almost the same as when the conventional method was used.
[0033]
As described above, according to the method for forming a solar cell element according to the present invention, the collector portion of the back electrode is provided so as to overlap the peripheral portion of the output extraction portion, and the glass frit content in the overlapping portion of the output extraction portion Is less than the glass frit content in the other region of the output extraction portion, so that it is possible to prevent cracking of the solar cell element starting from this overlapping portion, and sufficient space between the back electrode and the semiconductor substrate. Adhesive strength can be strengthened to prevent peeling of the back electrode. Moreover, the photoelectric conversion efficiency of the solar cell element is not impaired.
[Brief description of the drawings]
FIG. 1 is a view for explaining a back electrode structure before and after firing a solar cell element according to the present invention.
FIG. 2 is a diagram for explaining a back electrode pattern of a solar cell element according to the present invention.
FIG. 3 is a view for explaining steps of a method for forming a solar cell element according to the present invention.
FIG. 4 is a diagram showing a conventional solar cell element.
FIG. 5 is an enlarged view showing a back electrode portion of a conventional solar cell element.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate, 2 ... N type diffused layer, 2a ... Junction isolation | separation part, 3 ... Antireflection film, 4 ... Surface electrode, 5 ... Output extraction part, 6 ... -Current collector, 5a ... Overlap of the output extraction part with the current collector

Claims (3)

半導体基板の裏面に、形成された帯状の出力取出部と該出力取出部が形成された領域以外の略全面に形成された集電部とで構成される裏面電極を、前記集電部が前記出力取出部の周縁部に重なるように形成する太陽電池素子の形成方法において、前記半導体基板の裏面に前記出力取出部を形成するための出力取出部形成用ペーストを塗布する工程と、前記集電部を形成するための集電部形成用ペーストを前記出力取出部形成用ペーストと一部重なるように塗布する工程と、これらのペーストを焼成する工程とを有し、前記出力取出部の重なり部分におけるガラスフリット含有量を前記出力取出部のそれ以外の領域のガラスフリット含有量よりも少なくしたことを特徴とする太陽電池素子の形成方法 On the back surface of the semiconductor substrate, a back electrode composed of a strip-shaped output extraction portion and a current collection portion formed on substantially the entire surface other than the region where the output extraction portion is formed, the current collection portion is the In the method of forming a solar cell element formed so as to overlap with the peripheral edge of the output extraction portion, a step of applying an output extraction portion forming paste for forming the output extraction portion on the back surface of the semiconductor substrate; A step of applying a current-collecting-portion-forming paste for forming a portion so as to partially overlap the output extraction portion-forming paste, and a step of firing these pastes, and an overlapping portion of the output extraction portion A method for forming a solar cell element , characterized in that the glass frit content in is less than the glass frit content in the other region of the output extraction portion. 前記出力取出部が銀を主成分とし、かつ前記集電部がアルミニウムを主成分とすることを特徴とする請求項1に記載の太陽電池素子の形成方法。 The method for forming a solar cell element according to claim 1, wherein the output extraction portion has silver as a main component, and the current collector has aluminum as a main component . 前記出力取出部の重なり部分を実質的にガラスフリットを含有しない銀ペーストを用いて形成するとともに、前記出力取出部のそれ以外の領域をガラスフリットを含有する銀ペーストを用いて形成するようにしたことを特徴とする請求項1または2に記載の太陽電池素子の形成方法。The overlapping portion of the output extraction portion is formed using a silver paste substantially not containing glass frit, and the other region of the output extraction portion is formed using a silver paste containing glass frit. The method for forming a solar cell element according to claim 1 or 2.
JP2002078194A 2002-03-20 2002-03-20 Method for forming solar cell element Expired - Fee Related JP4203247B2 (en)

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