JP4165126B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device having STI (Shallow Trench Isolation).
[0002]
[Prior art]
FIG. 1 is a cross-sectional view of a semiconductor device including, for example, a CMOS transistor and a capacitor as a semiconductor device having an STI.
[0003]
The left half of FIG. 1 shows an N-channel MOS transistor among CMOS transistors. In this semiconductor device, STIs 4 are provided on both left and right sides of the N-channel MOS transistor. On the right side of the N-channel MOS transistor, a capacitor composed of an upper electrode 15 and a lower electrode 13 is formed on the STI 4.
[0004]
As a method for manufacturing this semiconductor device, the following method can be considered. The manufacturing process at this time is shown in FIGS. 6A to 6C, FIGS. 7A and 7B, FIGS. 8A to 8C, FIGS. 9A to 9C, and FIG. ) And (b).
[0005]
First, in the step shown in FIG. 6A, a pad oxide film 21 and a SiNx film 22 are formed in order on the p-type Si substrate 1. 6B, trenches 23 are formed in the Si substrate 1 using the patterned SiNx film 22 and the pad oxide film 21 as a mask.
[0006]
Thereafter, in the step shown in FIG. 6C, sacrificial oxidation and removal of the sacrificial oxide film are performed in order to adjust the roundness of the upper end and lower end of the trench 23. Remove. Subsequently, a sacrificial oxide film 24 for improving the adhesion of the buried oxide film is formed on the inner wall of the trench 23. Then, a buried oxide film 25 having a thickness sufficient to fill the trench 23 is deposited on the p-type Si substrate 1 including the inside of the trench 23.
[0007]
Next, in the step shown in FIG. 7A, the buried oxide film 25 is made to be a dense film equivalent to a thermal oxide film.₂Heat treatment is performed under atmospheric conditions, and planarization is performed by CMP using the previous SiN film 22 as a stopper. Thereafter, as shown in FIG. 7B, the SiNx film is removed.
[0008]
Subsequently, the pad oxide film 21 is removed in the step shown in FIG. Then, in the step shown in FIG. 8B, H is formed on the region where the pad oxide film has been removed.₂A cap oxide film 42 is formed by heat treatment in an O atmosphere. In the following, H₂Oxidation by heat treatment in an O atmosphere is called wet oxidation.
[0009]
Thereafter, ion implantation for forming a well region is performed. The cap oxide film 42 is a film for preventing channeling during ion implantation. Hereinafter, this cap oxide film 42 is referred to as a cap oxide film 42 for ion implantation. Subsequently, the cap oxide film is removed in the step shown in FIG.
[0010]
Next, in the step shown in FIG. 9A, a cap oxide film 43 is formed again by wet oxidation on the region where the cap oxide film has been removed. Subsequently, by performing heat treatment, impurities are diffused so that the well region has a desired well concentration and depth. Thereby, well region 2 (2a, 2b) is formed. The cap oxide film 43 formed in this step is a film for preventing impurities in the well region from diffusing outside the Si substrate 1 during heat treatment. Hereinafter, the cap oxide film 43 is referred to as an out-diffusion prevention cap film 43.
[0011]
Subsequently, in the step shown in FIG. 9B, the cap film for preventing out diffusion is removed. Then, in the step shown in FIG. 9C, an oxide film 44 is formed by wet oxidation on the region where the cap film for preventing out-diffusion is removed. Subsequently, a Poly-Si film 26 for a capacitor lower electrode is formed on the oxide film 44 and the STI 4. Subsequently, a dielectric film 27 is formed on the Poly-Si.
[0012]
Next, in the step shown in FIG. 10A, the dielectric film 27 and the Poly-Si film 26 for the capacitor lower electrode are etched using the oxide film 44 as a stopper. Thereby, the lower electrode 13 and the dielectric film 14 are formed. Then, as shown in FIG. 10B, the etching stopper oxide film 44 is removed.
[0013]
Thereafter, although not shown, a gate oxide film 5 of the CMOS transistor is formed on the Si substrate 1 by wet oxidation. Then, a Poly-Si film is deposited on the Si substrate 1 and patterned to form the gate electrode 6 on the gate oxide film 5 and the upper electrode 15 of the capacitor.
[0014]
Subsequently, a protective oxide film 7 for protecting the gate electrode 6 is formed by wet oxidation. Thereafter, sidewalls 9, 19, 20 and source / drain regions 11, 12 are formed.
[0015]
[Problems to be solved by the invention]
In the manufacturing process described above, a plurality of oxide film forming processes by the wet oxidation method are necessary in the process after the STI 4 is formed. An example of the wet oxidation step and the thickness of the oxide film formed at that time is 30 nm or more in the ion implantation cap oxide film formation step shown in FIG. 8B, and FIG. It is 30 nm or more in the cap oxide film forming process for suppressing out diffusion shown in FIG. 9C, 30 nm or more in the oxide film forming process for etching stopper shown in FIG. 9C, and 10 nm or less in the gate oxide film forming process. In the protective oxide film forming step of the electrode, it is about 10 nm.
[0016]
Therefore, when the film thicknesses of the oxide films formed by wet oxidation are added together as they are, the total film thickness is larger than 140 nm. The total film thickness of the oxide film formed by this wet oxidation is the value obtained when the oxide film is formed on the Si substrate and then the oxide film is further formed without removing the formed oxide film. This corresponds to the thickness of the oxide film.
[0017]
In the case of using STI in which an oxide film is buried in a trench for element isolation, stress is generated near the trench end in the Si substrate, and crystal stress is induced near the trench end by this stress. As a result, there is a problem that a junction leak or the like occurs.
[0018]
There are many reports showing the cause of this stress, of which the following two are typical. One is a difference in thermal expansion coefficient between the Si substrate and the buried oxide film. For example, stress is generated in heat treatment for increasing the density of the buried oxide film. The other is volume expansion of the buried oxide film due to the wet oxidation process after the STI formation.
[0019]
However, the latter is not independent of the former, and stress generated by the volume expansion of the buried oxide film by wet oxidation is added to the stress generated by the difference in thermal expansion coefficient. In other words, the stress generated by the difference in thermal expansion coefficient further increases due to the volume expansion of the buried oxide film.
[0020]
Therefore, in the above method, a large stress is generated in the semiconductor substrate due to the volume expansion of the buried oxide film due to wet oxidation. For this reason, crystal defects occur in the semiconductor substrate.
[0021]
An object of the present invention is to provide a method for manufacturing a semiconductor device capable of suppressing volume expansion of a buried oxide film.
[0022]
[Means for Solving the Problems]
  In order to achieve the above object, according to the first aspect of the present invention, after removing the nitride film (22) and leaving the pad oxide film (21), the remaining pad oxide film (21) is used as a channeling suppression cap. Ion implantation is performed using the film, and the impurity diffusion region (2) is formed by diffusing impurities using the pad oxide film (21) as a cap film for suppressing out-diffusion.is doing.
[0023]
As a result, the channeling suppression cap film and the out-diffusion suppression cap film are in separate steps, and compared with the method of manufacturing a semiconductor device having a step of forming a wet oxidation method separately from the pad oxide film. Thus, the number of steps for performing wet oxidation after the formation of the field oxide film (4) can be reduced.
[0024]
  For this reason,STIAfter the formation of (4)Buried oxide filmIt is possible to suppress volume expansion due to wet oxidation.
  Furthermore, the invention described in claim 1 includes a step of forming an oxide film (5, 7) on the semiconductor substrate (1) by wet oxidation after forming the impurity diffusion region (2). In the step of forming the STI (4) by densifying the oxide film (25) by heat treatment, heat treatment is performed at a temperature of 1100 ° C. or higher, and the oxide films (5, 7) are formed by wet oxidation. In the forming step, the oxide film is formed so that the total thickness of the oxide films (5, 7) is 25 nm or less.
  From the experiment results of the inventors of the present application, when the STI is formed by performing the heat treatment for densifying the oxide film at a temperature of 1100 ° C. or higher, the difference in thermal expansion coefficient between the Si substrate and the buried oxide film is as follows. It has been confirmed that crystal defects do not occur if the total thickness of oxide films formed by the wet method is about 25 nm or less, even if stress due to is generated.
Therefore, according to the invention of claim 1,Generation of crystal defects can be suppressed, and a semiconductor device can be manufactured.
[0025]
  According to the second aspect of the present invention, after removing the nitride film (22) and leaving the pad oxide film (21), a Poly-Si film (26) is formed on the pad oxide film (21). Etching the poly-Si film (26) using the remaining pad oxide film (21) as a stopper filmis doing.
[0026]
Thereby, the field oxide film (4) is formed as compared with the method of manufacturing a semiconductor device having a step of forming the stopper film when etching the Poly-Si film (26) by wet oxidation separately from the pad oxide film. The number of steps for performing subsequent wet oxidation can be reduced.
[0027]
  For this reason,STIAfter the formation of (4)Buried oxide filmIt is possible to suppress volume expansion due to wet oxidation.
  Furthermore, in the invention described in claim 2, after etching the Poly-Si film (26), the oxide film (5) is formed on the semiconductor substrate (1) by wet oxidation as in the invention described in claim 1. 7), the oxide film (25) is densified by heat treatment, and in the step of forming STI (4), heat treatment is performed at a temperature of 1100 ° C. or higher. In the step of forming the oxide films (5, 7) by the wet oxidation method, the oxide films are formed so that the total thickness of the oxide films (5, 7) is 25 nm or less. Thereby, like the invention of Claim 1, generation | occurrence | production of a crystal defect can be suppressed.
Therefore, according to the invention of claim 2,Generation of crystal defects can be suppressed, and a semiconductor device can be manufactured.
[0028]
According to the third aspect of the present invention, the nitride film (22) is removed, the pad oxide film (21) is left, and the remaining pad oxide film (21 in the element formation region of the semiconductor substrate (1)). ) Is used as a channeling suppression cap film, and impurities are diffused using the pad oxide film (21) as an out-diffusion suppression cap film, thereby forming an impurity diffusion region (2).
[0029]
  Then, a Poly-Si film (26) is deposited on the semiconductor substrate (1) including the pad oxide film (21), and the Poly-Si film (26) is formed using the pad oxide film (21) as a stopper film. etchingis doing.
[0030]
As a result, a method of manufacturing a semiconductor device including a cap film for suppressing channeling, a cap film for suppressing out-diffusion, and a stopper film, which are separate steps and formed by a wet oxidation method separately from the pad oxide film As compared with the above, the number of steps of wet oxidation after the formation of the field oxide film (4) can be reduced.
[0031]
  For this reason,STIAfter the formation of (4)Buried oxide filmIt is possible to suppress volume expansion due to wet oxidation.
  Furthermore, in the invention described in claim 3, after etching the Poly-Si film (26), the oxide film (5) is formed on the semiconductor substrate (1) by wet oxidation as in the invention described in claim 1. 7), the oxide film (25) is densified by heat treatment, and in the step of forming STI (4), heat treatment is performed at a temperature of 1100 ° C. or higher. In the step of forming the oxide films (5, 7) by the wet oxidation method, the oxide films are formed so that the total thickness of the oxide films (5, 7) is 25 nm or less. Thereby, like the invention of Claim 1, generation | occurrence | production of a crystal defect can be suppressed.
  Therefore, according to the invention of claim 3,Generation of crystal defects can be suppressed, and a semiconductor device can be manufactured.
[0033]
  Claims4As shown in FIG. 5, the step of forming the oxide film by the wet oxidation method specifically includes the step of removing the pad oxide film (21) and forming the gate oxide film (5) in the element formation scheduled region, Forming a gate electrode (6) on the gate oxide film (5) and forming a protective oxide film (7) on the surface of the gate electrode (6).
[0034]
In addition, the code | symbol in the bracket | parenthesis of each said means shows the correspondence with the specific means as described in embodiment mentioned later.
[0035]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows a semiconductor device formed by a semiconductor device manufacturing method according to a first embodiment to which the present invention is applied. In the present embodiment, a semiconductor device having an upper electrode and a lower electrode, for example, a capacitor constituting an AD converter circuit, and a CMOS transistor will be described as an example, similarly to the semiconductor device described in the related art.
[0036]
This semiconductor device includes a semiconductor substrate 3 in which a p-type well 2a and an n-type well 2b are formed on a p-type Si substrate 1. In the semiconductor substrate 3, the element region where the CMOS transistor is formed is separated from other regions by STI 4 as a field insulating film (oxide film). A capacitor is formed on the STI 4.
[0037]
In this element region, a gate electrode 6 is formed on the semiconductor substrate 3 via a gate oxide film 5. A gate protective film 7 is formed on the surface of the gate electrode 6. An oxide film 8 is formed on the gate electrode 6 via a gate protective film 7, and sidewalls 9 are formed on the left and right sides of the gate electrode 6.
[0038]
Further, a source region 11 and a drain region 12 are formed on both sides of the gate electrode 6 including the sidewall 9 in the surface layer of the p-type well 2a. An oxide film 10 is formed on the source region 11 and the drain region 12.
[0039]
On the other hand, on the STI 4, a lower electrode 13 made of Poly-Si, a dielectric film 14, and an upper electrode 15 made of Poly-Si are sequentially stacked. Oxide films 16, 17, and 18 as protective films are formed on the side wall of the lower electrode 13, the side wall of the upper electrode 15, and the upper side, respectively. Further, side walls 19 and 20 are formed next to the oxide films 16 and 17, respectively.
[0040]
Next, a method for manufacturing a semiconductor device in the present embodiment will be described. 2A to 2C, FIGS. 3A and 3B, and FIGS. 4A to 4C show a manufacturing process of the semiconductor device according to the present embodiment.
[0041]
First, as in the prior art, the steps of FIGS. 6A to 6C, FIGS. 7A and 7B are performed. In the step shown in FIG. 6A, a pad oxide film 21 having a film thickness of, for example, about 40 nm is formed on the p-type Si substrate 1 by a wet oxidation method, and a SiNx film 22 having a film thickness of, for example, about 150 nm is formed by a CVD method. Deposits continuously.
[0042]
In the step of FIG. 6B, a trench 23 having a depth of, for example, about 500 nm is formed in a region where a field oxide film is to be formed in the Si substrate 1. The dotted line in the figure indicates the position of the surface of the p-type Si substrate 1 before the trench 23 is formed.
[0043]
In the step shown in FIG. 6C, as the buried oxide film, O_Three-Use TEOS film. This O_ThreeThe film thickness from the surface of the TEOS film 25 to the bottom surface of the trench 23 is, for example, about 2 μm.
[0044]
In the step shown in FIG.₂Heat treatment is performed at a high temperature of about 1100 ° C. or higher in an atmosphere. As a result, O_ThreeThe TEOS film 25 is a dense film equivalent to a thermal oxide film. The temperature of this heat treatment is a temperature that does not exceed the melting temperature of the Si substrate. Thereafter, planarization is performed to form STI 4 as a field insulating film (oxide film). Then, the element formation scheduled region is partitioned by the STI 4. In the following, this flattened O_ThreeThe TEOS film 25 is referred to as STI 4 or buried oxide film 4.
[0045]
In the step shown in FIG. 7B, the SiNx film 22 is selectively removed with phosphoric acid.
[0046]
In this embodiment, subsequently, only a few nm of the pad oxide film 21 is removed using a dilute HF solution or the like for the purpose of completely removing the SiNx residual film. For this reason, the film thickness of the pad oxide film 21 remaining on the p-type Si substrate 1 is, for example, about 35 nm.
[0047]
Next, in the step shown in FIG. 2A, the remaining pad oxide film 21 is used as a cap oxide film for subsequent ion implantation, and ions are implanted to form the p-type well 2a. At this time, for example, B (boron) is used as the impurity, and the dose amount is, for example, 1 × 10.¹³cm^-2And Similarly, ion implantation for forming the n-type well 2b is also performed.
[0048]
Subsequently, in the step shown in FIG.₂By performing heat treatment at 1000 ° C. or higher in an atmosphere, the above impurities are thermally diffused so as to have a desired well concentration and depth. Also in this case, the pad oxide film 21 is utilized as a cap film for preventing out diffusion. Thereby, the p-type well 2a and the n-type well 2b are formed.
[0049]
2C, the first layer P (phosphorus) for the capacitor lower electrode is formed on the surface of the semiconductor substrate 3 including the pad oxide film 21, in other words, on the pad oxide film 21 and STI4. ) -Doped Poly-Si film 26 is deposited. Subsequently, an ONO film 27 serving as a dielectric film in the capacitor is deposited on the Poly-Si film 26.
[0050]
  In the process shown in FIG. 3A, a resist 28 is deposited on the ONO film 27, and the resist 28 is patterned by a photolithography process and an etching process. Using the patterned resist 28 as a mask, only the portion that becomes the capacitor lower electrodeTo leaveEtching is performed by Si dry etching. Thereby, the lower electrode 13 and the dielectric film 14 are formed.
[0051]
The remaining film of the pad oxide film 21 is used as a stopper film for preventing the Si substrate from being etched by mistake at the location where the first-layer Poly-Si film is removed. At this time, the thickness of the pad oxide film 21 is, for example, about 10 nm.
[0052]
In the step shown in FIG. 3B, the pad oxide film 21 is selectively removed with a BHF solution using the resist 28 used in the previous first-layer Poly-Si dry etching as a mask. Thereafter, the resist 28 is peeled off.
[0053]
In the step shown in FIG. 4A, an oxide film 29 for a gate oxide film is formed on the element formation scheduled region by about 8.5 nm by wet oxidation. Simultaneously with the formation of the oxide film 29, the oxide film 16 as a protective film is formed on the side wall of the lower electrode 13 on the STI 4. At this time, the oxide film 29 for the gate oxide film is formed by wet oxidation in order to reduce the thickness of the gate oxide film and to make a high-quality film.
[0054]
Thereafter, ion implantation for arbitrary channel concentration adjustment is performed in the surface layer portion of the semiconductor substrate 3. A poly-Si film doped with P (phosphorus) to be the gate electrode and the upper electrode of the capacitor is deposited. Through the photolithography process and the etching process, the second-layer Poly-Si film is etched so as to form a desired electrode. As a result, the gate electrode 6 is formed in the element formation scheduled region, and the upper electrode 15 is formed on the dielectric film 14 on the STI 4.
[0055]
    Next, in the process shown in FIG.10nmAn oxide film 30 for the protective film of the gate electrode 6 is formed. At the same time, an oxide film 32 is formed on the surface including the side wall of the upper electrode 15 on the STI 4. The reason why the protective oxide film 30 for the gate electrode 6 is formed by wet oxidation is to form a thin film with good film quality and to suppress an increase in gate bird's beak. Subsequently, a desired LDD (Lightly Doped Drain) layer is formed.
[0056]
In the step shown in FIG. 4C, the sidewalls 9, 19, and 20 are formed by depositing an oxide film on the entire surface by CVD and performing etch back on the entire surface. At this time, in the element formation scheduled region, the oxide film 29 is selectively removed, the gate oxide film 5 is formed, and the oxide film 30 on the surface of the gate electrode 6 becomes the gate protective film 7. On the STI 4, the oxide film 32 on the side wall of the upper electrode 15 becomes the oxide film 17.
[0057]
Next, an oxide film 10 for ion implantation for forming the source / drain is deposited on both sides of the gate oxide film 5 on the surface of the element formation planned region. Thereafter, ion implantation is performed for each P.⁺Type, N⁺The mold is injected separately by a photolithography process. And N₂Heat treatment is performed in an atmosphere to activate the impurities. Thereby, source / drain regions including the source region 11 and the drain region 12 are formed.
[0058]
Thereafter, although not shown in the drawing, the semiconductor device shown in FIG. 1 is formed by performing general salicide formation, interlayer film formation, and wiring formation.
[0059]
In this embodiment, the remaining film of the pad oxide film 21 used at the time of forming the STI is used as a cap oxide film for ion implantation for well formation, a cap oxide film for suppressing out diffusion, and an etching stopper film for the Poly-Si film 26. It is used as
[0060]
Thereby, the process of performing wet oxidation after formation of STI4 can be reduced. As a result, a cap oxide film for ion implantation for well formation, a cap oxide film for suppressing out-diffusion, and an etching stopper film for the Poly-Si film 26 are respectively compared with a method for manufacturing a semiconductor device by a wet oxidation method. Thus, volume expansion due to wet oxidation of STI4 can be suppressed.
[0061]
In this embodiment, wet oxidation is performed only in the gate oxide film forming step and the gate electrode protective oxide film forming step in the manufacturing process after the STI formation. The thickness of the formed oxide film is 10 nm or less in the gate oxide film forming process, and is about 10 nm in the protective oxide film forming process of the gate electrode. Therefore, in this embodiment, when these oxide film thicknesses are added together, the total film thickness is less than about 20 nm.
[0062]
Here, FIG. 5 shows the relationship between the thickness of the wet oxide film after STI formation and the incidence of crystal defects. This is an experimental result when the STI is formed as in the manufacturing process in the present embodiment, that is, a result when the heat treatment for high density of the buried oxide film is performed at 1100 ° C. or higher. . The film thickness of the wet oxide film indicates the total value of the film thicknesses of the oxide films formed by wet oxidation in the step after the STI formation.
[0063]
From this result, when the STI 4 is formed under the above-described conditions, the total thickness of the wet oxide film is about 25 nm or less even if stress is generated due to the difference in thermal expansion coefficient between the Si substrate and the buried oxide film. If so, it can be said that no crystal defects occur. As can be seen from this result, according to the manufacturing method of the present embodiment, the occurrence of crystal defects can be suppressed. Therefore, problems such as junction leakage can be avoided.
[0064]
Further, as a method for suppressing the occurrence of junction leakage, Japanese Patent No. 2935696 proposes a method for reducing the stress generated by the difference in thermal expansion coefficient between the Si substrate and the buried oxide film. This is a method of stacking buried oxide films by two kinds of manufacturing methods or forming a buried oxide film by using an HDP (High Density Plasma) method. However, in both cases, dedicated equipment is required, which increases process costs.
[0065]
On the other hand, in this embodiment, since the existing equipment can be used, the process cost does not increase, and the semiconductor device can be manufactured at a low cost.
[0066]
As another method for suppressing the occurrence of junction leakage, a process for performing wet oxidation is used in the conventional manufacturing process.₂A method that replaces thermal oxidation in an atmosphere, so-called dry oxidation, can be considered. Specifically, a cap oxide film forming process for ion implantation for well formation after STI formation, an out diffusion suppressing cap oxide film forming process used for thermal diffusion for well formation, Poly-Si In this method, dry oxidation is performed instead of wet oxidation in the step of forming the stopper film during film etching.
[0067]
Due to the difference in thermal expansion coefficient between the Si substrate and the buried oxide film, stress is accumulated in the vicinity of the trench in the Si substrate. In dry oxidation, oxidation proceeds in a diffusion-controlled process. For these reasons, when an oxide film is formed on the Si substrate by dry oxidation, the growth rate of the oxide film is slowed by this stress in the vicinity of the trench in the Si substrate. For this reason, the film thickness of the oxide film becomes thin in the vicinity of the trench, and an oxide film having a uniform film thickness cannot be obtained on the substrate.
[0068]
In particular, when the stopper film at the time of etching the Poly-Si film is formed by dry oxidation, as described above, since the film thickness of the stopper film is not uniform, the Si substrate is etched at the time of etching the Poly-Si film. . As a result, the Si substrate becomes uneven, and the oxide film breakdown voltage decreases. For these reasons, a method of forming an oxide film by dry oxidation is not preferable.
[0069]
In contrast, in this embodiment, a pad oxide film formed by wet oxidation is used as a cap oxide film for ion implantation for well formation, and cap oxidation for out-diffusion suppression used in thermal diffusion for well formation. It is used as a stopper film during etching of the film and the Poly-Si film.
[0070]
Since the pad oxide film is formed by wet oxidation, the film thickness is uniform. Since this pad oxide film is used as the three films described above, it is possible to prevent the Si substrate from being etched when the Poly-Si film is etched.
[0071]
If wet oxidation is performed after STI formation, stress is generated in the Si substrate due to volume expansion of the buried oxide film. In this embodiment, wet oxidation is performed when the pad oxide film is formed before STI formation. Thus, the volume expansion of the buried oxide film does not occur and the generation of crystal defects can be suppressed. Therefore, according to the present embodiment, it is possible to achieve both device formation and suppression of generation of crystal defects.
[0072]
Further, the pad oxide film 21 removal step shown in FIG. 8A, the ion implantation cap oxide film removal step for well formation shown in FIG. 8C, and the out diffusion suppression shown in FIG. 9B. In the method of manufacturing a semiconductor device having the step of removing the cap oxide film, the surface of the buried oxide film 4 is also etched, and the surface recedes. 8A to FIG. 10B, the alternate long and short dash line indicates the buried oxide film in this embodiment for comparison.
[0073]
As shown in FIG. 10B, in the buried oxide film 4, the buried oxide film 4 is locally removed on the end portion side of the trench 23, and a dent 41 is generated in the buried oxide film 4. This recess 41 in the buried oxide film 4 causes a hump (becomes a shape with a protruding characteristic curve) in the subthreshold characteristics of the transistor.
[0074]
On the other hand, in the present embodiment, the remaining film of the pad oxide film 21 is formed by using a cap oxide film for ion implantation for well formation, a cap oxide film for suppressing out-diffusion, and a stopper film during etching of the Poly-Si film. It is used as As a result, the ion implantation cap oxide film removal step for well formation, the out diffusion suppression cap oxide film removal step, and the stopper film removal step can be reduced.
[0075]
For this reason, the amount of recession due to the etching of the buried oxide film 4 can be reduced, and the occurrence of local depression of the buried oxide film 4 on the end side of the trench 23 can be suppressed.
[0076]
Heretofore, the semiconductor device manufacturing process including the step of performing ion implantation after forming the STI and the step of etching the Poly-Si film has been described as an example, but the step of performing ion implantation, Of the processes for etching the Poly-Si film, in the manufacturing process of the semiconductor device without the process for etching the Poly-Si film, after the trench 23 is formed, the remaining film of the pad oxide film 21 is ionized for forming the well. What is necessary is just to use as a cap oxide film for injection | pouring, and a cap oxide film for out-diffusion suppression.
[0077]
This also can reduce the step of performing wet oxidation after the STI formation. In the manufacturing process after the STI formation, wet oxidation is performed only in the gate oxide film forming process and the gate electrode protective oxide film forming process, and the total thickness of these oxide films is more than about 20 nm. Can be small. As a result, generation of crystal defects can be suppressed.
[0078]
  On the contrary, in the manufacturing process of the semiconductor device without the ion implantation process among the process of ion implantation and the process of etching the Poly-Si film, the pad oxide film is formed after the trench is formed.2The remaining film 1 may be used only as a stopper film when the Poly-Si film is etched. This also has the same effect as described above.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a semiconductor device formed by a manufacturing method according to a first embodiment of the present invention.
FIG. 2 is a diagram showing a manufacturing process of the semiconductor device in the first embodiment of the present invention.
FIG. 3 is a diagram illustrating the manufacturing process of the semiconductor device, following FIG. 2;
FIG. 4 is a diagram illustrating the manufacturing process of the semiconductor device, following FIG. 3;
FIG. 5 is a diagram showing the relationship between the amount of wet oxidation after STI formation and the incidence of crystal defects.
FIG. 6 is a diagram showing a conventional manufacturing process of a semiconductor device.
7 is a view showing the conventional manufacturing process of the semiconductor device following FIG. 6; FIG.
FIG. 8 is a diagram showing a conventional semiconductor device manufacturing process following FIG. 7;
FIG. 9 is a diagram illustrating the conventional manufacturing steps of the semiconductor device following FIG. 8;
FIG. 10 is a diagram showing the conventional manufacturing process of the semiconductor device following FIG. 9;
[Explanation of symbols]
1 ... p-type Si substrate, 2 ... well region, 2a ... p-type well, 3 ... semiconductor substrate,
4 ... STI, 5 ... gate oxide film, 6 ... gate electrode, 7 ... gate protective film,
8, 16, 17, 18 ... oxide film, 9, 19, 20 ... sidewall,
11 ... Source region, 12 ... Drain region, 13 ... Lower electrode, 14 ... Dielectric film,
15 ... Upper electrode, 21 ... Pad oxide film, 22 ... SiNx film, 23 ... Trench,
24 ... Sacrificial oxide film, 25 ... O_Three-TEOS film, 26 ... Poly-Si film.

Claims (4)

A step of sequentially forming a pad oxide film (21) and a nitride film (22) on the semiconductor substrate (1);
In the semiconductor substrate (1), the pad oxide film (21) and the nitride film (22) are removed in a region where STI is to be formed, and a trench (23) is formed in the semiconductor substrate (1). Process,
Burying an oxide film (25) in the trench (23);
Forming the STI (4) by densifying the oxide film (25) by heat treatment;
After forming the STI (4), removing the nitride film (22) and leaving the pad oxide film (21);
Using the remaining pad oxide film (21) as a channeling suppression cap film , impurities are ion-implanted into the element formation planned region of the semiconductor substrate (1), and the pad oxide film (21) is out-diffused. A step of forming an impurity diffusion region (2) in the element formation scheduled region by diffusing the impurity using as a cap film for inhibition ;
Forming an oxide film (5, 7) on the semiconductor substrate (1) by wet oxidation after forming the impurity diffusion region (2);
In the step of forming the STI (4) by densifying the oxide film (25) by the heat treatment, the heat treatment is performed at a temperature of 1100 ° C. or higher.
In the step of forming the oxide films (5, 7) by the wet oxidation method, the oxide film is formed so that the total thickness of the oxide films (5, 7) is 25 nm or less. Device manufacturing method. A step of sequentially forming a pad oxide film (21) and a nitride film (22) on the semiconductor substrate (1);
In the semiconductor substrate (1), the pad oxide film (21) and the nitride film (22) are removed in a region where STI is to be formed, and a trench (23) is formed in the semiconductor substrate (1). And a process of
Burying an oxide film (25) in the trench (23);
Forming the STI (4) by densifying the oxide film (25) by heat treatment;
After forming the STI (4), removing the nitride film (22) and leaving the pad oxide film (21);
After leaving the pad oxide film (21), a Poly-Si film (26) is deposited on the semiconductor substrate (1), and the Poly-Si film (26) is formed using the pad oxide film (21) as a stopper film. ) Etching,
A step of forming an oxide film (5, 7) on the semiconductor substrate (1) by a wet oxidation method after etching the Poly-Si film (26);
In the step of forming the STI (4) by densifying the oxide film (25) by the heat treatment, the heat treatment is performed at a temperature of 1100 ° C. or higher.
In the step of forming the oxide films (5, 7) by the wet oxidation method, the oxide film is formed so that the total thickness of the oxide films (5, 7) is 25 nm or less. Device manufacturing method. A step of sequentially forming a pad oxide film (21) and a nitride film (22) on the semiconductor substrate (1);
In the semiconductor substrate (1), the pad oxide film (21) and the nitride film (22) are removed in a region where STI is to be formed, and a trench (23) is formed in the semiconductor substrate (1). Process,
Burying an oxide film (25) in the trench (23);
Forming the STI (4) by densifying the oxide film (25) by heat treatment;
After forming the STI (4), removing the nitride film (22) and leaving the pad oxide film (21);
Using the remaining pad oxide film (21) as a channeling suppression cap film , impurities are ion-implanted into the element formation planned region of the semiconductor substrate (1), and the pad oxide film (21) is out-diffused. A step of forming an impurity diffusion region (2) in the element formation scheduled region by diffusing the impurity using as a cap film for inhibition ;
After forming the impurity diffusion region (2) , a Poly-Si film (26) is deposited on the semiconductor substrate (1), and the Poly-Si film (26) is formed using the pad oxide film (21) as a stopper film. ) Etching ,
A step of forming an oxide film (5, 7) on the semiconductor substrate (1) by a wet oxidation method after etching the Poly-Si film (26);
In the step of forming the STI (4) by densifying the oxide film (25) by the heat treatment, the heat treatment is performed at a temperature of 1100 ° C. or higher.
In the step of forming the oxide films (5, 7) by the wet oxidation method, the oxide film is formed so that the total thickness of the oxide films (5, 7) is 25 nm or less. Device manufacturing method. The step of forming an oxide film by the wet oxidation method includes the step of removing the pad oxide film (21) and forming a gate oxide film (5) in the device formation scheduled region, and the gate oxide film (5). ) forming a gate electrode (6) on, on the surface of the gate electrode (6), any one of claims 1 to 3, characterized in that a step of forming a protective oxide film (7) 1 The manufacturing method of the semiconductor device as described in one.

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