JP4159213B2 - Flip chip mounting method - Google Patents

Flip chip mounting method Download PDF

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Publication number
JP4159213B2
JP4159213B2 JP32670599A JP32670599A JP4159213B2 JP 4159213 B2 JP4159213 B2 JP 4159213B2 JP 32670599 A JP32670599 A JP 32670599A JP 32670599 A JP32670599 A JP 32670599A JP 4159213 B2 JP4159213 B2 JP 4159213B2
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JP
Japan
Prior art keywords
flip chip
gold
substrate
bump
mounting method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP32670599A
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Japanese (ja)
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JP2001144143A (en
Inventor
一男 内山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Avionics Co Ltd
Original Assignee
Nippon Avionics Co Ltd
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Filing date
Publication date
Application filed by Nippon Avionics Co Ltd filed Critical Nippon Avionics Co Ltd
Priority to JP32670599A priority Critical patent/JP4159213B2/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134Stud bumping, i.e. using a wire-bonding apparatus

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  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)

Description

【0001】
【発明の属する技術分野】
本発明はフリップチップ実装方法に係り、Au−Au接続による実装に関するものである。
【0002】
【従来の技術】
近年の電子機器は、高性能化あるいは小型軽量化を図ることで新たな需要を喚起する傾向が強くなっていて、それに伴ない電子部品の形状、部品を搭載する基板およびその実装方法はお互いに要求を満たすべく大きく変化している。フリップチップ実装もその流れに沿ったものであり、また、チップの電極間ピッチもますます狭くなっている。こうした状況下で、はんだを使用せず狭ピッチ実装が可能なAu−Au接続による実装が定着してきた。
【0003】
フリップチップを基板上にAu−Au接続により実装する場合の一般的な方法を図3(a)に示す。フリップチップ1の電極2に金バンプ3を形成し、該バンプ高さを揃えるためのレベリングを行ない、基板4のパッド列内周に絶縁ペースト7をディスペンサなどで多点塗布し、基板の金めっきパッド5上に前記フリップチップ1の金バンプ3を一定時間押圧加熱し、前記絶縁ペースト7の冷却にともなう収縮硬化で金バンプ3と金めっきパッド5が互いに押圧されることで電気的接続を図るものである。
【0004】
【発明が解決しようとする課題】
しかしながら、前記実装方法は、基板の仕上がりとフリップチップの金バンプの仕上がりが理想的な場合は問題ないが、実際には基板の反りや金バンプ高さのバラツキがあるため、図3(b)のように接続不良11が発生する可能性があり、接続信頼性が損なわれるという問題があった。
本発明は、上記課題を解決するためになされたもので、基板に反りがあっても、フリップチップの金バンプ高さが不揃いでも、安定した接続を保証するフリップチップ実装方法を提供することを目的とする。
【0005】
【課題を解決するための手段】
請求項1のフリップチップ実装方法は、フリップチップ電極に金バンプを形成し、基板上に絶縁ペーストをディスペンスし、前記フリップチップを基板パッド上に加熱加圧するフリップチップ実装方法であって、次の工程からなり、互いのバンプを変形して接触面を増加することを特徴とする。
a)前記基板パッド上にワイヤバンピング法により金バンプを形成する工程
b)前記工程で形成された金バンプの中央部に凹部を形成する工程
c)前記フリップチップ電極にワイヤバンピング法により金バンプを形成する工程
d)前記基板パッドの内周に前記絶縁ペーストをディスペンスする工程
e)前記フリップチップを前記基板パッドに位置合わせし、加圧加熱する工程
【0006】
請求項1のフリップチップ実装方法によれば、フリップチップ電極上に形成した金バンプがその高さの均一性を欠いても、基板パッド上の中央部に凹みのある金バンプに、先端の尖ったフリップチップ電極上の金バンプを押し付けるので、互いのバンプは変形して接触面を増加させるから、全端子の確実な電気的接続を図ることができる。
【0007】
【発明の実施の形態】
図1は本発明の一実施形態を示す側面模式図で、図1(a)は接続前の形状を、図1(b)は接続後の形状を示す。1はフリップチップ、2はフリップチップ1の電極、3は該電極2に形成した金バンプ、4は基板、5は基板4上に前記フリップチップ1の電極2に対応する位置に形成したパッドで金めっきを施したもの、6は該パッド5にバンピングし中央部をツールにより凹ませた金バンプ、7は絶縁ペーストを示す。
【0008】
フリップチップ電極2の直径および基板パッド5の直径を100μmとした場合の実装方法の実施例を図2により説明する。図2(a)で、0.3μm厚の金めっきを施した基板4のパッド5上に、φ25μmの金ワイヤを用いてワイヤバンピング法により金バンプ6を形成し、レベリングツール8で金バンプ6先端を平坦化し、図2(b)で示すように、前記平坦化した金バンプ6を更に先端径36μmの針状ツール9を用いて約80gで加圧し、凹状の窪みを形成する。
次いで、図2(c)に示すように、フリップチップの電極2にφ25μmの金ワイヤを用いてワイヤバンピング法により金バンプ3を形成し、図2(d)のように、基板4のパッド列10の内周に絶縁ペースト7をディスペンス方式により5点塗布し、図2(e)のフリップチップのバンプ3と基板のパッド5を位置合わせし、図では省略するが、フリップチップボンダーにてバンプ1個あたり70gの加圧状態で250℃15秒間加熱する。
【0009】
基板パッド上の中央部に凹みのある金バンプ6に、先端の尖ったフリップチップ電極上の金バンプ3を押し付けるので、互いのバンプは変形して接触面を増加させる。更に、絶縁ペースト7が収縮しながら硬化することで、前記バンプ同志は押し合った状態で固定され、電気的に良好な接触を得る。
上記の実例数値は一例であり、電極寸法やバンプ形成用金ワイヤ径などの条件の違いにより最適値を選定する。
【0010】
【発明の効果】
本発明によれば、フリップチップ電極側と基板パッド側の両方に金バンプが形成され、更に、該金バンプ形状はフリップチップ電極側が凸状、基板パッド側が凹状であるため、基板の反りや金バンプ高さのバラツキがあっても両金バンプ双方を押圧した際の接触面積が広く電気的物理的接続が確実で、信頼性の高いフリップチップ実装を可能にする。
【図面の簡単な説明】
【図1】図1は本発明の一実施形態を示す側面模式図である。
(a)は接続前の形状
(b)は接続後の形状
【図2】図2は本発明による実装方法の実施例である。
(a)は基板のパッド上に金バンプを形成し、レベリングで先端を平坦化
(b)は基板のパッド上の金バンプに凹状の窪みを形成
(c)はフリップチップの電極上に金バンプを形成
(d)はパッド列の内周に絶縁ペースト塗布
(e)フリップチップのバンプを基板のパッドに位置合わせし、加圧加熱
【図3】図3は従来方法のAu−Au接続によるフリップチップ実装を示す側面模式図である。
(a)は正常な接続状態
(b)は接続不良の状態
【符号の説明】
1 フリップチップ
2 フリップチップの電極
3 フリップチップの電極に形成した金バンプ
4 基板
5 基板のパッド(金めっき)
6 基板のパッドにバンピングし、中央部をツールにより凹ませた金バンプ
7 絶縁ペースト
8 レベリングツール
9 針状ツール
10 パッド列
11 接続不良
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a flip chip mounting method and relates to mounting by Au-Au connection.
[0002]
[Prior art]
In recent years, electronic devices have become more prone to attract new demand by improving performance or reducing size and weight, and the shape of electronic components, the board on which the components are mounted, and the mounting method are mutually related. It has changed greatly to meet the requirements. Flip chip mounting is in line with this trend, and the pitch between the electrodes of the chip is becoming increasingly narrow. Under such circumstances, mounting by Au-Au connection capable of narrow pitch mounting without using solder has been established.
[0003]
FIG. 3A shows a general method for mounting the flip chip on the substrate by Au—Au connection. Gold bumps 3 are formed on the electrodes 2 of the flip chip 1, leveling is performed to align the bump heights, and an insulating paste 7 is applied to the inner periphery of the pad row of the substrate 4 with a dispenser, etc. The gold bumps 3 of the flip chip 1 are pressed and heated on the pads 5 for a predetermined time, and the gold bumps 3 and the gold plating pads 5 are pressed against each other by shrinkage hardening accompanying cooling of the insulating paste 7 to achieve electrical connection. Is.
[0004]
[Problems to be solved by the invention]
However, the mounting method has no problem when the finish of the substrate and the finish of the gold bumps of the flip chip are ideal, but in reality, there are variations in the warp of the substrate and the height of the gold bumps, so FIG. Thus, there is a possibility that the connection failure 11 may occur, and there is a problem that connection reliability is impaired.
The present invention has been made to solve the above problems, and provides a flip chip mounting method that ensures stable connection even if the substrate is warped or the flip chip gold bump height is uneven. Objective.
[0005]
[Means for Solving the Problems]
The flip chip mounting method according to claim 1 is a flip chip mounting method in which a gold bump is formed on a flip chip electrode, an insulating paste is dispensed on a substrate, and the flip chip is heated and pressed on a substrate pad . It consists of a process and is characterized in that the contact surface is increased by deforming each bump .
a) forming a gold bump on the substrate pad by a wire bumping method
b) A step of forming a recess in the central portion of the gold bump formed in the above step.
c) Forming gold bumps on the flip chip electrode by wire bumping
d) Dispensing the insulating paste on the inner periphery of the substrate pad
e) aligning the flip chip with the substrate pad and heating under pressure;
According to the flip chip mounting method of the first aspect, even if the gold bump formed on the flip chip electrode lacks the uniformity of the height , the tip of the gold bump having a dent in the central portion on the substrate pad is sharpened. Further, since the gold bumps on the flip-chip electrode are pressed, the bumps are deformed to increase the contact surface, so that reliable electrical connection of all terminals can be achieved.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a schematic side view showing an embodiment of the present invention. FIG. 1 (a) shows a shape before connection, and FIG. 1 (b) shows a shape after connection. 1 is a flip chip, 2 is an electrode of the flip chip 1, 3 is a gold bump formed on the electrode 2, 4 is a substrate, and 5 is a pad formed on the substrate 4 at a position corresponding to the electrode 2 of the flip chip 1. Gold-plated, 6 is a gold bump bumped on the pad 5 and the center is recessed by a tool, and 7 is an insulating paste.
[0008]
An embodiment of the mounting method when the diameter of the flip chip electrode 2 and the diameter of the substrate pad 5 are set to 100 μm will be described with reference to FIG. In FIG. 2A, a gold bump 6 is formed on a pad 5 of a substrate 4 plated with gold having a thickness of 0.3 μm by a wire bumping method using a gold wire with a diameter of 25 μm. The tip is flattened, and as shown in FIG. 2B, the flattened gold bump 6 is further pressurized at about 80 g using a needle-like tool 9 having a tip diameter of 36 μm to form a concave depression.
Next, as shown in FIG. 2 (c), gold bumps 3 are formed on the flip-chip electrodes 2 by a wire bumping method using a gold wire with a diameter of 25 .mu.m, and as shown in FIG. Insulation paste 7 is applied to the inner periphery of the substrate 10 by a dispensing method, and the flip chip bumps 3 and the substrate pads 5 in FIG. 2 (e) are aligned. Heat at a pressure of 70 g per piece for 15 seconds at 250 ° C.
[0009]
Since the gold bump 3 on the flip chip electrode having a sharp tip is pressed against the gold bump 6 having a recess in the center on the substrate pad, the bumps are deformed to increase the contact surface. Further, the insulating paste 7 is cured while shrinking, so that the bumps are fixed in a pressed state, and an excellent electrical contact is obtained.
The above actual numerical values are only examples, and optimum values are selected according to differences in conditions such as electrode dimensions and bump forming gold wire diameters.
[0010]
【The invention's effect】
According to the present invention, gold bumps are formed on both the flip chip electrode side and the substrate pad side, and further, the gold bump shape is convex on the flip chip electrode side and concave on the substrate pad side. Even if there is variation in bump height, the contact area when both gold bumps are pressed is large, and the electrical and physical connection is reliable, enabling highly reliable flip chip mounting.
[Brief description of the drawings]
FIG. 1 is a schematic side view showing an embodiment of the present invention.
(A) Shape before connection (b) Shape after connection [FIG. 2] FIG. 2 shows an embodiment of the mounting method according to the present invention.
(A) Gold bumps are formed on a substrate pad, and the tip is flattened by leveling. (B) A concave depression is formed in the gold bump on the substrate pad. (C) Gold bump is formed on the flip chip electrode. (D) Insulation paste is applied to the inner periphery of the pad row (e) The bumps of the flip chip are aligned with the pads of the substrate and heated under pressure. It is a side surface schematic diagram which shows chip mounting.
(A) Normal connection state (b) Bad connection state [Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Flip chip 2 Flip chip electrode 3 Gold bump formed on flip chip electrode 4 Substrate 5 Substrate pad (gold plating)
6 Gold bump bumped on the pad of the board and recessed in the center with a tool 7 Insulating paste 8 Leveling tool 9 Needle-shaped tool 10 Pad row 11 Connection failure

Claims (1)

フリップチップ電極に金バンプを形成し、基板上に絶縁ペーストをディスペンスし、前記フリップチップを基板パッド上に加熱加圧するフリップチップ実装方法であって、次の工程からなり、互いのバンプを変形して接触面を増加することを特徴とするフリップチップ実装方法。
a)前記基板パッド上にワイヤバンピング法により金バンプを形成する工程
b)前記工程で形成された金バンプの中央部に凹部を形成する工程
c)前記フリップチップ電極にワイヤバンピング法により金バンプを形成する工程
d)前記基板パッドの内周に前記絶縁ペーストをディスペンスする工程
e)前記フリップチップを前記基板パッドに位置合わせし、加圧加熱する工程
A flip chip mounting method in which a gold bump is formed on a flip chip electrode, an insulating paste is dispensed on a substrate, and the flip chip is heated and pressed on a substrate pad. The flip chip mounting method includes the following steps, and each bump is deformed. And increasing the contact surface .
a) forming a gold bump on the substrate pad by a wire bumping method
b) A step of forming a recess in the central portion of the gold bump formed in the above step.
c) Forming gold bumps on the flip chip electrode by wire bumping
d) Dispensing the insulating paste on the inner periphery of the substrate pad
e) aligning the flip chip with the substrate pad and heating under pressure
JP32670599A 1999-11-17 1999-11-17 Flip chip mounting method Expired - Fee Related JP4159213B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32670599A JP4159213B2 (en) 1999-11-17 1999-11-17 Flip chip mounting method

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JP2001144143A JP2001144143A (en) 2001-05-25
JP4159213B2 true JP4159213B2 (en) 2008-10-01

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3549017B2 (en) 2000-07-21 2004-08-04 松下電器産業株式会社 Flip chip mounting method
JP2006156544A (en) * 2004-11-26 2006-06-15 Denso Corp Structure and method for packaging substrate
KR20090094698A (en) * 2008-03-03 2009-09-08 삼성전기주식회사 Manufacturing method of package board and manufacturing method of semiconductor package
JP2013098701A (en) * 2011-10-31 2013-05-20 Daishinku Corp Piezoelectric vibration device and manufacturing method of piezoelectric vibration device

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