JP4153355B2 - Photodetector - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor photodetector element.
[0002]
[Prior art]
Photodiodes, which are semiconductor photodetecting elements, are currently widely used in various applications. In order to increase the output and the response speed, photodiodes having various structures such as a PIN photodiode (PIN-PD) and an avalanche photodiode (APD) have been proposed (for example, see Patent Document 1). .
[0003]
For example, as a structure of a PIN photodiode, an N-type high resistivity semiconductor layer is epitaxially grown on an N-type low resistivity semiconductor substrate, and a P-type semiconductor layer is formed on the surface of the high resistivity epitaxial layer. Then, a reverse bias voltage is applied between the N-type semiconductor substrate on the cathode side and the P-type semiconductor layer on the anode side, and the high-resistivity epitaxial layer is used as a light absorption layer. can get.
[0004]
[Patent Document 1]
JP-A-4-242980
[Problems to be solved by the invention]
Here, in the PIN photodiode having the above-described structure, an epitaxial layer is used as the high specific resistance portion of the N-type semiconductor layer serving as the cathode. However, in such a structure, there is a limit of about 300 Ωcm for increasing the specific resistance of the high specific resistance semiconductor layer. For this reason, there exists a problem that the junction capacity | capacitance of a PN junction cannot fully be reduced. This is a factor that prevents the CR time constant from being sufficiently small and prevents the response speed from being increased.
[0006]
Further, N-type impurities rise from the N-type semiconductor substrate having a high impurity concentration to the epitaxial layer due to high-temperature heat treatment or the like during epitaxial growth. At this time, impurities rise in the epitaxial layer and the N-type impurity concentration increases, so that carriers generated in a region that is not depleted upon reverse bias application slowly reach the depletion layer by diffusion, and the response speed Is hindered.
[0007]
On the other hand, the photodiode described in Patent Document 1 uses a structure in which an N-type high resistivity semiconductor substrate is bonded onto an N-type low resistivity semiconductor substrate by a substrate bonding method. In this structure, by using a high resistivity semiconductor substrate as the high resistivity portion of the N-type semiconductor layer, for example, a high resistivity semiconductor layer of about 1000 Ωcm can be obtained.
[0008]
Such a structure can reduce the CR time constant by reducing the junction capacitance of the PN junction. Further, the rising of impurities from the low specific resistance semiconductor substrate to the high specific resistance semiconductor layer is suppressed. However, even in such a photodiode, as in the case of using an epitaxial layer, there is a problem that dark current increases when the reverse bias voltage applied to expand the depletion layer is increased.
[0009]
The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a photodetector that can increase the response speed and suppress an increase in dark current.
[0010]
[Means for Solving the Problems]
In order to achieve such an object, the photodetector according to the present invention includes (1) a first conductivity type first semiconductor substrate (low resistivity semiconductor substrate) and (2) a first semiconductor substrate having a plane orientation. And a second semiconductor substrate (high resistivity semiconductor substrate) having one surface bonded to the first semiconductor substrate, and (3) the other of the second semiconductor substrates. and a doped semiconductor layer of a second conductivity type provided in the surface side, the first semiconductor substrate and the second semiconductor substrate, one of Si (100) substrate, the other is Si (111) substrate der Rukoto It is characterized by.
[0011]
The inventor of the present application has studied the characteristics of a photodiode having a structure in which a low resistivity semiconductor substrate and a high resistivity semiconductor substrate are bonded together. As a result, in a conventional structure in which semiconductor substrates having the same plane orientation are bonded together, it has been found that unevenness occurs at the bonding interface of the semiconductor substrates, and the uneven shape at the interface affects the increase in dark current.
[0012]
On the other hand, according to the structure in which the low specific resistance semiconductor substrate and the high specific resistance semiconductor substrate having different plane orientations are bonded as described above, a bonded substrate having a good flatness at the bonded interface can be obtained. And by constructing a photodetecting element using such a bonded substrate, it is possible to increase the response speed and to suppress the increase in dark current when the reverse bias voltage is increased. A detection element is realized.
[0013]
Here, the thickness of the second semiconductor substrate is set such that the thickness from the bottom surface of the impurity semiconductor layer to the bottom surface of the second semiconductor substrate is equal to the width of the depletion layer that expands when a reverse bias voltage is applied. preferable. As a result, it is possible to suitably realize an increase in response speed in the light detection element.
[0014]
Further, the thickness of the second semiconductor substrate may be set so that the entire surface from the bottom surface of the impurity semiconductor layer to the bottom surface of the second semiconductor substrate is depleted by a depletion layer that expands when a reverse bias voltage is applied. Also by this, it is possible to suitably realize an increase in response speed in the light detection element.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, preferred embodiments of the light detection element according to the present invention will be described in detail with reference to the drawings. In the description of the drawings, the same elements are denoted by the same reference numerals, and redundant description is omitted. Further, the dimensional ratios in the drawings do not necessarily match those described.
[0016]
FIG. 1 is a side sectional view schematically showing a configuration of an embodiment of a semiconductor photodetector element according to the present invention. The photodetecting element 1 is a PIN photodiode that includes a first semiconductor substrate 10, a second semiconductor substrate 20, and an impurity semiconductor layer 30. Hereinafter, a case where silicon (Si) is used as the semiconductor material of the substrates 10 and 20 will be described.
[0017]
The first semiconductor substrate 10 is an N ⁺ type Si substrate having a plane orientation of (100), a conductivity type (first conductivity type) of N type, and a low specific resistance (high impurity concentration). On the other hand, the second semiconductor substrate 20 is an N ⁻ type Si substrate having a plane orientation different from that of the Si substrate (111), an N type conductivity type, and a high specific resistance (low impurity concentration). The N ⁻ type Si substrate 20 has a higher specific resistance than the N ⁺ type Si substrate 10. Further, the bottom surface 20b of the N ⁻ -type Si (111) substrate 20 is bonded to the surface 10a of the N ⁺ -type Si (100) substrate 10, thereby forming a Si bonded substrate composed of the Si substrates 10 and 20. Has been.
[0018]
Further, a semiconductor layer to which a predetermined impurity is added so that the conductivity type (second conductivity type) is P-type in a predetermined region on the surface 20a side opposite to the Si substrate 10 of the N ⁻ type Si substrate 20 30 is provided. In such a configuration, the N ⁻ type Si substrate 20 and the P type semiconductor layer 30 form a PN junction.
[0019]
This photodetecting element 1 has a high specific resistance at a low impurity concentration from the PN junction interface when a reverse bias voltage is applied between the N ⁺ type Si substrate 10 on the cathode side and the P type semiconductor layer 30 on the anode side. The depletion layer expands on the N ⁻ -type Si substrate 20 side, thereby functioning as a PIN photodiode. In FIG. 1, the anode and cathode electrodes are not shown.
[0020]
The effect of the light detection element according to the present embodiment will be described.
[0021]
In the photodetecting element 1 shown in FIG. 1, a structure in which the Si substrates 10 and 20 are bonded together by a substrate bonding method is used. Thereby, for example, a high specific resistance Si substrate 20 of about 1000 Ωcm (= 10 Ωm) and a low specific resistance Si substrate 10 of about 0.001 Ωcm can be used as each part of the N-type semiconductor layer. Such a structure can reduce the CR time constant by reducing the junction capacitance of the PN junction.
[0022]
Further, at the wafer bonding temperature of about 1100 ° C., the impurity rising from the low specific resistance semiconductor substrate to the high specific resistance semiconductor layer is suppressed to 1 μm or less, so that the impurity concentration profile can be kept steep. At this time, the impurity concentration profile in a region other than the depletion layer that spreads by the reverse bias voltage applied to the photodetection element becomes steep, so that the rising of the impurity is suppressed, so that the impurity concentration does not decrease. The lifetime of the carriers generated in (1) is shorter than that in the case where the impurities are soaring, and the contribution of such carriers to the photocurrent is suppressed. Accordingly, the impurities generated in the epitaxial layer, which hinders the increase in response speed, and the N-type impurity concentration increases, so that carriers generated in a region that is not depleted when reverse bias is applied flow slowly. The contribution of the diffusion current component is suppressed, and a photodetection element having excellent characteristics with a small time constant can be obtained.
[0023]
In particular, in the above-described photodetecting element 1, an Si bonded substrate obtained by bonding a low specific resistance Si substrate 10 and a high specific resistance Si substrate 20 having different plane orientations is used. According to such a structure, a bonded substrate with good flatness of the bonded interface S1 (see FIG. 1) of the Si substrates 10 and 20 can be obtained.
[0024]
FIG. 2 is a cross-sectional ion etching TEM photograph showing the bonding interface S1 of the Si substrate in the photodetecting element shown in FIG. FIG. 3 is a TEM photograph showing the bonding interface S2 of the Si substrate in the conventional photodetecting element (see Patent Document 1). Specifically, FIG. 2 shows the (111) (100) bonding interface S1 having different plane orientations as described above. On the other hand, FIG. 3 shows the (100) (100) bonding interface S2 having the same plane orientation.
[0025]
FIG. 4 is a graph showing the reverse bias voltage dependence of the dark current generated in the photodetecting element. In this graph, the horizontal axis represents the reverse bias voltage applied to the photodetecting element, and the vertical axis represents the amount of dark current generated. Graph G1 shows the dark current characteristics of the light detection element according to the present invention corresponding to FIG. 2, and graph G2 shows the dark current characteristics of the conventional light detection element corresponding to FIG.
[0026]
The characteristics shown in FIG. 4 are the characteristics of a photodetection element having a light receiving portion of 1 cm square, and the graph G1 shows an N ⁻ (111) Si substrate of about 4000 Ωcm and an N ⁺ (100) Si substrate of about 0.001 Ωcm. It is the characteristic of the element produced by bonding together. Graph G2 shows the characteristics of an element formed by bonding an N ⁻ (100) Si substrate of about 4000 Ωcm and an N ⁺ (100) Si substrate of about 0.001 Ωcm.
[0027]
As shown in FIG. 3, the light-detecting element having a conventional structure in which Si substrates having the same plane orientation are bonded has irregularities on the bonding interface S <b> 2. The uneven shape of the interface S2 affects the increase in dark current generated in the photodetecting element, and as shown in the graph G2 in FIG. 4, causes the dark current to increase as the reverse bias voltage increases.
[0028]
On the other hand, in the photodetector having the structure shown in FIG. 1 in which the Si substrates having different plane orientations are bonded, as shown in FIG. 2, the bonding interface S1 is not uneven, and the interface S1 is flat. The degree is greatly improved. At this time, as shown by a graph G1 in FIG. 4, even if the reverse bias voltage is increased, the dark current does not increase above a predetermined voltage. Therefore, by configuring the photodetecting element using the bonded substrate having the above-described configuration, a semiconductor photodetecting element in which the response speed can be increased and the increase in dark current is suppressed is realized.
[0029]
FIG. 5 is a graph showing reverse bias voltage dependence of dark current in the PIN photodiode shown in FIG. 1 using a Si (111) (100) bonded substrate. 6 to 8 are graphs showing the reverse bias voltage dependence of the dark current in the conventional PIN photodiode. Specifically, FIG. 6 shows dark current characteristics when a Si (100) diffusion substrate is used, and FIG. 7 shows dark current characteristics when a Si (111) (111) bonded substrate is used. FIG. 8 shows dark current characteristics when a Si (100) (100) bonded substrate is used. However, in the graphs of FIGS. 6 to 8, the basic structure of the photodiode is the same as that of the PIN photodiode in FIG. 5, but the area of the light receiving portion, the thickness of the high resistivity Si substrate, Specific resistance is not unified.
[0030]
In the PIN photodiode having the conventional structure, the dark current increases as the reverse bias voltage increases in any of the graphs shown in FIGS. On the other hand, in the graph of FIG. 5 showing the characteristics of the PIN photodiode having the structure shown in FIG. 1, when the reverse bias voltage is 5 V or more, the dark current does not increase even if the reverse bias voltage is increased. I understand. Thus, it is possible to suppress an increase in dark current by using a bonded substrate made of semiconductor substrates having different plane orientations.
[0031]
Here, as a bonding substrate constituting the light detecting element, using a low-resistivity N ⁺ type Si (100) substrate on the first semiconductor substrate 10 in FIG. 1, the high resistivity N ^- type Si (111 ) Although the configuration in which the substrate is used for the second semiconductor substrate 20 is shown, bonded substrates having various configurations other than this may be used. For example, the conductivity type of the first semiconductor substrate 10 may be P type. The conductivity type of the second semiconductor substrate 20 may be a conductivity type different from that of the first semiconductor substrate 10. Further, the plane orientations of the semiconductor substrates 10 and 20 are not limited to the above plane orientations as long as they are different from each other.
[0032]
In addition, in the bonding of the Si substrates 10 and 20 when manufacturing the photodetecting element shown in FIG. 1, if both the bonded surfaces 10a and 20b are flat, they are simply heated without applying pressure. Can be pasted together naturally. Further, for the N ⁻ type Si substrate 20 on which the P type semiconductor layer 30 is formed, the surface 20a side may be polished in order to obtain a desired thickness. In general, the structure using a high resistivity semiconductor substrate as the high resistivity portion of the N-type semiconductor layer is advantageous in that the thickness of the high resistivity semiconductor layer can be freely controlled.
[0033]
Further, the thickness of the N ⁻ -type Si substrate 20 as the second semiconductor substrate is the thickness from the bottom surface of the P-type semiconductor layer 30 formed on the surface 20a side to the bottom surface 20b of the N ⁻ -type Si substrate 20. The width is preferably set to be equal to the width of the depletion layer spread by the reverse bias voltage applied to the light detection element 1. As a result, it is possible to suitably realize an increase in response speed in the light detection element.
[0034]
Alternatively, with respect to the thickness of the N ⁻ type Si substrate 20 as the second semiconductor substrate, the light detecting element extends from the bottom surface of the P type semiconductor layer 30 formed on the surface 20a side to the bottom surface 20b of the N ⁻ type Si substrate 20. 1 may be set so that all are depleted by the depletion layer spreading by the reverse bias voltage applied to 1. Also by this, it is possible to suitably realize an increase in response speed in the light detection element.
[0035]
The configuration of the photodiode, which is the light detection element shown in FIG. 1, will be further described together with specific examples.
[0036]
FIG. 9 is a side sectional view showing the configuration of the first embodiment of the photodiode. The photodiode 1A according to the present embodiment is a PIN photodiode using an N / N ⁺ bonded substrate.
[0037]
The photodiode 1A includes an N ⁺ type Si (100) substrate 11 that is a low resistivity semiconductor substrate, an N type Si (111) substrate 21 that is a high resistivity semiconductor substrate bonded to the Si substrate 11, and an Si substrate. And a P ⁺ -type semiconductor layer 31 formed on the surface side of 21. Further, an N ⁺ type semiconductor layer 41 reaching a predetermined depth in the Si substrate 21 is provided at the peripheral edge surrounding the P ⁺ type semiconductor layer 31 on the surface side of the N type Si substrate 21. The N ⁺ -type semiconductor layer 41 is an impurity semiconductor layer serving as a guard ring in a single photodetecting element or a channel stopper in the photodetecting element array.
[0038]
An insulating layer 51 made of SiO ₂ is formed on the surface of the N-type Si substrate 21. The insulating layer 51 is provided with a through hole 51 a at a predetermined position facing the P ⁺ type semiconductor layer 31. On the insulating layer 51, an anode electrode 31a electrically connected to the P ⁺ type semiconductor layer 31 through the through hole 51a is formed. A cathode electrode 11 a electrically connected to the N ⁺ type Si substrate 11 is formed on the entire surface of the N ⁺ type Si substrate 11 opposite to the substrate 21. For these electrodes 11a and 31a, for example, a metal such as Al is used.
[0039]
As the N ⁺ -type Si substrate 11 having a low specific resistance, a CZ—Si (100) substrate with an As doping and a specific resistance of 0.001 to 0.004 Ωcm can be used. Alternatively, a CZ—Si (100) substrate having a specific resistance of 0.008 to 0.018 Ωcm by Sb doping can be used. Further, the thickness t of the N ⁺ -type Si substrate 11 can be arbitrarily set.
[0040]
As the high specific resistance N-type Si substrate 21, an FZ-Si (111) substrate having a specific resistance of 4000 to 8000 Ωcm by P doping can be used. Alternatively, the specific resistance may be 1000 Ωcm, 500 Ωcm, or the like. The thickness t of the N-type Si substrate 21 is set to a predetermined thickness such as t = 10 μm, 100 μm, 300 μm, 500 μm.
[0041]
FIG. 10 is a side sectional view showing the configuration of the second embodiment of the photodiode. The photodiode 1B according to the present embodiment is a PIN photodiode using a P / P ⁺ bonded substrate.
[0042]
The photodiode 1B includes a P ⁺ -type Si (100) substrate 12, a P-type Si (111) substrate 22 bonded onto the Si substrate 12, and an N ⁺ -type semiconductor layer 32 formed on the surface side of the Si substrate 22. With. In addition, a P ⁺ type semiconductor layer 42 that reaches a predetermined depth in the Si substrate 22 and functions as a guard ring or a channel stopper is formed at a peripheral portion surrounding the N ⁺ type semiconductor layer 32 on the surface side of the P type Si substrate 22. Is provided.
[0043]
An insulating layer 52 is formed on the surface of the P-type Si substrate 22. The insulating layer 52 is provided with a through hole 52 a at a predetermined position facing the N ⁺ type semiconductor layer 32. On the insulating layer 52, a cathode electrode 32a electrically connected to the N ⁺ type semiconductor layer 32 through the through hole 52a is formed. An anode electrode 12 a electrically connected to the P ⁺ -type Si substrate 12 is formed on the entire surface of the P ⁺ -type Si substrate 12 opposite to the substrate 22.
[0044]
As the P ⁺ -type Si substrate 12 having a low specific resistance, a CZ—Si (100) substrate having a specific resistance of 0.001 to 0.006 Ωcm by B doping can be used. Further, the thickness t of the P ⁺ -type Si substrate 12 is set to a thickness of about t = 315 μm, for example.
[0045]
As the P-type Si substrate 22 having a high specific resistance, an FZ-Si (111) substrate having a specific resistance of 1000 to 1500 Ωcm by B doping can be used. The thickness t of the P-type Si substrate 22 is set to a predetermined thickness such as t = 30 μm, 50 μm, 80 μm, 100 μm.
[0046]
FIG. 11 is a side sectional view showing the configuration of the third embodiment of the photodiode. The photodiode 1C according to the present embodiment is an avalanche photodiode using a P / N ⁺ bonded substrate.
[0047]
The photodiode 1 ^</ b ^> C includes an N ⁺ type Si (100) substrate 13, a P type Si (111) substrate 23 bonded to the Si substrate 13, and a P ⁺ type semiconductor layer 33 formed on the surface side of the Si substrate 23. With. Further, the peripheral portion surrounding the P ⁺ -type semiconductor layer 33 on the surface side of the P-type Si substrate 23 passes through the Si substrate 23 and reaches a predetermined depth in the Si substrate 13 and functions as a guard ring or a channel stopper. An N ⁺ type semiconductor layer 43 is provided.
[0048]
On the surface of the P-type Si substrate 23, an insulating layer 53 is formed. The insulating layer 53 is provided with a through hole 53 a at a predetermined position facing the P ⁺ type semiconductor layer 33. On the insulating layer 53, an anode electrode 33a electrically connected to the P ⁺ type semiconductor layer 33 through the through hole 53a is formed. A cathode electrode 13 a electrically connected to the N ⁺ -type Si substrate 13 is formed on the entire surface of the N ⁺ -type Si substrate 13 opposite to the substrate 23.
[0049]
FIG. 12 is a side sectional view showing the configuration of the fourth embodiment of the photodiode. The photodiode 1D according to the present embodiment is an avalanche photodiode using a P / P ⁺ bonded substrate.
[0050]
The photodiode 1D includes a P ⁺ type Si (100) substrate 14, a P type Si (111) substrate 24 bonded onto the Si substrate 14, and an N ⁺ type semiconductor layer 34 formed on the surface side of the Si substrate 24. And a P ⁺ type semiconductor layer 35 formed on the Si substrate 14 side of the N ⁺ type semiconductor layer 34. In addition, a P ⁺ type semiconductor layer 44 that reaches a predetermined depth in the Si substrate 24 and functions as a guard ring or a channel stopper is formed at a peripheral portion surrounding the N ⁺ type semiconductor layer 34 on the surface side of the P type Si substrate 24. Is provided.
[0051]
An insulating layer 54 is formed on the surface of the P-type Si substrate 24. The insulating layer 54 is provided with a through hole 54 a at a predetermined position facing the N ⁺ type semiconductor layer 34. On the insulating layer 54, a cathode electrode 34a electrically connected to the N ⁺ type semiconductor layer 34 through the through hole 54a is formed. An anode electrode 14 a electrically connected to the P ⁺ -type Si substrate 14 is formed on the entire surface of the P ⁺ -type Si substrate 14 opposite to the substrate 24.
[0052]
As a specific configuration of the semiconductor photodetecting element according to the present invention, for example, the configurations illustrated in FIGS. 9 to 12 can be used. In addition to these, various configurations are possible.
[0053]
【The invention's effect】
As described in detail above, the light detection element according to the present invention has the following effects. That is, according to the structure in which the first semiconductor substrate having a low specific resistance and the second semiconductor substrate having a high specific resistance whose surface orientation is different from that of the first semiconductor substrate are bonded, the flatness of the bonding interface of the semiconductor substrate is increased. A good bonded substrate can be obtained. And by constructing a photodetecting element using such a bonded substrate, it is possible to increase the response speed and to suppress the increase in dark current when the reverse bias voltage is increased. A detection element is realized.
[Brief description of the drawings]
FIG. 1 is a side sectional view schematically showing a configuration of an embodiment of a light detection element.
2 is a TEM photograph showing a bonding interface of a Si substrate in the photodetecting element shown in FIG.
FIG. 3 is a TEM photograph showing a bonding interface of a Si substrate in a conventional photodetecting element.
FIG. 4 is a graph showing the reverse bias voltage dependence of dark current generated in a photodetecting element.
FIG. 5 is a graph showing dark current characteristics in a photodetecting element using a Si (111) (100) bonded substrate.
FIG. 6 is a graph showing dark current characteristics in a photodetecting element using a Si (100) diffusion substrate.
FIG. 7 is a graph showing dark current characteristics in a light detection element using a Si (111) (111) bonded substrate.
FIG. 8 is a graph showing dark current characteristics in a photodetecting element using a Si (100) (100) bonded substrate.
FIG. 9 is a side sectional view showing the configuration of the first embodiment of the photodiode;
FIG. 10 is a side sectional view showing a configuration of a second embodiment of the photodiode.
FIG. 11 is a side sectional view showing a configuration of a third embodiment of the photodiode.
FIG. 12 is a side sectional view showing the configuration of a fourth embodiment of the photodiode.
[Explanation of symbols]
10 ... N ⁺ type low specific resistance Si (100) substrate, 20 ... N ^- type high specific resistance Si (111) substrate, 30 ... P type semiconductor layer, 11 ... N ⁺ type low specific resistance Si (100) substrate, 11a ... Cathode electrode, 21 ... N-type high resistivity Si (111) substrate, 31 ... P ⁺ type semiconductor layer, 31a ... Anode electrode, 41 ... N ⁺ type semiconductor layer, 51 ... Insulating layer, 51a ... Through hole, 12 ... P ⁺ type low specific resistance Si (100) substrate, 12a ... anode electrode, 22 ... P type high specific resistance Si (111) substrate, 32 ... N ⁺ type semiconductor layer, 32a ... cathode electrode, 42 ... P ⁺ type semiconductor layer 52 ... Insulating layer, 52a ... Through hole, 13 ... N ⁺ type low resistivity Si (100) substrate, 13a ... Cathode electrode, 23 ... P type high resistivity Si (111) substrate, 33 ... P ⁺ type semiconductor layer 33a ... anode electrode, 43 ... N ⁺ type semiconductor layer, 53 ... Insulating layer, 53a ... Through hole, 14 ... P ⁺ type low resistivity Si (100) substrate, 14a ... Anode electrode, 24 ... P type high resistivity Si (111) substrate, 34 ... N ⁺ type semiconductor layer, 34a ... Cathode electrode, 35 ... P ⁺ type semiconductor layer, 44 ... P ⁺ type semiconductor layer, 54 ... insulating layer, 54a ... through hole.

Claims (3)

A first semiconductor substrate of a first conductivity type;
A second semiconductor substrate having a plane orientation different from that of the first semiconductor substrate and having a specific resistance higher than that of the first semiconductor substrate, wherein one surface is bonded to the first semiconductor substrate;
An impurity semiconductor layer of a second conductivity type provided on the other surface side of the second semiconductor substrate ,
Said first semiconductor substrate and said second semiconductor substrate, the light-detecting element while the the Si (100) substrate, and the other, wherein the Si (111) substrate der Rukoto.   The thickness of the second semiconductor substrate is set so that the entire surface from the bottom surface of the impurity semiconductor layer to the bottom surface of the second semiconductor substrate is depleted by a depletion layer that expands when a reverse bias voltage is applied. The photodetecting element according to claim 1.   The thickness of the second semiconductor substrate is set so that the thickness from the bottom surface of the impurity semiconductor layer to the bottom surface of the second semiconductor substrate is equal to the width of the depletion layer that expands when a reverse bias voltage is applied. The photodetecting element according to claim 1 or 2, characterized in that

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