JP4143962B2 - Method for manufacturing bonded SOI substrate - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  This invention is bondedManufacturing method of SOI substrateSpecifically, an active layer wafer and a support substrate wafer that supports the active layer wafer from the back side are bonded together through a buried oxide film, and the active layer wafer is reduced to a predetermined thickness to form an SOI layer. Bonded SOISubstrate manufacturing methodAbout.
[0002]
[Prior art]
  A bonded SOI (Silicon on Insulator) substrate is known as a kind of bonded substrate formed by bonding two silicon wafers. This is because a buried oxide film (silicon oxide film) having a thickness of several μm is buried between an SOI layer (active layer) on which a device is formed on the surface and a support substrate wafer that supports the device from the back side. This is a bonded SOI substrate.
[0003]
  Referring to FIGS. 4 to 5, a high concentration of n in the n-type SOI layer⁺A conventional method for manufacturing a bonded SOI substrate in which a layer is formed by ion implantation will be described. FIG. 4 is a flow sheet showing a method for manufacturing a bonded SOI substrate according to conventional means. FIG. 5 is a graph showing a boron concentration profile of a bonded SOI substrate after device heat treatment according to the conventional means.
  First, an n-type single crystal silicon ingot containing arsenic (As) or antimony (Sb) pulled up by the CZ method was sliced, chamfered, polished (100), and mirror-finished with a specific resistance of 3 Ωcm 2 N-type silicon wafers 101 and 102 are prepared (FIG. 4A). Among these, an insulating silicon oxide film 102a having a thickness of about 1 μm is formed on the entire exposed surface of the support substrate wafer 102 by a thermal oxidation process using a thermal oxidation furnace. On the other hand, n-type dopant is ion-implanted into the active layer wafer 101 from the surface on the bonding side. Specifically, arsenic or antimony is, for example, 2 × 10 2 at an implantation energy of 80 KeV over substantially the entire surface on the bonding side of the n-type active layer wafer 101.¹⁵atoms / cm²As a result, a thin ion-implanted layer I is formed.
[0004]
  Next, the active layer wafer 101 and the support substrate wafer 102 are washed, the bonded surfaces are cleaned, and the bonded wafers 103 are manufactured by superimposing them at room temperature. As a result, a buried oxide film 102b appears between the two wafers 101 and 102. Thereafter, the bonded wafer 103 is subjected to a bonding heat treatment at a heating temperature of 800 ° C. or more (FIG. 4B). As a result, arsenic or antimony of the ion implantation layer I is thermally diffused in the vicinity of the surface on the bonding side of the active layer wafer 101, and n⁺Layer 101a is formed. As a result, the active layer wafer 101 is n / n.⁺/ SiO₂A (buried oxide film 102b) structure is formed.
[0005]
  Next, the outer peripheral portion of the active layer wafer 101 is ground in order to remove the bonding failure region caused by the outer peripheral shape of both the chamfered wafers 101 and 102 (FIG. 4C). If there is a bonding failure region, the defective portion is peeled off and scattered in the subsequent cleaning process, polishing process, etc., and it adheres to contaminate the surface of the SOI layer 101A, which will be described later. There is a risk of damaging the surface of the SOI layer 101A during wafer processing in a subsequent process. This peripheral grinding is stopped to the extent that it does not reach the bonding interface. As a result, a small amount of uncut portion 101 c appears on the outer periphery of the active layer wafer 101.
[0006]
  Subsequently, the uncut portion 101c is removed by alkali etching (FIG. 4D). That is, the bonded wafer 103 comes into contact with an alkaline etching solution such as KOH, and the uncut portion 101c is melted. Thus, the outer peripheral portion of the buried oxide film 102b on the outer peripheral portion of the support substrate wafer 102 is exposed.
  Next, the surface of the active layer wafer 101 is ground and further polished to obtain n / n⁺/ SiO₂A bonded SOI substrate in which the SOI layer 101A having the structure is supported from the back surface side by the support substrate wafer 102 is manufactured (FIG. 4E).
[0007]
  By the way, when the device is manufactured by heating the bonded SOI substrate at a high temperature, the structure of the SOI layer 101A is n / n.⁺/ SiO₂N / p / n from structure⁺/ SiO₂There was a problem that it changed into a structure and induced poor electrical characteristics.
  Therefore, the inventor evaluated the boron concentration in the SOI layer 101A by the SIMS method (secondary ion mass spectrometry) in which the surface material of the analyte is ionized by sputtering using primary ions, and the results shown in the graph of FIG. Got. That is, as for boron in the natural world, boron having a mass of 10 (hereinafter, 10 boron) and boron having a mass of 11 (hereinafter, 11 boron) are present in a ratio of 1: 4. However, it has been found that about 15 times as much 11 boron as 10 boron exists in the SOI layer 101A.
[0008]
  This 11 boron is widely used when ions are implanted as a p-type dopant. It is considered that this remains attached to the inner wall of the ion implantation apparatus and the like, and this residue contaminates the active layer wafer 101 when n-type arsenic or antimony is ion-implanted. That is, at the time of bonding the active layer wafer 101 and the support substrate wafer 102, 11 boron which is a contaminant is present in the vicinity of the bonding interface, but by performing high temperature heat treatment in the device process, n⁺This 11 boron rushes over the layer, n / n until then⁺/ SiO₂From structure, n / p / n⁺/ SiO₂It is presumed that the structure has changed. This is because the diffusion rate of boron is faster than that of arsenic or antimony.
  Therefore, as a conventional method for preventing such boron contamination and metal contamination, a thin shield oxide film is formed on the bonding side surface of the active layer wafer 101, and arsenic or antimony is ion-implanted through this shield oxide film. Thereafter, a method of peeling off the shield oxide film has been developed.
[0009]
[Problems to be solved by the invention]
  However, in this conventional method, since a shield oxide film forming process and a removing process are added, the number of processes is increased and the manufacturing cost is increased. Further, since the formation temperature of the shield oxide film is as low as 900 ° C. to 1000 ° C., oxygen precipitates grow inside the active layer wafer, and finally the oxygen precipitates are exposed on the surface of the SOI layer 101A. Was bad.
[0010]
OBJECT OF THE INVENTION
  Therefore, the present invention can remove boron that contaminates the wafer surface during ion implantation, thereby preventing deterioration of electrical characteristics due to the influence of boron in the device process and exposing oxygen precipitates in the SOI layer. Bonded SOI with lower manufacturing costsSubstrate manufacturing methodThe purpose is to provide.
[0011]
[Means for Solving the Problems]
  The invention described in claim 1Using the ion implanter used for boron ion implantation,An ion implantation step of ion-implanting an n-type dopant into the active layer wafer from the bonding side surface, and after this ion implantation,By performing the SC-1 cleaning three times or more,A surface layer etching step for etching the surface on the bonding side of the wafer for active layer 5 to 20 nm, an active layer wafer after the surface layer etching, and a support substrate wafer for supporting the surface layer are embedded through an embedded oxide film. Bonding step for bonding, a heat treatment step for increasing the bonding strength of the bonded wafer obtained by the bonding, and surface grinding and surface polishing on the active layer wafer side of the bonded wafer after the bonding heat treatment Are sequentially applied, and a method of manufacturing a bonded SOI substrate comprising a thickness reducing step of reducing the thickness of the active layer wafer to form an SOI layer.
[0012]
  For example, a silicon wafer is used as the active layer wafer and the support substrate wafer. The active layer wafer and the support substrate wafer may be n-type silicon wafers doped with n-type impurities such as arsenic, antimony, and phosphorus in advance, or p-type silicon wafers containing p-type impurities such as boron. .
  In this bonded SOI substrate, the silicon oxide film may cover either the active layer wafer or the support substrate wafer bonded to the back surface of the wafer. Or both the wafer for active layers and the wafer for support substrates may be sufficient. The method for forming the silicon oxide film is not limited. For example, dry oxidation or wet oxidation can be employed.
  The thickness of the SOI layer is not limited. For example, in the case of a thick SOI layer, the thickness is 1 to 50 μm, preferably 20 μm or less. The thickness of the thin SOI layer is 1 μm or less.
  As the n-type dopant, arsenic, antimony, phosphorus, or the like can be employed.
[0013]
  The ion implantation method is a method in which an ion implantation apparatus is used to ionize an n-type or p-type dopant in the form of a gas, which is accelerated by an electric field and implanted into the semiconductor wafer from the exposed surface of the wafer. Impurity atoms ionized by the high frequency discharge of the ion generator are given energy of about 10 to 200 KeV by the acceleration system, and then only desired ions are selected by the mass spectrometry system and scanned in the XY directions by the deflection system. It is driven into a silicon wafer. For example, in the case of a medium current ion implanter, 1 × 10 5 in an energy region of several KeV to several hundred KeV.¹⁴The following medium dose and low dose can be injected with high accuracy and high productivity.
[0014]
  The ion implantation apparatus is classified based on the beam current obtained for each ion. For example, a medium current ion implanter, a large current ion implanter, a high energy ion implanter, and the like can be given. These ion implantation apparatuses mainly include an ion source, a mass analyzer, an acceleration tube, an ion deflection system, and an ion implantation chamber. These are operated in a high vacuum system. In ion implantation by this ion implantation apparatus, specific ions are extracted and accelerated by a mass analyzer. However, it may be separated after acceleration.
The implantation energy is, for example, in the case of a medium current ion implantation apparatus, from several KeV to several hundred KeV, and the dose is 1 × 10 in the case of a medium current ion implantation apparatus. ¹⁴ It is as follows.
[0015]
  When surface layer etching is performed after ion implantation, if the etching amount on the bonding side surface of the active layer wafer is less than 5 nm, 11 boron existing on the bonding side surface cannot be removed. On the other hand, if the thickness exceeds 20 nm, unnecessary etching occurs, and the processing time is long and not economical.
[0016]
  As an etching cleaning liquid to be used, for example, NH_FourOH and H₂O₂And H₂SC-1 cleaning solution prepared by adjusting O to 1: 1: 5, or H₂O₂And H₂An SC-1 solution having a ratio of O to 5 or more can be employed. In addition, a cleaning liquid in which hydrofluoric acid is mixed with ozone liquid or hydrogen peroxide water can also be used.
  SC-1Immerse in cleaning solutionWhen toThe etching cleaning time is 5 to 60 minutes, preferably 10 to 20 minutes. The temperature of the SC-1 cleaning solution is 60 to 90 ° C, preferably 70 to 80 ° C. If etching cleaning of the surface on the bonding side of the wafer for the active layer (similar to surface etching other than cleaning) is not sufficient, for example, boron present on the surface on the bonding side is removed during the high-temperature heat treatment in the device process. As a result, the semiconductor structure that has been designed in advance cannot be formed inside the SOI layer.
[0017]
  In such cleaning with the SC-1 cleaning liquid, generally, about 2 nm of the exposed surface of the silicon wafer is etched for each cleaning. Therefore, 5 to 20 nm cleaning means repeating 3 to 10 cleanings, extending the time, or raising the temperature. Contamination of 11 boron at the time of ion implantation stops from the surface of the silicon wafer to a predetermined depth (shallow layer). Therefore, even with etching of about 5 nm, boron contamination on the n-type dopant implantation surface of the wafer can be sufficiently removed. On the other hand, this 11 boron cannot be completely removed by cleaning twice or less, that is, etching by 4 nm or less.
[0018]
  This is shown in the graph of FIG. FIG. 3 is a graph showing the evaluation results of the amount of boron contamination of the bonded SOI substrate according to the present invention method and the conventional method. In FIG. 3, in the case of no SC-1 cleaning, SC-1 cleaning once, SC-1 cleaning twice, and shield oxide film method without SC-1 cleaning, the ratio of 11 boron to 10 boron is all. Bigger than the natural world. On the other hand, in the case where the SC-1 cleaning of the present invention is performed three times and in the case where the combined cleaning of the HF cleaning and the SC-1 cleaning is performed once after the ion implantation by the shield oxide film method, The ratio of approximately 10 boron and 11 boron was approximately 1: 4, the same as in the natural world.
[0019]
  The surface layer etching of the surface on the bonding side of the active layer wafer may be performed after the ion implantation of the n-type dopant and before the bonding of the active layer wafer and the support substrate wafer. That is, the implanted wafer is cleaned with SC-1 at 80 ° C. or at room temperature with HF and H₂O₂Alternatively, cleaning with an ozone cleaning etching action may be repeated, and acid cleaning without an etching action may be added. Megasonic may be added to the cleaning tank, or carrierless cleaning may be performed. After cleaning, bonding is performed within a set time while preventing boron contamination in the clean room. For this reason, it is preferable to install scrub cleaning equipment in the bonding apparatus.
[0020]
  The bonding of the active layer wafer and the support substrate wafer is performed, for example, by superposing both wafers at room temperature and then performing a bonding heat treatment. The heating temperature of this bonding heat treatment is 800 ° C. or higher, for example, 1100 ° C. The bonding heat treatment time is, for example, 2 hours. Oxygen or the like is used as the atmospheric gas in the thermal oxidation furnace to be used.
  In order to remove the defective bonding region between the active layer wafer and the support substrate wafer, outer peripheral grinding may be performed on the outer peripheral portion of the bonded wafer by grinding the outer peripheral portion of the active layer wafer from the surface side. If this defective bonding portion exists, the defective portion is peeled off and scattered in the subsequent cleaning process, polishing process, etc., which becomes a source of dust generation, contamination and damage on the surface of the SOI layer (device formation surface), etc. Cause.
[0021]
  This outer peripheral grinding may be performed until the wafer reaches the supporting substrate wafer through the bonding interface, in the vicinity of the bonding interface, or through the bonding interface. For example, in the case of peripheral grinding up to the vicinity of the bonding interface, the remaining thickness of the peripheral part of the active layer wafer after peripheral grinding is about 10 to 50 μm.
  Further, the uncut portion remaining after the peripheral grinding is peripherally etched with an alkaline etching solution. This peripheral etching is a step of removing an uncut portion of the outer peripheral portion of the active layer wafer including processing damage caused by peripheral grinding with an alkaline etching solution. As the alkaline etching solution, for example, KOH, NaOH or the like can be employed. When this outer periphery etching is performed, a part (remaining portion) of the silicon oxide film formed at the time of the bonding heat treatment remains in the shape of a cross-section in the region of the uncut portion on the outer periphery of the wafer. The remaining portion of the silicon oxide film is removed by, for example, HF cleaning with an HF cleaning solution.
[0022]
  In addition, when the surface of the active layer wafer is ground, for example, grinding with a surface grinding wheel is performed. As the surface grinding conditions, for example, # 360 to # 2000 resinoid grinding wheels are used, and surface grinding is performed until the remaining wafer thickness becomes 10 to 60 μm.
  As surface polishing, for example, a bonded wafer whose surface has been ground is mounted on a polishing head of a polishing apparatus, and a polishing agent (slurry) containing free abrasive grains is supplied to the polishing liquid while the grinding surface of the wafer for active layer is used. The method of pressing on the polishing cloth spread on the polishing surface plate is mentioned. The polishing apparatus may be a single wafer type polishing apparatus or a batch type polishing apparatus. Furthermore, a wax type single-side polishing apparatus or a waxless type apparatus may be used.
  For example, a porous nonwoven fabric type in which a polyester felt is impregnated with polyurethane, a foaming urethane type in which a foamed urethane block is sliced, or a foamed polyurethane on the surface of a base material in which the polyester felt is impregnated with polyurethane. It is possible to adopt a suede type or the like in which layers are laminated and the polyurethane surface layer portion is removed to form an opening in the foamed layer.
[0023]
[Action]
  According to this invention, the n-type dopant is ion-implanted into the surface on the bonding side of the active layer wafer, and then the surface on the bonding side of the active layer wafer is etched by 5 to 20 nm. In the previous step of ion implantation, a shield oxide film is formed on the surface of the active layer wafer on the bonding side, and after the ion implantation, this shielding oxide film is removed without performing a special treatment. 11 boron that contaminates from the surface to a predetermined depth can be removed. Thereby, for example, during high-temperature heat treatment in the device process, boron adhering to the surface on the bonding side of the SOI layer is not thermally diffused to the deep portion of the SOI layer. As a result, for example, n / n as designed in advance in the SOI layer.⁺/ SiO₂A structure can be formed.
[0024]
  In this way, boron that contaminates the wafer surface during ion implantation is removed, so that the electrical characteristics of the device do not deteriorate due to the influence of boron, and low-temperature heat treatment such as shield oxide film formation is not performed. The growth of precipitates is small, and the manufacturing cost is low.
  AlsoThen, the surface on the bonding side of the wafer for active layer at the time of bonding becomes a bonded SOI substrate etched by 5 to 20 nm.
[0025]
DETAILED DESCRIPTION OF THE INVENTION
  Embodiments of the present invention will be described below with reference to the drawings.
  FIG. 1 is a flow sheet showing a method for manufacturing a bonded SOI substrate according to one embodiment of the present invention. FIG. 2 is a graph showing a boron concentration profile of a bonded SOI substrate after device heat treatment according to an embodiment of the present invention. FIG. 3 is a graph showing the evaluation results of the amount of boron contamination of the bonded SOI substrate according to the present invention method and the conventional method.
  As shown in FIG. 1, the single crystal silicon ingot is first lifted by the CZ method (or FZ method may be used), and then the obtained single crystal silicon ingot is subjected to block cutting, notching and slicing, and further to the wafer. On the other hand, chamfering, lapping, mirror polishing, etc. are performed. A mirror-finished active layer wafer 10 having a thickness of 725 μm, an n-type, a crystal plane (100), a specific resistance of 3 Ωcm, and a diameter of 8 inches is prepared. On the other hand, a similar support substrate wafer 20 having a mirror finish is prepared by the same manufacturing method as the active layer wafer 10 (FIG. 1A).
[0026]
  Among these, arsenic or antimony, which is an n-type dopant, is injected from the surface on the bonding side of the active layer wafer 10 by, for example, an n-type dopant, for example, an implantation energy of 80 KeV and a dose of 2 × 10.¹⁵atoms / cm²Inject with. Thereby, the ion implantation layer I is formed in the predetermined depth of the surface by the side of the bonding of the wafer 10 for active layers. At this time, when the medium current ion implantation apparatus was previously used for ion implantation of a p-type dopant, 11 boron remaining in the apparatus adheres to the bonding side surface of the active layer wafer 10. Thus, the active layer wafer 10 is contaminated.
  Therefore, the boron-contaminated active layer wafer 10 is submerged for 10 minutes under the liquid level of the SC-1 cleaning tank with a built-in heater. Then, the SC-1 cleaning solution (NH_FourOH and H₂O₂And H₂O = 1: 1: 5), the entire exposed surface of the active layer wafer 10 is etched and cleaned by about 2 nm. By repeating this etching cleaning three times, the entire exposed surface of the active layer wafer 10 is etched and cleaned by about 6 nm. As a result, 11 boron that has contaminated the bonding side surface of the active layer wafer 10 is removed by etching (FIG. 1B).
  On the other hand, the support substrate wafer 20 is inserted into a thermal oxidation furnace and subjected to thermal oxidation treatment, and the entire exposed surface is covered with an insulating silicon oxide film 20a.
[0027]
  Thereafter, the mirror surfaces of both wafers 10 and 20 are overlapped at room temperature in a clean room (FIG. 1C). Thereby, the bonded wafer 30 is formed. By this bonding, the portion of the silicon oxide film 20a interposed between the active layer wafer 10 and the support substrate wafer 20 becomes the buried oxide film 20b.
  Next, the bonded wafer 30 is inserted into a bonding thermal oxidation furnace, and bonded and heat-treated in an oxygen gas atmosphere. The bonding temperature is 1100 ° C. and the heat treatment time is 2 hours (also in FIG. 1C). Thereby, the entire exposed surface of the bonded wafer 30 is covered with the silicon oxide film. At this time, arsenic or antimony of the ion implantation layer I is thermally diffused in the vicinity of the surface on the bonding side of the wafer 10 for active layer, and n⁺Layer 10a is formed. As a result, the active layer wafer 10 is n / n.⁺/ SiO₂A (buried oxide film 20b) structure is obtained.
[0028]
  Next, a void inspection by ultrasonic irradiation is performed. For the non-defective bonded wafer 30, the outer peripheral portion of the active layer wafer 10 is removed from the device forming surface side in order to remove the bonding failure region caused by the outer peripheral shape of both the chamfered wafers 10 and 20. The outer periphery is ground using a 800 to # 1500 metal bond grinding wheel (FIG. 1 (d)). If there is a bonding failure region, the defective portion is peeled off and scattered in the subsequent cleaning process, polishing process, etc., and it adheres to contaminate the surface of the SOI layer. This is because the surface of the SOI layer is damaged during wafer processing in the process. This peripheral grinding is stopped at a depth that does not reach the bonding interface. The thickness of the remaining uncut portion 10c on the outer peripheral portion of the active layer wafer 10 that appears is about 30 μm.
[0029]
  Subsequently, the uncut portion 10c is removed by alkali etching (FIG. 1 (e)). That is, the bonded wafer 30 is immersed in an alkaline etching solution such as KOH, and the uncut portion 10c is melted. In this way, the outer peripheral portion of the support substrate wafer 20, specifically, the outer peripheral portion of the buried oxide film 20 b is exposed.
  Next, the active layer wafer 10 is surface ground using a # 360- # 2000 resinoid grinding wheel from the device forming surface side (FIG. 1 (f)). At this time, the surface grinding amount is set to 650 to 700 μm, and the thickness of the active layer wafer 10 reduced by the processing is set to about 20 μm.
[0030]
  Then, surface polishing is performed on the ground surface of the active layer wafer 10 (also in FIG. 1 (f)). Specifically, the bonded wafer 30 whose surface is ground on the lower surface of the polishing head of a single wafer polishing apparatus (not shown) is held with the active layer wafer 10 side facing downward. Next, the ground surface of the active layer wafer 10 is pressed against a polishing cloth stretched on the upper surface of a polishing surface plate to polish the surface. A soft non-woven pad made by Rodel, Suba600 (Asker hardness 80 °) is used as the polishing cloth. As a result, n / n⁺/ SiO₂A bonded SOI substrate on which the SOI layer 10A having a structure is formed is manufactured.
  Thereafter, the obtained bonded SOI substrate is cleaned and packed in a wafer case or the like, and then shipped to a device manufacturer.
[0031]
  Thus, after ion-implanting the n-type dopant into the surface on the bonding side of the wafer for the active layer, this ion-implanted surface is cleaned with an etching cleaning solution (three times or more), so that ion implantation is performed as in the conventional case. Boron that contaminates the surface on the bonding side can be removed without performing a special process of forming the previous shield oxide film and removing the shield oxide film after ion implantation. As a result, boron adhering to the surface on the bonding side is not thermally diffused to the deep layer portion of the SOI layer 10A, for example, during high-temperature heat treatment in the device process. Therefore, n / n as designed in advance in the SOI layer 10A.⁺/ SiO₂A structure can be formed.
[0032]
  When actually evaluated by the SIMS method, the results shown in the graph of FIG. 2 were obtained. That is, inside the SOI layer 10A, 10 boron and 11 boron, which are the same as natural boron, are present at about 1: 4, and contamination by 11 boron existing on the bonding side surface of the active layer wafer 10 is eliminated. Turned out to be. As a result, deterioration of the electrical characteristics of the device due to the influence of boron does not occur, and since low-temperature heat treatment such as formation of a shield oxide film is not performed, the growth of oxygen precipitates is small, and the manufacturing cost is low.
  In the bonded SOI substrate manufactured in this way, the bonded side surface of the active layer wafer 10 at the time of bonding becomes a bonded SOI substrate etched by 5 to 20 nm with a cleaning liquid having an etching action.
[0033]
【The invention's effect】
  According to this invention, after ion-implanting the n-type dopant into the bonding-side surface of the active layer wafer, the ion-implanted surface is etched by 5 to 20 nm to contaminate the bonding-side surface. Boron can be removed. As a result, n / n as designed in the SOI layer, for example,⁺/ SiO₂A structure can be formed.
  In this way, boron that contaminates the wafer surface during ion implantation is removed, so that the electrical characteristics of the device are not deteriorated due to the influence of boron, and low-temperature heat treatment such as shield oxide film formation is not performed, so oxygen precipitation Product growth is also low, and manufacturing costs are low.
[Brief description of the drawings]
FIG. 1 is a flow sheet showing a method for manufacturing a bonded SOI substrate according to an embodiment of the present invention.
FIG. 2 is a graph showing a boron concentration profile of a bonded SOI substrate after device heat treatment according to an embodiment of the present invention.
FIG. 3 is a graph showing the result of evaluating the amount of boron contamination of a bonded SOI substrate according to the present invention method and the conventional method.
FIG. 4 is a flow sheet showing a method for manufacturing a bonded SOI substrate according to conventional means.
FIG. 5 is a graph showing a boron concentration profile of a bonded SOI substrate after device heat treatment according to a conventional means.
[Explanation of symbols]
  10 Active layer wafer,
  10an⁺layer,
  10A SOI layer,
  20 Support substrate wafer,
  20a silicon oxide film,
  20b buried oxide film,
  30 bonded wafers,
  I Ion implantation layer.

Claims (1)

An ion implantation step of ion-implanting an n-type dopant into the active layer wafer from the bonding side surface using the ion implantation apparatus used for boron ion implantation ;
After this ion implantation, by performing SC-1 cleaning three or more times , a surface layer etching step of etching the surface on the bonding side of the active layer wafer by 5 to 20 nm,
A bonding step of bonding the wafer for active layer after this surface layer etching and the wafer for supporting substrate supporting this through a buried oxide film,
A heat treatment step for enhancing the bonding strength of the bonded wafer obtained by the bonding;
After this bonding heat treatment, the bonded SOI provided with a thickness reducing step in which surface grinding and surface polishing are sequentially performed on the active layer wafer side of the bonded wafer, and the active layer wafer is reduced in thickness to form an SOI layer. A method for manufacturing a substrate.

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