JP4127641B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

Info

Publication number
JP4127641B2
JP4127641B2 JP2002273142A JP2002273142A JP4127641B2 JP 4127641 B2 JP4127641 B2 JP 4127641B2 JP 2002273142 A JP2002273142 A JP 2002273142A JP 2002273142 A JP2002273142 A JP 2002273142A JP 4127641 B2 JP4127641 B2 JP 4127641B2
Authority
JP
Japan
Prior art keywords
metal plate
semiconductor device
shunt resistor
insulating material
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2002273142A
Other languages
Japanese (ja)
Other versions
JP2003203805A (en
Inventor
享 木村
良裕 加柴
信義 木本
雅一 深田
貴信 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2002273142A priority Critical patent/JP4127641B2/en
Publication of JP2003203805A publication Critical patent/JP2003203805A/en
Application granted granted Critical
Publication of JP4127641B2 publication Critical patent/JP4127641B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device provided with a shunt resistor which has a compact structure, detecting large current with high accuracy and having high heat radiation. <P>SOLUTION: In the semiconductor device with the built-in shunt resistor detecting the current which flows to a semiconductor element 12 attached to an insulating circuit board 5 on a heat radiation plate 6, the shunt resistor 4 is provided with a U-shaped metal plate 2 connecting a straight line part to the insulating circuit board 5, and an insulating material 1 jointed between a pair of the straight line parts of the metal plate with a jointing material. <P>COPYRIGHT: (C)2003,JPO

Description

【0001】
【発明の属する技術分野】
この発明は、放熱板上の絶縁回路基板に取り付けられた半導体素子に流れる電流を検出するシャント抵抗器が内蔵された半導体装置に関するものである。
【0002】
【従来の技術】
一般に、モータの回転数を制御するインバータ装置などにおいては、交流周波数を変換させるためにIGBT(Insulated Gate Bipolar Transistor)等の半導体素子であるパワー半導体素子を複数個セラミック基板上に搭載した半導体装置が用いられる。
【0003】
この半導体装置は、モータに接続されるが、このモータに流れる電流は電流検出器によって検出される。電流検出器としてカレントトランスを用いた場合、他の部品に比べて容積が大きいため、装置の小型化の妨げとなっていた。
【0004】
これに対して、シャント抵抗器を半導体装置に内蔵して、半導体素子に流れる電流を検出することによって小型化を図ったものとして特許文献1に示されたものが知られている。図17はその特許文献1に示されたシャント抵抗器の断面図である。
【0005】
このシャント抵抗器は、例えば銅マンガン材料からなるハット型部材60の凹部内に、例えばエポキシ樹脂からなる絶縁物14が充填されて構成されている。ハット型部材60のフランジ部分60a、60bには例えば銅材料からなる一対の端子13が固着されている。この端子13は絶縁回路基板16の導電パターン15に実装されている。
【0006】
このシャント抵抗器は、抵抗体であるハット型部材60で生じたジュール熱を逃がす必要があり、絶縁物が充填されていないシャント抵抗器と比較して放熱性を高めるために、ハット型部材60の凹部内に絶縁物14が充填されている。
【0007】
しかしながら、このシャント抵抗器では、数100Aレベルの大電流のときにはシャント抵抗器の温度が許容レベルを超え、絶縁物14が劣化してしまうだけでなく、シャント抵抗器が高温になるためシャント抵抗器自体の抵抗値が変化してしまい、高精度の電流測定ができないという問題点があった。
【0008】
これに対して、図18のシャント抵抗器は、特許文献2に記載されたシャント抵抗器であって、大電流時でも電流測定が可能であるシャント抵抗器である。
このシャント抵抗器は、銅製のベース6上にはんだからなる接合材7で接合された絶縁回路基板5上に取り付けられている。シャント抵抗器では、セラミックス基板17を挟んでその表面側に所定の抵抗値にあわせて設計したサイズの計測用精密抵抗材からなるシート状抵抗部18および裏面に銅部材19を重ね合わせて、銀ろうなどを用いた活性金属法により一体に接合して抵抗体を構成している。シート状抵抗部18の両端部には電流通電用ボンディング部が形成され、この部分にボンディングワイヤ10a、10bが接続されている。シート状抵抗部18の内側には電流検出用のボンディング電極部が形成され、この部分にボンディングワイヤ11a、11bが接続されている。それぞれのボンディングワイヤ10a、10b、11a、11bは紙面に対して垂直方向に複数本配置されている。
【0009】
このシャント抵抗器は、熱伝導率が数W/m・Kのエポキシ樹脂よりも高い、数10〜150W/m・Kのセラミックス基板17により抵抗体の発熱をより効果的に放熱しており、大電流の検出が可能になっている。
【0010】
しかしながら、セラミックス基板17を挟んでシート状抵抗部18および銅部材19を重ね合わせ、銀ろうなどで一体接合しているので、確かに初期の放熱特性という点では高性能化が図れるが、使用環境下では次のような問題点があった。
即ち、このような構造を採用したところで、シート状抵抗部18での発熱は避けられないため、抵抗部18とセラミックス基板17との接合界面に熱応力が発生し、セラミックス基板17に割れが発生し、この割れは繰り返し使用されるにつれて拡大し、最後には抵抗部18とセラミックス基板17とが分離してしまい、その結果抵抗部18の温度は上昇し、初期の性能が維持できなくなってしまうという問題点があった。
【0011】
また、図17および図18に示したシャント抵抗器は、小型化や生産性という点で問題点があった。
即ち、図17のシャント抵抗器ではフランジ部分60a、60bで端子13にはんだ接合するため、この接合スペースが必要であった。
また、図17および図18に示した半導体装置は、当然ながら共にシャント抵抗器の大きさ分だけのスペースも必要となる。従って、外付けでカレントトランスを用いた場合に比べて、半導体装置のパッケージサイズは少なくとも15mm以上も大きくなってしまうことになる。
【0012】
また、図18に示した半導体装置では、1本に付き10A程度しか電流を流すことができないボンディングワイヤ10a、10bを、多数本並列に接合する必要があり、今後の大電流化にとっては、生産性に問題が生じることが考えられる。
【0013】
更に、図18に示したシャント抵抗器のように、平板状導体であるシート状抵抗部18を用いた場合には、インダクタンスが大きく、高周波特性が悪いという問題点もあった。IGBTのようなパワー半導体装置では、例えばIGBT素子1個あたり100A程度の大きな電流を測定することになるが、抵抗挿入による電力損失を低くするために、抵抗体の抵抗値としてはミリオーム程度の低い値が必要とされる。このような抵抗値をもつ平板抵抗は100kHzから1MHzといった高周波においては抵抗よりもインダクタンスによるインピーダンスが支配的となり、検出特性が周波数依存性を持つという問題点もあった。
【0014】
これに対して、図19は周波数特性が平坦なシャント抵抗器を有する半導体装置を示す図である。図19は特許文献3に記載されたシャント抵抗器の斜視図であり、周波数特性が平坦である電流センサを得ることができる。
図において、平行平板状に折り返した形状の導電体(ここでは銅)からなる電流センサ部28は、平行平板をなす第1の平板状部分28a、第2の平板状部分28cおよびこれら第1、第2の平板状部分28a、28cの一方の端部を互いにつなぐ折れ曲がり部28bで構成されている。第1の平板状部分28aの他方の端部は電極パターン29にはんだ付けにより接合されて電流センサ部28の一方の検出端子34を形成している。第2の平板状部分28cの他方の端部はモジュールエミッタ電極27と一体になって繋がっており、電流センサ部28の他方の検出端子35を形成している。エミッタ中継基板26上の電極パターン29はアルミニウムワイヤ51によりダイオード素子40のアノード電極41およびIGBT素子3のエミッタ電極31と接続されている。なお、符号16は過電流・短絡電流保護回路である。
【0015】
上記構成の半導体装置では、平行平板をなす第1、第2の平板状部分28a、28cを流れる電流が互いに対向し、磁界を相殺するので、周波数特性が平坦で検出精度の良い電流センサを得ることができる。
【0016】
しかしながら、図19に示した半導体装置では、検出精度および放熱性において問題点があることが分かった。
即ち、電流センサ部28に銅を使用した場合、抵抗温度係数が大きいため、環境温度によって抵抗値が変化し、高精度な電流検出ができない。また、電流センサ部として銅−ニッケル合金等の抵抗温度係数の小さい金属を使用すると、熱伝導率が小さいために、電流センサ部の熱抵抗が大きくなる。従って、放熱板であるエミッタ中継基板26と接合された電極パターン29に接触している部分以外は非常に高温になり、電極パターン29との接合部の信頼性やその近傍の部材に熱による悪影響を与えてしまうという問題点があった。
【0017】
【特許文献1】
実用新案登録第3067213号公報([0018]〜[0019]、図1)
【特許文献2】
特開平11-97203号公報([0020]〜[0021]、図2)
【特許文献3】
特開2000-353778号公報([0022]〜[0023]、図1)
【0018】
【発明が解決しようとする課題】
以上説明したように、従来、放熱性および信頼性が優れた半導体装置を提供することが困難であった。
この発明は、上記のような問題点を解決することを課題とするものであって、コンパクトな構造で、高精度に大電流を検出でき、かつ放熱性が高い半導体装置を得ることを目的とする。
【0019】
【課題を解決するための手段】
この発明に係る半導体装置では、シャント抵抗器は、U字状の金属板と、この金属板の一対の直線部位間に設けられた絶縁材とを備えている。
【0020】
【発明の実施の形態】
以下、この発明の実施の形態について説明するが、先に説明した従来のものと同一、または相当部材、部位については、同一符号を付して説明する。
実施の形態1.
図1はこの発明の実施の形態1の半導体装置の部分断面図、図2は半導体装置に内蔵されたシャント抵抗器の斜視図である。
図において、半導体装置にはシャント抵抗器4が組み込まれている。このシャント抵抗器4は、絶縁回路基板5の導電パターン5aに接合されている。絶縁回路基板5は、大電流対応の基板として多用される、窒化アルミニウムセラミックスと銅板とを接合して構成されている。絶縁回路基板5には例えば銅製のベース板6が例えばはんだからなる接合材7で接合されている。放熱板であるこのベース板6は、半導体装置の外枠の一部を形成し、シャント抵抗器4からの熱が外部に放出されるときの冷却通路を形成している。ベース板6にはポリフェニレンサルファイド製のケース17が固着されている。このケース17には、例えばモータなどとの接続のための交流側モジュール電極9、このモジュール電極9の反対側にあり例えばバッテリーなどの直流電源との接続のための直流側モジュール電極(図示せず)が固着されている。
【0021】
絶縁回路基板5の導電パターン部5aには接合材7で例えばIBGTやMOSFET、ダイオードなどの半導体素子12が接合されている。シャント抵抗器4と交流側モジュール電極9とはボンディングワイヤ10aで電気的に接続されている。シャント抵抗器4に接合された導電パターン5aと、隣接した半導体素子12とはボンディングワイヤ10bで電気的に接続されている。なお、符号11a、11bはそれぞれシャント抵抗器4の電位差を検出するためのボンディングワイヤである。
【0022】
シャント抵抗器4は、絶縁回路基板5に直線部位が接合された例えば銅マンガン合金からなるU字状の金属板2と、この金属板2の一対の直線部位間に例えば銀ペーストからなる接合材3で接合された例えば窒化アルミニウムセラミックスからなる絶縁材1とから構成されている。なお、金属板2としては抵抗温度係数の低い抵抗材料として銅マンガンの他、銅ニッケル、ニッケルクロム等を用いることができる。
【0023】
図3は上記構成の半導体装置の電気回路図である。
図3において、8P、8Nは直流側モジュール電極、9U、9V、9Wは交流側モジュール電極、12aはIGBT、12bはダイオードである。上述の交流側モジュール電極9は9U、9Vまたは9Wを示し、半導体素子12は12aまたは12bを指す。なお、3つの相は単一のパワー半導体装置の内部に構成されていてもよいし、それぞれ独立したパワー半導体装置を組み合わせて構成されていてもよい。また、IGBT12aはIGBT以外のスイッチング可能な電力半導体素子であってもよい。
【0024】
上記構成の半導体装置では、交流側モジュール電極9U、9V、9Wには、パワー半導体装置から外部へ電流が流れる場合と、外部からパワー半導体装置に電流が戻って流れる場合がある。図3に示すように、シャント抵抗器4を、交流側モジュール電極9U、9V、9Wと半導体素子12a、12bの間に配置することにより、どちらの場合でも電流は必ずシャント抵抗器4を通過する。従って、各相に流れる電流の大きさはもとより、その流れる方向までも常に把握することができる。
なお、図3に示した半導体装置の電気回路図は、直流を3相交流に変換する、または3相交流を直流に変換する半導体装置の場合であるが、特にこれに限定するものではなく、どのようなパワー半導体装置であってもよい。
【0025】
以上説明したように、上記構成の半導体装置では、シャント抵抗器4は、絶縁回路基板5に直線部位で接合材7により接合されたU字状の金属板2と、この金属板2の一対の直線部位間に接合材3で接合された絶縁材1とから構成されているので、シャント抵抗器の接合用として必要とした図17に示した従来のシャント抵抗器のようなフランジ部分60a、60bを必要とせず、専用の接合スペースが不要となる。
【0026】
また、絶縁回路基板5上にシャント抵抗器4を搭載して、その搭載領域の上部に位置するシャント抵抗器4からボンディングワイヤ10aで交流側モジュール電極9と接続できるので、シャント抵抗器を内蔵していない従来のパワー半導体モジュールの絶縁回路基板に関して、その絶縁回路基板を設計変更せずに従来のワイヤボンディング領域をシャント抵抗搭載領域として利用することができ、その領域にシャント抵抗器4を搭載できる。この結果、シャント抵抗器を内蔵したパワー半導体装置が従来と同一サイズで実現できる。
また、U字状の金属板2の直線部位間には絶縁材1が挿入されて接合材3で固着されているため、金属板2のみの場合に比べ堅固となり、シャント抵抗器4の上面にワイヤボンディングを行っても超音波振動が安定に伝わり、その結果、安定した接合が得られる。
【0027】
実施の形態2.
図4は実施の形態2の半導体装置のシャント抵抗器4の断面図である。このシャント抵抗器4の金属板2は、絶縁板1に接合材3で固着された第1の金属部材2aと、この第1の金属部材2aよりも電気伝導率が高く、直線部位に設けられた銅製の第2の金属部材2b、2cとから構成されている。第2の金属部材2cは絶縁回路基板5に接合材7により接合されている。
他の構成は実施の形態1と同様である。
【0028】
この半導体装置のシャント抵抗器4では、金属板2の直線部位の抵抗値は、第1の金属部材2aと第2の金属部材2b、2cとの並列抵抗になるため、実施の形態1のシャント抵抗器4と比較して抵抗値が小さくなり、その結果、同一電流が流れた場合は電位差が小さくなる。従って、ボンディングワイヤ11aのワイヤボンディングの位置がずれた場合でもシャント抵抗器4の抵抗値の誤差が小さくなり、高精度測定が可能となる。
【0029】
また、高電気伝導率の金属は高熱伝導率の金属でもあるため、主に第1の金属部材2aのU字状の曲面部位でのジュール発熱は高熱伝導の第2の金属部材2b、2cに伝わり、さらにこの熱は、絶縁回路基板5、放熱板であるベース板6に伝わり、実施の形態1のシャント抵抗器4と比較してシャント抵抗器4の放熱性が向上する。
【0030】
さらに、第2の金属部材2b、2cは、第1の金属部材2aよりも硬度が低い銅または銅合金を用い、また第1の金属部材2aの直線部位の外側に設けられているので、ワイヤボンディング性が向上するという効果も有する。
即ち、ワイヤボンディングされる部材として銅・ニッケル合金を用いた場合に、この部材に直接ワイヤボンディングをすると接合強度不足が0.1%のレベルで発生したが、銅が用いられた第2の金属部材2b上にワイヤボンディングすると、接合強度不足はその1/10以下に低下することが分かった。
【0031】
実施の形態3.
図5はこの発明の実施の形態3の半導体装置のシャント抵抗器4の断面図である。
この絶縁板1は、例えば厚さ0.635mmの窒化アルミニウムセラミックスの絶縁材本体1aの両側表面に、例えば厚さ0.3mmの銅の金属層1b、1cを形成して構成されている。金属層1b、1cは絶縁材本体1aよりも電気伝導率が高い。金属層1b、1cと金属板2とは例えば銀ろうからなる接合材3で接合されている。金属板2の構成は、実施の形態1と同様である。
【0032】
このシャント抵抗器4では、電流は、矢印Aに示すように、ワイヤボンディング部から金属板2と金属層1cとに分流して流れ、U字状の曲面部を通過してさらに、金属板2と金属層1bとに分流して流れる。従って、実施の形態2と同様の理由で、シャント抵抗器4の電流抵抗値の値は実施の形態1のシャント抵抗器4と比較して小さくなり、高精度測定が可能になるとともに、シャント抵抗器4の冷却性能が向上する。
【0033】
さらに、絶縁材本体1aの両側表面に金属層1b、1cを形成したので、金属板2と絶縁板1との溶接接合が可能となり、より放熱性が良好になる上、金属板2に挿入する絶縁板1の板厚をこの例では1.235mmと厚くすることができるため、例えば0.8mm程度の板厚の金属板2の曲げ曲率半径を大きくすることができ、曲げ加工が容易となる。
【0034】
なお、絶縁板本体1aの板厚を厚くすると、コストが高くなり、金属層1a、1bのみで構成するとシャント抵抗器の絶縁がとれなくなり、抵抗体としての機能を有しないため、ここに示すように、厚さ0.635mmの絶縁板本体1aと高電気伝導の0.3mm程度の金属層1b、1cを張り合わせた積層構造で構成・配置することが好ましい。
【0035】
実施の形態4.
図6はこの発明の実施の形態4の半導体装置の要部断面図である。この半導体装置のシャント抵抗器4では、金属板2は、絶縁回路基板5に接合されシャント抵抗器4での電位差を検出するための一方のボンディングワイヤ11bが接続された第1の直線部位2Aと、この第1の直線部位2Aよりも長さが短い第2の直線部位2Bとを有している。他方のボンディングワイヤ11aは絶縁板1の金属層1bに接続されている。
【0036】
以上のように実装されたシャント抵抗器4には、電位差を検出するための電極部分を有しているため、絶縁回路基板5に電極を形成する必要がないだけでなく、ノイズの影響を受けにくく、実装構造や方法に左右されることなく安定に電位差を引き出すことができる。
即ち、実施の形態1のシャント抵抗器4において電位差の検出を一対のボンディングワイヤ11a、11bで行った場合の例と比較すると、実施の形態1では絶縁回路基板5上から片側の電位検出を行うため、一対のボンディングワイヤ11a、11bの接合位置の距離が離れてしまい、ノイズの影響を受けやすい。さらに、片側の電位検出が絶縁回路基板5上からであるため、測定結果が絶縁回路基板5の材料の温度変化の影響を受けてしまい、シャント抵抗器4にとって本来の機能である正確な抵抗を検知できなくなってしまう。
これに対して、この実施の形態のシャント抵抗器4では、シャント抵抗器4自身から検出用の電流を検出するため実装技術に左右されることなく、安定して電位差を検出することができ、かつ検出位置は近いため、ノイズの影響を受けることが少ない。以上の結果から正確な電流値を検出できるという効果を有する。
【0037】
また、電流は、例えば、矢印Bに示すように、ボンディングワイヤ10bから、シャント抵抗器4の第1の直線部位2A、曲面部位2Cおよびボンディングワイヤ10aを流れ、ボンディングワイヤ11a、11bの接合部にはほとんど流れることが無く、従って等電位線の密度が疎であるため、ボンディングワイヤ11a、11bの接続位置の誤差による検出電位の誤差が小さくなり、高精度な検出が可能となる。
【0038】
実施の形態5.
図7はこの発明の形態5の半導体装置の要部断面図である。このシャント抵抗器4は、曲面部位が絶縁回路基板5側に指向しているU字状の金属板50aと、この銅マンガン合金等からなる金属板50aの一対の直線部位にそれぞれ一端部が接続され他端部がそれぞれ絶縁回路基板5の導電パターン5aに溶接接合されているL字状の端子部材50b、50cとから構成されている。L字状で板状の端子部材50b、50cは、金属板50aよりも電気伝導率が高い銅部材で構成されている。
【0039】
この実施の形態では、主に発熱するU字状に加工された金属板50aの曲面部位から絶縁回路基板5までの熱抵抗を低減することができる。即ち、U字状に加工された金属板50aの曲面部位を、絶縁回路基板5の方に向けて配置することにより、U字状の金属板50aの曲面部位でのジュール発熱は、金属板50aの直線部位をほとんど経由することなく、ほぼ最短の伝熱経路で絶縁回路基板5に至ることができ、シャント抵抗器4の放熱性が向上する。
【0040】
実施の形態6.
図8この発明の実施の形態6の半導体装置の部分断面図である。この半導体装置のシャント抵抗器4は、U字状の金属板61aと、この金属板61aの一対の直線部位の一方の直線部位に一端部が接続され他端部が絶縁回路基板5の導電パターン5aに接続された断面L字状の第1端子部材61bと、金属板61aの一対の直線部位の他方の直線部位に一端部が接続され他端部が交流側モジュール電極9と電気的に接続された板状の第2端子部材61cとから構成されている。
【0041】
第1端子部材61bは、第2端子部材61cよりも熱通路断面積が大きく、また金属板61aおよび第2端子部材61cよりも電気伝導率が高い銅部材が用いられている。第2端子部材61cは、可撓性部材で構成され、途中に曲面部位が形成されている。
【0042】
上記の半導体装置では、シャント抵抗器4の第1端子部材61bおよび第2端子部材61cによって絶縁回路基板5と交流側モジュール電極9とが接続されるため、ボンディングワイヤを大幅に削減することができる。
また、金属板61aの曲面部位でのジュール発熱は、第1端子部材61bを介して絶縁回路基板5、さらには放熱板であるベース板6に伝わり、放熱される。なお、第1端子部材61bには比較的厚い部材を用いて熱抵抗を低く抑えているので、シャント抵抗器4の発熱を低く抑えている。
【0043】
さらに、シャント抵抗器4と絶縁回路基板5、または交流側モジュール電極9の接続部の信頼性を長期にわたって維持することができる。即ち、ベース板6とケース17との間には熱膨張係数に差があるため、温度変化によって絶縁回路基板5と交流側モジュール電極9との間隔は0.1〜0.2mm程度変位する。シャント抵抗器4の剛性が高いと、この変位によって接続部に応力が発生し、温度サイクルによって接続部が破壊される。
しかしながら、第2端子部材61cには比較的薄い部材を用い、かつ曲面部位を設けており、かつ可撓性を有している。従って、この変位を吸収して接続部に過大な応力が発生することを防止することができ、接続部の信頼性を長期にわたって維持することができる。
【0044】
さらに、半導体装置のワイヤボンディング領域であった部分に、例えばはんだなどで絶縁回路基板5に第1端子部材61bを接合し、また交流側モジュール電極9に第2端子部材61cの端部を接合すればよいので、シャント抵抗器を内蔵していないパワー半導体装置の絶縁回路基板を設計変更せずに、ワイヤボンディング領域をシャント抵抗搭載領域として利用することが可能となる。その結果、シャント抵抗器4を内蔵したパワー半導体装置が従来と同一サイズで実現できる。
【0045】
なお、この実施の形態でも、実施の形態5と同様に金属板50aの曲面部位を下側にして、絶縁回路基板5側に向けるようにしてもよい。
また、この実施の形態および実施の形態5のシャント抵抗器についても、実施の形態1〜4で説明したように、絶縁板をU字形状の金属板の直線部位間に設けるようにして、シャント抵抗器の放熱性、電流検出精度をさらに高め、また堅固にすることができるのは勿論である。
【0046】
実施の形態7.
図9は実施の形態7の半導体装置のシャント抵抗器4の斜視図である。このシャント抵抗器4は、金属板2の曲面部に穴2dが形成されている点を除いては実施の形態2と同様である。
この穴2は、例えばCOレーザを金属板2の曲面部位の中間部に照射することで形成される。
【0047】
このシャント抵抗器4は次の手順に従って製造される。
まず、第1の金属部材2aと、第2の金属部材2b、第3の金属部材2cとを接合する。次に、このようにして構成された金属板2の第2の金属部材2b、第3の金属部材2cに、絶縁材1を接合材3で接合し、また金属板2をU字形状に曲げ加工する。この状態でのシャント抵抗器4の抵抗値は、目標値に対して低くなるように設定されている。なお、抵抗値のばらつきは、組立精度や材料特性に依存する。
【0048】
次に、シャント抵抗器4の抵抗値を測定し、目標値と測定値との差に応じて穴2dの大きさを定める。この穴2dは、第1の金属部材2aにCOレーザを照射して形成される。
さらに、場合によっては、シャント抵抗器4の抵抗値を再測定し、所望の値になっていなければ、再度COレーザ照射を行う。
以上の工程を経ることによって、高精度のシャント抵抗器4の製造が可能となる。
なお、穴2dの代わりに、第1の金属部材2aの曲面部の両側縁部に切欠き部としてスリットを形成するようにしてもよい。要は、電流路を制限するものであればよい。
【0049】
実施の形態8.
図10はこの発明の実施の形態8の半導体装置のシャント抵抗器4の斜視図、図11は図10のシャント抵抗器4の断面図である。
このシャント抵抗器4は、エポキシ樹脂等の熱硬化性の合成樹脂からなる絶縁材1がU字状の金属板2で挟まれている。この金属板2は、曲面形状の抵抗体2eの両端面に第1の金属部材2f、第2の金属部材2gを突き合わせて溶接されている。抵抗体2eは銅マンガン合金で構成され、第1の金属部材2f、第2の金属部材2gは銅等の高電気伝導率の金属で構成されている。
なお、抵抗体2eの材料として、温度係数の低い抵抗材料としての銅マンガンの他、銅ニッケル、ニッケルクロム等を用いることができる。
また、絶縁材1としては、エポキシ樹脂等の熱硬化性樹脂の他に、PPS等の熱可塑性の合成樹脂を用いることができる。また必要に応じて熱伝導率を向上させるために、窒化アルミニウムセラミックス等の絶縁性を有する高熱伝導性フィラーを混入させるようにしてもよい。
【0050】
このシャント抵抗器4の金属板2は、実施の形態2のシャント抵抗器4の金属板2と近似しており、抵抗体2eよりも電流抵抗および熱抵抗の小さい電流通路である第1の金属部材2f、第2の金属部材2gが確保されており、実施の形態2で述べたと同様の効果がある。
【0051】
このシャント抵抗器4では、絶縁材1が熱硬化性または熱可塑性の合成樹脂で構成されているので、絶縁材1が金属板2の内部に密着され、放熱性向上を図ることが容易である。
即ち、絶縁材1が熱硬化性樹脂の場合は、硬化前の液状の樹脂は金属板2のU字形状の内部に流し込んだ後に加熱硬化されるので、絶縁材1を金属板2の内部の全面にわたって隙間なく密着させることができる。
絶縁材1が熱可塑性樹脂の場合でも、樹脂を加熱し、溶融した状態で金属板2の内部に流し込むことで熱硬化性樹脂の場合と同様に、絶縁材1を金属板2の内部の全面にわたって隙間なく密着させることができる。このようにすることで、熱伝導面積を最大限に確保することができるとともに、絶縁板1と金属板2との界面での熱抵抗増加を抑制することができる。
【0052】
これらの合成樹脂は、一般的に普及しているポッティングやトランスファーモールドおよび射出成型の技術を利用できるので、量産性に優れる。なお、絶縁材1はこれに限定されるものではなく、絶縁性および熱伝導性を有し、金属板2の内部の全面にわたって隙間なく密着させることができるものであれば同様の効果が得られることは言うまでもない。
【0053】
実施の形態9.
図12は実施の形態9の半導体装置の部分断面図である。
この実施の形態では、シャント抵抗器4の絶縁回路基板5側では、抵抗体2eと第2の金属部材2hとの境界部に段差を有している点が実施の形態8のシャント抵抗器4と異なる。
【0054】
実施の形態8のシャント抵抗器4が絶縁回路基板5に接合される際に、はんだ等のろう材からなる接合材7が溶融して濡れ広がり、抵抗体2eに付着するおそれがある。抵抗体2eよりも電気伝導率の高い導電材料である接合材7が抵抗体2eに付着すると、その箇所では抵抗体2eと接合材7とは並列抵抗となり、抵抗値が変化する。この変化の割合は接合材7の付着量、およびその範囲による。製造工程でこの接合材7の付着量を制御することは事実上不可能であるので、シャント抵抗器4について安定した抵抗値が得られない。
これに対して、この実施の形態9では、第2の金属部材2hに段差を設けることで、シャント抵抗器4と絶縁回路基板5とを接合する接合材7が濡れ広がって抵抗体2eに付着するのを防止することができる。従って、接合材7の付着によって抵抗体2eの抵抗値が変化したり、ばらついたりすることは無く、高精度で安定した電位差を検出することができる。
【0055】
なお、図13に示すように、第2の金属部材2iに示すように、第2の金属部材2iを曲げ加工して形成するようにしてもよい。
【0056】
実施の形態10.
図14は実施の形態10の半導体装置のシャント抵抗器4の断面図であり、銅マンガン合金からなるU字状の金属板2の一対の直線部位の外側に金属板2よりも高電気伝導率の第1の金属部材2k、第2の金属部材2lが接合されている。また、金属板2の内部には実施の形態8と同様の絶縁材1が密着されている。
【0057】
この実施の形態のシャント抵抗器4では、金属板2の内部に絶縁材1が密着されており、実施の形態8と同様の効果を得ることができるとともに、第1の金属部材2kおよび第2の金属部材2lにより段差が形成されており、シャント抵抗器4と絶縁回路基板5とを接合する接合材7が濡れ広がって金属板2の曲面部位に付着するのを防止することができる。
従って、接合材7の付着によって金属板2の抵抗値が変化したり、ばらついたりすることは無く、高精度で安定した電位差を検出することができる。
【0058】
実施の形態11.
図15は実施の形態11の半導体装置のシャント抵抗器4の断面図であり、金属板2の曲面部位を絶縁材1と同一材料で構成されたカバー体2mで覆われている点が実施の形態10と異なる。
この実施の形態では、シャント抵抗器4が絶縁回路基板5に接合材7で接合される際に、接合材7は、溶融し、飛散するが、金属板2の曲面部位はカバー体2mで覆われているので、その接合材7が金属板2の曲面部位に付着するようなことはない。
【0059】
実施の形態12.
図16は実施の形態12の半導体装置の部分断面図であり、第2の金属部材2gの絶縁回路基板5との接合面に4カ所突起13が形成されている点が実施の形態8と異なる。
【0060】
実施の形態8では、シャント抵抗器4と絶縁回路基板5とは線膨張係数が異なるため、温度変化によって接合材7に応力が作用する。この応力が繰り返されると、接合材7に亀裂が生じ、製品としての信頼性を損なうおそれがある。
このため、第2の金属部材2gに突起13を形成することで、突起13の高さ分の接合材7の厚さを確保することができ、応力に抗するに十分な接合材7の厚みが得られ、接合材7の亀裂の発生を防止することができる。
この突起13の数は、絶縁回路基板5に対するシャント抵抗器4の傾きを防止するためには、3個あればよいが、確実に傾きを防止するために、この実施の形態では4個としてある。
この突起13は、第2の金属部材2gをプレス加工して直接形成してもよいが、簡単な方法として、シャント抵抗器4の絶縁回路基板5との接合面にアルミニウムワイヤを超音波圧接等の方法で接合してもよい。
なお、シャント抵抗器4の絶縁回路基板5との接合面に突起13を形成することに関しては、実施の形態8以外のシャント抵抗器4にも適用できるのは勿論である。
【0061】
【発明の効果】
以上説明したように、この発明の半導体装置によれば、シャント抵抗器は、U字状の金属板と、この金属板の一対の直線部位間に接合材で接合された絶縁板とを備えているので、大電流の検出においても抵抗器でのジュール発熱を効率よく放出することができる。また、シャント抵抗器は小型化できるとともに、堅固となり、ワイヤボンディングの接合強度が安定する。
【図面の簡単な説明】
【図1】 この発明の実施の形態1の半導体装置の部分断面図である。
【図2】 図1のシャント抵抗器の斜視図である。
【図3】 図1の半導体装置の電気回路図である。
【図4】 この発明の実施の形態2の半導体装置に内蔵されたシャント抵抗器の断面図である。
【図5】 この発明の実施の形態3の半導体装置に内蔵されたシャント抵抗器の断面図である。
【図6】 この発明の実施の形態4の半導体装置の部分断面図である。
【図7】 この発明の実施の形態5の半導体装置の部分断面図である。
【図8】 この発明の実施の形態6の半導体装置の部分断面図である。
【図9】 この発明の実施の形態7の半導体装置に内蔵されたシャント抵抗器の斜視図である。
【図10】 この発明の実施の形態8の半導体装置に内蔵されたシャント抵抗器の斜視図である。
【図11】 図10のシャント抵抗器の断面図である。
【図12】 この発明の実施の形態9の半導体装置の部分断面図である。
【図13】 図12のシャント抵抗器の変形例であるシャント抵抗器が組み込まれた半導体装置の部分断面図である。
【図14】 この発明の実施の形態10の半導体装置に内蔵されたシャント抵抗器の断面図である。
【図15】 この発明の実施の形態11の半導体装置に内蔵されたシャント抵抗器の断面図である。
【図16】 この発明の実施の形態12の半導体装置の部分断面図である。
【図17】 従来のシャント抵抗器の断面図である。
【図18】 従来の半導体装置の部分断面図である。
【図19】 従来の半導体装置の斜視図である。
【符号の説明】
1 絶縁材、1a 絶縁板本体、1b,1c 金属層、2 金属板、2a 第1の金属部材、2b,2c 第2の金属部材、2d 穴(切欠き部)、2e 抵抗体、2f,2k 第1の金属部材、2g,2h,2i,2l 第2の金属部材、2m カバー体、2A 第1の直線部位、2B 第2の直線部位、2C 曲面部位、4 シャント抵抗器、5 絶縁回路基板、6 ベース板(放熱板)、9 交流側モジュール電極、10a,10b,11a,11b ボンディングワイヤ、12 半導体素子、13 突起、50a,61a 金属板、50b,50c 端子部材、61b 第1端子部材、61c 第2端子部材。
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a built-in shunt resistor for detecting a current flowing in a semiconductor element attached to an insulating circuit board on a heat sink. In place It is related.
[0002]
[Prior art]
In general, in an inverter device that controls the rotational speed of a motor, a semiconductor device in which a plurality of power semiconductor elements, such as IGBTs (Insulated Gate Bipolar Transistors), are mounted on a ceramic substrate in order to convert an AC frequency. Used.
[0003]
This semiconductor device is connected to a motor, and a current flowing through the motor is detected by a current detector. When a current transformer is used as a current detector, the volume is larger than other parts, which hinders downsizing of the apparatus.
[0004]
On the other hand, as shown in Patent Document 1, a shunt resistor is built in a semiconductor device and the current is reduced by detecting a current flowing through the semiconductor element. FIG. 17 is a cross-sectional view of the shunt resistor disclosed in Patent Document 1.
[0005]
The shunt resistor is configured by filling an insulator 14 made of, for example, an epoxy resin in a concave portion of a hat-type member 60 made of, for example, a copper manganese material. A pair of terminals 13 made of, for example, a copper material is fixed to the flange portions 60 a and 60 b of the hat-shaped member 60. This terminal 13 is mounted on the conductive pattern 15 of the insulated circuit board 16.
[0006]
This shunt resistor needs to release Joule heat generated by the hat-shaped member 60 that is a resistor, and in order to improve heat dissipation as compared with a shunt resistor not filled with an insulator, the hat-shaped member 60 An insulator 14 is filled in the recess.
[0007]
However, in this shunt resistor, the temperature of the shunt resistor exceeds the allowable level at a large current of several hundreds of A and not only the insulator 14 is deteriorated, but also the shunt resistor becomes high temperature. There is a problem in that the resistance value of the device itself changes and high-precision current measurement cannot be performed.
[0008]
On the other hand, the shunt resistor of FIG. 18 is a shunt resistor described in Patent Document 2, and is a shunt resistor capable of measuring a current even at a large current.
This shunt resistor is mounted on an insulating circuit board 5 bonded to a copper base 6 with a bonding material 7 made of solder. In a shunt resistor, a ceramic substrate 17 is sandwiched between a sheet-like resistor portion 18 made of a measuring precision resistor material of a size designed according to a predetermined resistance value on the front surface side, and a copper member 19 is overlaid on the back surface. A resistor is formed by integrally joining by an active metal method using wax or the like. Current-carrying bonding portions are formed at both ends of the sheet-like resistance portion 18, and bonding wires 10a and 10b are connected to these portions. Inside the sheet-like resistor 18, a bonding electrode portion for current detection is formed, and bonding wires 11a and 11b are connected to this portion. A plurality of bonding wires 10a, 10b, 11a, and 11b are arranged in a direction perpendicular to the paper surface.
[0009]
This shunt resistor dissipates the heat of the resistor more effectively by the ceramic substrate 17 of several tens to 150 W / m · K, which has a higher thermal conductivity than the epoxy resin of several W / m · K. Large current detection is possible.
[0010]
However, since the sheet-like resistor 18 and the copper member 19 are overlapped with the ceramic substrate 17 and are integrally joined with silver brazing or the like, it is possible to improve performance in terms of initial heat dissipation characteristics. Below, there were the following problems.
That is, when such a structure is adopted, heat generation at the sheet-like resistance portion 18 is unavoidable, so that thermal stress is generated at the bonding interface between the resistance portion 18 and the ceramic substrate 17, and the ceramic substrate 17 is cracked. However, this crack expands as it is repeatedly used. Finally, the resistance portion 18 and the ceramic substrate 17 are separated from each other. As a result, the temperature of the resistance portion 18 rises and the initial performance cannot be maintained. There was a problem.
[0011]
Further, the shunt resistors shown in FIGS. 17 and 18 have problems in terms of miniaturization and productivity.
That is, in the shunt resistor of FIG. 17, since the flange portions 60a and 60b are soldered to the terminal 13, this joining space is necessary.
In addition, the semiconductor devices shown in FIGS. 17 and 18 naturally require a space corresponding to the size of the shunt resistor. Therefore, the package size of the semiconductor device is increased by at least 15 mm or more compared to the case where an external current transformer is used.
[0012]
In addition, in the semiconductor device shown in FIG. 18, it is necessary to join a large number of bonding wires 10a and 10b that can only carry a current of about 10A per wire in parallel. It is possible that a problem occurs in gender.
[0013]
Further, when the sheet-like resistor 18 that is a flat conductor is used like the shunt resistor shown in FIG. 18, there is a problem that the inductance is large and the high-frequency characteristics are poor. In a power semiconductor device such as an IGBT, for example, a large current of about 100 A is measured per IGBT element. In order to reduce power loss due to resistance insertion, the resistance value of the resistor is as low as milliohms. A value is required. The plate resistance having such a resistance value has a problem that the impedance due to the inductance is more dominant than the resistance at a high frequency of 100 kHz to 1 MHz, and the detection characteristic has frequency dependency.
[0014]
On the other hand, FIG. 19 is a diagram showing a semiconductor device having a shunt resistor having a flat frequency characteristic. FIG. 19 is a perspective view of the shunt resistor described in Patent Document 3, and a current sensor having a flat frequency characteristic can be obtained.
In the figure, a current sensor portion 28 made of a conductor (copper in this case) folded back into a parallel flat plate has a first flat plate portion 28a, a second flat plate portion 28c forming a parallel flat plate, and the first, The second flat plate portions 28a and 28c are formed of bent portions 28b that connect one end portions to each other. The other end portion of the first flat plate portion 28a is joined to the electrode pattern 29 by soldering to form one detection terminal 34 of the current sensor portion 28. The other end of the second flat plate portion 28 c is connected integrally with the module emitter electrode 27, and forms the other detection terminal 35 of the current sensor portion 28. The electrode pattern 29 on the emitter relay substrate 26 is connected to the anode electrode 41 of the diode element 40 and the emitter electrode 31 of the IGBT element 3 by an aluminum wire 51. Reference numeral 16 denotes an overcurrent / short-circuit current protection circuit.
[0015]
In the semiconductor device having the above configuration, currents flowing through the first and second flat plate portions 28a and 28c forming parallel plates face each other and cancel the magnetic field, so that a current sensor with flat frequency characteristics and high detection accuracy is obtained. be able to.
[0016]
However, it has been found that the semiconductor device shown in FIG. 19 has problems in detection accuracy and heat dissipation.
That is, when copper is used for the current sensor unit 28, since the resistance temperature coefficient is large, the resistance value changes depending on the environmental temperature, and high-precision current detection cannot be performed. Further, when a metal having a small temperature coefficient of resistance, such as a copper-nickel alloy, is used as the current sensor unit, the thermal resistance of the current sensor unit increases due to the low thermal conductivity. Accordingly, the portion other than the portion in contact with the electrode pattern 29 joined to the emitter relay substrate 26, which is a heat sink, becomes very high temperature, and the reliability of the joint with the electrode pattern 29 and the nearby members are adversely affected by heat. There was a problem of giving.
[0017]
[Patent Document 1]
Utility Model Registration No. 3067213 ([0018] to [0019], FIG. 1)
[Patent Document 2]
JP-A-11-97203 ([0020] to [0021], FIG. 2)
[Patent Document 3]
JP 2000-353778 A ([0022] to [0023], FIG. 1)
[0018]
[Problems to be solved by the invention]
As described above, conventionally, it has been difficult to provide a semiconductor device having excellent heat dissipation and reliability.
An object of the present invention is to provide a semiconductor device having a compact structure, capable of detecting a large current with high accuracy, and having high heat dissipation. To do.
[0019]
[Means for Solving the Problems]
In the semiconductor device according to the present invention, the shunt resistor includes a U-shaped metal plate and an insulating material provided between a pair of straight portions of the metal plate.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described, but the same or equivalent members and parts as those of the conventional one described above will be described with the same reference numerals.
Embodiment 1 FIG.
FIG. 1 is a partial cross-sectional view of a semiconductor device according to Embodiment 1 of the present invention, and FIG. 2 is a perspective view of a shunt resistor built in the semiconductor device.
In the figure, a shunt resistor 4 is incorporated in the semiconductor device. The shunt resistor 4 is bonded to the conductive pattern 5 a of the insulating circuit board 5. The insulated circuit board 5 is configured by joining aluminum nitride ceramics and a copper plate, which are frequently used as a substrate for large current. For example, a copper base plate 6 is joined to the insulating circuit board 5 with a joining material 7 made of, for example, solder. This base plate 6 which is a heat radiating plate forms a part of the outer frame of the semiconductor device, and forms a cooling passage when heat from the shunt resistor 4 is released to the outside. A case 17 made of polyphenylene sulfide is fixed to the base plate 6. The case 17 has, for example, an AC module electrode 9 for connection with a motor or the like, and a DC module electrode (not shown) on the opposite side of the module electrode 9 for connection with a DC power source such as a battery. ) Is fixed.
[0021]
For example, a semiconductor element 12 such as an IBGT, a MOSFET, or a diode is bonded to the conductive pattern portion 5 a of the insulating circuit substrate 5 by a bonding material 7. The shunt resistor 4 and the AC module electrode 9 are electrically connected by a bonding wire 10a. The conductive pattern 5a joined to the shunt resistor 4 and the adjacent semiconductor element 12 are electrically connected by a bonding wire 10b. Reference numerals 11a and 11b are bonding wires for detecting the potential difference of the shunt resistor 4, respectively.
[0022]
The shunt resistor 4 includes a U-shaped metal plate 2 made of, for example, a copper-manganese alloy, and a bonding material made of, for example, silver paste between a pair of straight portions of the metal plate 2. 3 and the insulating material 1 made of, for example, aluminum nitride ceramics. As the metal plate 2, copper nickel, nickel chromium, or the like can be used in addition to copper manganese as a resistance material having a low temperature coefficient of resistance.
[0023]
FIG. 3 is an electric circuit diagram of the semiconductor device configured as described above.
In FIG. 3, 8P and 8N are DC side module electrodes, 9U, 9V and 9W are AC side module electrodes, 12a is an IGBT, and 12b is a diode. The above-mentioned AC side module electrode 9 indicates 9U, 9V or 9W, and the semiconductor element 12 indicates 12a or 12b. The three phases may be configured inside a single power semiconductor device or may be configured by combining independent power semiconductor devices. The IGBT 12a may be a switchable power semiconductor element other than the IGBT.
[0024]
In the semiconductor device having the above configuration, there are cases where current flows from the power semiconductor device to the outside and current flows back from the outside to the power semiconductor device through the AC side module electrodes 9U, 9V, 9W. As shown in FIG. 3, by arranging the shunt resistor 4 between the AC side module electrodes 9U, 9V, 9W and the semiconductor elements 12a, 12b, the current always passes through the shunt resistor 4 in either case. . Therefore, it is possible to always grasp not only the magnitude of the current flowing through each phase but also the direction of the current flow.
The electrical circuit diagram of the semiconductor device shown in FIG. 3 is a case of a semiconductor device that converts direct current into three-phase alternating current or converts three-phase alternating current into direct current, but is not particularly limited thereto, Any power semiconductor device may be used.
[0025]
As described above, in the semiconductor device having the above-described configuration, the shunt resistor 4 includes the U-shaped metal plate 2 joined to the insulating circuit substrate 5 by the joining material 7 at the linear portion, and a pair of the metal plates 2. Since it is comprised from the insulating material 1 joined by the joining material 3 between the linear parts, flange parts 60a and 60b like the conventional shunt resistor shown in FIG. 17 required for joining of the shunt resistor No special bonding space is required.
[0026]
Further, since the shunt resistor 4 is mounted on the insulating circuit board 5 and can be connected to the AC side module electrode 9 by the bonding wire 10a from the shunt resistor 4 located in the upper part of the mounting region, the shunt resistor is incorporated. The conventional wire bonding region can be used as the shunt resistor mounting region without changing the design of the insulating circuit substrate, and the shunt resistor 4 can be mounted in that region. . As a result, a power semiconductor device incorporating a shunt resistor can be realized with the same size as the conventional one.
Further, since the insulating material 1 is inserted between the straight portions of the U-shaped metal plate 2 and fixed by the bonding material 3, it is firmer than the case of only the metal plate 2, and is formed on the upper surface of the shunt resistor 4. Even if wire bonding is performed, ultrasonic vibration is transmitted stably, and as a result, stable bonding is obtained.
[0027]
Embodiment 2. FIG.
FIG. 4 is a cross-sectional view of the shunt resistor 4 of the semiconductor device of the second embodiment. The metal plate 2 of the shunt resistor 4 has a first metal member 2a fixed to the insulating plate 1 with a bonding material 3, and a higher electrical conductivity than the first metal member 2a, and is provided in a straight line portion. And copper second metal members 2b and 2c. The second metal member 2 c is bonded to the insulated circuit board 5 with a bonding material 7.
Other configurations are the same as those in the first embodiment.
[0028]
In the shunt resistor 4 of this semiconductor device, the resistance value of the straight portion of the metal plate 2 is a parallel resistance of the first metal member 2a and the second metal members 2b and 2c. The resistance value becomes smaller than that of the resistor 4, and as a result, the potential difference becomes smaller when the same current flows. Therefore, even when the bonding position of the bonding wire 11a is shifted, the error in the resistance value of the shunt resistor 4 is reduced, and high-precision measurement is possible.
[0029]
Further, since the metal having high electrical conductivity is also a metal having high thermal conductivity, Joule heat generated mainly at the U-shaped curved portion of the first metal member 2a is generated in the second metal members 2b and 2c having high heat conductivity. Further, this heat is transmitted to the insulating circuit board 5 and the base plate 6 which is a heat radiating plate, and the heat radiating property of the shunt resistor 4 is improved as compared with the shunt resistor 4 of the first embodiment.
[0030]
Furthermore, the second metal members 2b and 2c are made of copper or copper alloy having a lower hardness than the first metal member 2a, and are provided outside the straight portion of the first metal member 2a. It also has the effect of improving the bondability.
That is, when a copper / nickel alloy is used as a member to be wire-bonded, when the wire bonding is performed directly on this member, a bonding strength deficiency occurs at a level of 0.1%, but the second metal using copper is used. It was found that when wire bonding is performed on the member 2b, the insufficient bonding strength is reduced to 1/10 or less.
[0031]
Embodiment 3 FIG.
FIG. 5 is a sectional view of shunt resistor 4 of the semiconductor device according to the third embodiment of the present invention.
The insulating plate 1 is configured by forming, for example, copper metal layers 1b and 1c having a thickness of 0.3 mm on both side surfaces of an insulating body 1a made of an aluminum nitride ceramic having a thickness of 0.635 mm, for example. The metal layers 1b and 1c have a higher electrical conductivity than the insulating material body 1a. The metal layers 1b and 1c and the metal plate 2 are joined by a joining material 3 made of, for example, silver solder. The configuration of the metal plate 2 is the same as that of the first embodiment.
[0032]
In this shunt resistor 4, as indicated by an arrow A, current flows in a diverted manner from the wire bonding portion to the metal plate 2 and the metal layer 1 c, passes through the U-shaped curved portion, and further passes through the metal plate 2. And flow into the metal layer 1b. Therefore, for the same reason as that of the second embodiment, the value of the current resistance value of the shunt resistor 4 is smaller than that of the shunt resistor 4 of the first embodiment, so that high-accuracy measurement is possible and the shunt resistor The cooling performance of the vessel 4 is improved.
[0033]
Furthermore, since the metal layers 1b and 1c are formed on both side surfaces of the insulating material main body 1a, the metal plate 2 and the insulating plate 1 can be welded to each other, heat dissipation is improved, and the metal plate 2 is inserted into the metal plate 2. Since the thickness of the insulating plate 1 can be increased to 1.235 mm in this example, for example, the bending radius of the metal plate 2 having a thickness of about 0.8 mm can be increased, and the bending process is facilitated. .
[0034]
In addition, if the plate | board thickness of the insulating-plate main body 1a is thickened, cost will become high, and if it comprises only the metal layers 1a and 1b, since insulation of a shunt resistor cannot be taken and it does not have a function as a resistor, it shows here. In addition, it is preferable that the insulating plate body 1a having a thickness of 0.635 mm and the metal layers 1b and 1c having a high electrical conductivity of about 0.3 mm are configured and arranged in a laminated structure.
[0035]
Embodiment 4 FIG.
FIG. 6 is a cross-sectional view of a principal part of the semiconductor device according to the fourth embodiment of the present invention. In the shunt resistor 4 of this semiconductor device, the metal plate 2 is joined to the insulating circuit board 5 and the first straight part 2A to which one bonding wire 11b for detecting a potential difference at the shunt resistor 4 is connected. And a second straight line portion 2B having a length shorter than that of the first straight line portion 2A. The other bonding wire 11 a is connected to the metal layer 1 b of the insulating plate 1.
[0036]
Since the shunt resistor 4 mounted as described above has an electrode portion for detecting a potential difference, it is not necessary to form an electrode on the insulating circuit board 5, and it is affected by noise. It is difficult, and a potential difference can be stably extracted without being influenced by the mounting structure and method.
That is, in comparison with the example in which the potential difference is detected by the pair of bonding wires 11a and 11b in the shunt resistor 4 of the first embodiment, the potential detection on one side from the insulating circuit board 5 is performed in the first embodiment. For this reason, the distance between the bonding positions of the pair of bonding wires 11a and 11b is increased, which is easily affected by noise. Furthermore, since the potential detection on one side is from above the insulated circuit board 5, the measurement result is affected by the temperature change of the material of the insulated circuit board 5, and the accurate resistance that is the original function for the shunt resistor 4 is reduced. It becomes impossible to detect.
On the other hand, in the shunt resistor 4 of this embodiment, since the current for detection is detected from the shunt resistor 4 itself, the potential difference can be detected stably without being influenced by the mounting technique. And since the detection position is close, it is less affected by noise. From the above results, there is an effect that an accurate current value can be detected.
[0037]
Further, as shown by an arrow B, for example, current flows from the bonding wire 10b through the first straight portion 2A, the curved portion 2C, and the bonding wire 10a of the shunt resistor 4 to the bonding portions of the bonding wires 11a and 11b. Since the potential of the equipotential line is sparse, the detection potential error due to the connection position error of the bonding wires 11a and 11b is reduced, and highly accurate detection is possible.
[0038]
Embodiment 5. FIG.
FIG. 7 is a fragmentary cross-sectional view of a semiconductor device according to Embodiment 5 of the present invention. The shunt resistor 4 has one end connected to a pair of linear portions of a U-shaped metal plate 50a whose curved surface portion is directed toward the insulated circuit board 5 and the metal plate 50a made of a copper-manganese alloy or the like. The other end portion is composed of L-shaped terminal members 50b and 50c that are welded to the conductive pattern 5a of the insulated circuit board 5, respectively. The L-shaped and plate-like terminal members 50b and 50c are made of a copper member having a higher electrical conductivity than the metal plate 50a.
[0039]
In this embodiment, it is possible to reduce the thermal resistance from the curved surface portion of the metal plate 50a processed into a U-shape that mainly generates heat to the insulating circuit board 5. That is, by arranging the curved surface portion of the U-shaped metal plate 50a toward the insulating circuit board 5, Joule heat generation at the curved surface portion of the U-shaped metal plate 50a is caused by the metal plate 50a. It is possible to reach the insulating circuit board 5 through almost the shortest heat transfer path without almost passing through the straight line portion, and the heat dissipation of the shunt resistor 4 is improved.
[0040]
Embodiment 6 FIG.
8 is a partial cross-sectional view of the semiconductor device according to the sixth embodiment of the present invention. The shunt resistor 4 of this semiconductor device includes a U-shaped metal plate 61a and one linear portion of a pair of linear portions of the metal plate 61a, one end connected to the conductive pattern of the insulating circuit board 5 at the other end. One end of the first terminal member 61b having an L-shaped cross section connected to 5a and the other straight part of the pair of straight parts of the metal plate 61a are connected to the AC module electrode 9 at the other end. Plate-shaped second terminal member 61c.
[0041]
The first terminal member 61b is made of a copper member having a larger heat passage cross-sectional area than the second terminal member 61c and having a higher electrical conductivity than the metal plate 61a and the second terminal member 61c. The 2nd terminal member 61c is comprised with a flexible member, and the curved surface site | part is formed in the middle.
[0042]
In the semiconductor device described above, since the insulating circuit board 5 and the AC module electrode 9 are connected by the first terminal member 61b and the second terminal member 61c of the shunt resistor 4, the bonding wires can be greatly reduced. .
Further, Joule heat generation at the curved surface portion of the metal plate 61a is transmitted to the insulating circuit substrate 5 and further to the base plate 6 which is a heat radiating plate through the first terminal member 61b, and is radiated. Since the first terminal member 61b is made of a relatively thick member to keep the thermal resistance low, the heat generation of the shunt resistor 4 is kept low.
[0043]
Furthermore, the reliability of the connection part of the shunt resistor 4 and the insulating circuit board 5 or the AC module electrode 9 can be maintained over a long period of time. That is, since there is a difference in thermal expansion coefficient between the base plate 6 and the case 17, the distance between the insulating circuit board 5 and the AC side module electrode 9 is displaced by about 0.1 to 0.2 mm due to temperature change. When the rigidity of the shunt resistor 4 is high, stress is generated in the connecting portion due to this displacement, and the connecting portion is broken by the temperature cycle.
However, the second terminal member 61c uses a relatively thin member, has a curved surface portion, and has flexibility. Therefore, it is possible to prevent this stress from being absorbed and to generate an excessive stress in the connecting portion, and to maintain the reliability of the connecting portion over a long period of time.
[0044]
Further, the first terminal member 61b is joined to the insulating circuit substrate 5 with, for example, solder or the like, and the end of the second terminal member 61c is joined to the AC side module electrode 9 in the portion that was the wire bonding region of the semiconductor device. Therefore, it is possible to use the wire bonding region as the shunt resistor mounting region without changing the design of the insulating circuit board of the power semiconductor device that does not incorporate the shunt resistor. As a result, a power semiconductor device incorporating the shunt resistor 4 can be realized with the same size as the conventional one.
[0045]
In this embodiment as well, similarly to the fifth embodiment, the curved surface portion of the metal plate 50a may be directed downward and directed toward the insulated circuit board 5 side.
In the shunt resistor of this embodiment and the fifth embodiment as well, as described in the first to fourth embodiments, the insulating plate is provided between the straight portions of the U-shaped metal plate. Of course, the heat dissipation and current detection accuracy of the resistor can be further improved and can be made more robust.
[0046]
Embodiment 7 FIG.
FIG. 9 is a perspective view of the shunt resistor 4 of the semiconductor device according to the seventh embodiment. The shunt resistor 4 is the same as that of the second embodiment except that a hole 2d is formed in the curved surface portion of the metal plate 2.
This hole 2 is, for example, CO 2 It is formed by irradiating the intermediate portion of the curved surface portion of the metal plate 2 with a laser.
[0047]
The shunt resistor 4 is manufactured according to the following procedure.
First, the first metal member 2a, the second metal member 2b, and the third metal member 2c are joined. Next, the insulating material 1 is joined with the joining material 3 to the second metal member 2b and the third metal member 2c of the metal plate 2 thus configured, and the metal plate 2 is bent into a U-shape. Process. The resistance value of the shunt resistor 4 in this state is set to be lower than the target value. The variation in resistance value depends on assembly accuracy and material characteristics.
[0048]
Next, the resistance value of the shunt resistor 4 is measured, and the size of the hole 2d is determined according to the difference between the target value and the measured value. This hole 2d is formed on the first metal member 2a with CO. 2 It is formed by laser irradiation.
Further, in some cases, the resistance value of the shunt resistor 4 is measured again. 2 Laser irradiation is performed.
Through the above steps, the highly accurate shunt resistor 4 can be manufactured.
Instead of the holes 2d, slits may be formed as notches on both side edges of the curved surface portion of the first metal member 2a. In short, any current path may be used.
[0049]
Embodiment 8 FIG.
10 is a perspective view of the shunt resistor 4 of the semiconductor device according to the eighth embodiment of the present invention, and FIG. 11 is a cross section of the shunt resistor 4 of FIG. In the figure is there.
In this shunt resistor 4, an insulating material 1 made of a thermosetting synthetic resin such as an epoxy resin is sandwiched between U-shaped metal plates 2. The metal plate 2 is welded so that the first metal member 2f and the second metal member 2g are brought into contact with both end surfaces of the curved resistor 2e. The resistor 2e is made of a copper-manganese alloy, and the first metal member 2f and the second metal member 2g are made of a metal having high electrical conductivity such as copper.
In addition, copper nickel, nickel chromium, etc. other than copper manganese as a resistance material with a low temperature coefficient can be used as the material of the resistor 2e.
Further, as the insulating material 1, a thermoplastic synthetic resin such as PPS can be used in addition to a thermosetting resin such as an epoxy resin. Moreover, in order to improve thermal conductivity as needed, you may make it mix | blend the highly heat conductive filler which has insulation, such as aluminum nitride ceramics.
[0050]
The metal plate 2 of the shunt resistor 4 is similar to the metal plate 2 of the shunt resistor 4 of the second embodiment, and is a first metal that is a current path having a smaller current resistance and thermal resistance than the resistor 2e. The member 2f and the second metal member 2g are secured, and the same effect as described in the second embodiment is obtained.
[0051]
In this shunt resistor 4, since the insulating material 1 is made of a thermosetting or thermoplastic synthetic resin, the insulating material 1 is in close contact with the inside of the metal plate 2 and it is easy to improve heat dissipation. .
That is, when the insulating material 1 is a thermosetting resin, the liquid resin before curing is poured into the U-shaped interior of the metal plate 2 and then cured by heating, so that the insulating material 1 is placed inside the metal plate 2. The entire surface can be adhered without gaps.
Even in the case where the insulating material 1 is a thermoplastic resin, the insulating material 1 is heated on the entire surface inside the metal plate 2 in the same manner as in the case of the thermosetting resin by pouring the resin into the metal plate 2 in a molten state. It can be adhered without gaps. By doing in this way, while being able to ensure a heat conduction area to the maximum, the increase in thermal resistance in the interface of the insulating plate 1 and the metal plate 2 can be suppressed.
[0052]
Since these synthetic resins can use commonly used potting, transfer molding, and injection molding techniques, they are excellent in mass productivity. The insulating material 1 is not limited to this, and the same effect can be obtained as long as the insulating material 1 has insulating properties and thermal conductivity and can adhere to the entire inner surface of the metal plate 2 without a gap. Needless to say.
[0053]
Embodiment 9 FIG.
FIG. 12 is a partial cross-sectional view of the semiconductor device of the ninth embodiment.
In this embodiment, the shunt resistor 4 On the insulated circuit board 5 side, at the boundary between the resistor 2e and the second metal member 2h The difference from the shunt resistor 4 of the eighth embodiment is that it has a step.
[0054]
When the shunt resistor 4 according to the eighth embodiment is bonded to the insulating circuit board 5, the bonding material 7 made of a brazing material such as solder may be melted and spread to adhere to the resistor 2e. When the bonding material 7, which is a conductive material having a higher electrical conductivity than the resistor 2 e, adheres to the resistor 2 e, the resistor 2 e and the bonding material 7 become parallel resistance at that location, and the resistance value changes. The rate of this change depends on the amount of bonding material 7 attached and its range. Since it is virtually impossible to control the adhesion amount of the bonding material 7 in the manufacturing process, a stable resistance value cannot be obtained for the shunt resistor 4.
In contrast, in the ninth embodiment, by providing a step in the second metal member 2h, the bonding material 7 for bonding the shunt resistor 4 and the insulating circuit substrate 5 spreads out and adheres to the resistor 2e. Can be prevented. Accordingly, the resistance value of the resistor 2e does not change or vary due to adhesion of the bonding material 7, and a highly accurate and stable potential difference can be detected.
[0055]
In addition, as shown in FIG. 13, as shown in the 2nd metal member 2i, you may make it form the 2nd metal member 2i by bending.
[0056]
Embodiment 10 FIG.
FIG. 14 is a cross-sectional view of the shunt resistor 4 of the semiconductor device according to the tenth embodiment, and has a higher electrical conductivity than the metal plate 2 outside the pair of straight portions of the U-shaped metal plate 2 made of a copper manganese alloy. The first metal member 2k and the second metal member 21 are joined. In addition, the same insulating material 1 as that in the eighth embodiment is adhered inside the metal plate 2.
[0057]
In the shunt resistor 4 of this embodiment, the insulating material 1 is in close contact with the inside of the metal plate 2, and the same effect as that of the eighth embodiment can be obtained, and the first metal member 2k and the second metal member 2k. A step is formed by the metal member 21, and the bonding material 7 for bonding the shunt resistor 4 and the insulating circuit substrate 5 can be prevented from spreading and adhering to the curved surface portion of the metal plate 2.
Therefore, the resistance value of the metal plate 2 does not change or vary due to the adhesion of the bonding material 7, and a highly accurate and stable potential difference can be detected.
[0058]
Embodiment 11 FIG.
FIG. 15 is a cross-sectional view of the shunt resistor 4 of the semiconductor device of the eleventh embodiment, in which the curved surface portion of the metal plate 2 is covered with a cover body 2m made of the same material as the insulating material 1. Different from Form 10.
In this embodiment, when the shunt resistor 4 is bonded to the insulating circuit board 5 with the bonding material 7, the bonding material 7 melts and scatters, but the curved surface portion of the metal plate 2 is covered with the cover body 2m. Therefore, the bonding material 7 does not adhere to the curved surface portion of the metal plate 2.
[0059]
Embodiment 12 FIG.
FIG. 16 is a partial cross-sectional view of the semiconductor device according to the twelfth embodiment, which is different from the eighth embodiment in that four protrusions 13 are formed on the joint surface of the second metal member 2g with the insulating circuit substrate 5. .
[0060]
In the eighth embodiment, the shunt resistor 4 and the insulating circuit board 5 have different linear expansion coefficients, so that stress acts on the bonding material 7 due to a temperature change. When this stress is repeated, the bonding material 7 is cracked, which may impair the reliability of the product.
For this reason, by forming the protrusion 13 on the second metal member 2g, the thickness of the bonding material 7 corresponding to the height of the protrusion 13 can be ensured, and the thickness of the bonding material 7 sufficient to resist stress. Thus, the occurrence of cracks in the bonding material 7 can be prevented.
The number of the protrusions 13 may be three in order to prevent the shunt resistor 4 from tilting with respect to the insulating circuit board 5, but is set to four in this embodiment in order to reliably prevent tilting. .
The protrusion 13 may be formed directly by pressing the second metal member 2g. However, as a simple method, an aluminum wire is ultrasonically welded to the joint surface of the shunt resistor 4 with the insulating circuit board 5 or the like. You may join by the method of.
Of course, the formation of the protrusion 13 on the joint surface of the shunt resistor 4 with the insulating circuit board 5 can be applied to the shunt resistor 4 other than the eighth embodiment.
[0061]
【The invention's effect】
As described above, according to the semiconductor device of the present invention, the shunt resistor includes the U-shaped metal plate and the insulating plate joined by the joining material between the pair of linear portions of the metal plate. Therefore, Joule heat generated by the resistor can be efficiently discharged even when detecting a large current. In addition, the shunt resistor can be reduced in size and is solid, and the bonding strength of wire bonding is stabilized.
[Brief description of the drawings]
FIG. 1 is a partial cross-sectional view of a semiconductor device according to a first embodiment of the present invention.
FIG. 2 is a perspective view of the shunt resistor of FIG.
FIG. 3 is an electric circuit diagram of the semiconductor device of FIG. 1;
FIG. 4 is a sectional view of a shunt resistor built in a semiconductor device according to a second embodiment of the present invention.
FIG. 5 is a cross-sectional view of a shunt resistor built in a semiconductor device according to a third embodiment of the present invention.
FIG. 6 is a partial sectional view of a semiconductor device according to a fourth embodiment of the present invention.
FIG. 7 is a partial sectional view of a semiconductor device according to a fifth embodiment of the present invention.
FIG. 8 is a partial sectional view of a semiconductor device according to a sixth embodiment of the present invention.
FIG. 9 is a perspective view of a shunt resistor built in a semiconductor device according to a seventh embodiment of the present invention.
FIG. 10 is a perspective view of a shunt resistor built in a semiconductor device according to an eighth embodiment of the present invention.
11 is a cross-sectional view of the shunt resistor of FIG.
FIG. 12 is a partial sectional view of a semiconductor device according to a ninth embodiment of the present invention.
13 is a partial cross-sectional view of a semiconductor device incorporating a shunt resistor that is a modification of the shunt resistor of FIG.
FIG. 14 is a sectional view of a shunt resistor built in a semiconductor device according to a tenth embodiment of the present invention.
15 is a cross sectional view of a shunt resistor built in a semiconductor device according to an eleventh embodiment of the present invention. FIG.
FIG. 16 is a partial sectional view of a semiconductor device according to a twelfth embodiment of the present invention.
FIG. 17 is a cross-sectional view of a conventional shunt resistor.
FIG. 18 is a partial cross-sectional view of a conventional semiconductor device.
FIG. 19 is a perspective view of a conventional semiconductor device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Insulation material, 1a Insulation board main body, 1b, 1c metal layer, 2 metal plate, 2a 1st metal member, 2b, 2c 2nd metal member, 2d hole (notch part), 2e resistor, 2f, 2k 1st metal member, 2g, 2h, 2i, 2l 2nd metal member, 2m cover body, 2A 1st straight line part, 2B 2nd straight line part, 2C curved surface part, 4 shunt resistor, 5 insulation circuit board , 6 base plate (heat sink), 9 AC side module electrode, 10a, 10b, 11a, 11b bonding wire, 12 semiconductor element, 13 protrusion, 50a, 61a metal plate, 50b, 50c terminal member, 61b first terminal member, 61c Second terminal member.

Claims (13)

放熱板上の絶縁回路基板に取り付けられた半導体素子に流れる電流を検出するシャント抵抗器が内蔵された半導体装置であって、
前記シャント抵抗器は、U字状の金属板と、この金属板の一対の直線部位間に設けられた絶縁材とを備え、
前記絶縁材は、セラミックスで構成された絶縁材本体と、この絶縁材本体の両面に形成され絶縁材本体よりも電気伝導率が高い金属層とを有している半導体装置。
A semiconductor device having a built-in shunt resistor for detecting a current flowing in a semiconductor element attached to an insulating circuit board on a heat sink,
The shunt resistor includes a U-shaped metal plate and an insulating material provided between a pair of linear portions of the metal plate,
The said insulating material is a semiconductor device which has the insulating material main body comprised with ceramics, and the metal layer which is formed in both surfaces of this insulating material main body, and whose electrical conductivity is higher than an insulating material main body.
放熱板上の絶縁回路基板に取り付けられた半導体素子に流れる電流を検出するシャント抵抗器が内蔵された半導体装置であって、
前記シャント抵抗器は、U字状の金属板と、この金属板の一対の直線部位間に設けられた絶縁材とを備え、
前記金属板は、前記絶縁材に接合された第1の金属部材と、この第1の金属部材よりも電気伝導率が高く、前記絶縁回路基板に接合された第2の金属部材とを有している半導体装置。
A semiconductor device having a built-in shunt resistor for detecting a current flowing in a semiconductor element attached to an insulating circuit board on a heat sink,
The shunt resistor includes a U-shaped metal plate and an insulating material provided between a pair of linear portions of the metal plate,
The metal plate includes a first metal member bonded to the insulating material, and a second metal member having a higher electric conductivity than the first metal member and bonded to the insulating circuit board. Semiconductor device.
放熱板上の絶縁回路基板に取り付けられた半導体素子に流れる電流を検出するシャント抵抗器が内蔵された半導体装置であって、
前記シャント抵抗器は、U字状の金属板と、この金属板の一対の直線部位間に設けられた絶縁材とを備え、
前記金属板は、曲面形状の抵抗体と、この抵抗体の両端面に接合され抵抗体よりも電気伝導率が高い金属部材で構成されている半導体装置。
A semiconductor device having a built-in shunt resistor for detecting a current flowing in a semiconductor element attached to an insulating circuit board on a heat sink,
The shunt resistor includes a U-shaped metal plate and an insulating material provided between a pair of linear portions of the metal plate,
The said metal plate is a semiconductor device comprised with the curved-surface-shaped resistor and the metal member which is joined to the both end surfaces of this resistor, and whose electrical conductivity is higher than a resistor.
放熱板上の絶縁回路基板に取り付けられた半導体素子に流れる電流を検出するシャント抵抗器が内蔵された半導体装置であって、
前記シャント抵抗器は、U字状の金属板と、この金属板の一対の直線部位間に設けられた絶縁材とを備え、
前記金属板は、曲面形状の抵抗体と、この抵抗体の両端面に接合され抵抗体よりも電気伝導率が高い金属部材で構成され、
前記直線部位の前記絶縁回路基板側には、前記抵抗体と前記金属部材との境界部に段差が設けられている半導体装置。
A semiconductor device having a built-in shunt resistor for detecting a current flowing in a semiconductor element attached to an insulating circuit board on a heat sink,
The shunt resistor includes a U-shaped metal plate and an insulating material provided between a pair of linear portions of the metal plate,
The metal plate is composed of a curved resistor and a metal member bonded to both end faces of the resistor and having a higher electrical conductivity than the resistor,
A semiconductor device in which a step is provided at a boundary portion between the resistor and the metal member on the insulating circuit board side of the linear portion.
放熱板上の絶縁回路基板に取り付けられた半導体素子に流れる電流を検出するシャント抵抗器が内蔵された半導体装置であって、
前記シャント抵抗器は、U字状の抵抗体からなる金属板と、この金属板の一対の直線部位間に設けられた絶縁材と、前記金属板の前記直線部位の外側に接合され前記金属板よりも電気伝導率が高い板状の金属部材とを備えている半導体装置。
A semiconductor device having a built-in shunt resistor for detecting a current flowing in a semiconductor element attached to an insulating circuit board on a heat sink,
The shunt resistor includes a metal plate made of a U-shaped resistor, an insulating material provided between a pair of linear portions of the metal plate, and the metal plate joined to the outside of the linear portion of the metal plate. A semiconductor device comprising a plate-like metal member having a higher electrical conductivity than the other.
前記絶縁材は、前記金属板の一対の前記直線部位に接合材で接合されている請求項1〜5の何れか1項に記載の半導体装置。  The semiconductor device according to claim 1, wherein the insulating material is bonded to the pair of linear portions of the metal plate with a bonding material. 前記絶縁材は、セラミックスで構成された絶縁材本体と、この絶縁材本体の両面に形成され絶縁材本体よりも電気伝導率が高い金属層とを有している請求項2〜6の何れか1項に記載の半導体装置。  The said insulating material has either the insulating material main body comprised with ceramics, and the metal layer which is formed in both surfaces of this insulating material main body, and whose electrical conductivity is higher than an insulating material main body. 2. A semiconductor device according to item 1. 前記絶縁材は、前記金属板の一対の前記直線部位間に熱可塑性または熱硬化性の合成樹脂が充填されて構成されている請求項2〜5の何れか1項に記載の半導体装置。  The semiconductor device according to claim 2, wherein the insulating material is configured by filling a thermoplastic or thermosetting synthetic resin between a pair of the linear portions of the metal plate. 前記金属板は、前記絶縁材に接合された第1の金属部材と、この第1の金属部材よりも電気伝導率が高く、前記絶縁回路基板に接合された第2の金属部材とを有している請求項1に記載の半導体装置。  The metal plate includes a first metal member bonded to the insulating material, and a second metal member having a higher electric conductivity than the first metal member and bonded to the insulating circuit board. The semiconductor device according to claim 1. 前記金属板の曲面部位には、絶縁性の合成樹脂で覆ったカバー体が設けられている請求項1〜9の何れか1項に記載の半導体装置。  The semiconductor device according to claim 1, wherein a cover body covered with an insulating synthetic resin is provided on a curved surface portion of the metal plate. 放熱板上の絶縁回路基板に取り付けられた半導体素子に流れる電流を検出するシャント抵抗器が内蔵された半導体装置であって、
前記シャント抵抗器は、U字状の金属板と、この金属板の一対の直線部位の一方の直線部位に一端部が接続され他端部が前記絶縁回路基板に接続された板状の第1端子部材と、前記金属板の一対の直線部位の他方の直線部位に一端部が接続され他端部が外部と電気的に接続される電極と接続されている板状の第2端子部材とから構成されており、
前記第1端子部材は、前記第2端子部材よりも熱通路断面積が大きく、また前記金属板および第2端子部材より電気伝導率が高い半導体装置。
A semiconductor device having a built-in shunt resistor for detecting a current flowing in a semiconductor element attached to an insulating circuit board on a heat sink,
The shunt resistor is a U-shaped metal plate and a plate-shaped first plate having one end connected to one straight portion of a pair of straight portions of the metal plate and the other end connected to the insulating circuit board. From the terminal member and a plate-like second terminal member connected to an electrode whose one end is connected to the other straight portion of the pair of straight portions of the metal plate and whose other end is electrically connected to the outside Configured,
The first terminal member has a larger heat passage cross-sectional area than the second terminal member, and has a higher electrical conductivity than the metal plate and the second terminal member.
前記第2端子部材は、可撓性部材で構成されている請求項11に記載の半導体装置。  The semiconductor device according to claim 11, wherein the second terminal member is formed of a flexible member. 前記シャント抵抗器は、半導体素子と、交流側電極との間に設けられ、半導体素子と交流側電極とに電気的に接続されている請求項1〜12の何れか1項に記載の半導体装置。  The semiconductor device according to claim 1, wherein the shunt resistor is provided between the semiconductor element and the AC side electrode, and is electrically connected to the semiconductor element and the AC side electrode. .
JP2002273142A 2001-10-23 2002-09-19 Semiconductor device Expired - Lifetime JP4127641B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002273142A JP4127641B2 (en) 2001-10-23 2002-09-19 Semiconductor device

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2001324590 2001-10-23
JP2001-324590 2001-10-23
JP2001-333051 2001-10-30
JP2001333051 2001-10-30
JP2002273142A JP4127641B2 (en) 2001-10-23 2002-09-19 Semiconductor device

Publications (2)

Publication Number Publication Date
JP2003203805A JP2003203805A (en) 2003-07-18
JP4127641B2 true JP4127641B2 (en) 2008-07-30

Family

ID=27670241

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002273142A Expired - Lifetime JP4127641B2 (en) 2001-10-23 2002-09-19 Semiconductor device

Country Status (1)

Country Link
JP (1) JP4127641B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11549974B2 (en) 2020-04-13 2023-01-10 Yazaki Corporation Current sensor

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10333328B3 (en) * 2003-07-23 2005-01-27 Semikron Elektronik Gmbh Power semiconductor module in scalable construction technology
DE102005062783A1 (en) 2005-12-28 2007-07-05 Robert Bosch Gmbh Electronic module for controlling electric motor, has upper substrate comprising smaller base surface than base body of lower substrate, and power component fastened to lower substrate at outer side of outer periphery of upper substrate
GB0805585D0 (en) 2008-03-27 2008-04-30 Ultra Electronics Ltd Current measurement apparatus
US8248202B2 (en) * 2009-03-19 2012-08-21 Vishay Dale Electronics, Inc. Metal strip resistor for mitigating effects of thermal EMF
JP2011069809A (en) * 2009-08-31 2011-04-07 Hitachi Automotive Systems Ltd Control system and semiconductor device used therein
JP5280332B2 (en) 2009-10-30 2013-09-04 日立オートモティブシステムズ株式会社 Semiconductor device for current control and control device using the same
JP5445329B2 (en) * 2010-05-25 2014-03-19 株式会社デンソー Power semiconductor device
JP5406145B2 (en) 2010-08-31 2014-02-05 日立オートモティブシステムズ株式会社 Semiconductor device for current control and control device using the same
DE112011105178B4 (en) * 2011-04-22 2017-11-09 Mitsubishi Electric Corporation Semiconductor device
JP5395127B2 (en) 2011-07-14 2014-01-22 日立オートモティブシステムズ株式会社 Semiconductor device for current control and control device using the same
DE102013200580A1 (en) * 2013-01-16 2014-07-17 Robert Bosch Gmbh Measuring arrangement with a measuring resistor
DE102013219571B4 (en) 2013-09-27 2019-05-23 Infineon Technologies Ag Power semiconductor module with vertical shunt resistor
DE102014011593B4 (en) * 2014-08-01 2016-05-04 Isabellenhütte Heusler Gmbh & Co. Kg Resistance, in particular low-impedance current measuring resistor
JP7173755B2 (en) * 2018-05-17 2022-11-16 Koa株式会社 Mounting structure of shunt resistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11549974B2 (en) 2020-04-13 2023-01-10 Yazaki Corporation Current sensor

Also Published As

Publication number Publication date
JP2003203805A (en) 2003-07-18

Similar Documents

Publication Publication Date Title
JP4127641B2 (en) Semiconductor device
JP4499577B2 (en) Semiconductor device
US8031043B2 (en) Arrangement comprising a shunt resistor and method for producing an arrangement comprising a shunt resistor
JP6979864B2 (en) Power semiconductor devices and their manufacturing methods
KR100454376B1 (en) Power semiconductor module and motor driving system employing the same
JP4009056B2 (en) Power module
US5686758A (en) Semiconductor device having integral structure of case and external connection terminals
CN104517939B (en) vertical shunt resistance
JP5659938B2 (en) Semiconductor unit and semiconductor device using the same
JP4403665B2 (en) Semiconductor device
JP2019170099A (en) Power semiconductor device
CN110771027B (en) Power semiconductor device and power conversion device using the same
JP2009164647A (en) Semiconductor device
JP2005129826A (en) Power semiconductor device
CN108292642B (en) Power semiconductor device
JP4949159B2 (en) Circuit board, package using the same, and electronic device
JP7392319B2 (en) semiconductor equipment
JP4864990B2 (en) Semiconductor device
WO2021220357A1 (en) Semiconductor device
EP4257986A1 (en) Current shunt with reduced temperature relative to voltage drop
JP5659171B2 (en) Semiconductor device and inverter device using the same
JP7301164B2 (en) power converter
WO2023222195A1 (en) Power module and method for producing a power module
WO2023017708A1 (en) Semiconductor device
WO2023017707A1 (en) Semiconductor device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20041124

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20060711

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060906

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070703

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070831

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080108

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080131

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20080507

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20080509

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110523

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 4127641

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110523

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120523

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120523

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130523

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140523

Year of fee payment: 6

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term