JP4499577B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP4499577B2
JP4499577B2 JP2005011397A JP2005011397A JP4499577B2 JP 4499577 B2 JP4499577 B2 JP 4499577B2 JP 2005011397 A JP2005011397 A JP 2005011397A JP 2005011397 A JP2005011397 A JP 2005011397A JP 4499577 B2 JP4499577 B2 JP 4499577B2
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electrode
lead
semiconductor element
semiconductor device
surface
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JP2006202885A (en
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聡 平川
進吾 須藤
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三菱電機株式会社
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Description

  The present invention relates to a semiconductor device, and more particularly to a power semiconductor device in which a semiconductor element and an external electrode are connected by leads.

In order to take out an electric signal from a semiconductor element included in the power semiconductor device, the surface electrode and the external electrode of the semiconductor element are connected by a wiring such as an aluminum wire. Recently, in order to reduce wiring resistance, plate-like leads are used for wiring instead of wires. Furthermore, a structure in which the lead is subjected to a rough surface treatment in order to improve the adhesion with the sealing resin as a housing has been proposed (see, for example, Patent Document 1).
JP 2002-151554 A

However, when the plate-like lead wiring is used, there is a problem in that the sealing resin does not easily enter the lower part of the lead wiring and an unfilled region of the sealing resin is formed. Such an unfilled region causes a starting point of peeling of the sealing resin and a cause of insulation failure, and reduces the reliability of the power semiconductor device. In particular, in the thinned power semiconductor device, the occurrence of unfilled regions was significant.
In addition, since the lead wiring is wider than the wire wiring, there is a problem that the inspection process becomes complicated because it is a hindrance when visually inspecting the bonding state of the semiconductor element or the like.

  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a semiconductor device in which a semiconductor element and an external electrode are connected by a lead wiring to prevent an unfilled region of a sealing resin from occurring and an easy test process.

  The present invention provides a semiconductor substrate having a front surface and a back surface, a first electrode provided on the front surface, a second electrode provided on the back surface, and a surface provided between the first electrode and the second electrode. A semiconductor element comprising a control electrode for controlling the current of the semiconductor element, a junction connected to the first electrode of the semiconductor element, and a lead comprising a wiring part extending substantially parallel to the surface of the semiconductor element from the junction A semiconductor device including at least a semiconductor element and a housing made of an insulating resin that embeds the lead, wherein the lead has a through hole in the wiring portion, and the through hole is filled with the insulating resin. This is a semiconductor device.

  As described above, in the semiconductor device according to the present invention, since the sealing resin can be filled through the through hole provided in the lead, complete resin sealing is possible even in a particularly thin semiconductor device. Moreover, inspection by visual inspection or the like can be performed through the through hole, and the inspection process can be simplified.

  Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. In the following description, “top”, “bottom”, “left”, “right” and names including these terms are used as appropriate, but these directions facilitate understanding of the invention with reference to the drawings. Therefore, a mode in which the embodiment is inverted upside down or rotated in an arbitrary direction is naturally included in the technical scope of the present invention.

Embodiment 1 FIG.
FIG. 1 is a perspective view of a power semiconductor device according to a first embodiment of the present invention, represented as a whole by 100, and FIG. 2 is a cross-sectional view of FIG. 1 viewed in the II direction. is there. In FIG. 1, the resin casing and the like are omitted for easy understanding.

The power semiconductor device 100 includes a heat dissipation block 1. The heat dissipating block 1 preferably has a high electric conductivity and high heat conductivity, and is made of, for example, a copper plate having a thickness of 3 mm. On the heat dissipation block 1, a collector electrode (not shown), which is a second main electrode of the IGBT 2, and a back electrode of the FWDi (free wheel diode) 3 are electrically and mechanically connected by solder 4. For example, the IGBT 2 has a thickness of 0.25 mm and a vertical and horizontal length of 12 mm, respectively. The FWDi 3 has a thickness of 0.25 mm, a vertical length of 13.5 mm, and a horizontal length of 12 mm, for example. As the solder 4, for example, Sn-Ag-Cu solder having a thickness of 0.15 mm is used.
The heat dissipating block 1 serves as both the heat dissipating means of the IGBT 2 and FWDi 3 and the wiring on the back side of both elements.

For example, a lead 5 made of Cu having a thickness of 0.3 mm and a width of 10 mm is joined to the emitter electrode (not shown) which is the first main electrode of the IGBT 2 and the surface electrode of the FWDi 3 by using the solder 4. Specifically, a multilayer metal film (not shown) of Au / Ni / Mo / Al is formed by vapor deposition from the outermost surface as a metal film having good solderability on the surfaces of IGBT2 and FWDi3, Leads 5 are bonded onto the metal film.
The lead 5 has a joint part 5A with the IGBT 2, a joint part 5B with the FWDi3, and wiring parts 5C and 5D connected to the joint parts 5A and 5B through the step part 5E. The step portion 5E has a height of 0.3 mm and is formed by bending the lead 5. Junction parts 5A and 5B and the electrodes of IGBT2 and FWDi3 are electrically connected to each other. For the solder 4, for example, Sn—Ag—Cu solder having a thickness of 0.1 mm is used. Junction part 5A, 5B and wiring part 5C, 5D are substantially parallel.

  The heat dissipating block 1 and the lead 5 are electrically connected to electrode terminals 6A and 6B made of a lead frame, respectively, and current is input / output from / to the outside.

  The lead 5 and the electrode terminal 6B are connected to the outside of the heat dissipation block 1 using, for example, ultrasonic welding. When joining in the vicinity of the heat radiating block 1, it is necessary to arrange a fixing jig or the like on the heat radiating block 1, and it is necessary to devise measures to avoid interference such as jig interference and tool holding. For this reason, it is preferable to join outside the heat dissipation block 1 so that the joining process of the lead 5 and the electrode terminal 6B does not become complicated.

  A gate electrode (not shown) which is a third electrode of the IGBT 2 and an electrode terminal 6C formed from the lead frame together with the electrode terminals 6A and 6B are connected by an aluminum bonding wire 7, for example. Further, the heat dissipation block 1, IGBT2, FWDi3, leads 5 and the like are sealed with a thermosetting resin such as an epoxy resin using a transfer molding method, and the resin casing 8 is formed.

On the back surface of the heat dissipation block 1, for example, an insulating layer 9 mainly made of an epoxy material having a thickness of 0.2 mm and superior in thermal conductivity to the resin casing 8 is fixed. The structure is such that insulation is maintained between the device 100 and a radiating fin (not shown) attached to the back surface.
Note that the lead frame is cut after resin sealing, and the portions of the electrode terminals 6A, 6B, 6C exposed from the resin casing 8 serve as external terminals.

A circular through hole 10 having a diameter of approximately 2 mm is provided between the wiring portion 5C between the joint portions 5A and 5B of the lead 5 and between the joint portion between the joint portion 5B and the electrode terminal 6B.
As described above, in the power semiconductor device 100 according to the first exemplary embodiment, the through hole 10 is provided in the lead 5 at a position facing the heat dissipation block 1.

  When a lead having no through hole is used, a gap of approximately 0.8 mm is provided between the heat dissipation block 1 and the lead 5, and approximately 0. 0 is provided between the surface of the IGBT 2 and FWDi 3 and the lead 5 (bending portion). A 4 mm gap is provided. The heat dissipation block 1 and the lead 5 must be electrically insulated from each other. In this case, since the space insulating distance is insufficient with only air, it is necessary to fill this space with an insulating resin. Moreover, in order to ensure the creeping insulation distance between the front and back surfaces of the respective elements in the outer peripheral portions of the IGBT2 and FWDi3, it is necessary to be filled with an insulating resin.

  However, when the width of the lead 5 is, for example, 10 mm, the distance from the side of the lead 5 to the center is as long as 5 mm. Moreover, the space | interval of the thermal radiation block 1 and the lead | read | reed 5 of the area | region with which resin is filled is 0.8 mm and 0.4 mm as mentioned above. For this reason, in particular, there is a problem that an area having a height of 0.4 mm is hardly filled with resin, and an unfilled area remains with a probability of approximately 10%.

  On the other hand, shortening the resin inflow distance or increasing the height is effective for eliminating the unfilled region. Therefore, it is possible to reduce the width of the lead 5 and the bonding portions 5A and 5B. It is also possible to facilitate the inflow of the resin by increasing the bending height. However, this means has a problem that the capacity of the current that can be passed through the lead 5 is reduced, and if the height is increased, it is difficult to reduce the thickness of the power semiconductor device.

  Therefore, in the power semiconductor device 100, the lead 5 is provided with the through hole 10 so that the resin can be filled through the through hole 10. As a result, the inflow distance of the resin to the outer peripheral portion of the IGBT 2 and FWDi 3 is less than half of the conventional one, and in particular, the distance from the through hole 10 can be shortened to 2 mm near the center of the outer peripheral portion. The occurrence was significantly reduced.

  As described above, in the power semiconductor device 100 according to the first embodiment, in the resin injection process in the transfer mold, a narrow gap between the heat dissipation block 1 and the lead 5 and a narrower gap between the IGBT 2 and the FWDi 3. It is possible to inject without leaving an unfilled region of resin, and a thin package can be manufactured without adversely affecting the insulation characteristics.

  In the power semiconductor device 100, the case where the IGBT is used has been described. However, the same effect can be obtained with a MOSFET or the like which is a power semiconductor element having a gate wiring like the IGBT. Further, such a structure may be applied not only to a power semiconductor element but also to other small current control semiconductor elements.

  In this embodiment, Sn—Ag—Cu based solder is shown as the material of the solder 4. However, it is applied to joining of semiconductor elements such as Sn—Pb based solder, Au—Sn based, Au—Si based solder. Other possible solder materials may be used. Alternatively, a conductive adhesive having a relatively high thermal conductivity such as an Ag paste may be used.

  Although Cu was used as the material of the lead 5, in order to reduce the difference in thermal expansion coefficient from Si which is the main material of the semiconductor element, a cladding material of Cu and Mo, a cladding material of Cu and Invar, 42 Alloy, A material obtained by plating an iron-based material such as Invar with Ni or Sn may be used as the lead 5.

A Au / Ni / Mo / Al laminated structure was used as the metal film formed on the emitter electrode (not shown) of the IGBT 2. For the production of such a laminated structure, vacuum deposition using a metal mask pattern or Sputtering, Au / Ni / Al electroless plating performed by forming a resist pattern made of an organic material on the wafer, and the like can be used. As the metal film, a metal layer having good solder wettability such as Ni, Ag, Au, Pd, Cu, or solder may be formed on the outermost surface.
When a conductive adhesive is used, it is not always necessary to form a metal film with good solder wettability on the outermost surface. However, since the electrical resistance increases due to oxidation of the metal layer, an anti-oxidation layer such as Au is used. Is preferably formed on the outermost surface.

  In the first embodiment, regarding the heat sealing resin and the resin material of the casing, in the first embodiment, the resin casing 8 is formed by a transfer molding method using a thermosetting resin. Instead, it may be formed by an injection molding method using a thermoplastic resin such as PPS (polyphenyl sulfide).

  In the first embodiment, an epoxy insulating layer 9 is fixed to the back surface of the heat dissipation block 1, and the lead 5 and the extraction electrode portion 5 </ b> A are sealed by the resin casing 8. As described above, by providing the heat dissipation block 1, the lead 5, and the extraction electrode 5 </ b> A with an insulating structure with respect to the external surface, for example, a plurality of power semiconductor devices 100 that are required to have a withstand voltage of several hundred volts to several kilovolts are provided. Even in a system arranged close to each other, it is possible to reduce the creepage distance of a portion requiring insulation. As a result, for example, the cooling fins can be reduced in size, and the entire system can be reduced in size, weight, and cost.

  The materials and semiconductor elements selected in power semiconductor device 100 can also be applied to other second to fifth embodiments described below. Here, the semiconductor element includes a semiconductor substrate having a front surface and a back surface, a first electrode provided on the front surface, a second electrode provided on the back surface, and a first electrode and a second electrode provided on the surface. And a control electrode for controlling the current between the two.

Embodiment 2. FIG.
FIG. 3 is a cross-sectional view of the power semiconductor device according to the second embodiment of the present invention, indicated as a whole by 200. 3, the same reference numerals as those in FIG. 1 denote the same or corresponding parts.
In the power semiconductor device 200, the IGBT 2 and FWDi 3 are electrically and mechanically connected to the insulating substrate 11 using the solder 4. The insulating substrate 11 is composed of an AlN (aluminum nitride) plate and a Cu wiring pattern 11B having a thickness of 0.25 mm fixed to both sides thereof. IGBT2 and FWDi3 are electrically connected to the wiring pattern 11B.

A base plate 12 made of Cu having a thickness of 3 mm is joined to the back surface of the insulating substrate 11 by a solder 4 having a thickness of 0.25 mm.
Further, a case 13 using PPS (polyphenyl sulfide) resin is bonded to the outer periphery of the base plate 12 using an adhesive (not shown) to form a part of the housing.

  Joined portions 5A and 5B of leads 5 are joined to the surfaces of IGBT2 and FWDi3 by solder 4.

  External electrodes 6A, 6B, 6C are attached to the case 13 by insert molding, and are joined to the leads 5 and the wiring pattern 11B of the insulating substrate 11 by, for example, ultrasonic welding. The gate electrode of the IGBT 2 is electrically connected by an aluminum wire 7.

  Moreover, the through-hole 10 is provided in the wiring part 5C between the joining part 5A and the joining part 5B, and the part between the joining part 5B and the external electrode 6B.

  The case 13 is filled with silicone gel 14 to ensure internal insulation and cured at about 125 ° C. Furthermore, a lid 15 is provided so as to cover the silicone gel 14.

  When the silicone gel 14 is filled in the case 13, the silicone gel 14 is also injected below the lead 5 from the through hole 10 provided in the lead 5. As a result, the generation of an unfilled region of the silicone gel 14 under the lead 5 can be prevented, and the power semiconductor device 200 with high insulation reliability can be obtained.

  Further, even when the silicone gel 14 is vacuum-injected or vacuum-degassed, the injection and degassing from the through hole 10 can be performed, and the generation of an unfilled region of the silicone gel 14 can be prevented.

  For this reason, the bending height (height of the stepped portion) of the lead 5 can be reduced, and a thin power semiconductor device 200 can be provided.

Embodiment 3 FIG.
FIG. 4 is a perspective view of the power semiconductor device according to the third embodiment of the present invention, indicated as a whole by 300. 4, the same reference numerals as those in FIG. 1 denote the same or corresponding parts. Further, in FIG. 4, the resin casing and the like are omitted for easy understanding.

  In the power semiconductor device 300, the wiring portion 5 </ b> C of the lead 5 is a plate-like body that is disposed substantially parallel to the surface of the semiconductor element such as the IGBT 2 (or the surface of the heat dissipation block 1). The joint portions 5A and 5B extend from both sides of the wiring portion 5C. A part of the joint portions 5A and 5B also serves as a step portion, and is joined to the IGBT 2 and the like at the tip. The height of the step is 1 mm, and the joint portions 5A and 5B extend from the wiring portion 5C to both sides, are folded back in a U shape to form a step portion, and the tip is joined to the IGBT 2 or the like. The joint portions 5A extending from both sides of the wiring portion 5C have their tips facing each other on the IGBT 2.

In the wiring portion 5C above the joint portions 5A and 5B to the IGBT 2 and FWDi3, an elliptical through hole 10A having a length in the wiring direction of the lead 5 of 5 mm and a maximum width of 2 mm is provided.
Further, a substantially circular through hole 10 having a diameter of approximately 2 mm is provided in the wiring portion 5C on the cooling block 1 sandwiched between the IGBT 2 and the FWDi3 and the wiring portion 5C outside the FWDi3.

  Although not shown in FIG. 5, the cooling block 1, the IGBT 2, and the like are sealed in a resin state made of an insulating resin by using a transfer mold method as shown in FIG. 2.

  In the power semiconductor device 300 according to the present embodiment, by providing the lead 5 with the through hole 10A, generation of an unfilled region of the sealing resin under the lead 5 can be prevented, and the periphery of the semiconductor element such as the IGBT 2 can be prevented. This can improve the adhesion between the lead 5 and the sealing resin.

  Further, by providing a through hole 10 between the IGBT 2 and the FWDi 3 or between the FWDi 3 and the external electrode 5C formed by the lead frame, the resin is filled in the gap between the heat dissipation block 1 and the lead 5. Becomes easy.

  In addition, the joints 5A and 5B to the IGBT 2 and FWDi 3 are formed so as to face each other from both sides, and by providing a through hole 10A in the lead 5 thereabove, the state of the solder fillet of the joints 5A and 5B, etc. Inspection by visual inspection or the like becomes easy, and the inspection process of the bonding state of the lead 5 can be easily performed in a short time.

  Furthermore, even when evaluating the thermal characteristics of power semiconductor devices, in the case of a structure without through-holes, the temperature measurement of the IGBT2 surface and FWDi3 surface is separately prepared for measuring the thermal characteristics with a thermocouple attached in advance. However, by providing the through holes 10 and 10A, the measurement using the thermography becomes possible, and it is not necessary to separately prepare a measurement sample. In addition, accurate temperature measurement with little measurement error is possible.

Embodiment 4 FIG.
FIG. 5 is a perspective view of the power semiconductor device according to the fourth embodiment of the present invention, indicated as a whole by 400. In FIG. 5, the same reference numerals as those in FIG. 1 denote the same or corresponding parts. Further, in FIG. 5, a resin casing or the like is omitted for easy understanding.

  In the power semiconductor device 400, two circular through holes 10 each having a diameter of 2 mm are formed in the wiring direction in the leads 5 (wiring portions 5C) above the joint portions 5A and 5B with the IGBT 2 and the FWDi 3, respectively. ing. Other structures are the same as those of the power semiconductor device 300 described above.

  In such a power semiconductor device 400, the sealing resin can be easily filled into a narrow gap between the lead 5 and the joints 5A and 5B without significantly reducing the mechanical rigidity and the electric conduction area of the lead 5. Further, the appearance inspection of the solder 4 on the surface of the IGBT 2 or the FWDi 3 and the thermal characteristic evaluation of the power semiconductor device can be easily performed.

  FIG. 6 is a perspective view of another lead 5 that can be used in the power semiconductor device 400. In FIG. 6, the joint portions 5A and 5B of the lead 5 are formed from members different from the wiring portion 5C. The wiring portion 5C of the lead 5 and the joint portions 5A and 5B are connected by, for example, brazing or welding.

  In the lead 5 as shown in FIG. 6, the thickness of the lead 5 is 1.0 mm and the thickness of the joint portions 5A and 5B is 0.3 mm. The lead 5 can be made of a material having a smaller coefficient of thermal expansion than the material of the lead 5. As a result, it is possible to suppress breakage due to thermal stress of, for example, the solder 4 that connects the joints 5A and 5B and the IGBTs 2 and FWDi3. Can be obtained.

Embodiment 5 FIG.
FIG. 7 is a developed view of leads used in the power semiconductor device according to the fifth embodiment of the present invention. FIG. 8 is a diagram of a power semiconductor device represented by 500 as a whole using the leads in FIG. It is a perspective view. 7 and 8, the same reference numerals as those in FIG. 1 denote the same or corresponding parts. Further, in FIG. 8, a resin casing or the like is omitted for easy understanding.

In the power semiconductor device 500, the joint portions 5A and 5B of the lead 5 with the IGBT 2 and FWDi 3 are comb-shaped, respectively, bent into a U shape, and joined to the IGBT 2 or the like.
A through hole 10A is provided in the lead 5 (wiring part 5C) located above the joints 5A and 5B joined to the IGBT2 and FWDi3. Further, the lead 5 (wiring part 5C) located above the cooling block 1 between the IGBT 2 and the FWDi 3 is provided with a through hole 10 having an opening area smaller than the through hole 10A.

  In such a power semiconductor device 500, the junction area between the semiconductor element IGBT2 or FWDi3 and the joints 5A and 5B of the lead 5 is reduced. As a result, when a temperature cycle is applied to the entire power semiconductor device, the thermal stress applied to the solder 4 is reduced, and damage or the like can be prevented.

  In addition, the joint portions 5A and 5B may be partially unjoined due to variations in the amount of solder, and some form of inspection is required. By forming the through hole 10A in the lead 5, the joint between the IGBT 2 and the FWDi 3 can be visually confirmed from directly above the respective semiconductor elements, and the inspection process can be simplified.

  In particular, as shown in the development view of FIG. 7, it is preferable that the through-hole 10 </ b> A is positioned immediately above the joint portions that are divided into comb teeth.

  The through hole 10 provided in the lead 5 (wiring part 5C) located above the cooling block 1 is formed so as not to leave an unfilled region when filling with resin, and is formed in the through hole 10A. The area may be smaller than that.

1 is a perspective view of a power semiconductor device according to a first embodiment of the present invention. It is sectional drawing of the semiconductor device for electric power concerning Embodiment 1 of this invention. It is sectional drawing of the semiconductor device for electric power concerning Embodiment 2 of this invention. It is a perspective view of the semiconductor device for electric power concerning Embodiment 3 of this invention. It is a perspective view of the semiconductor device for electric power concerning Embodiment 4 of this invention. It is the schematic of the lead | read | reed used for the power semiconductor device concerning Embodiment 4 of this invention. It is an expanded view of the lead | read | reed used for the power semiconductor device concerning Embodiment 5 of this invention. It is a perspective view of the semiconductor device for electric power concerning Embodiment 5 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Heat radiation block, 2 IGBT, 3 FWDi, 4 Solder, 5 Lead, 6A, 6B, 6C External terminal, 7 Aluminum wire, 8 Resin housing | casing, 9 Insulating layer 10, 10A Through-hole, 100 Semiconductor device for electric power.

Claims (4)

  1. A semiconductor substrate having a front surface and a back surface, a first electrode provided on the front surface, a second electrode provided on the back surface, a first electrode provided on the front surface, and the first electrode and the second electrode A first semiconductor element comprising a control electrode for controlling the current between;
    A second semiconductor element comprising at least a front electrode and a back electrode;
    A junction connected to the first electrode of the first semiconductor element; a junction connected to the surface electrode of the second semiconductor element; and extending substantially parallel to the surface of the semiconductor element from the junction. A lead having a wiring portion,
    A wiring pattern having a main surface to which the second electrode of the first semiconductor element and the back electrode of the second semiconductor element are fixed;
    A semiconductor device comprising at least the first semiconductor element, the second semiconductor element, and a housing having an insulating resin that embeds the lead,
    The lead has a through hole in a region facing the main surface of the wiring pattern, and the insulating resin is filled in the through hole.
  2.   2. The semiconductor according to claim 1, wherein the wiring part is connected to the junction part through a step part so as to be substantially parallel to and cover the surface of the semiconductor element. apparatus.
  3.   The bonding portion is connected to a position of the wiring portion facing each other with the wiring portion interposed therebetween, and a portion where the wiring portion and the bonding portion face each other is filled with the insulating resin. Item 3. The semiconductor device according to Item 2.
  4. Claims through-hole of the wiring portion, further, also in the portion that covers the surface of the upper Symbol semiconductor element is formed, characterized in that is provided so as to cover a part of the joint or the joining material for joining Item 4. The semiconductor device according to Item 2 or 3.
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