JP4097054B2 - Semiconductor device mounting body and semiconductor device mounting method - Google Patents

Semiconductor device mounting body and semiconductor device mounting method Download PDF

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Publication number
JP4097054B2
JP4097054B2 JP10229699A JP10229699A JP4097054B2 JP 4097054 B2 JP4097054 B2 JP 4097054B2 JP 10229699 A JP10229699 A JP 10229699A JP 10229699 A JP10229699 A JP 10229699A JP 4097054 B2 JP4097054 B2 JP 4097054B2
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Japan
Prior art keywords
semiconductor device
filler
circuit board
resin composition
resin
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JP10229699A
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JP2000294601A (en
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秀樹 岩城
豊 田口
哲義 小椋
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Panasonic Corp
Panasonic Holdings Corp
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Panasonic Corp
Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/29386—Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01L2924/01004—Beryllium [Be]
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    • H01L2924/06—Polymers
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a mounting body for a semiconductor device wherein crosstalk noise is sufficiently reduced, and a method for mounting it. SOLUTION: In a mounting body for a semiconductor device, filler 2 contained in a resin composition 3 composed by sealing a gap between a semiconductor device 11 and a circuit board 14 has a relative permittivity smaller than that of a resin 1, and is positioned on a circuit board 14 side in the resin composition 3 sealing the gap between the semiconductor device 11 and the circuit board 14. A method for mounting the semiconductor device contains a process wherein the semiconductor device 11 is mounted on the circuit board 14, a process wherein the gap between the semiconductor device 11 and the circuit board 14 is filled with the resin composition 3 that is in an uncured state while containing the resin 1 and the filler 2 having the relative permittivity smaller than that of the resin 1, and a process wherein the resin composition 3 is cured under a condition where the filler 2 is positioned on the circuit board 14 side in the resin composition 3.

Description

【０００１】
【発明の属する技術分野】
本発明は、主として高周波で動作する半導体装置の実装体と、この半導体装置の実装方法とに関する。
【０００２】
【従来の技術】
コンピュータの高速化に伴っては半導体装置の高速動作が必要であり、半導体装置の実装体、いわゆる半導体パッケージでは信号を高速伝送する必要があるため、近年においては、半導体パッケージの信号配線を伝送線路として設計することが行われている。そして、このような設計では、セラミックや樹脂のような誘電体材料を用いて作製された回路基板の信号配線が等価的に特性インピーダンスを有する伝送線路として表されることになり、伝送線路ではインピーダンスのミスマッチが存在する地点で信号の反射が生じ、反射ノイズが発生するため、信号配線の特性インピーダンスを制御する必要があることになる。なお、信号配線の特性インピーダンスは構造的な寸法で決定されることになり、単純にいえば、信号配線の幅や厚み、層間絶縁厚み、絶縁層の誘電率などに依存している。
【０００３】
しかしながら、半導体パッケージにおける信号配線の数は入出力端子の増加によって飛躍的に増加しており、信号配線を高密度配置する必要がある都合上からおのずと信号配線の間隔を狭めなければならないのが実情であり、現実的には、配線の間隔を狭めながら特性インピーダンスを制御することが必要となる。そこで、特開平９−２４６４２５号公報で開示された構成、つまり、回路基板上に形成されて隣接しあう信号配線間に溝を設けた構成が採用される。すなわち、この構成においては、図４で示すように、回路基板２１の所定位置ごとに設けた台座２２間を溝２３とし、各台座２２上に信号配線であるインナーリード２４を形成したものであり、比誘電率の小さい空気がインナーリード２４同士の間に存在しているため、インナーリード２４の特性インピーダンスを５０Ωに保ったままで配線間隔を狭めることが可能となっている。
【０００４】
【発明が解決しようとする課題】
ところで、半導体装置の実装体である半導体パッケージの小型化と接続端子数の増加とに伴っては接続端子同士の間隔が狭くなることが避けられないため、最近では、半導体装置を回路基板の入出力端子へと直接的に実装することによって実装面積を小さくし、その効率化を図ることが考えられている。そして、半導体装置をフェイスダウンで回路基板上に実装した半導体装置の実装体であるとすれば、半導体装置と回路基板との電気的接続が一括的に実行可能となり、実装面積を小さくし得ることとなるが、このような構成を採用する場合には、半導体装置の電極パッドピッチを回路基板の接続端子ピッチと同様に微細化しておく必要があることになる。
【０００５】
すなわち、従来の形態にかかる半導体パッケージでは図５のような構成が採用されており、このような構成を実現する際の実装方法としては、半導体装置１１のパッドといわれる端子電極１２上にワイヤボンディング法またはめっき法による突起電極１３を形成しておいたうえ、突起電極１３と回路基板１４の信号配線である接続端子１５とを導電性接着剤（図示省略）でもって互いに接続することによって半導体装置１１を回路基板１４上に実装することが行われる。そして、この際、具体的には、突起電極１３の接続面上に導電性接着剤を転写しておき、突起電極１３と接続端子１５とを位置合わせした後、導電性接着剤を硬化させたうえで突起電極１３と接続端子１５とを接続することが実行されている。なお、図５では、符号１６が導電性接着剤による接続部分を示している。
【０００６】
さらに、引き続き、半導体装置１１及び回路基板１４間の間隙を封止して導電性接着剤による接続部分１６を補強する必要上、液状の樹脂組成物１７を充填したうえで硬化させることが実行される。そして、この際における樹脂組成物１７は樹脂１８及びフィラー１９を含有したものであり、フィラー１９は均一状態となって分散している。なお、樹脂組成物１７の有する比誘電率は、樹脂１８及びフィラー１９の成分比と各々の比誘電率とに基づいたうえで一意的に決定されることになっており、フィラー１９の比誘電率が樹脂１８の比誘電率よりも大きい場合には、フィラー１９の成分比が上昇するのに従って樹脂組成物１７の有する比誘電率が大きくなる。
【０００７】
しかしながら、従来のような半導体装置の実装体であり、かつ、実装方法である限りは、回路基板１４に形成されて隣接しあう接続端子１５同士の間隔が極めて狭くなっているため、これら接続端子１５同士間の寄生成分、つまり、配線間容量が大きくなる結果としてクロストークノイズが増大するという不都合が生じることになっていた。そして、半導体装置１１及び回路基板１４間に介装された樹脂組成物１７の比誘電率を調整することによってクロストークノイズの低減を図ることも考えられているが、フィラー１９が均一状態で分散している樹脂組成物１７の比誘電率を全体的として調整することを行ってもクロストークノイズの十分な低減を実現することはできていないのが実状である。
【０００８】
本発明は、このような不都合に鑑みて創案されたものであって、クロストークノイズの十分な低減を図ることが可能な構成とされた半導体装置の実装体と、半導体装置の実装方法とを提供することを目的としている。
【０００９】
【課題を解決するための手段】
【００１０】
本発明の請求項１にかかる半導体装置の実装体は、半導体装置をフェースダウンで回路基板上に実装し、樹脂及びフィラーを含有した樹脂組成物で半導体装置及び回路基板間の間隙を封止してなるものであって、樹脂組成物に含有されたフィラーは樹脂よりも小さな比誘電率を有しており、半導体装置及び回路基板間の間隙を封止した樹脂組成物中の回路基板側に位置していることを特徴とする。この構成であれば、樹脂組成物全体のうちでも回路基板近傍における比誘電率が半導体装置近傍における比誘電率よりも実質的に小さくなっているため、フィラーが均一分散している場合に比べると、回路基板の実装面からの影響が少なくなる結果としてクロストークノイズが低減するという利点が確保される。
【００１１】
本発明の請求項２にかかる半導体装置の実装体は請求項１に記載したものであり、樹脂組成物に含有されたフィラーは樹脂よりも大きな密度を有していることを特徴とする。本発明の請求項３にかかる半導体装置の実装体は請求項１または請求項２に記載したものであり、フィラーはテフロン（登録商標）からなることを特徴としている。本発明の請求項４にかかる半導体装置の実装体は請求項１ないし請求項３のいずれかに記載したものであり、フィラーは中空状であることを特徴とする。
【００１２】
本発明の請求項５にかかる半導体装置の実装体は、半導体装置をフェースダウンで回路基板上に実装し、樹脂及びフィラーを含有した樹脂組成物で半導体装置及び回路基板間の間隙を封止してなるものであって、樹脂組成物に含有されたフィラーは樹脂よりも大きな比誘電率を有しており、半導体装置及び回路基板間の間隙を封止した樹脂組成物中の半導体装置側に位置しており、かつ、樹脂組成物に含有されたフィラーは樹脂よりも大きな密度を有していることを特徴とする。この構成であれば、樹脂組成物全体のうちでも半導体装置近傍における比誘電率が回路基板近傍における比誘電率よりも実質的に大きくなっているため、フィラーが均一分散している場合に比べると、回路基板の実装面からの影響が少なくなる結果としてクロストークノイズが低減するという利点が確保される。
【００１３】
本発明の請求項６にかかる半導体装置の実装体は請求項５に記載したものであり、フィラーはシリカからなることを特徴とする。
【００１４】
本発明の請求項７にかかる半導体装置の実装方法は、半導体装置をフェースダウンで回路基板上に実装する工程と、樹脂及び樹脂よりも比誘電率の小さいフィラーを含有して未硬化状態にある樹脂組成物を半導体装置及び回路基板間の間隙に充填する工程と、フィラーが樹脂組成物中の回路基板側に位置する状態としたうえで樹脂組成物を硬化させる工程とを含んでいることを特徴とする。この方法であれば、請求項１にかかる構成とされた半導体装置の実装体を容易に作製し得るという利点が確保される。
【００１６】
本発明の請求項８にかかる半導体装置の実装方法は請求項７に記載したものであり、樹脂組成物中の回路基板側または半導体装置側にフィラーを位置させるに際しては、樹脂組成物に含有された樹脂とフィラーとの比重差を利用することを特徴としている。本発明の請求項９にかかる半導体装置の実装方法は請求項７に記載したものであり、樹脂組成物中の回路基板側または半導体装置側にフィラーを位置させるに際しては、樹脂組成物に含有されたフィラーを予め磁性体が内蔵されたものとしておき、磁石によってフィラーが引き付けられる性質を利用することを特徴としている。
【００１７】
ところで、本発明よりも先行する特開平９−２６６２２９号公報においては、半導体装置及び回路基板、また、封止用の樹脂組成物それぞれの熱膨張係数の相違に基づいて発生する熱応力の悪影響を回避すべく、樹脂組成物に含有された無機フィラーを熱膨張係数の小さい部材側に位置させるようにして樹脂組成物を硬化させることが既に提案されている。しかしながら、この先行技術は、あくまでも無機フィラーの有する熱膨張係数が樹脂よりも小さいことに着目してなされたものであるに過ぎず、このような技術を採用したとしてもクロストークノイズを低減し得るか否かは全く不確定であるため、先行技術及び本発明それぞれの基本的な技術思想が互いに異なっていることは明らかである。
【００１８】
【発明の実施の形態】
以下、本発明の実施の形態を図面に基づいて説明する。
【００１９】
（実施の形態１）
図１は実施の形態１にかかる半導体装置の実装体を示す断面図であり、図２は実施の形態１にかかる半導体装置の実装体を作製する際の実装方法を示す工程断面図である。なお、半導体装置の実装体における全体構成は従来の形態と基本的に異ならないので、図１及び図２において図５と互いに同一となる部品、部材には同一符号を付し、詳しい説明は省略する。
【００２０】
本実施の形態１にかかる半導体装置の実装体は、図１で示すように、半導体装置１１をフェースダウンで回路基板１４上に実装しており、かつ、比誘電率が３．３〜４のエポキシ樹脂である樹脂１と、比誘電率が２．１以下のテフロンからなるフィラー２、つまり、樹脂１よりも小さな比誘電率を有するフィラー２とを含有した樹脂組成物３でもって半導体装置１１及び回路基板１４間の間隙を封止してなる構成となっている。そして、この構成においては、樹脂組成物３に含有されたフィラー２が、半導体装置１１及び回路基板１４間を封止してなる樹脂組成物３内の回路基板１４側に集中したうえで位置している。なお、樹脂組成物３に含有された樹脂１がエポキシ樹脂であり、フィラー２がテフロンである必然性があるわけではなく、フィラー２の有する比誘電率の方が樹脂１の比誘電率よりも小さくなる組み合わせであれば、樹脂１及びフィラー２の材質が特定されないことは勿論である。
【００２１】
すなわち、この際におけるフィラー２は、樹脂組成物３が未硬化状態であるうちに回路基板１４側へと集められた後、樹脂組成物３が硬化させられたのに伴ってそのまま回路基板１４側に位置していることになる。そして、樹脂１よりも小さな比誘電率を有するフィラー２が回路基板１４側に位置しているため、フィラー２が均一分散している場合に比べると、回路基板１４上に形成された信号配線である接続端子１５同士の間隔が極めて狭くても隣接する接続端子１５間の寄生成分、つまり、配線間容量が大きくなり難くなり、その結果としてクロストークノイズは抑制される。なお、ここでのフィラー２は、樹脂１よりも小さな比誘電率を有すると共に、樹脂１よりも大きな密度を有していることが好ましく、密度が２〜２．２のテフロンであれば、密度が１．７〜２のエポキシ樹脂よりも密度が大きいこととなる。また、フィラー２が中空状、例えば、中空の球形状とされたものであってよく、内部に空気が封入されている場合には比誘電率をさらに小さくすることが可能となる。
【００２２】
つぎに、実施の形態１にかかる半導体装置の実装体を作製する際に採用される方法、つまり、半導体装置の実装方法を図２に基づいて説明する。図１で示した半導体装置の実装体を作製するに際しては、半導体装置１１の端子電極１２上にワイヤボンディング法またはめっき法による突起電極１３、いわゆるバンプを形成し、かつ、半導体装置１１の突起電極１３と回路基板１４、例えば、ガラスエホキシ基板である回路基板１４の信号配線である接続端子１５とを導電性接着剤（図示省略）で接続することにより、図２（ａ）で示すように、半導体装置１１をフェースダウンで回路基板１４上に実装することが行われる。その後、半導体装置１１及び回路基板１４間の間隙を封止して接続部分１６を補強する必要上、図２（ｂ）で示すように、未硬化状態で液状の樹脂組成物３を半導体装置１１及び回路基板１４間の間隙に充填したうえ、充填された樹脂組成物３を１５０℃程度の温度で加熱することによって硬化させることが実行される。
【００２３】
すなわち、未硬化状態である樹脂組成物３に含有されたフィラー２は樹脂１中において均一分散しているが、フィラー２の有する比誘電率の方が樹脂１の比誘電率よりも小さく、また、フィラー２の密度の方が樹脂１の密度よりも大きいため、半導体装置１１と回路基板１４との間隙に対して充填された樹脂組成物３中のフィラー２は樹脂１との比重差に基づいて回路基板１４側へと沈降することになり、フィラー２が回路基板１４側へと沈降したままの状態下で樹脂組成物３は硬化されることになる。したがって、このままの状態下で樹脂組成物３を硬化させると、図１で示した半導体装置の実装体、つまり、樹脂１よりも小さな比誘電率を有するフィラー２が樹脂組成物３中の回路基板１４側に位置しているためにクロストークノイズが抑制された半導体装置の実装体が得られる。
【００２４】
（実施の形態２）
図３は実施の形態２にかかる半導体装置の実装体を示す断面図であるが、その全体構成は実施の形態１と基本的に異ならないので、図３において図１と互いに同一となる部品、部材には同一符号を付し、詳しい説明は省略する。また、実施の形態２にかかる半導体装置の実装方法も図２で示した実施の形態１と基本的には相違していないので、ここでは図２を参照しながら実装方法を説明する。
【００２５】
本実施の形態２にかかる半導体装置の実装体は、図３で示すように、半導体装置１１をフェースダウンで回路基板１４上に実装しており、かつ、比誘電率が３．３〜４のエポキシ樹脂である樹脂１と、比誘電率が４〜４．６のシリカからなるフィラー２、つまり、樹脂１よりも大きな比誘電率を有するフィラー２とを含有した樹脂組成物３でもって半導体装置１１及び回路基板１４間の間隙を封止してなる構成となっている。そして、この際における実装体は、樹脂組成物３に含有されたフィラー２が、半導体装置１１及び回路基板１４間を封止してなる樹脂組成物３内の半導体装置１１側に集中して位置した構成となっている。なお、ここでの樹脂組成物３に含有された樹脂１がエポキシ樹脂であり、フィラー２がシリカである必然性はなく、フィラー２の有する比誘電率の方が樹脂１の比誘電率よりも大きい組み合わせであれば、樹脂１及びフィラー２の材質が特定されないことになる。
【００２６】
すなわち、この際におけるフィラー２は、樹脂組成物３が未硬化状態であるうちに半導体装置１１側へと集められ、かつ、これらのフィラー２が半導体装置１１側に位置した状態のままで樹脂組成物３が硬化させられることになっている。そして、このような構成である際には、樹脂１よりも大きな比誘電率を有するフィラー２が半導体装置１１側に位置している結果としてフィラー２よりも小さな比誘電率を有する樹脂１が回路基板１４側に位置していることになり、フィラー２が均一分散している場合に比べると、回路基板１４上に形成された信号配線である接続端子１５同士の間隔が極めて狭くても隣接しあう接続端子１５間の寄生成分、つまり、配線間容量が大きくはなり難くなる結果、クロストークノイズは抑制されることになる。なお、ここでのフィラー２は、樹脂１よりも大きな比誘電率を有すると共に、樹脂１よりも大きな密度を有していることが好ましく、密度が２．２〜２．６のシリカであれば、密度が１．７〜２のエポキシ樹脂よりも密度が大きいこととなる。
【００２７】
つぎに、実施の形態１と同じ図２を参照しながら、実施の形態２にかかる半導体装置の実装体を作製する際に採用される方法、つまり、半導体装置の実装方法を説明する。すなわち、図３で示した半導体装置の実装体を作製する際には、半導体装置１１の端子電極１２上にワイヤボンディング法またはめっき法による突起電極１３を形成し、かつ、半導体装置１１の突起電極１３と回路基板１４の信号配線である接続端子１５とを導電性接着剤（図示省略）でもって接続することにより、図２（ａ）で示すように、半導体装置１１をフェースダウンで回路基板１４上に実装することが行われる。その後、半導体装置１１及び回路基板１４間の間隙を封止して接続部分１６を補強する必要上、図２（ｂ）で示すように、未硬化状態で液状の樹脂組成物３を半導体装置１１及び回路基板１４間の間隙に充填したうえ、充填された樹脂組成物３を１５０℃程度の温度で加熱することによって硬化させることが実行される。
【００２８】
そして、この際にあっては、未硬化状態である樹脂組成物３に含有されているフィラー２が樹脂１中において均一分散しているにも拘わらず、フィラー２の有する比誘電率の方が樹脂１よりも大きく、しかも、フィラー２の密度の方が樹脂１の密度よりも大きいため、半導体装置１１と回路基板１４との間隙に対して充填された樹脂組成物３中のフィラー２は樹脂１との比重差に基づいて半導体装置１１側へと沈降することが起こる。そこで、フィラー２が半導体装置１１側へと沈降したままで樹脂組成物３を硬化させると、図３で示したように、樹脂１よりも大きな比誘電率を有するフィラー２が樹脂組成物３中の半導体装置１１側に位置し、かつ、フィラー２よりも比誘電率の小さな樹脂１が回路基板１４側に位置した構成を有しており、その結果としてクロストークノイズの抑制された半導体装置の実装体が得られる。
【００２９】
ところで、以上説明した実施の形態１及び実施の形態２にかかる半導体装置の実装方法にあっては、樹脂組成物３中の回路基板１４側または半導体装置１１側にフィラー２を位置させるに際し、樹脂組成物３に含有された樹脂１とフィラー２との比重差を利用しているが、このような実装方法に限定されないことは勿論である。すなわち、未硬化状態にある樹脂組成物３に含有された樹脂１が、例えば、エポキシ樹脂のように、温度が高くなるに連れて粘度が下がると同時に密度が下がる性質を有する場合には、この性質を利用したうえで樹脂１とフィラー２とを分離させることも可能であり、また、図示省略しているが、樹脂組成物３に含有されたフィラー２を予め磁性体が内蔵されたもの、例えば、金属粉末の周囲をテフロンでコーティングしてなるものとしておき、磁石によってフィラー２が引き付けられる性質を利用して樹脂組成物３中の回路基板１４側または半導体装置１１側に位置させることも可能である。
【００３０】
【発明の効果】
以上説明したように、本発明にかかる半導体装置の実装体によれば、半導体装置及び回路基板間の間隙を封止する樹脂組成物のうちでも回路基板側に比誘電率の小さなフィラーが位置し、または、半導体装置側に比誘電率の大きなフィラーが位置しているので、回路基板近傍の比誘電率が小さくなり、回路基板の実装面からの影響が少なくなる結果としてクロストークノイズを抑制できるという効果が得られる。そして、本発明にかかる半導体装置の実装方法によれば、上記構成とされた半導体装置の実装体を容易に作製し得ることになる。
【図面の簡単な説明】
【図１】実施の形態１にかかる半導体装置の実装体を示す断面図である。
【図２】実施の形態１にかかる半導体装置の実装体を作製する際の実装方法を示す工程断面図である。
【図３】実施の形態２にかかる半導体装置の実装体を示す断面図である。
【図４】従来の形態にかかる回路基板を示す断面図である。
【図５】従来の形態にかかる半導体装置の実装体を示す断面図である。
【符号の説明】
１ 樹脂
２ フィラー
３ 樹脂組成物
１１ 半導体装置
１４ 回路基板[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a mounting body of a semiconductor device that mainly operates at a high frequency, and a mounting method of the semiconductor device.
[0002]
[Prior art]
With the increase in speed of computers, high-speed operation of a semiconductor device is required, and in a semiconductor device mounting body, so-called semiconductor package, it is necessary to transmit signals at high speed. It has been designed as. In such a design, the signal wiring of a circuit board manufactured using a dielectric material such as ceramic or resin is equivalently represented as a transmission line having a characteristic impedance. Signal reflection occurs at a point where there is a mismatch, and reflection noise is generated. Therefore, it is necessary to control the characteristic impedance of the signal wiring. The characteristic impedance of the signal wiring is determined by a structural dimension, and simply speaking, it depends on the width and thickness of the signal wiring, the interlayer insulating thickness, the dielectric constant of the insulating layer, and the like.
[0003]
However, the number of signal lines in a semiconductor package has increased dramatically due to an increase in the number of input / output terminals, and the actual situation is that the interval between the signal lines must be reduced due to the need to arrange the signal lines at a high density. In reality, it is necessary to control the characteristic impedance while reducing the interval between the wirings. Therefore, the configuration disclosed in Japanese Patent Laid-Open No. 9-246425, that is, a configuration in which a groove is provided between adjacent signal wirings formed on a circuit board is employed. That is, in this configuration, as shown in FIG. 4, a groove 23 is formed between the bases 22 provided at predetermined positions of the circuit board 21, and inner leads 24 that are signal wirings are formed on the bases 22. Since air having a small relative dielectric constant exists between the inner leads 24, it is possible to reduce the wiring interval while keeping the characteristic impedance of the inner leads 24 at 50Ω.
[0004]
[Problems to be solved by the invention]
By the way, since it is inevitable that the distance between the connection terminals becomes narrower as the size of the semiconductor package, which is a mounting body of the semiconductor device, is reduced and the number of connection terminals is increased, recently, the semiconductor device is inserted into the circuit board. It is considered to reduce the mounting area by directly mounting it on the output terminal and to improve the efficiency. If the semiconductor device is mounted on the circuit board face down, the electrical connection between the semiconductor device and the circuit board can be performed collectively, and the mounting area can be reduced. However, when such a configuration is employed, the electrode pad pitch of the semiconductor device needs to be miniaturized in the same manner as the connection terminal pitch of the circuit board.
[0005]
That is, the configuration as shown in FIG. 5 is adopted in the semiconductor package according to the conventional form. As a mounting method for realizing such a configuration, wire bonding is performed on the terminal electrode 12 called a pad of the semiconductor device 11. The semiconductor device is formed by forming the protruding electrodes 13 by the plating method or the plating method, and connecting the protruding electrodes 13 and the connection terminals 15 which are signal wirings of the circuit board 14 with a conductive adhesive (not shown). 11 is mounted on the circuit board 14. Then, this time, specifically, a transferred conductive adhesive on the connection surface of the bump electrode 13, after aligning the connection terminal 15 and the bump electrode 13, to cure the conductive adhesive In addition, connecting the protruding electrode 13 and the connection terminal 15 is performed. In addition, in FIG. 5, the code | symbol 16 has shown the connection part by a conductive adhesive.
[0006]
Furthermore, it is necessary to seal the gap between the semiconductor device 11 and the circuit board 14 to reinforce the connection portion 16 with a conductive adhesive, and to cure after filling with the liquid resin composition 17. The And the resin composition 17 in this case contains the resin 18 and the filler 19, and the filler 19 is disperse | distributed in the uniform state. The relative dielectric constant of the resin composition 17 is uniquely determined on the basis of the component ratios of the resin 18 and the filler 19 and the relative dielectric constants thereof. When the ratio is larger than the relative dielectric constant of the resin 18, the relative dielectric constant of the resin composition 17 increases as the component ratio of the filler 19 increases.
[0007]
However, as long as it is a conventional semiconductor device mounting body and a mounting method, the interval between the adjacent connection terminals 15 formed on the circuit board 14 is extremely narrow. As a result of the increase in the parasitic component between 15, that is, the capacitance between the wirings, there is a disadvantage that the crosstalk noise increases. It is also considered to reduce the crosstalk noise by adjusting the relative dielectric constant of the resin composition 17 interposed between the semiconductor device 11 and the circuit board 14, but the filler 19 is dispersed in a uniform state. Actually, even if the relative dielectric constant of the resin composition 17 being adjusted is adjusted as a whole, the crosstalk noise cannot be sufficiently reduced.
[0008]
The present invention was devised in view of such inconveniences, and includes a semiconductor device mounting body and a semiconductor device mounting method configured to be capable of sufficiently reducing crosstalk noise. It is intended to provide.
[0009]
[Means for Solving the Problems]
[0010]
According to a first aspect of the present invention, there is provided a mounting body for a semiconductor device in which a semiconductor device is mounted face-down on a circuit board, and a gap between the semiconductor device and the circuit board is sealed with a resin composition containing a resin and a filler. The filler contained in the resin composition has a relative dielectric constant smaller than that of the resin, and on the circuit board side in the resin composition in which the gap between the semiconductor device and the circuit board is sealed. It is located. With this configuration, the relative dielectric constant in the vicinity of the circuit board is substantially smaller than the relative dielectric constant in the vicinity of the semiconductor device among the resin composition as a whole, compared with the case where the filler is uniformly dispersed. The advantage that the crosstalk noise is reduced as a result of less influence from the mounting surface of the circuit board is ensured.
[0011]
According to a second aspect of the present invention, there is provided a mounting body for a semiconductor device according to the first aspect , wherein the filler contained in the resin composition has a density higher than that of the resin. A semiconductor device mounting body according to a third aspect of the present invention is the semiconductor device mounting body according to the first or second aspect , wherein the filler is made of Teflon (registered trademark). According to a fourth aspect of the present invention, there is provided a semiconductor device mounting body according to any one of the first to third aspects, wherein the filler is hollow.
[0012]
According to a fifth aspect of the present invention, there is provided a mounting body for a semiconductor device, wherein the semiconductor device is mounted face-down on a circuit board, and a gap between the semiconductor device and the circuit board is sealed with a resin composition containing a resin and a filler. The filler contained in the resin composition has a relative dielectric constant larger than that of the resin, and the semiconductor device side in the resin composition in which the gap between the semiconductor device and the circuit board is sealed is formed. And the filler contained in the resin composition has a higher density than the resin . With this configuration, the relative dielectric constant in the vicinity of the semiconductor device is substantially larger than the relative dielectric constant in the vicinity of the circuit board among the resin composition as a whole, compared with the case where the filler is uniformly dispersed. The advantage that the crosstalk noise is reduced as a result of less influence from the mounting surface of the circuit board is ensured.
[0013]
A semiconductor device mounting body according to a sixth aspect of the present invention is the semiconductor device mounting body according to the fifth aspect , wherein the filler is made of silica.
[0014]
According to a seventh aspect of the present invention, there is provided a semiconductor device mounting method comprising a step of mounting a semiconductor device on a circuit board face down, and a resin and a filler having a relative dielectric constant smaller than that of the resin and are in an uncured state Filling the gap between the semiconductor device and the circuit board with the resin composition, and curing the resin composition after the filler is positioned on the circuit board side in the resin composition. Features. According to this method, the advantage that the mounting body of the semiconductor device having the configuration according to claim 1 can be easily manufactured is secured.
[0016]
The method for mounting a semiconductor device according to claim 8 of the present invention is as described in claim 7 , and when the filler is positioned on the circuit board side or the semiconductor device side in the resin composition, it is contained in the resin composition. It is characterized by utilizing the specific gravity difference between the resin and filler . The method for mounting a semiconductor device according to claim 9 of the present invention is as described in claim 7 , and when the filler is positioned on the circuit board side or semiconductor device side in the resin composition, it is contained in the resin composition. It is characterized in that the filler is preliminarily incorporated with a magnetic material and utilizes the property that the filler is attracted by a magnet.
[0017]
Incidentally, in Japanese Patent Laid-Open No. 9-266229, which precedes the present invention, there is an adverse effect of thermal stress generated based on the difference in thermal expansion coefficients of the semiconductor device, the circuit board, and the sealing resin composition. In order to avoid this, it has already been proposed to cure the resin composition by positioning the inorganic filler contained in the resin composition on the member side having a small thermal expansion coefficient. However, this prior art is only made by paying attention to the fact that the thermal expansion coefficient of the inorganic filler is smaller than that of the resin, and even if such a technique is adopted, the crosstalk noise can be reduced. Since it is completely uncertain, it is clear that the basic technical ideas of the prior art and the present invention are different from each other.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0019]
(Embodiment 1)
FIG. 1 is a cross-sectional view showing a mounting body of a semiconductor device according to the first embodiment, and FIG. 2 is a process cross-sectional view showing a mounting method when manufacturing the mounting body of the semiconductor device according to the first embodiment. In addition, since the whole structure in the mounting body of a semiconductor device is not fundamentally different from the conventional form, the same code | symbol is attached | subjected to FIG. To do.
[0020]
As shown in FIG. 1, the mounting body of the semiconductor device according to the first embodiment has the semiconductor device 11 mounted face-down on the circuit board 14 and has a relative dielectric constant of 3.3 to 4. A semiconductor device 11 having a resin composition 3 containing a resin 1 which is an epoxy resin and a filler 2 made of Teflon having a relative dielectric constant of 2.1 or less, that is, a filler 2 having a relative dielectric constant smaller than that of the resin 1. In addition, the gap between the circuit boards 14 is sealed. In this configuration, the filler 2 contained in the resin composition 3 is located after being concentrated on the circuit board 14 side in the resin composition 3 formed by sealing between the semiconductor device 11 and the circuit board 14. ing. The resin 1 contained in the resin composition 3 is an epoxy resin, and the filler 2 is not necessarily Teflon. The relative dielectric constant of the filler 2 is smaller than the relative dielectric constant of the resin 1. Of course, the materials of the resin 1 and the filler 2 are not specified in such a combination.
[0021]
That is, the filler 2 at this time is collected on the circuit board 14 side while the resin composition 3 is in an uncured state, and then is directly on the circuit board 14 side as the resin composition 3 is cured. Will be located. Since the filler 2 having a relative dielectric constant smaller than that of the resin 1 is located on the circuit board 14 side, compared with the case where the filler 2 is uniformly dispersed, the signal wiring formed on the circuit board 14 Even if the interval between the connection terminals 15 is extremely narrow, the parasitic component between the adjacent connection terminals 15, that is, the inter-wiring capacitance is difficult to increase, and as a result, crosstalk noise is suppressed. In addition, it is preferable that the filler 2 here has a relative dielectric constant smaller than that of the resin 1 and a density higher than that of the resin 1, and if the density is Teflon of 2 to 2.2, the density Will be higher in density than the epoxy resin of 1.7-2. Further, the filler 2 may be hollow, for example, a hollow sphere, and when the air is sealed inside, the relative dielectric constant can be further reduced.
[0022]
Next, a method employed when manufacturing the semiconductor device mounting body according to the first embodiment, that is, a semiconductor device mounting method will be described with reference to FIG. When manufacturing the mounting body of the semiconductor device shown in FIG. 1, a protruding electrode 13, a so-called bump is formed on the terminal electrode 12 of the semiconductor device 11 by a wire bonding method or a plating method, and the protruding electrode of the semiconductor device 11 is formed. 13 and a circuit board 14, for example, a connection terminal 15 which is a signal wiring of the circuit board 14 which is a glass epoxy substrate, is connected with a conductive adhesive (not shown), so that a semiconductor as shown in FIG. The device 11 is mounted on the circuit board 14 face down. Thereafter, the gap between the semiconductor device 11 and the circuit board 14 needs to be sealed to reinforce the connection portion 16, and as shown in FIG. 2B, the liquid resin composition 3 in an uncured state is applied to the semiconductor device 11. In addition, the gap between the circuit boards 14 is filled, and the filled resin composition 3 is cured by heating at a temperature of about 150 ° C.
[0023]
That is, the filler 2 contained in the uncured resin composition 3 is uniformly dispersed in the resin 1, but the relative dielectric constant of the filler 2 is smaller than the relative dielectric constant of the resin 1, Since the density of the filler 2 is larger than the density of the resin 1, the filler 2 in the resin composition 3 filled in the gap between the semiconductor device 11 and the circuit board 14 is based on the specific gravity difference with the resin 1. Thus, the resin composition 3 is cured under the condition that the filler 2 is settled to the circuit board 14 side. Therefore, when the resin composition 3 is cured in this state, the mounting body of the semiconductor device shown in FIG. 1, that is, the filler 2 having a relative dielectric constant smaller than that of the resin 1 becomes the circuit board in the resin composition 3. Since it is located on the 14th side, a semiconductor device mounting body in which crosstalk noise is suppressed is obtained.
[0024]
(Embodiment 2)
FIG. 3 is a cross-sectional view showing the mounting body of the semiconductor device according to the second embodiment. However, since the overall configuration is basically not different from that of the first embodiment, components that are the same as those in FIG. The same reference numerals are given to the members, and detailed description is omitted. Further, the mounting method of the semiconductor device according to the second embodiment is basically not different from that of the first embodiment shown in FIG. 2, and therefore, the mounting method will be described with reference to FIG.
[0025]
As shown in FIG. 3, the semiconductor device mounting body according to the second exemplary embodiment has the semiconductor device 11 mounted face-down on the circuit board 14 and has a relative dielectric constant of 3.3 to 4. A semiconductor device having a resin composition 3 containing a resin 1 which is an epoxy resin and a filler 2 made of silica having a relative dielectric constant of 4 to 4.6, that is, a filler 2 having a relative dielectric constant larger than that of the resin 1 11 and the circuit board 14 are sealed. And the mounting body in this case is a position where the filler 2 contained in the resin composition 3 is concentrated on the semiconductor device 11 side in the resin composition 3 formed by sealing between the semiconductor device 11 and the circuit board 14. It has become the composition. The resin 1 contained in the resin composition 3 here is an epoxy resin, and the filler 2 is not necessarily silica, and the relative dielectric constant of the filler 2 is larger than the relative dielectric constant of the resin 1. If it is a combination, the material of the resin 1 and the filler 2 will not be specified.
[0026]
That is, the filler 2 in this case is collected to the semiconductor device 11 side while the resin composition 3 is in an uncured state, and the resin composition remains in a state where these fillers 2 are located on the semiconductor device 11 side. Object 3 is to be cured. In such a configuration, as a result of the filler 2 having a relative dielectric constant larger than that of the resin 1 being positioned on the semiconductor device 11 side, the resin 1 having a relative dielectric constant smaller than that of the filler 2 is Compared with the case where the filler 2 is uniformly dispersed, the adjacent terminals 14 are adjacent to each other even if the distance between the connection terminals 15 that are signal wirings formed on the circuit board 14 is extremely narrow. As a result, the parasitic component between the connecting terminals 15, that is, the capacitance between the wirings is hardly increased, so that crosstalk noise is suppressed. In addition, it is preferable that the filler 2 here has a relative dielectric constant larger than that of the resin 1 and also has a larger density than that of the resin 1, and if the silica has a density of 2.2 to 2.6 , and thus density is greater density than the epoxy resin of 1.7 to 2.
[0027]
Next, with reference to FIG. 2 which is the same as that of the first embodiment, a method employed when manufacturing a semiconductor device mounting body according to the second embodiment, that is, a semiconductor device mounting method will be described. That is, when the mounting body of the semiconductor device shown in FIG. 3 is manufactured, the protruding electrode 13 is formed on the terminal electrode 12 of the semiconductor device 11 by the wire bonding method or the plating method, and the protruding electrode of the semiconductor device 11 is formed. 13 and a connection terminal 15 which is a signal wiring of the circuit board 14 are connected with a conductive adhesive (not shown), so that the semiconductor device 11 is face-down as shown in FIG. Implementation is done on top. Thereafter, the gap between the semiconductor device 11 and the circuit board 14 needs to be sealed to reinforce the connection portion 16, and as shown in FIG. 2B, the liquid resin composition 3 in an uncured state is applied to the semiconductor device 11. In addition, the gap between the circuit boards 14 is filled, and the filled resin composition 3 is cured by heating at a temperature of about 150 ° C.
[0028]
In this case, although the filler 2 contained in the uncured resin composition 3 is uniformly dispersed in the resin 1, the relative dielectric constant of the filler 2 is greater. greater than the resin 1, moreover, since towards the density of the filler 2 is greater than the density of the resin 1, filler 2 in the resin composition 3 filled against the gap between the semiconductor device 11 and the circuit board 14 is a resin Sedimentation to the semiconductor device 11 side occurs based on the specific gravity difference from 1. Therefore, when the resin composition 3 is cured while the filler 2 is settled toward the semiconductor device 11, the filler 2 having a relative dielectric constant larger than that of the resin 1 is contained in the resin composition 3 as shown in FIG. 3. The resin 1 having a relative dielectric constant smaller than that of the filler 2 is positioned on the circuit board 14 side, and as a result, the semiconductor device in which the crosstalk noise is suppressed. A mounting body is obtained.
[0029]
By the way, in the mounting method of the semiconductor device concerning Embodiment 1 and Embodiment 2 demonstrated above, when positioning the filler 2 in the circuit board 14 side in the resin composition 3, or the semiconductor device 11 side, resin Although the specific gravity difference between the resin 1 and the filler 2 contained in the composition 3 is used, it is needless to say that the mounting method is not limited thereto. That is, when the resin 1 contained in the resin composition 3 in an uncured state has the property that the viscosity decreases at the same time as the temperature increases, such as an epoxy resin, the density decreases. It is also possible to separate the resin 1 and the filler 2 using the properties, and although not shown in the figure, the filler 2 contained in the resin composition 3 is previously incorporated with a magnetic material, For example, it is possible to coat the periphery of the metal powder with Teflon, and to place the filler on the circuit board 14 side or the semiconductor device 11 side in the resin composition 3 by utilizing the property that the filler 2 is attracted by the magnet. It is.
[0030]
【The invention's effect】
As described above, according to the mounting body of a semiconductor device according to the present invention, among the resin compositions that seal the gap between the semiconductor device and the circuit board, the filler having a small relative dielectric constant is located on the circuit board side. Alternatively, since a filler having a large relative dielectric constant is located on the semiconductor device side, the relative dielectric constant in the vicinity of the circuit board is reduced, and as a result of less influence from the mounting surface of the circuit board, crosstalk noise can be suppressed. The effect is obtained. And according to the mounting method of the semiconductor device concerning the present invention, the mounting object of the semiconductor device set as the above-mentioned composition can be produced easily.
[Brief description of the drawings]
1 is a cross-sectional view showing a mounting body of a semiconductor device according to a first embodiment;
FIG. 2 is a process cross-sectional view illustrating a mounting method when manufacturing a semiconductor device mounting body according to the first embodiment;
FIG. 3 is a cross-sectional view showing a semiconductor device mounting body according to a second embodiment;
FIG. 4 is a cross-sectional view showing a circuit board according to a conventional form.
FIG. 5 is a cross-sectional view showing a mounting body of a semiconductor device according to a conventional embodiment.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Resin 2 Filler 3 Resin composition 11 Semiconductor device 14 Circuit board

Claims (9)

半導体装置をフェースダウンで回路基板上に実装し、樹脂及びフィラーを含有した樹脂組成物で半導体装置及び回路基板間の間隙を封止してなる半導体装置の実装体であって、
樹脂組成物に含有されたフィラーは樹脂よりも小さな比誘電率を有しており、半導体装置及び回路基板間の間隙を封止した樹脂組成物中の回路基板側に位置していることを特徴とする半導体装置の実装体。A semiconductor device mounting body in which a semiconductor device is mounted face-down on a circuit board, and a gap between the semiconductor device and the circuit board is sealed with a resin composition containing a resin and a filler,
The filler contained in the resin composition has a relative dielectric constant smaller than that of the resin, and is located on the circuit board side in the resin composition sealing the gap between the semiconductor device and the circuit board. A semiconductor device package. 請求項１に記載した半導体装置の実装体であって、
樹脂組成物に含有されたフィラーは、樹脂よりも大きな密度を有していることを特徴とする半導体装置の実装体。A package of the semiconductor device according to claim 1 ,
The semiconductor device package is characterized in that the filler contained in the resin composition has a density higher than that of the resin. 請求項１または請求項２に記載した半導体装置の実装体であって、
フィラーは、テフロン(登録商標）からなることを特徴とする半導体装置の実装体。A mounting body of a semiconductor device according to claim 1 or 2 ,
The semiconductor device mounting body, wherein the filler is made of Teflon (registered trademark). 請求項１ないし請求項３のいずれかに記載した半導体装置の実装体であって、
フィラーは、中空状であることを特徴とする半導体装置の実装体。The mounting of the semiconductor device according to any one of claims 1 to 3,
A mounting body of a semiconductor device, wherein the filler is hollow. 半導体装置をフェースダウンで回路基板上に実装し、樹脂及びフィラーを含有した樹脂組成物で半導体装置及び回路基板間の間隙を封止してなる半導体装置の実装体であって、
樹脂組成物に含有されたフィラーは樹脂よりも大きな比誘電率を有しており、半導体装置及び回路基板間の間隙を封止した樹脂組成物中の半導体装置側に位置しており、かつ、樹脂組成物に含有されたフィラーは樹脂よりも大きな密度を有していることを特徴とする半導体装置の実装体。A semiconductor device mounting body in which a semiconductor device is mounted face-down on a circuit board, and a gap between the semiconductor device and the circuit board is sealed with a resin composition containing a resin and a filler,
The filler contained in the resin composition has a relative dielectric constant larger than that of the resin, is located on the semiconductor device side in the resin composition sealing the gap between the semiconductor device and the circuit board , and A mounting body for a semiconductor device, wherein the filler contained in the resin composition has a density higher than that of the resin . 請求項５に記載した半導体装置の実装体であって、
フィラーは、シリカからなることを特徴とする半導体装置の実装体。A mounting body for a semiconductor device according to claim 5 ,
The mounting body of a semiconductor device, wherein the filler is made of silica. 半導体装置をフェースダウンで回路基板上に実装する工程と、樹脂及び樹脂よりも比誘電率の小さいフィラーを含有して未硬化状態にある樹脂組成物を半導体装置及び回路基板間の間隙に充填する工程と、フィラーが樹脂組成物中の回路基板側に位置する状態としたうえで樹脂組成物を硬化させる工程とを含んでいることを特徴とする半導体装置の実装方法。  A process of mounting a semiconductor device on a circuit board face down, and filling a gap between the semiconductor device and the circuit board with a resin composition containing a resin and a filler having a relative dielectric constant smaller than that of the resin and in an uncured state A method of mounting a semiconductor device, comprising: a step; and a step of curing the resin composition after the filler is placed on the circuit board side in the resin composition. 請求項７に記載した半導体装置の実装方法であって、
樹脂組成物中の回路基板側または半導体装置側にフィラーを位置させるに際しては、樹脂組成物に含有された樹脂とフィラーとの比重差を利用することを特徴とする半導体装置の実装方法。A semiconductor device mounting method according to claim 7 , comprising:
A method for mounting a semiconductor device, wherein a filler is positioned on a circuit board side or a semiconductor device side in a resin composition, and a specific gravity difference between the resin and the filler contained in the resin composition is used. 請求項７に記載した半導体装置の実装方法であって、
樹脂組成物中の回路基板側または半導体装置側にフィラーを位置させるに際しては、樹脂組成物に含有されたフィラーを予め磁性体が内蔵されたものとしておき、磁石によってフィラーが引き付けられる性質を利用することを特徴とする半導体装置の実装方法。A semiconductor device mounting method according to claim 7 , comprising:
When the filler is positioned on the circuit board side or the semiconductor device side in the resin composition, the filler contained in the resin composition is assumed to have a built-in magnetic body in advance, and the property that the filler is attracted by the magnet is used. A method for mounting a semiconductor device.
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