JP4071139B2 - Control method of substrate processing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent an adverse effect of a process to a substrate during treatment even in the case that the an alarm is issued from a treatment unit. <P>SOLUTION: When one of a plurality of the treatment units issues the alarm informing abnormality, treatment and carrying are continued until a carrying path is completed for the substrate positioned at a downstream side of the alarm issuing unit or a prescribed skip mode applying unit in the carrying path. Carrying is stopped for the substrate positioned an upstream side of the alarm issuing unit or the skip mode applying unit. <P>COPYRIGHT: (C)2003,JPO

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for controlling a substrate processing apparatus for processing a substrate such as a semiconductor wafer or a liquid crystal display substrate while sequentially transferring the substrate to a plurality of processing units according to a preset transfer path.
[0002]
[Prior art]
In the substrate processing apparatus, the substrate is transported to each processing unit by the transport robot according to a processing recipe that defines the order (transport path) for transporting the substrate to each processing unit and the processing conditions in each processing unit. Each process is executed. Incidentally, during processing of a substrate, one of a plurality of processing units may generate an alarm for notifying an abnormality. Conventionally, when such an alarm is generated, the substrate transport and the processing in each processing unit are stopped at that time.
[0003]
[Problems to be solved by the invention]
However, if the processing of the substrate is stopped halfway, the processing substrate may be adversely affected in the process. For example, if the progress of the process of heating the substrate is stopped, the heat treatment is performed for a longer time than planned, resulting in so-called overbaking (excessive heat treatment).
[0004]
The present invention has been made in order to solve the above-described problems in the prior art, and provides a control method capable of preventing adverse effects on the substrate being processed even when an alarm is generated from the processing unit. The purpose is to provide.
[0005]
[Means for solving the problems and their functions and effects]
To solve at least part of the problems described above, the first invention, the plurality in the substrate processing apparatus having a plurality of processing units, according to a preset conveyance path a plurality of substrates in the processing recipe to be processed A substrate processing apparatus control method for processing while sequentially transporting to the processing unit,
In response to the occurrence of an alarm notifying the abnormality of any one of the plurality of processing units, until the transfer path is completed for a substrate located downstream of the alarm generation unit in the transfer path. Continuing the processing and transport, with a skip mode to stop transport for the substrate located upstream from the alarm generating unit,
When the transport path is branched such that another processing unit equivalent to the alarm generation unit is arranged in parallel with the alarm generation unit in the transport path , in the skip mode, the alarm generation unit Processing and transport are continued even for substrates existing in other equivalent processing units until the entire transport path in the substrate processing apparatus defined by the processing recipe is completed.
[0006]
In this case, since the processing can be completed for the substrates located downstream of the alarm generation unit, at least adverse effects on the processes on these substrates can be prevented.
[0007]
According to a second aspect of the present invention, there is provided a substrate processing apparatus control method for processing a substrate to be processed while sequentially transferring the substrate to be processed to a plurality of processing units according to a preset transfer path,
Pre-select at least one of the plurality of processing units as a skip mode target unit;
In response to the occurrence of an alarm notifying the abnormality of any one of the plurality of processing units, the transfer path is completed for a substrate located downstream of the skip mode target unit in the transfer path. The processing and the conveyance are continued until the operation is performed, and a skip mode for stopping the conveyance is provided for the substrate located on the upstream side of the skip mode target unit.
[0008]
In this way, since the processing can be completed for the substrates positioned on the downstream side of the skip mode target unit, it is possible to prevent at least adverse effects on the processes on these substrates.
[0009]
The first or second invention further includes:
In response to the occurrence of the alarm, a processing completion mode is provided in which the operation is stopped after the processing and the transportation are continued until the transportation path is completed with respect to all the substrates being processed located in the transportation path,
When the alarm is generated, it is preferable to execute one mode selected in advance among the skip mode and the processing completion mode.
[0010]
By so doing, it is possible to set the skip mode or the processing completion mode to be selectively executed according to the transport path, so that the efficiency of the substrate processing apparatus can be improved.
[0011]
The skip mode target unit is preferably a chemical solution application unit that applies a chemical solution to a substrate.
[0012]
As a result, it is possible to prevent adverse effects on the substrate on which the chemical solution is applied at least by the chemical solution application unit.
[0013]
Other aspects of the invention
The present invention includes other aspects as follows. A first aspect is a control device for a substrate processing apparatus for processing a substrate to be processed while sequentially transferring the substrate to be processed to a plurality of processing units according to a preset transfer path,
Alarm detection means for detecting occurrence of an alarm for notifying an abnormality of any one of the plurality of processing units;
In response to the alarm, the substrate located downstream of the alarm generation unit in the transfer path is continuously processed and transferred until the transfer path is completed, and is positioned upstream of the alarm generation unit. The board includes skip mode execution means for stopping conveyance.
[0014]
A second aspect is a control device for a substrate processing apparatus for processing a substrate to be processed while sequentially transferring the substrate to be processed to a plurality of processing units according to a preset transfer path,
Selecting means for pre-selecting at least one of the plurality of processing units as a skip mode target unit;
Alarm detection means for detecting occurrence of an alarm for notifying an abnormality of any one of the plurality of processing units;
In response to the alarm, the substrate located downstream of the skip mode target unit in the transport path continues processing and transport until the transport path is completed, and upstream of the skip mode target unit. And a skip mode executing means for canceling the transfer of the substrate located in the position.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described based on examples. FIG. 1 is a perspective view showing a semiconductor wafer processing apparatus to which an embodiment of the present invention is applied. This semiconductor wafer processing apparatus is a spinner provided with a plurality of processing units for performing a series of processes (in this embodiment, a coating process, a developing process, a heating process, and a cooling process) on the semiconductor wafer W. The first processing unit group A arranged on the front surface includes a spin coater SC that performs a coating process and a spin developer SD that performs a development process.
[0016]
Further, a second processing unit group B is provided at a position on the rear side facing the first processing unit group A. The second processing unit group B includes hot plates HP1 to HP3 and cool plates CP1 to CP3 for performing various heat treatments.
[0017]
Furthermore, this apparatus is provided with a transfer region C extending along the first processing unit group A at a position sandwiched between the first processing unit group A and the second processing unit group B. A transfer robot 10 is movably disposed in the transfer area C. The transfer robot 10 includes a moving body 12 having a support member 11 having two arms for supporting each semiconductor wafer W (only one arm is visible in the figure). The upper and lower two arms constituting the support member 11 are driven by an arm driving mechanism (not shown), and the semiconductor wafer is exchanged in each processing unit. That is, one arm receives a processed semiconductor wafer from the processing unit, and the other arm places the semiconductor wafer transferred from the other processing unit on the processing unit. Although not shown, a three-dimensional drive mechanism is connected to the moving body 12 of the transfer robot 10. This drive mechanism moves the moving body 12 in front of each processing unit, and enables the delivery of the semiconductor wafer W.
[0018]
An indexer IND for carrying out the semiconductor wafer W from the cassette 20 and carrying the semiconductor wafer W into the cassette 20 is provided at the end of the semiconductor wafer processing apparatus. The transfer robot 40 provided in the indexer IND takes out the semiconductor wafer W from the cassette 20 and sends it to the transfer robot 10. Conversely, the transfer robot 40 receives the semiconductor wafer W subjected to a series of processes from the transfer robot 10. Work to return to. Although not shown in FIG. 1, the semiconductor wafer W is transferred to and from another processing apparatus (for example, an exposure apparatus such as a stepper) at the opposite end (right side of the drawing) of the indexer IND. An interface unit is provided. The delivery of the semiconductor wafer W between the semiconductor wafer processing apparatus of the embodiment and another processing apparatus is performed by the cooperation of a mobile robot (not shown) provided in the interface unit and the transfer robot 10.
[0019]
FIG. 2 is a block diagram of the semiconductor wafer processing apparatus of FIG. In FIG. 2, a controller 50 is an arithmetic processing device that includes an arithmetic unit (CPU) and a main memory (RAM and ROM), and is connected to a display 51 and a keyboard 52. The controller 50 controls the operations of the transfer robot 10 and the transfer robot 40 (indexer IND robot) and the processing units SC, SD, HP1 to HP3, and CP1 to CP3 according to a preset processing recipe. The controller 50 further has functions as alarm detection means for detecting the occurrence of an alarm and skip mode execution means for executing a skip mode described later.
[0020]
A software program (application program) for realizing various functions by the controller 50 is transferred from a portable storage medium (portable storage medium) such as a floppy disk or a CD-ROM to the main memory of the controller 50 or an external storage device. The
[0021]
FIG. 3 is an explanatory view showing an example of a transport path of a semiconductor wafer in the semiconductor wafer processing apparatus. In this example, the semiconductor wafer is transferred from the indexer IND in the order of the hot plate HP1, the cool plate CP1, the spin coater SC, the hot plate HP2, and the cool plate CP2, and is processed in each processing unit, and finally the cassette of the indexer IND. 20 is returned. In FIG. 3, reference numerals n to (n−6) written in blocks indicating the respective processing units indicate the numbers of the semiconductor wafers processed in the respective units. That is, in the state of FIG. 3, the (n- 5 ) th wafer is cooled by the cool plate CP2, and the (n- 4 ) th wafer is heated by the hot plate HP2. Similarly, each subsequent wafer is also processed in each processing unit. The n-th wafer described at the position of the indexer IND is taken out from the cassette 20 by the transfer robot 40 and is in a state of waiting on a pin (not shown) for delivery to the transfer robot 10.
[0022]
Paths (paths) P <b> 1 to P <b> 6 between the processing units correspond to operations carried by the carrying robot 10. In this embodiment, a wafer existing between the leftmost path P1 and the rightmost path P6 in FIG. 3 is referred to as a “processing wafer”. Accordingly, the wafers being processed in the processing units HP1, CP1, SC, HP2, and CP2 are “wafers being processed”. On the other hand, a wafer waiting on the pins of the indexer IND (a wafer indicated in a block indicating the indexer IND) is not a “wafer in process”.
[0023]
The conveyance path shown in FIG. 3 is registered in a processing recipe set in advance by the user. The processing recipe is data that defines the transport path and the processing conditions in each processing unit. The controller 50 controls the transfer robot 10, the transfer robot 40, and each processing unit according to this processing recipe. That is, when the semiconductor wafer processing apparatus is operating normally, the wafers are sequentially processed according to the transfer path shown in FIG.
[0024]
By the way, each processing unit generates an alarm and notifies the controller 50 when any abnormality is detected. Examples of the alarm include an insufficient amount of chemical solution in the spin coater SC and a temperature abnormality in the hot plates HP1 and HP2. The controller 50 notifies the user of this alarm and executes control according to the alarm occurrence.
[0025]
FIG. 4 is a flowchart showing the control operation of the controller 50 when an alarm is generated. In step S1, the controller 50 monitors whether an alarm has occurred. When the alarm is generated, the controller 50 stops sending a new wafer from the indexer IND in step S2. In step S3, the wafer waiting on the pins of the indexer IND is stored in the cassette 20. The operation in step S3 can be omitted.
[0026]
In step S4, the controller 50 determines whether or not the skip mode is set. The user can specify in advance whether or not to execute the skip mode from the keyboard 52. If the skip mode is set, the skip mode control is executed in step S5. On the other hand, if the skip mode is not set, the indexer feed stop process control is executed in step S6.
[0027]
The indexer delivery stop process is an operation that continues the process and the transfer for all the wafers that are being processed at the time of the alarm occurrence, and returns to the indexer IND. That is, when the indexer sending stop process is executed when an alarm is generated in the state of FIG. 3, the processing and the conveyance are continued for the five wafers from the (n-5) th to the (n-1) th, and the indexer Transported to IND. The indexer delivery stop process has an advantage that the wafer is not left in the middle of the process because the process and the transfer are continued until there is no wafer being processed in the semiconductor wafer processing apparatus. In order to perform such an indexer sending stop process, it is necessary to generate an alarm with a sufficient margin so that all the wafer processing existing in each processing unit can be completed to the end when the alarm is generated. “Alarm” in this specification does not mean that the alarm generating unit needs to be stopped immediately, but indicates that an abnormality has occurred that can process at least a predetermined number (for example, five) of wafers. It is. Note that the indexer delivery stop processing mode corresponds to the processing completion mode in the present invention.
[0028]
In the skip mode process in step S5 of FIG. 4, the controller 50 continues the process and the transfer as it is for the wafer that is being processed located in the transfer path after the processing unit that generated the alarm (referred to as “alarm generating unit”). The semiconductor wafer processing apparatus is stopped when all the wafers return to the indexer IND. On the other hand, the wafer being processed positioned on the transfer path before the alarm generation unit stops the transfer after the processing in each processing unit is completed, and waits at the standby position of each processing unit. FIG. 5 is an explanatory diagram showing the operation content of the skip mode when an alarm is generated. As shown in FIG. 5, when the spin coater SC generates an alarm, the wafers being processed (nth, (n-2) th and (n-1) th) in the spin coater SC and the subsequent transport paths are processed. The wafer processing is continued as it is, and the process returns to the indexer IND. On the other hand, the in-process wafers ((n + 1) th and (n + 2) th wafers) positioned on the path upstream of the spin coater SC are put on standby at that position after the processing in the processing unit is completed.
[0029]
FIG. 6 is an explanatory diagram showing the flow of wafers when the mode is shifted to the skip mode due to an alarm. The leftmost column in FIG. 6 shows a processing cycle. Here, one cycle means a period from when each wafer is processed by one processing unit to the next processing unit. Further, IND, HP1, CP1, and the like in the upper stage indicate each processing unit, and symbols such as n, n-1 and the like described below indicate the order of the wafers. Further, the symbol “x” indicates that there is no wafer.
[0030]
The processing cycle m in FIG. 6 corresponds to the state of FIG. 3 described above, and the processing cycle (m + 3) corresponds to the state of FIG. When the spin coater SC generates an alarm in the processing cycle (m + 3), the (n + 3) -th wafer existing in the indexer IND is returned to the cassette, and the (n + 2) -th and (n + 1) -th wafers are the respective processing units. Wait at. This is shown in process cycles (m + 4) to (m + 6). Further, the wafers present in the spin coater SC and the subsequent processing units are sequentially processed in the processing cycles (m + 4) to (m + 6) and returned to the indexer IND. As a result, in the processing cycle (m + 7), there is no wafer on the transfer path after the spin coater SC, which is an alarm generation unit, and the operation of the entire semiconductor wafer processing apparatus is stopped in this state. Then, when the alarm is canceled in the processing cycle (m + 7), as shown in FIG. 6, the processing is continued from the state interrupted in the skip mode.
[0031]
Note that the wafer that was present in any of the paths P1 to P6 between the processing units at the time of the alarm is transferred to at least the next processing unit. For example, when an alarm is generated in the spin coater SC, wafers existing in the paths P1 to P3 upstream from the spin coater SC are respectively transferred to the next processing units HP1, CP1, and SC and wait. On the other hand, for the wafers existing in the paths P4 to P6 on the downstream side of the spin coater SC, the processing and the conveyance are continued as they are and returned to the indexer IND.
[0032]
Further, depending on the substrate processing apparatus and the processing recipe, a plurality of processing units that are equivalent to each other may be arranged in parallel on the transport path. For example, in FIG. 5, a plurality of hot plates are arranged in parallel at the position of the hot plate HP1. In such a case, when one of a plurality of processing units equivalent to each other arranged in parallel generates a warning, the wafers existing in other processing units equivalent to the warning generation unit are also processed and transported. Continue until the end.
[0033]
In the above embodiment, the wafer existing in the transfer path after the alarm generation unit is continued until the processing is completed, while the wafer existing in the transfer path before the alarm generation unit is made to wait at that position. Therefore, the normal processing can be performed on the wafer existing in the path after the alarm generation unit. As a result, the processing for wafers existing in the path after the alarm generation unit can be completed without adversely affecting the process such as overbaking.
[0034]
In the indexer delivery stop processing mode described above, it is necessary to generate an alarm with a margin enough to complete the processing of all wafers being processed at the time of the alarm generation, whereas in skip mode processing, the alarm is generated. It is sufficient that there is a margin enough to complete the processing of the wafer existing in the path after the unit. That is, in the skip mode, there is an advantage that it is possible to improve the efficiency of the entire apparatus because a margin for alarm generation may be small.
[0035]
In the above embodiment, as shown in FIG. 4, since the user can set either the skip mode or the indexer sending stop processing mode, one of the two processing modes is selected according to the processing recipe or the like. By doing so, the operating efficiency of the semiconductor wafer processing apparatus can be improved.
[0036]
The present invention is not limited to the above-described examples and embodiments, and can be implemented in various modes without departing from the gist thereof. For example, the following modifications are possible.
[0037]
(1) In the skip mode of the above embodiment, the processing for the wafer existing in the path after the alarm generation unit is continuously completed. Instead of this, it is also possible to continue and complete only the processing for a wafer existing in a path after a specific processing unit (skip mode target unit) when an alarm is generated. For example, when a spin coater SC is set as a skip mode target unit and an alarm is generated, only processing of wafers existing on the path after the spin coater SC that is the skip mode target unit is performed regardless of which processing unit is the alarm generation unit. It is possible to continue. In particular, when a very effective chemical solution (for example, polyimide) is used in the spin coater SC, if the wafer processed by the spin coater SC becomes defective, the economical efficiency is greatly reduced. Therefore, according to the above-described modification, the processing can be completed for the wafer on which the chemical solution has been applied by the spin coater SC when an alarm is generated, so that it is possible to prevent the chemical solution from being wasted.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a semiconductor wafer processing apparatus to which an embodiment of the present invention is applied.
FIG. 2 is a block diagram of a semiconductor wafer processing apparatus.
FIG. 3 is an explanatory view showing a transport path of a semiconductor wafer W in the semiconductor wafer processing apparatus.
FIG. 4 is a flowchart showing a control operation when an alarm is generated.
FIG. 5 is an explanatory diagram showing details of control in a skip mode.
FIG. 6 is an explanatory diagram showing the flow of a wafer when the mode is shifted to a skip mode due to an alarm generation.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... Conveyance robot 11 ... Supporting member 12 ... Moving body 20 ... Cassette 40 ... Transfer robot 50 ... Controller 51 ... Display 52 ... Keyboard CP1-CP3 ... Cool plate HP1-HP3 ... Hot plate IND ... Indexer SC ... Spin coater (rotation type) Chemical solution applicator)
SD: Spin developer (rotating chemical developing device 9

Claims (2)

In a substrate processing apparatus having a plurality of processing units, a control method of a substrate processing apparatus for sequentially processing while conveying said plurality of processing units according to a preset conveyance path a plurality of substrates in the processing recipe to be processed And
In response to the occurrence of an alarm notifying the abnormality of any one of the plurality of processing units, until the transfer path is completed for a substrate located downstream of the alarm generation unit in the transfer path. Continuing the processing and transport, with a skip mode to stop transport for the substrate located upstream from the alarm generating unit,
When the transport path is branched such that another processing unit equivalent to the alarm generation unit is arranged in parallel with the alarm generation unit in the transport path , in the skip mode, the alarm generation unit A method of controlling a substrate processing apparatus, wherein processing and transport are continued until the entire transport path in the substrate processing apparatus defined by the processing recipe is completed even for substrates existing in other equivalent processing units. In a plurality of processing units a substrate processing apparatus having a, a control unit of a substrate processing apparatus for processing while sequentially transferred to the plurality of processing units according to a preset conveyance path a plurality of substrates in the processing recipe to be processed And
Alarm detection means for detecting occurrence of an alarm for notifying an abnormality of any one of the plurality of processing units;
In response to the alarm, the substrate located downstream of the alarm generation unit in the transfer path is continuously processed and transferred until the transfer path is completed, and is positioned upstream of the alarm generation unit. The board includes skip mode execution means for stopping conveyance,
When the transport path branches so that other processing units equivalent to the alarm generation unit are arranged in parallel with the alarm generation unit in the transport path , in the skip mode, the alarm generation unit Control of a substrate processing apparatus in which processing and transport are continued until the entire transport path in the substrate processing apparatus defined in the processing recipe is completed even for a substrate existing in another processing unit equivalent to apparatus.

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