JP4067032B2 - Digital information receiver - Google Patents

Description

  The present invention relates to a digital information receiving apparatus, and more particularly to a digital information receiving apparatus that receives digital information transmitted after being subjected to bit compression and modulation.

  Conventionally, an apparatus that compresses, modulates and transmits an information signal and receives the transmitted signal is described in, for example, Patent Document 1. Patent Document 1 describes a technique in which a packet transmission technique is adopted to broadcast a program in a unit of a predetermined time in a short time, and this is expanded and played back in real time on the receiving side.

Non-Patent Document 1 includes an explanatory article entitled “Audio Signal System for Satellite Television Broadcasting”. In this commentary article, a television broadcast that compresses an audio signal based on the 14 / 10-bit quasi-instantaneous companding (5-range) rule, transmits it by four-phase DPSK (DIFFERENTIAL PHASE SHIFT KEYING), and receives the transmission signal. The audio signal system is described.

JP-A 63-28143 The Journal of the Institute of Television Engineers of Japan, Vol. 37, No. 5, pp. 366-374 (May 1983)

  However, video information or video information and audio information with relatively low importance are reduced, and modulation is performed to reduce the probability of error occurrence, and information is efficiently transmitted and transmitted within a certain band. However, there is no description about a technology or a receiving apparatus that can receive received information, correct errors generated during transmission, and restore information without errors.

  An object of the present invention is to receive bit-compressed video information or video information and audio information that has been transmitted efficiently, and to correct errors that occur during transmission to restore the video information or video information and audio information. It is an object of the present invention to provide a digital information receiving apparatus capable of performing the above.

  In order to achieve the above object, the present invention comprises the following means.

  Receiving means for receiving a transmission signal obtained by modulating bit-compressed digital video information and error correction parity signal by discrete cosine transform by four-phase phase modulation; and an output signal of the receiving means corresponding to the four-phase phase modulation. Demodulating means for demodulating, error correcting means for error correcting the output signal of the demodulating means using the error correcting parity signal, and error correction digital information corrected by the error correcting means corresponding to the discrete cosine transform And a bit decompression means for decompressing the bit and an output means for outputting the bit decompressed video information decompressed by the bit decompression means.

  According to the present invention, bit-compressed video information or video information and audio information that are efficiently transmitted are received, and errors that occur during transmission are also corrected to restore the video information or video information and audio information. Can do.

  DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described based on examples with reference to the drawings.

  FIG. 1 is a block diagram of a digital information receiving and recording / reproducing apparatus including a digital information receiving apparatus according to the present invention. FIG. 2 is a block diagram of an embodiment of a digital information transmitting apparatus for transmitting a transmission signal toward FIG.

  First, the digital information transmitting apparatus in FIG. 2 will be described. In FIG. 2, 1 is a magnetic tape, 2 and 3 are magnetic heads, 4 is a cylinder, 5 is a capstan, 10 is a servo control circuit, 20 is a demodulation circuit, 21 is an error correction circuit, 22 and 23 are compression circuits, 130 Is a control signal generation circuit, 24 is a parity addition circuit, 25 is a modulation circuit, 26 is a transmission circuit, and 27 is a transmission path.

  Digital video signals and audio signals recorded on the magnetic tape 1 are reproduced by the magnetic heads 2 and 3 mounted on the cylinder 4 and input to the demodulation circuit 20. The magnetic tape 1 travels with a capstan 5. The traveling speed of the magnetic tape 1 and the rotation frequency of the cylinder 4 are, for example, 10 times normal. Therefore, the signal input to the demodulation circuit 20 is time-compressed 10 times. For example, if a 120 minute signal is recorded on the magnetic tape, it can be played back in 12 minutes.

In general, when a digital signal is recorded on a magnetic recording medium, it is recorded after being modulated into a scrambled NRZ, M ² code or the like. In the demodulating circuit 20, signal processing for returning the signal modulated in this way to the original digital data, that is, demodulation is performed. The signal demodulated by the demodulation circuit 20 is input to an error correction circuit 21 to detect and correct erroneous data during the magnetic recording / reproducing process.

  Also, the video signal and the audio signal are separated and input to the compression circuits 22 and 23, respectively. The video signal is bit-compressed by discrete cosine transform (DCT). The audio signal is bit-compressed by non-linear quantization, differential PCM, or the like. As a result, the transmission rate of the total video signal and audio signal is reduced to, for example, 1/20.

  Output signals of the compression circuits 22 and 23 are input to the parity addition circuit 24. The parity addition circuit 24 also receives a control signal from the control signal generation circuit 130. Here, the control signal includes at least a control signal for controlling the operation of the recording apparatus as will be described later. The parity adding circuit 24 adds an error correcting parity signal for correcting an error occurring during transmission, and performs signal processing such as serially outputting a video signal and an audio signal according to the transmission format. The output signal of the parity adding circuit 24 is input to the modulation circuit 25. The modulation circuit 25 modulates the serial signal according to the characteristics of the transmission path 27 and the frequency band. In this case, the transmission path 27 is a space. For example, when the transmission path 27 is transmitted by radio waves, the modulation circuit 25 performs modulation by four-phase phase modulation (QPSK). The modulated signal is input to the transmission circuit 26 and output to the transmission line 27 as a transmission signal. In this way, a signal can be transmitted at a speed 10 times the normal speed.

  In the above embodiment, the case where the signal is reproduced from the VTR has been described. However, the signal source is not limited to the VTR, and any of a magnetic disk device, an optical disk device, and the like may be used.

  Next, a digital information receiving and recording / reproducing apparatus including the digital information receiving apparatus according to the embodiment of the present invention shown in FIG. 1 will be described. In FIG. 1, 27 is a transmission line, 30 is a receiving circuit, 31 is a demodulation circuit, 32 is an error correction circuit, 82 is a memory circuit, 80 is a changeover switch, 62 is an expansion circuit, 64 is a D / A conversion circuit, and 70 is A video signal output terminal 131 is a control circuit.

  A transmission signal transmitted to the transmission path 27 from the digital information transmitting apparatus in FIG. The received signal is input to the demodulation circuit 31. The demodulation circuit 31 corresponds to the modulation circuit 25 of FIG. 2 and demodulates to the original signal. The demodulated signal is input to the error correction circuit 32, and an error occurring in the transmission path 27 is detected and corrected based on the error correction parity signal added by the parity addition circuit 24 of FIG. At this time, if the S / N of the transmission system is insufficient and the error cannot be corrected, correction is performed by signal replacement using the correlation of the signal.

  The error-corrected video signal output from the error correction circuit 32 is input via the memory circuit 82 to the terminal R that is selected during recording by the changeover switch 80. The memory capacity of the memory circuit 82 is at least one field, and the video signal received at high speed is stored in the memory as a frame top, read out from the memory at a normal speed, and input to the decompression circuit 62.

  The decompression circuit 62 corresponds to the compression circuit 22 in FIG. 2, and the compressed video signal is bit-expanded and restored to the original video signal corresponding to the discrete cosine transform (DCT). The output signal is input to the D / A conversion circuit 64, converted from digital to analog video signal, and output from the output terminal 70.

  Further, the error-corrected control signal output from the error correction circuit 32 is detected by the control circuit 131, so that the operation of the recording apparatus, for example, the start of recording can be controlled.

In FIG. 1, 33 is a parity adding circuit, 34 is a modulation circuit, 40 is a magnetic tape, 41 and 42 are magnetic heads, 43 is a cylinder, 44 is a capstan, 50 is a servo control circuit, 60 is a demodulation circuit, 61 Is an error correction circuit, 63 is a decompression circuit, 65 is a D / A conversion circuit, and 71 is an output terminal of an audio signal.

The output signal of the error correction circuit 32 is input to the parity addition circuit 33. The parity adding circuit 33 adds a parity signal for detecting and correcting an error that occurs during the recording and reproduction processes. The signal to which the parity is added is input to the modulation circuit 34. The modulation circuit 34 modulates to a code suitable for magnetic recording. For example, the scrambled NRZ, M ² code, etc. described above. The modulated signal is recorded on the magnetic tape 40 by the magnetic heads 41 and 42 mounted on the cylinder 43.

  At this time, since the signal is time-axis-compressed 10 times as usual, the servo control circuit 50 controls the cylinder 43 so that the rotation frequency of the cylinder 43 and the traveling speed of the magnetic tape 40 become 10 times normal. The rotation control and the capstan 44 are controlled. Further, in order to record a predetermined signal at a predetermined position on the magnetic tape 40, synchronization information is detected from the received signal, and the rotation phase of the cylinder 41 is controlled based on the synchronization information.

  Next, the operation of reproducing the signal recorded in this way will be described. At the time of reproduction, the traveling speed of the magnetic tape 40 and the rotation frequency of the cylinder 43 are set as normal reproduction. The reproduced signal is input to the demodulation circuit 60. The demodulation circuit 60 corresponds to the modulation circuit 34, and demodulates and outputs the modulated signal. The demodulated signal is input to the error correction circuit 61, and an error is detected and corrected based on the parity signal obtained by adding the error generated in the magnetic recording / reproducing system by the parity adding circuit 33. Furthermore, if there are errors that cannot be corrected, they are corrected as appropriate using the correlation of the signals. The video signal and the audio signal are separated and output.

  The video signal is input to the decompression circuit 62. The decompression circuit 62 corresponds to the compression circuit 22 in FIG. 2, and the compressed video signal is restored to the original video signal by the decompression circuit 62. The output signal is input to the D / A conversion circuit 64, converted from digital to analog video signal, and output from the terminal 70.

  The audio signal is input to the decompression circuit 63. The decompression circuit 63 corresponds to the compression circuit 23 of FIG. 2, and the compressed audio signal is restored to the original audio signal by the decompression circuit 63. The output signal is input to the D / A conversion circuit 65, converted from digital to analog audio signal, and output from the terminal 71.

  In the embodiment shown in FIG. 1, the video signal output from the error correction circuit 32 is input to the decompression circuit 62 via the memory circuit 82, but the output signal of the modulation circuit 34 is demodulated via the memory circuit. You may make it input into the circuit 60. FIG. In addition, when there is a margin in the operation speed of the demodulation circuit 60 and the error correction circuit 61, a memory circuit may be provided as appropriate, or the storage capacity of the error correction circuit 61 and the decompression circuit 62 has a margin. For example, the memory circuit may be omitted by using it.

In the embodiment shown in FIGS. 2 and 1, a parity is added to detect or correct an error occurring in the transmission system or the magnetic recording / reproducing system. As an example of the method of adding parity, FIG. 3 shows a case of a magnetic recording / reproducing apparatus using the D2 format, ie, a D2 format VTR. In the D2 format VTR, the signal of one field is divided into a plurality of segments for signal processing. FIG. 3 shows only one of the segments. In FIG. 3, 90 is a video data group, 91 is an outer code parity group, and 92 is an inner code parity group. First, in the figure of the video data group 90 arranged in a matrix, outer code parity is added to data arranged in the vertical direction. Thereafter, the recording signal is generated in such a manner that the inner code parity is added to the data arranged in the horizontal direction in the figure of the video data group 90 and the outer code parity group 91. Parity generation is not described in detail here, but is generated according to a generator polynomial G (x).

  In the embodiment shown in FIGS. 2 and 1, if the parity adding circuits 24 and 33 use the same parity generation method, most of the error correction circuits 32 and 61 can be shared. That is, since the error correction circuits 32 and 61 are circuits used at the time of recording and reproduction, respectively, the circuit scale can be reduced by sharing them.

  FIG. 4 is a block diagram of a digital information receiving and recording / reproducing apparatus including a digital information receiving apparatus according to another embodiment of the present invention. Components common to those in FIG. 1 are denoted by the same reference numerals.

The transmission signal transmitted from the digital information transmitting apparatus in FIG. 2 to the transmission path 27 is received by the receiving circuit 30. The received signal is input to the demodulation circuit 31. The demodulation circuit 31 corresponds to the modulation circuit 25 in FIG. 2 and is demodulated into the original signal. Here, the demodulated signal is input to the error correction circuit 61 via the terminal R side selected at the time of recording by the changeover switch 132, and an error occurring in the transmission system is detected and corrected, and the video signal and the audio signal are also converted. Separated output.

  The video signal is input to the decompression circuit 62. The decompression circuit 62 corresponds to the compression circuit 22 in FIG. 2, and the compressed video signal is restored to the original video signal by the decompression circuit 62. The output signal is input to the D / A conversion circuit 64, converted from digital to analog video signal, and output from the terminal 70.

  The audio signal is input to the decompression circuit 63. The decompression circuit 63 corresponds to the compression circuit 23 of FIG. 2, and the compressed audio signal is restored to the original audio signal by the decompression circuit 63. The output signal is input to the D / A conversion circuit 65, converted from digital to analog audio signal, and output from the terminal 71.

  In the embodiment shown in FIG. 4, an error that occurs in the transmission system and an error that occurs in the magnetic recording / reproducing system are simultaneously detected and corrected by the error correcting circuit 61 of the reproducing system. Therefore, the signal received by the receiving circuit 30 is demodulated by the demodulating circuit 31 and input to the modulating circuit 34 without error correction or adding parity. The subsequent processing is the same as that of the embodiment shown in FIG. 1. The reproduced signal is demodulated by the demodulation circuit 60 and then input to the error correction circuit 61. As described above, the error correction circuit 61 simultaneously detects and corrects errors generated in the transmission system and errors generated in the magnetic recording / reproduction system by the reproduction system error correction circuit 61.

  In the embodiment shown in FIG. 4, the error correction circuit 32 and the parity addition circuit 33 can be removed compared to the embodiment shown in FIG. 1, and the circuit scale can be reduced.

  Although not described in the above embodiments, in such a helical scan type magnetic recording / reproducing apparatus, that is, a VTR, the signal becomes discontinuous when the track jumps during reproduction, so an amble signal is added to the head of the signal. And recorded. Since the addition of the amble signal is also performed in the D2 format VTR, its detailed description is omitted. Further, in order to determine the start position of the signal, a synchronization signal is appropriately added. However, since this is also a known technique in, for example, the D2 format VTR, detailed description thereof is omitted.

  In the embodiment shown in FIG. 2, it can be considered that the addition of the amble signal is performed by the parity adding circuit 24. Alternatively, in order to increase the use efficiency of the transmission path 27, it can be performed on the recording / reproducing apparatus side. In this case, it may be considered that the addition of the amble signal is performed by the parity adding circuit 33 in FIG. In the embodiment shown in FIG. 4, when the amble signal is added on the recording / reproducing apparatus side, it can be considered that the modulation circuit 34 simultaneously performs the amble signal. If the addition of the amble signal is performed on the recording / reproducing apparatus side, the use efficiency of the transmission line 27 can be improved. However, if the amble signal is added on the digital signal transmitting apparatus side, the signals are simultaneously transmitted to a number of recording / reproducing apparatuses, that is, VTRs. In addition, the price of the VTR can be reduced and the effect can be increased.

  As an applied embodiment of the present invention, a signal can be simultaneously transmitted from a digital signal transmitting apparatus to a large number of recording / reproducing apparatuses, that is, VTRs via a transmission path at high speed. At this time, it is difficult to control a large number of VTRs at the same time, and it is also necessary to perform control such as recording in which VTR and not recording in any VTR. A technique for realizing such control will be described below.

  For this purpose, a control signal is transmitted when a digital signal to be recorded is transmitted. An example of the control signal is shown in FIG. In FIG. 5, 110 is a synchronization signal, 111 is an ID signal indicating what kind of control is performed, 112 is an address signal indicating which VTR is controlled, and 113 is a VTR designated by the address signal 112. , 114 is a control signal for stopping recording, 115 and 116 are blank signals, and 120 is a signal for actual recording.

  In response to the synchronization signal 110, an ID signal 111 indicating that an address signal 112 indicating which VTR is to be recorded is transmitted to a predetermined position, and each VTR is set in a standby state. When all the address signals have been transmitted, the recording of the recording signal 120 with the designated VTR can be started by transmitting the ID signal 113. After transmitting the recording signal 120, an ID signal 114 for controlling recording stop is transmitted. The signals 115 and 116 are blank signals, and are signal portions that have no meaning as signals for aligning the signal transmission format with other portions.

  In the embodiment shown in FIG. 2, these control signals are generated by the control signal generation circuit 130, and the parity addition circuit 24 adds a parity signal for correcting an error that occurs during transmission, and is transmitted.

  In the apparatus of the embodiment shown in FIG. 1, the signal is received by the receiving circuit 30, demodulated by the demodulating circuit 31, and an error generated during use is corrected by the error correcting circuit 32. Detect and record / stop control of the recording / reproducing apparatus.

  In the case of the apparatus of the embodiment shown in FIG. 4, since it is necessary to correct an error occurring during transmission, the output signal of the demodulation circuit 31 is input to the error correction circuit 61 and the control signal corrected in error is supplied to the control circuit 131. To enter. The switching circuit 132 is connected to the terminal R side for selecting the output signal of the demodulation circuit 31 during recording, and the P side for selecting the output signal of the demodulation circuit 60 is selected during reproduction.

  In addition, as described in the embodiment shown in FIG. 1, by using the switching circuit 132 and the memory circuit, it is possible to perform recording monitoring as a frame.

  As described above, a large number of VTRs can be selectively and simultaneously controlled by using the present embodiment.

1 is a configuration diagram of a digital information receiving and recording / reproducing apparatus including a digital information receiving apparatus according to an embodiment of the present invention. It is a block diagram of the Example of a digital information transmitter. It is a figure which shows the conventional parity addition method. It is a block diagram of a digital information receiving and recording / reproducing apparatus including a digital information receiving apparatus of another embodiment of the present invention. It is a figure of a control signal.

Explanation of symbols

30: Receiver circuit,
31. Demodulator circuit,
32 ... error correction circuit,
62: Expansion circuit.

Claims (3)

A digital information receiving / recording / reproducing apparatus comprising:
Video information and audio information are bit-compressed by different compression methods, and the compressed video information and audio information are added with a parity for error correction and a common transmission parity signal generated by the same generation method. Receiving means for receiving bit-compressed digital information transmitted in phase modulation;
Demodulation means for demodulating the bit-compressed digital information received by the receiving means;
First error correction means for performing error correction of the bit-compressed digital information demodulated by the demodulation means based on the transmission parity signal;
A parity signal adding means for adding a recording parity signal different from the transmission parity signal to the video information and the audio information to the bit compressed digital information;
Recording means for recording the bit-compressed digital information to which the recording parity signal is added by the parity signal adding means on a recording medium;
Reproducing means for reproducing the bit-compressed digital information recorded on the recording medium;
Second error correction means for performing error correction of the bit-compressed digital information reproduced by the reproduction means based on the recording parity signal;
Bit decompressing means for separating the bit-compressed digital information corrected by the error correcting means into video information and audio information, and each decompressing the compressed information into uncompressed digital information by a different method corresponding to the compression method. A digital information receiving / recording / reproducing apparatus. A digital information receiving / recording / reproducing apparatus comprising:
Video information and audio information are bit-compressed by different compression methods, and the compressed video information and audio information are added with a parity for error correction and a common transmission parity signal generated by the same generation method. Receiving means for receiving transmitted bit-compressed digital information;
Input means for inputting the bit-compressed digital information output from the receiving means;
First error correction means for performing error correction of bit-compressed digital information input from the input means based on the transmission parity signal;
Parity signal adding means for adding a common recording parity signal, which is different from the transmission parity signal and generated by the same generation method to the video information and the audio information, to the bit compressed digital information,
Recording means for recording the bit-compressed digital information to which the recording parity signal is added by the parity signal adding means on a recording medium;
Reproducing means for reproducing the bit-compressed digital information recorded on the recording medium;
Second error correction means for performing error correction of the bit-compressed digital information reproduced by the reproduction means based on the recording parity signal;
Bit decompressing means for separating the bit-compressed digital information corrected by the error correcting means into video information and audio information, and each decompressing the compressed information into uncompressed digital information by a different method corresponding to the compression method. A digital information receiving / recording / reproducing apparatus. A digital information transmitting apparatus for transmitting digital information including a video signal and an audio signal,
Time axis compression means for controlling the digital information to be transmitted at a speed higher than the normal speed by time axis compression;
Bit compression means for bit-compressing the video signal and the audio signal of the digital information;
Transmitting means for transmitting the digital information subjected to time-axis compression and bit compression,
A digital information transmission apparatus, wherein a transmission rate of digital information transmitted from the transmission unit is set smaller than a transmission rate of digital information before being compressed by the time axis compression unit and the bit compression unit.

Images