JP4050063B2 - Imaging device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an imaging apparatus having an imaging element such as a digital camera.
[0002]
[Prior art]
FIG. 9 is a diagram illustrating a partial configuration of an image sensor using a 2: 1 interlace method. In this imaging device, a plurality of A fields and B fields are alternately arranged. As shown in FIG. 9, both the A field and the B field are composed of two rows of pixel groups. Each pixel 91 in the first column has red (R) and green (G) photodiodes 92 alternately, and each pixel 91 in the second column alternates between green (G) and blue. A photodiode for (B) is included. Each pixel 91 has two electrodes 93, 93 which are connected to a vertical transfer path 94.
[0003]
FIG. 10 is a diagram illustrating a reading order of signal charges of a 2: 1 interlaced readout image sensor. As shown in FIG. 10, in the 2: 1 interlace method, the operation of reading the signal charge of the A field and then reading the signal charge of the B field are sequentially performed for the A field and the B field arranged in every other field.
[0004]
In the conventional image pickup apparatus, unnecessary charges remaining in the transfer line are swept out at a higher speed than normal transfer before reading out signal charges of one field of the image sensor. This is because if charges accumulated in the transfer line remain before the signal charges are read out, noise such as smear occurs and a normal image cannot be obtained.
[0005]
Japanese Patent Publication No. 5-63995, Japanese Patent Application Laid-Open No. 2000-32346, and the like are conventional techniques related to an imaging apparatus that performs high-speed sweeping of unnecessary charges as described above.
[0006]
[Problems to be solved by the invention]
However, if the image sensor is driven at high speed for each field in order to sweep out unnecessary charges, power consumption increases. For this reason, the power supply voltage decreases during photographing, and there is a risk that photographing may become impossible or malfunction may not occur.
[0007]
An object of the present invention is to provide an image pickup apparatus that consumes less power and can maintain the reliability of a shooting operation.
[0008]
[Means for Solving the Problems]
In order to solve the problems and achieve the object, the imaging apparatus of the present invention is configured as follows.
[0009]
(1) An imaging device of the present invention includes a plurality of pixels arranged in a matrix and a plurality of vertical transfer paths corresponding to each pixel column, and reads an image of N (N is an integer of 2 or more) field. An N: 1 interlace readout type image sensor that forms an image of one frame, an unnecessary charge sweeping means for sweeping out unnecessary charges in the vertical transfer path before reading out the image of each field, and sweeping out the unnecessary charges. Switching means for switching between a first sweep mode that is performed each time an image of each field is read and a second sweep mode that sweeps the unnecessary charges every m (m is a natural number) fields is configured.
[0010]
(2) The imaging apparatus according to the present invention is the apparatus described in (1) above, and further includes power supply voltage detection means for detecting a power supply voltage, and the switching means is provided when the power supply voltage is equal to or higher than a predetermined reference level. The first sweep mode is selected, and the second sweep mode is selected when the power supply voltage is less than the predetermined reference level.
[0011]
(3) The imaging apparatus of the present invention is the apparatus described in (1) above, and further includes subject brightness detection means for detecting subject brightness, and the switching means is configured to detect when the subject brightness is equal to or higher than a predetermined reference level. The first sweep mode is selected, and the second sweep mode is selected when the subject brightness is less than the predetermined reference level.
[0012]
(4) The imaging apparatus according to the present invention is the apparatus according to (1) above, and further includes a smear detection unit that detects a smear amount, and the switching unit is configured to detect the smear amount when the smear amount is equal to or higher than a predetermined reference level. The first sweep mode is selected, and the second sweep mode is selected when the amount of smear is less than a predetermined reference level.
[0013]
As a result of taking the above-mentioned means, the following effects are obtained.
[0014]
(1) According to the imaging apparatus of the present invention, since it is possible to switch to operate with the minimum necessary power consumption by reducing the number of unnecessary charge sweeps in the imaging device, the power consumption is reduced and the imaging operation is reliable. Can keep sex.
[0015]
(2) According to the imaging apparatus of the present invention, it is possible to switch to the unnecessary charge sweeping mode that operates with the minimum power consumption according to the power supply voltage, so that the battery life of the imaging apparatus can be kept long. It becomes.
[0016]
(3) According to the imaging apparatus of the present invention, it is possible to switch to the unnecessary charge sweeping mode that operates with the minimum necessary power consumption according to the subject brightness, so that the power consumption of the imaging apparatus can be reduced. it can.
[0017]
(4) According to the imaging apparatus of the present invention, it is possible to switch to the unnecessary charge sweeping mode that operates with the minimum necessary power consumption according to the amount of smear, so that the power consumption of the imaging apparatus can be reduced. it can.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0019]
FIG. 1 is a block diagram showing a configuration of an electronic camera (imaging device) according to an embodiment of the present invention.
[0020]
As illustrated in FIG. 1, a bus 100 includes a main CPU 1, an imaging circuit 2, an AE processing unit 3, an AF processing unit 4, an image processing circuit 5, a nonvolatile memory 6, a built-in memory 7, a compression / decompression unit 8, and a removable memory. 9. An LCD driver 10 is connected. The main CPU 1 is connected with a power supply unit 11, an input unit 12, a speaker 13, a focus control unit 101, a zoom control unit 102, an aperture control unit 103, a shutter control unit 104, and a TG circuit 14.
[0021]
The focus control unit 101 has a motor (step motor) 121 that drives the focus lens 111, the zoom control unit 102 has a motor (step motor) 122 that drives the zoom lens 112, and the diaphragm control unit 103 drives a diaphragm 113. A motor (step motor) 123 for driving a mechanical (machine) shutter 114 is connected to the shutter control unit 104. A CCD driver 15 and the imaging circuit 2 are connected to the TG circuit 14. The CCD driver 15 and the image pickup circuit 2 are connected to an image pickup device 16 made of a CCD, and the LCD driver 10 is connected to an LCD display unit 17.
[0022]
In FIG. 1, an optical image of a subject that has passed through a diaphragm 113 in the optical path of photographing lenses 111 and 112 is converted into an electrical signal by the image sensor 16 disposed on the imaging surface of the lens 112, and these electrical signals Is converted into an analog image signal by the imaging circuit 2 and then A / D converted. These digital image signals (hereinafter also referred to as “image information”) are temporarily stored in the volatile built-in memory 7. The built-in memory 7 comprises a high-speed SDRAM (Synchronous Dynamic Random Access Memory), for example, and is also used as an image temporary storage memory and a work area for image processing.
[0023]
The image processing circuit 5 performs color information conversion processing, pixel number conversion processing, and the like of image information temporarily stored in the built-in memory 7. Then, the image information subjected to various image processing by the image processing circuit 5 is JPEG-compressed by the compression / decompression unit 8, for example, and recorded in the removable memory 9 such as smart media. When displaying a captured image, the image information after image processing is displayed on the LCD 17 for image display via the LCD driver 10.
[0024]
When displaying an image recorded in the detachable memory 9, the image information read from the detachable memory 9 is expanded by the compression / decompression unit 8 and predetermined image processing is performed by the image processing circuit 5. After that, an image is displayed on the image display LCD 17 as in the case of shooting.
[0025]
The main CPU 1 reads the basic control program of the electronic camera from the nonvolatile memory 6 such as a flash memory, and controls the entire electronic camera. The main CPU 1 receives an input from the input unit 12 and performs control according to the input. The input unit 12 includes a shutter button (not shown) (consisting of a 1st release switch for starting a shooting operation and a 2nd release switch for starting an exposure operation in conjunction therewith). Further, the main CPU 1 generates a sound such as a warning from the speaker 13. Further, the main CPU 1 controls the power supply unit 11 including a battery to perform power management for the entire electronic camera.
[0026]
The main CPU 1 drives and controls the focus lens 111 via the focus control unit 101 and the motor 121, and controls driving of the zoom lens 112 via the zoom control unit 102 and the motor 122, and via the aperture control unit 103 and the motor 123. The diaphragm 113 is driven and controlled, and the mechanical shutter 114 is driven and controlled via the shutter controller 104 and the motor 124. Further, the main CPU 1 controls the image pickup circuit 15 while controlling the image pickup device 16 through the CCD driver 15 by controlling the electronic shutter pulse output of the TG circuit 14.
[0027]
Further, the main CPU 1 calculates the zoom magnification in response to the zoom instruction from the input unit 12 by the photographer, and gives the number of steps corresponding to the magnification to the motor 122 via the zoom control unit 102 to drive the zoom lens 112. Control.
[0028]
FIG. 2 is a diagram illustrating a partial configuration of the image sensor 16 using the 4: 1 interlace method. In the image sensor 16, A field, B field, C field, and D field are continuously arranged in a plurality of rows. As shown in FIG. 2, each of the A field, B field, C field, and D field is composed of two rows of pixel groups. Each pixel 21 in the first column has red (R) and green (G) photodiodes 22 alternately, and each pixel 21 in the second column alternates with green (G) and blue. A photodiode for (B) is included. Each pixel 21 has one electrode 23, which is connected to the vertical transfer path 24.
[0029]
FIG. 3 is a diagram showing a reading order of signal charges of the image sensor 16 of the 4: 1 interlace readout method. As shown in FIG. 3, in the 4: 1 interlace method, the A field, B field, C field, and D field are arranged in the order of A field, B field, C field, and D field, respectively. The operation of reading signal charges is sequentially performed. In the N: 1 interlace readout method (N is an integer of 2 or more), N field images are read to form one frame image.
[0030]
FIG. 4 is a timing chart of the operation of the electronic camera, and shows a case where high-speed sweeping is performed for each field.
[0031]
When the shutter button of the input unit 12 is turned on by the photographer, the main CPU 1 outputs a vertical synchronization signal, and the TG circuit 14 sends an electronic shutter pulse and a vertical transfer pulse synchronized with the vertical synchronization signal to the CCD driver 15. Output. Further, the mechanical shutter 114 is opened by the main CPU 1 driving the motor 124 by the shutter control unit 104. As a result, the CCD driver 15 performs element shutter control on the image sensor 16, and after performing AE processing and AF processing, main exposure (photographing) is performed.
[0032]
Then, when the TG circuit 14 stops the electronic shutter pulse output to the CCD driver 15 in accordance with the start of the main exposure, the exposure starts, and the main CPU 1 drives the motor 124 by the shutter control unit 104, thereby the mechanical shutter 114. When is closed, the exposure ends. Thereafter, the TG circuit 14 interrupts the output of a charge readout pulse (not shown) to the CCD driver 15 for a predetermined time in synchronization with the fall of the vertical synchronization signal. The output of the charge readout pulse is interrupted four times in total for each period of the vertical synchronization signal. At each interruption, the CCD driver 15 sweeps out unnecessary charges on the vertical transfer path 24 in one field where reading is performed. That is, the unnecessary charges are quickly swept out a total of four times. Then, the CCD driver 15 reads an electrical signal to the image pickup circuit 2 from one field where unnecessary charges are quickly swept out.
[0033]
As described above, after the unnecessary charge is quickly swept out of the vertical transfer path 24 in the A field, the signal charge is read out from the electrode 23 of each pixel 21 in the A field through the vertical transfer path 24, and then B After the unnecessary charge is swept out of the vertical transfer path 24 in the field, the signal charge is read out from the electrode 23 of each pixel 21 in the B field via the vertical transfer path 24, and then in the C field. After the unnecessary charges 24 are swept out at high speed, the signal charges are read out from the electrodes 23 of the respective pixels 21 in the C field via the vertical transfer path 24, and then in the D field, the unnecessary charges in the vertical transfer path 24 are read out. After the high-speed sweep is performed, the signal charge is read out from the electrode 23 of each pixel 21 in the D field via the vertical transfer path 24.
[0034]
FIG. 5 is a timing chart of the operation of the electronic camera, and shows a case where high-speed sweeping is performed every two fields. When the main exposure (photographing) is performed by the same operation as in FIG. 4 and the TG circuit 14 stops the electronic shutter pulse output to the CCD driver 15 at the start of the main exposure, the exposure starts and the main CPU 1 By driving the motor 124 by the shutter control unit 104 and closing the mechanical shutter 114, the exposure ends. Thereafter, the TG circuit 14 interrupts a charge reading pulse (not shown) to the CCD driver 15 for a predetermined time in synchronization with the fall of the vertical synchronizing signal. The output of the charge readout pulse is interrupted twice in total every two cycles of the vertical synchronization signal. At each interruption, the CCD driver 15 sweeps out unnecessary charges on the vertical transfer path 24 in the two fields to be read out. That is, the unnecessary charges are swept out twice in total. Then, the CCD driver 15 reads out an electric signal from the two fields from which unnecessary charges have been swept out to the imaging circuit 2.
[0035]
As described above, after the unnecessary charges in the vertical transfer path 24 are quickly swept out in the A field and the B field, the signal charges are read from the electrodes 23 of the respective pixels 21 in the A field and the B field through the vertical transfer path 24. Next, after the unnecessary charges in the vertical transfer path 24 are quickly swept out in the C field and D field, the signal charges are transferred from the electrodes 23 of the respective pixels 21 in the C field and D field through the vertical transfer path 24. Read out.
[0036]
FIG. 6 is a flowchart showing a first operation procedure of the electronic camera. Hereinafter, the control based on the remaining battery level will be described with reference to FIG. Note that the ON operation of the shutter button of the input unit 12 by the photographer includes an ON operation of the 1st release switch and an ON operation of the 2nd release switch. First, when the first release is turned on in step S1, the main CPU 1 performs an AE operation in step S2, and performs an AF operation in step S3.
[0037]
Next, the main CPU 1 sets “1” to the internal variable “Low-Batt” in step S5 when the remaining battery capacity (usable power amount) of the power supply unit 11 is less than the predetermined amount in step S4. . If the remaining battery capacity (usable power amount, power supply voltage value) of the power supply unit 11 is greater than or equal to the predetermined amount in step S4, the main CPU 1 sets “0” to the internal variable “Low-Batt” in step S6. "Is set.
[0038]
Subsequently, when the 2nd release is turned on in step S7, the main CPU 1 performs the main exposure operation in step S8. When the internal variable 'Low-Batt' is “1” in step S9, the main CPU 1 performs high-speed sweeping for every two fields shown in FIG. 5 in step S10. In step S9, the internal CPU 1 When the variable “Low-Batt” is “0”, the high-speed sweeping for each field shown in FIG. 4 is performed in step S11.
[0039]
In the first operation procedure, when the remaining battery level is low, the mode can be switched to the unnecessary charge sweeping mode that operates with low power, so that the battery life of the imaging apparatus can be kept long. In addition, comparing the high-speed sweeping for each field with the high-speed sweeping for every two fields, the sweeping of unnecessary charges can be performed more effectively for each field. It is possible to sweep out unnecessary charges sufficient to perform the operation.
[0040]
FIG. 7 is a flowchart showing a second operation procedure of the electronic camera. Hereinafter, control based on subject brightness will be described with reference to FIG. First, when the first release is turned on in step S21, the main CPU 1 performs an AE operation in step S22.
[0041]
Next, when the subject brightness detected by the AE processing unit 3 is less than the predetermined value in step S23, the main CPU 1 sets “1” in the internal variable “Bv-Low” in step S24. If the subject luminance detected by the AE processing unit 3 is equal to or greater than the predetermined value in step S23, the main CPU 1 sets “0” in the internal variable “Bv-Low” in step S25. Next, the main CPU 1 performs an AF operation in step S26.
[0042]
Subsequently, when the 2nd release is turned on in step S27, the main CPU 1 performs a main exposure operation in step S28. When the internal variable 'Bv-Low' is "1" in step S29, the main CPU 1 performs high-speed sweeping for every two fields shown in FIG. 5 in step S30. In step S29, the internal CPU 1 When the variable “Bv-Low” is “0”, the high-speed sweeping for each field shown in FIG. 4 is performed in step S31.
[0043]
In the second operation procedure, when the subject brightness is low, the unnecessary charge is expected to be small. Therefore, it is possible to reduce the power consumption of the imaging apparatus by switching to the unnecessary charge sweeping mode that operates with low power. .
[0044]
FIG. 8 is a flowchart showing a third operation procedure of the electronic camera. Hereinafter, control based on subject brightness will be described with reference to FIG. First, when the first release is turned on in step S41, the main CPU 1 performs an AE operation in step S42, and performs smear detection in step S43. When this smear detection is performed, the main CPU 1 interrupts the output of the charge readout pulse from the TG circuit 14 to the CCD driver 15, and the CCD driver 15 reads an electrical signal from the vertical transfer path 24 in each field to the imaging circuit 2. This electrical signal is processed by the AE processing unit 3 and data indicating the amount of smear in each vertical transfer path 24 is integrated. The main CPU 1 detects the total smear amount based on this data.
[0045]
Next, when the detected amount of smear is less than the predetermined amount in step S44, the main CPU 1 sets “1” in the internal variable “Sm-Low” in step S45. If the detected amount of smear is greater than or equal to the predetermined amount in step S44, the main CPU 1 sets “0” in the internal variable “Sm-Low” in step S46. Next, the main CPU 1 performs an AF operation in step S47.
[0046]
Subsequently, when the 2nd release is turned on in step S48, the main CPU 1 performs the main exposure operation in step S49. When the internal variable 'Sm-Low' is "1" in step S50, the main CPU 1 performs high-speed sweeping for every two fields shown in FIG. 5 in step S51. In step S50, the main CPU 1 When the variable “Sm-Low” is “0”, the high-speed sweeping for each field shown in FIG. 4 is performed in step S52.
[0047]
In the third operation procedure, when the amount of smear is small, the unnecessary charge is expected to be small. Therefore, it is possible to switch to the unnecessary charge sweeping mode that operates with low power, thereby reducing the power consumption of the imaging apparatus. .
[0048]
In addition, this invention is not limited only to the said embodiment, In the range which does not change a summary, it can deform | transform suitably and can be implemented.
[0049]
【The invention's effect】
According to the present invention, it is possible to provide an imaging apparatus that consumes less power and can maintain the reliability of the shooting operation.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of an electronic camera (imaging device) according to an embodiment of the present invention.
FIG. 2 is a diagram showing a partial configuration of an image sensor using a 4: 1 interlace method according to an embodiment of the present invention.
FIG. 3 is a diagram showing a reading order of signal charges of the image sensor in the electronic camera of the 4: 1 interlace method according to the embodiment of the present invention.
FIG. 4 is a timing chart of the operation of the electronic camera according to the embodiment of the present invention.
FIG. 5 is a timing chart of the operation of the electronic camera according to the embodiment of the present invention.
FIG. 6 is a flowchart showing a first operation procedure of the electronic camera according to the embodiment of the present invention.
FIG. 7 is a flowchart showing a second operation procedure of the electronic camera according to the embodiment of the present invention.
FIG. 8 is a flowchart showing a third operation procedure of the electronic camera according to the embodiment of the present invention.
FIG. 9 is a diagram showing a partial configuration of an image sensor using a 2: 1 interlace method according to a conventional example.
FIG. 10 is a diagram illustrating a reading order of signal charges of an image sensor in a 2: 1 interlaced imaging apparatus according to a conventional example.
[Explanation of symbols]
1 ... Main CPU
2 ... Imaging circuit 3 ... AE processing unit 4 ... AF processing unit 5 ... Image processing circuit 6 ... Non-volatile memory 7 ... Built-in memory 8 ... Compression / decompression unit 9 ... Detachable memory 10 ... LCD driver 11 ... Power supply unit 12 ... Input unit 13 ... Speaker 14 ... TG circuit 15 ... CCD driver 16 ... Image sensor 17 ... LCD display unit 100 ... Bus 101 ... Focus control unit 102 ... Zoom control unit 103 ... Aperture control unit 104 ... Shutter control unit 111 ... Focus lens 112 ... Zoom lens 113: Aperture 114 ... Mechanical (mechanical) shutter 121 ... Motor 122 ... Motor 123 ... Motor 124 ... Motor 21 ... Pixel 22 ... Photo diode 23 ... Electrode 24 ... Vertical transfer path

Claims (4)

A plurality of pixels arranged in a matrix and a plurality of vertical transfer paths corresponding to each pixel column, and N: 1 (N is an integer of 2 or more) field is read to form an image of one frame N: 1 An interlaced readout image sensor;
Unnecessary charge sweeping means for sweeping out unnecessary charges in the vertical transfer path before reading out the image of each field;
Switching means for switching between a first sweeping mode in which the unnecessary charges are swept each time an image of each field is read out, and a second sweeping mode in which the unnecessary charges are swept every m (m is a natural number) field; ,
An imaging apparatus comprising: Power supply voltage detection means for detecting the power supply voltage is provided,
The switching means selects the first sweep mode when the power supply voltage is equal to or higher than a predetermined reference level, and selects the second sweep mode when the power supply voltage is less than the predetermined reference level. The imaging apparatus according to claim 1. Subject luminance detection means for detecting subject luminance is provided,
The switching means selects the first sweep-out mode when the subject brightness is equal to or higher than a predetermined reference level, and selects the second sweep-out mode when the subject brightness is less than the predetermined reference level. The imaging apparatus according to claim 1. Smear detection means for detecting the amount of smear,
The switching means selects the first sweep mode when the smear amount is greater than or equal to a predetermined reference level, and selects the second sweep mode when the smear amount is less than a predetermined reference level. The imaging device according to claim 1.

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