JP4035004B2 - 情報処理装置 - Google Patents

情報処理装置 Download PDF

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Publication number
JP4035004B2
JP4035004B2 JP2002185451A JP2002185451A JP4035004B2 JP 4035004 B2 JP4035004 B2 JP 4035004B2 JP 2002185451 A JP2002185451 A JP 2002185451A JP 2002185451 A JP2002185451 A JP 2002185451A JP 4035004 B2 JP4035004 B2 JP 4035004B2
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JP
Japan
Prior art keywords
instruction
information processing
processing apparatus
information
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2002185451A
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English (en)
Japanese (ja)
Other versions
JP2004030222A (ja
JP2004030222A5 (enExample
Inventor
哲也 山田
直彦 入江
賢伸 津野田
隆宏 入田
圭介 十山
正之 樺沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2002185451A priority Critical patent/JP4035004B2/ja
Priority to US10/457,409 priority patent/US7124283B2/en
Publication of JP2004030222A publication Critical patent/JP2004030222A/ja
Publication of JP2004030222A5 publication Critical patent/JP2004030222A5/ja
Application granted granted Critical
Publication of JP4035004B2 publication Critical patent/JP4035004B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros
    • G06F9/30174—Runtime instruction translation, e.g. macros for non-native instruction set, e.g. Javabyte, legacy code
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
    • G06F9/45516—Runtime code conversion or optimisation
    • G06F9/4552—Involving translation to a different instruction set architecture, e.g. just-in-time translation in a JVM

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Executing Special Programs (AREA)
  • Executing Machine-Instructions (AREA)
JP2002185451A 2002-06-26 2002-06-26 情報処理装置 Expired - Lifetime JP4035004B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2002185451A JP4035004B2 (ja) 2002-06-26 2002-06-26 情報処理装置
US10/457,409 US7124283B2 (en) 2002-06-26 2003-06-10 Hardware accelerator for a platform-independent code

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002185451A JP4035004B2 (ja) 2002-06-26 2002-06-26 情報処理装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007246635A Division JP2008004132A (ja) 2007-09-25 2007-09-25 情報処理装置

Publications (3)

Publication Number Publication Date
JP2004030222A JP2004030222A (ja) 2004-01-29
JP2004030222A5 JP2004030222A5 (enExample) 2005-10-20
JP4035004B2 true JP4035004B2 (ja) 2008-01-16

Family

ID=29774111

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002185451A Expired - Lifetime JP4035004B2 (ja) 2002-06-26 2002-06-26 情報処理装置

Country Status (2)

Country Link
US (1) US7124283B2 (enExample)
JP (1) JP4035004B2 (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050136992A1 (en) * 2003-12-23 2005-06-23 Mueller Peter D. Providing access to auxiliary hardware in multiprocessor devices
US8064453B2 (en) * 2004-07-15 2011-11-22 Panasonic Corporation Transport stream processing apparatus
US20060018340A1 (en) * 2004-07-22 2006-01-26 Matsushita Electric Industrial Co., Ltd. Transport stream processing apparatus
JP4846226B2 (ja) 2004-10-26 2011-12-28 株式会社日立ソリューションズ 情報処理装置、情報処理方法、およびプログラム
JP4602047B2 (ja) * 2004-10-29 2010-12-22 ルネサスエレクトロニクス株式会社 情報処理装置
US7702889B2 (en) * 2005-10-18 2010-04-20 Qualcomm Incorporated Shared interrupt control method and system for a digital signal processor
US7984281B2 (en) * 2005-10-18 2011-07-19 Qualcomm Incorporated Shared interrupt controller for a multi-threaded processor
US8055872B2 (en) * 2008-02-21 2011-11-08 Arm Limited Data processor with hardware accelerator, accelerator interface and shared memory management unit
US8726248B2 (en) * 2008-06-12 2014-05-13 Oracle America, Inc. Method and apparatus for enregistering memory locations
US8799693B2 (en) 2011-09-20 2014-08-05 Qualcomm Incorporated Dynamic power optimization for computing devices
US9098309B2 (en) * 2011-09-23 2015-08-04 Qualcomm Incorporated Power consumption optimized translation of object code partitioned for hardware component based on identified operations
US9836316B2 (en) * 2012-09-28 2017-12-05 Intel Corporation Flexible acceleration of code execution
US9542211B2 (en) * 2014-03-26 2017-01-10 Intel Corporation Co-designed dynamic language accelerator for a processor
US10599441B2 (en) 2017-09-04 2020-03-24 Mellanox Technologies, Ltd. Code sequencer that, in response to a primary processing unit encountering a trigger instruction, receives a thread identifier, executes predefined instruction sequences, and offloads computations to at least one accelerator
JP2019095952A (ja) * 2017-11-21 2019-06-20 ソニーセミコンダクタソリューションズ株式会社 プロセッサ、情報処理装置および処理方法
CN111062005A (zh) * 2019-11-05 2020-04-24 武汉慧联无限科技有限公司 版权认证密码的生成方法、认证方法、装置及存储介质
US12487828B2 (en) * 2023-05-23 2025-12-02 Microchip Technology Inc. Processor having switch instruction circuit

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USD275576S (en) * 1980-10-27 1984-09-18 Kirk Velma R Notebook insert filing folder
US6513156B2 (en) * 1997-06-30 2003-01-28 Sun Microsystems, Inc. Interpreting functions utilizing a hybrid of virtual and native machine instructions
US6826749B2 (en) * 1998-12-08 2004-11-30 Nazomi Communications, Inc. Java hardware accelerator using thread manager
GB2358261B (en) * 2000-01-17 2004-06-09 Advanced Risc Mach Ltd Data processing with native and interpreted program instruction words
JP2002169696A (ja) * 2000-12-04 2002-06-14 Mitsubishi Electric Corp データ処理装置
US6775763B2 (en) * 2001-03-09 2004-08-10 Koninklijke Philips Electronics N.V. Bytecode instruction processor with switch instruction handling logic
EP1313012A1 (en) * 2001-11-15 2003-05-21 Texas Instruments France Java DSP acceleration by byte-code optimization

Also Published As

Publication number Publication date
JP2004030222A (ja) 2004-01-29
US7124283B2 (en) 2006-10-17
US20040003204A1 (en) 2004-01-01

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