JP4028811B2 - Image forming apparatus - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an image forming apparatus, and more particularly to an image forming apparatus suitable for use in a complex system in which a plurality of functions such as copying, faxing, printing, and scanning are incorporated.
[0002]
[Prior art]
In recent years, complex systems incorporating a plurality of functions such as copying, faxing, printing, and scanning have come to be used in many cases. This type of complex system usually waits for a certain period of time after power-on without using it, in standby mode, preheating mode, low power mode, and sleep mode in order of higher energy savings. Is controlled.
[0003]
When the above-described composite device is in an energy-saving standby state, when the system is used, the power button provided on the operation panel is pressed, paper is set on the ADF, or the pressure plate is operated. All of the system functions are restored.
[0004]
As described above, for example, techniques described in Patent Documents 1 to 3 are known as conventional techniques related to energy saving control.
[0005]
[Patent Document 1]
JP 2001-18486 A
[0006]
[Patent Document 2]
JP 2001-86304 A
[0007]
[Patent Document 3]
JP 2001-356665 A
[0008]
[Problems to be solved by the invention]
As described above, the composite system according to the prior art is in the energy saving standby state, and in order to use the system, the power button provided on the operation panel is pressed, the paper is set on the ADF, or the pressure plate is used. When activated, all system functions are controlled to return.
[0009]
In the complex system according to the prior art, the power supply for unnecessary functions can be cut off in the energy saving mode, so that the system can save energy. One of the divided power supplies or When cutting multiple circuits, the power was turned off without considering the timing of turning off the power, the state of the semiconductor circuit that performs other functions, etc. There is a problem that the lifetime of the semiconductor constituting the semiconductor is shortened. Such a problem also occurs when power is turned on / off for the entire system.
[0010]
In addition, the complex system according to the prior art has a problem that the power consumption is not sufficiently reduced because power is supplied to unnecessary portions in the energy saving mode because the number of divisions of the power supply system is small. Yes.
[0011]
The object of the present invention is to solve the above-mentioned problems of the prior art, prevent the power from wrapping between the semiconductor circuits when the power is turned on and off for the entire system, and shorten the life of the semiconductor constituting the circuit. An object of the present invention is to provide an image forming apparatus capable of preventing such a situation.
[0012]
Further, the object of the present invention is to prevent the occurrence of power wraparound between semiconductor circuits by defining the order of turning on and off a plurality of power supply systems when shifting to the energy saving mode and when recovering from the energy saving mode. To prevent the shortening of the service life of the semiconductors that make up the circuit, and to increase the number of divisions of the power supply system to stop the supply of power to unnecessary parts in the energy-saving mode, sufficiently reducing the power consumption An object of the present invention is to provide an image forming apparatus suitable for use in a complex system that makes it possible.
[0013]
[Means for Solving the Problems]
  The first means of the present invention for achieving the above object is to provide an image forming apparatus comprising an engine, a controller, and a PCI bus for connecting the engine and the controller. Provides a timing generator that is supplied with power, and a power supply that supplies power to the mechanism and functional circuits that constitute the image forming apparatus so as to be controlled to a plurality of energy saving states., The power supply of the functional circuit for mechanical control including the engine mechanism, the power supply of the functional circuit responsible for image transfer of the engine, the power supply of the pull-up resistor of the PCI bus, and the power supply of the controllerThe power supplies are divided into power supply systems, and after the main switching is turned off and the power supply of the apparatus is turned off, the plurality of power supplies are prevented so that the power supply to the parts constituting the mechanism unit and the functional circuit is prevented. When to disconnect each power supply of the gridThe power supply for the functional circuit for mechanical control including the mechanical part of the engine, the power supply for the pull-up power supply for the PCI bus, the power supply for the functional circuit responsible for image transfer of the engine, and the power supply for the controller In orderThe apparatus is characterized by cutting off the power supply of the apparatus.
[0014]
  The second means of the present invention is:In an image forming apparatus configured to include an engine, a controller, and a PCI bus that connects the engine and the controller, the controller is provided with a timing generation unit that is supplied with power when the main switch is on, and has a plurality of energy saving states. Controllable mechanism units constituting the image forming apparatus, a power source for supplying power to the functional circuit, a mechanical circuit functional power source including the engine mechanical unit, a functional circuit power source responsible for engine image transfer, The power supply of the PCI bus pull-up resistor and the controller power supply are divided into four power supply systems. After the main switching is turned on and the apparatus is turned on, the mechanism unit and the functional circuit are configured. The timing of turning on each of the power supplies of the plurality of power supply systems to prevent the power supply from wrapping around the engine The power supply of the functional circuit for mechanical control including the mechanism part of the system and the power supply of the functional circuit responsible for image transfer of the engine are first turned on, then the controller is turned on, and then the pull-up resistor of the PCI bus is turned on Determine the order in which power is to be turned on, and turn on the equipment in turn.It is characterized by.
[0015]
  The third means of the present invention is:In an image forming apparatus that includes an engine, a controller, and a PCI bus that connects the engine and the controller and is controlled so as to transition to a plurality of energy saving states, power is supplied to the controller when the main switch is on. And a timing control unit configured to control the plurality of energy-saving states, a mechanism unit that constitutes the image forming apparatus, a power source that supplies power to the function circuit, and a functional circuit for mechanical control including the engine mechanism unit. When the power supply, the power supply of the functional circuit responsible for image transfer of the engine, the power supply of the pull-up resistor of the PCI bus, and the power supply of the controller are divided into four power supply systems, and the transition between the energy saving states, Each of the power supplies of the plurality of power supply systems is set so as to prevent the power supply from wrapping around the circuit constituting part. When turning off or turning on the power, when turning off the power, turn off the power of the functional circuit for mechanical control including the engine mechanism, turn off the PCI bus pull-up power, turn off the power of the functional circuit responsible for engine image transfer In the order of the controller power-off, the power of the device is turned off in turn, and when the power is turned on, the power of the functional circuit for mechanical control including the engine mechanism and the function circuit responsible for image transfer of the engine Turn on the power first, then turn on the controller, and then turn on the PCI bus pull-up resistor.It is characterized by.
[0016]
  The fourth means of the present invention is:In the third means, the plurality of energy saving states can be immediately operated. Standby The degree of energy saving gradually increases with the state. LowPower Status, LowPower Two states, OffMode To be controlled by the stateIt is characterized by.
[0017]
  The fifth means of the present invention is:In the fourth means, from the energy saving state Standby Factors for returning to the state include detection of the rising and falling edges of the signal by opening and closing the pressure plate that holds the document, detection of the falling edge of the signal by setting the document on the ADF, and external return signal by pressing the energy saving key Any of L level detection, data request from host I / F, and accessIt is characterized by.
[0018]
  The sixth means of the present invention includesIn any one of the first to fifth means, the timing generation unit includes a timer for generating a sequence for disconnecting a plurality of power supply systems and a timer for generating a sequence for input. thingIt is characterized by.
[0019]
  The seventh means of the present invention is:In the fourth means, Standby From state LowPower At the time of transition to the state, cut off only the power supply of the functional circuit for mechanical control including the engine mechanism.It is characterized by.
[0020]
  The eighth means of the present invention is:In the fourth means, LowPower From state Standby At the time of transition to the state, power on the functional circuit for mechanical control including the engine mechanism.It is characterized by.
[0021]
  The ninth means of the present invention includesIn the fourth means, Standby From state OffMode At the time of transition to the state, the power supply of the mechanical control function circuit including the engine mechanism unit is turned off first, then the PCI bus PCI bus pull-up resistor is turned off, and finally the engine image transfer The power supply of the functional circuit responsible for the control and the power supply of the controller are controlled in the order of cutting off almost simultaneously.It is characterized by.
[0022]
  The tenth means of the present invention includesIn the fourth means, OffMode From state Standby At the time of transition to the state, the power of the functional circuit for mechanical control including the mechanical part of the engine and the power of the functional circuit responsible for image transfer of the engine are first turned on, and then the controller is turned on. The PCI bus pull-up resistor must be controlled in the order of turning on the power.It is characterized by.
[0023]
  The eleventh means of the present invention includesIn the fourth means, Standby From state LowPower At the time of transition to the 2 state, the power supply for the mechanical control function circuit including the engine mechanism is first turned off, then the PCI bus pull-up resistor is turned off, and finally the engine image transfer is performed. Be controlled in the order of turning off the power supply of the functional circuitIt is characterized by.
[0024]
  The twelfth means of the present invention includesIn the fourth means, LowPower From 2 states Standby At the time of transition to the state, the power of the functional circuit for mechanical control including the engine mechanism and the power of the functional circuit responsible for image transfer of the engine are first turned on, and then the power of the pull-up resistor of the PCI bus is turned on To be controlled in the order ofIt is characterized by.
[0025]
  The thirteenth means of the present invention isIn the fourth means, LowPower From 2 states OffMode Turn off the controller power at the transition to the state.It is characterized by.
[0031]
  The first aspect of the present invention described above.The secondAccording to the means, it is possible to prevent the power supply from wrapping around between the semiconductor circuits at the time of turning on / off the power supply to the entire system, thereby preventing the life of the semiconductor constituting the circuit from being shortened.
[0032]
  Also, the above-described first aspect of the present invention.3rd to 13thAccording to this means, the order of turning on and off the plurality of power supply systems is defined at the time of transition between energy saving modes and at the time of recovery from the energy saving mode. It is possible to prevent the shortening of the lifetime of the semiconductor constituting the circuit, and to stop the supply of power to unnecessary portions in the energy saving mode, thereby sufficiently reducing the power consumption.
[0033]
  Further, the first aspect of the present invention described above.5According to the above means, in addition to the above, in the energy saving mode, it is possible to prevent an increase in the cost of the system by suppressing an increase in the number of ASIC terminals due to receiving signals one bit at a time from individual factors as a return factor. it can.
[0034]
  Also, the above-described first aspect of the present invention.6According to the means, in addition to the above, it can be used in common for a plurality of products having energy saving control functions with different power supply specifications, power-on timing, and the like.
[0035]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of an image forming apparatus according to the present invention will be described below in detail with reference to the drawings. First, the basic operation in the embodiment of the present invention will be described.
[0036]
Description of basic configuration, basic operation and basic functions
▲ 1 ▼ Initialization
FIG. 1 is a block diagram showing a basic configuration of an image forming apparatus constituting a composite system.
[0037]
An image forming apparatus according to an embodiment of the present invention is configured by connecting a controller 6016 and an engine unit 6015 via a PCI bus 6017 that serves as both an engine I / F and an option bus. A controller 6016 is a controller that controls control of the entire image forming apparatus, drawing, communication, and input from the operation unit. The engine unit 6015 includes a scanner, a plotter, and the like.
[0038]
The controller 6016 includes a CPU 6001, an ASIC 6002, an operation unit 6003, an IEEE 1284 (6004) as a host I / F, a network I / F 6005, a ROM 0 (6006) that is a ROM including an OS and basic application programs, and a ROM that includes an optional application. ROM 1 (6007), ROM 2 (6008) which is a ROM including an optional application, NVRAM 6009 which is a backupable RAM and stores system settings and the like, MEM 0 (6010) which is a memory mounted as a standard, and optionally MEM1 (6011) which is a memory to be added, HDD 6012, an optional device 6013 which is an optional I / F such as a printer application, a fax unit, etc. Configured to include a FAX6014 as (optional)
In the above description, when the system is powered on, the engine 6015 is initialized by the mounted CPU (not shown) and waits until the initialization of the controller 6016 is completed and a command is received. .
[0039]
When the power is turned on, the controller 6016 is initialized by inputting a reset signal to the ASIC 6002, and the ASIC 6002 distributes the reset signal to each device that needs to be reset. When the reset signal is asserted and negated, the CPU 6001 tries to fetch the instruction of the reset vector of the CPU 6001. When the ASIC 6002 receives the fetch signal from the CPU 6001, the ASIC 6002 decodes the address, asserts the CS signal of the ROM 6006 in which the initialization program is stored, and reads the contents (instruction code or data) of the address requested by the CPU 6001. , To CPU6001. The CPU 6001 repeatedly requests the ASIC 6002 to read an instruction, and the ASIC 6002 passes the instruction code or data in the ROM 6006 to the CPU 6001 according to the address. Through the processing described above, the CPU 6001 can execute a program.
[0040]
The initialization program for executing the processing as described above is initialization of the CPU 6001, initialization of the memory 6010 and the option memory 6011 connected to the ASIC 6002, initialization of the PCI 6017, initialization of the engine 6015, and initialization of the operation unit 6003. , Initialization of HDD 6012, initialization of IEEE 1284 (6004) connected to the host, initialization of network I / F 6005, initialization of FAX 6014 and initialization of option 6013 as necessary, Then start the application.
[0041]
Although the access time of the ROM 6006 by the ASIC 6002 depends on the data bus width, the data bus width is 16 bits, 8 bits, etc. in order to suppress the number of external terminals of the ASIC 6002, and the number of bits is smaller than the data bus width of the CPU 6001. Often composed. For this reason, the above-mentioned access time is long. In some cases, a serial device having a bit number of 4 bits, 1 bit or the like, for example, a device such as a EEPROM, an SD card, or a memory stick is used. In this case, the access time described above is particularly slow. Become.
[0042]
・ CPU initialization
The CPU (MIPS system) reads the boot configuration data from the ASIC, cancels the reset, starts fetching an instruction, determines whether it is a cold reset or a reset exception other than that, and the initial timing of the ASIC local bus access timing , Initialization of cache in CPU, initialization of TLB, setting of exception vector, initialization of processor.
[0043]
・ Memory initialization
Before deciding the parameters related to the timing of the standard memory (hereinafter referred to as standard memory), check whether the optional memory exists. If the optional memory exists, Access the EEPROM that stores the information, read the capacity, speed, and configuration of the memory, compare the timing with the standard memory, set the ASIC using the later timing, To do. Thereafter, an interrupt vector is set, an initial value is set in the data area of the RAM, and the like.
[0044]
-PCI initialization
A search for all devices existing on the PCI bus is performed using the configuration register of the internal register of the ASIC. Then, the device type is determined, and if there is a bus bridge, the device of the bus ahead is searched. After enumeration of all devices is completed, mapping is performed in the PCI address space. That is, mapping is performed by setting the head address of the memory under ASIC management to “0x0000.0000”, and other devices are mapped in the PCI memory space access window or the PCI / O space access window prepared in the register space of the ASIC. . When the mapping as described above is completed, “1” is set to the bus master enable, memory enable, and IO enable bits of the command register of each device, and the device operates.
[0045]
・ Engine initialization
Communication between the engine and the controller is performed via a transmission buffer / reception buffer of the engine-side PCI device.
[0046]
・ Initialization of operation unit
The operation unit and the controller are connected via the operation unit I / F, and transmission and reception are performed in full duplex. Then, packet communication is performed with a predetermined packet size, and the operation unit displays that the system is being initialized.
[0047]
・ HDD initialization
Whether or not the HDD is connected is confirmed. If the HDD is connected, the HDD information is read, and the management information is stored in the memory for later use.
[0048]
2 is a diagram illustrating the configuration of software installed in the controller 6016, FIG. 3 is a block diagram illustrating the configuration of functions including the internal configuration of the ASIC 6002, and FIG. 4 is a diagram illustrating a memory map of the ASIC 6002. These will be described.
[0049]
As shown in FIG. 2, the software includes a print application PRINT-APL5001, a copy application COPY-APL5002, a fax application FAX-APL5003, a scanner application SCAN-APL5004, a network application NETWORK-APL5005, and a service that is an application programming interface of a service layer. API 5006, engine control service ECS5007, memory control service MCS5008, operation panel control service OCS5009, system control service SCS5010, network control service NCS5011, fax control service FCS5012, System resource manager SRM5013, a general-purpose OS 5014 that is a UNIX (registered trademark) -like OS, and an engine command I / F 5015 that is a programming interface for communicating with the engine. The part that depends on the CPU and ASIC is a device driver layer It is configured so that transplantation is easy even with different CPUs and different ASICs. When the application is activated, a copy application operation screen is displayed as a default on the operation unit 6003 and waits for a user instruction.
[0050]
When initialization of various devices is completed, the general-purpose OS 5014 activates an application based on the system configuration information. At this time, if the FAX unit 6014 does not exist, the FAX application 5003 is not activated.
[0051]
After the application is started, a copy operation screen is displayed as a default on the operation unit 6003. Note that the default screen can be changed.
[0052]
Further, the CPU 6001 can fetch and execute an instruction directly from the SD card connected to the SD card interface 6115 of the SDC 6114 shown in FIG. 3 via the ASIC 6002.
[0053]
Although the internal configuration of the ASIC 6002 shown in FIG. 3 is already known, these components will be briefly described below.
[0054]
MEM0 (6010) is a memory that is mounted as standard, and MEM1 (6011) is an optional memory that is the same as that described in FIG. Arbiter 6105 is a memory arbiter, Ramc 6106 is a ram controller that controls the memory, cpuif 6107 is a CPU bus protocol interpreter for performing register access and memory access inside the ASIC according to the CPU, IREG 6108 is an internal register of the ASIC, and lbc 6109 is the CPU A local bus controller that controls a bus for connecting a ROM or the like that stores a program. A data bus 6110 of the local bus has a 16-bit width and is a data bus multiplexed with a part of an address.
[0055]
The local bus control line and the address signal 6111 are a chip select signal generated by decoding the lower address and address which are not multiplexed on the data bus 6110, a signal including a read signal, a write signal, etc., and an SD card DMAC 6112 Is a DMAC for reading / writing data from / to an SD card. A one-dimensional DMAC capable of reading or writing, and an SD card boot selector 6113 is for switching between an SD card CPU boot and an SD card access using the DMAC. When the CPU boot from the SD card is selected, the first instruction fetch after the CPU reset is performed from the SD card.
[0056]
The SDC 6114 is an SD card controller that accesses an externally connected SD card according to the protocol, the SD card signal 6115 is a signal connected to the SD card, the HDC 6116 is a hard disk controller that controls the HDD of the ATA 100, and the DATA_DMAC 6117 transfers HDD data. The CMD_DMAC 6118, which is capable of one-dimensional transfer and two-dimensional transfer, is a DMAC for transferring HDD commands.
[0057]
The CD1 (6119) is a compression / decompression unit 1 that compresses or decompresses an image, the CD1 image DMAC 6120 is an input during compression, and the image DMAC 6121 is a compression / decompression DMAC 6121 that operates as an output during decompression. The output is output at the time, the input / output DMAC operates at the input at the time of expansion, the CD2 (6122) is the compression / expansion unit 2 for compressing or expanding the image, and the image DMAC for CD2 6123 is input at the time of compression, An image input / output DMAC that operates on output and a CD2 code DMAC 6124 are outputs for compression and DMAs for input / output of codes that operate on input when decompression.
[0058]
The CD selector 6125 is a selector for selecting which compression / decompression device and HDD are connected, and the video selector 6126 is a selector for selecting which compression / decompression device's decompression output and input to the video DMAC are connected, video The image FIFO 6127 is an output FIFO for video images, the video image shifter 6128 is a shifter that shifts an image at the time of output, and the video synthesizer 6129 is a synthesizer that combines an image and a stamp at the time of output. In this case, the image and the stamp are output separately.
[0059]
The video image output DMAC 6130 is a video image output DMAC, the stamp FIFO 6131 is a stamp output FIFO, and the stamp DMAC 6132 is a stamp output DMAC. Reference numeral 6133 denotes an image input FIFO, and 6134 denotes an image input DMAC.
[0060]
The PCI direct path 6135 is a data path for accessing the memory from the PCI bus side, the IEEE1284 input DMAC 6136 is a DMAC for inputting IEEE1284 data, and the IEEE1284 controller 6137 is a controller that interprets the IEEE1284 protocol and transfers data. The operation unit controller 6138 is a controller for transferring data of the operation unit, the operation unit transmission DMAC 6139 is a DMAC for data output to the operation unit, the operation unit reception DMAC 6140 is a DMAC for data input from the operation unit, and MAC transmission The DMAC 6141 is a DMAC for network transmission, the MAC reception DMAC 6142 is a network reception DMAC, and the MAC 6143 is a media access controller. Further, 6144 is an editor input 1DMAC, 6145 is an editor input 2DMAC, and 6146 is an editor output DMAC.
[0061]
EDIT 6147 is an editor for synthesizing or rotating images, CLR 6148 is an image clear controller for filtering an area with set data, Image clear DMAC 6149 is a DMAC capable of two-dimensional or one-dimensional memory filtering, and 6150 is an HDD interface signal. It is. PCI_Arbiter 6151 is an arbiter that performs PCI access arbitration for external and ASIC. The PCI_Master 6152 performs PCI master access. PCI_CONFIG 6153 is a PCI configuration register, 6155 is an IEEE1284 interface signal, 6156 is an operation unit interface transmission signal, and 6157 is an operation unit interface reception signal. The PHY connection signal 6158 is an MII signal that connects the MAC and the PHY, and the PCI_Target 6159 responds when accessed as a PCI target.
[0062]
Ramc 6106 has a register for setting self-refresh in the energy saving mode, and if there is no access for a certain period of time, memory 6010 is automatically set to self-refresh mode, and thereafter, access to memory 6010 occurs. Then, the memory 6010 is automatically released from the self-refresh mode, and access from the CPU or the like is continued.
[0063]
(2) Copy operation
FIG. 5 is a block diagram of an image forming apparatus including a configuration necessary for operation, and FIG. 6 is a diagram for explaining the flow of an image for simple copy (1 to N copy: N = 1).
[0064]
There are various modes specified by the user in the copy operation. Some of them are described below.
[0065]
1. This is an operation mode of simple copy (1 to N copy), which is an operation of reading one original, copying it on a sheet of the same size as the original, and outputting N sheets.
[0066]
2. This is an operation mode of collective copy (2 in 1 copy), which is an operation in which two originals are read, each reduced, copied onto a sheet of the same size as the original, and output N sheets.
[0067]
3. This is an operation mode of electronic sort, in which the read data is stored in the HDD or memory while being read while the first copy group is being read, and the first copy is simultaneously output.
[0068]
There are various operation modes other than those described above, but the description thereof will be omitted. Next, the flow of an image for simple copy (1 to N copy: N = 1) will be described with reference to FIG. FIG. 6 shows the same image as that shown in FIG.
[0069]
When the start key in the operation unit 6003 is pressed, the SCS 5010 that monitors the external event detects the press of the start key, and the copy application 5002 that is the application currently active in the operation unit 6003 is detected. , Notify that the start key has been pressed.
[0070]
The copy application 5002 detects that it is requested to scan one document, read one document, and output one document from the mode selected in the current operation unit 6003. The copy application 5002 requests the SCS 5010 to secure the system resources necessary to read one document and output one document. If the system resources can be secured, the copy application 5002 reads one document to the MCS 5008, A request is made to output one original with the same size as the original. The MCS 5008 requests and secures necessary memory from the SRM 5013, and then reads one document to the ECS 5007 and issues a request to output one document with the same size as the document. As a result, the ECS 5007 requests the general-purpose OS 5014 to issue a command. The general-purpose OS 5014 calls a device driver and issues a command to the engine 6015 via the engine command I / F 5015. The engine CPU 6323 receives a command via the communication buffer of the ASIC 6322 of the engine 6015, and controls the scanner 6328 to read a document on the automatic document feeder.
[0071]
As shown by the input document image flow 6402 in FIG. 6, the input document 6401 is conveyed onto the platen glass by the document conveying device of the scanner 6328, and the carriage scans the input image via the CCD. It is read, quantized by the input image processing unit 6329, subjected to image correction, and transferred to the engine ASIC 6322. Prior to that, the controller 6016 has completed the setting of Vin 6310 and stores image data 6403 in the memory 6010 when image data is transferred from the engine ASIC 6322.
[0072]
The connection between the engine ASIC 6322 and the ASIC 6002 is performed via the PCI bus, the engine ASIC 6322 performs a write operation as a master, and the input of the Vin 6310 of the ASIC 6002 operates as a target. The image transfer is performed in line units in synchronization with the pseudo line sync created at the time of reading, and the burst transfer is repeated within the line according to a predetermined burst length.
[0073]
FIG. 7 is a diagram showing the image input timing described above, and FIG. 8 is a diagram showing the image transfer timing and operation. The timing of image input and the timing and operation of image transfer shown in these figures are known, and the description thereof is omitted.
[0074]
As described above, when outputting an image, the transfer timing is taken in line units in synchronization with the line sync created from the polygon rotation cycle, etc., and burst transfer is repeated within the line according to a predetermined burst length. It is.
[0075]
The image data 6403 stored on the memory 6010 is accumulated in the HDD 6012 for recovery in the event of a jam or for later use as an electronic document from a network or the like. Image data is stored in the HDD 6012 using compressed data or non-compressed data. When the compressed result has a larger amount of data than before compression, it is stored as uncompressed data. As shown by the compressed image flow 6404 in FIG. 6, the compression / decompressor 2 (6122) is used to compress the input image data 6403 and store the code data 6405 in the memory 6010.
[0076]
The code data 6405 for one page stored on the memory 6010 is divided into a plurality of blocks, decomposed into a plurality of disk accesses, and accumulated in the HDD 6012. If the HDD access for one page is continuously performed, if there is an electronic document access request from the network, the response will be delayed until the code accumulation for one page is completed. Therefore, the disk access is divided as described above. It is done.
[0077]
In parallel with the accumulation of the code data 6405 in the HDD 6012 described above, the image data 6403 is output. The MCS 5008 requests the ECS 5007 to output an image when image input starts. Accordingly, the ECS 5007 requests the general-purpose OS 5014 to issue an image output command. The general-purpose OS 5014 calls a device driver and issues a command to the engine 6015 via the engine command I / F 5015. When the engine CPU 6323 receives the above-described command via the communication buffer of the ASIC 6322 of the engine 6015, the engine CPU 6323 controls the plotter 6327 so as to convey a sheet of a specified size from the sheet tray. Then, at the timing of the engine 6015 side, the image data 6403 is read from the FIFO of Vout 6311 and plotted on the paper. Prior to that, the MCS 5008 sets the DMAC of Vout 6311 and starts up.
[0078]
By performing the operation as described above, simple copy (1 to N: N = 1) can be performed.
[0079]
(3) Printer operation
FIG. 9 is a diagram for explaining the data flow and processing in the printer operation. Next, this will be described. The configuration necessary for the operation is the same as that shown in FIG.
[0080]
When data including a print command is transferred from the host connected to the host I / F (6501), the SCS 5010 receives the print command data 6502 and notifies the printer application 5001 of it.
[0081]
The printer application 5001 interprets the print command data 6502, and the CPU 6001 starts drawing an image (6503).
[0082]
In parallel, the printer application 5001 requests the MCS 5008 to output an image. As a result, the MCS 5008 requests the SCS 5010 for resources for image output. The SCS 5010 notifies the MCS 5008 that the requested resource is available when it becomes available. As a result, preparation for output is completed.
[0083]
The printer application 5001 passes the drawn image 6504 to the MCS 5008.
[0084]
The MCS 5008 compresses the rendered image 6504 using the compression / decompression device 1 (6119) (6505).
[0085]
The compressed code 6506 is stored in the HDD 6012 for use in recovery at the time of jamming or for use as an electronic document from a network or the like.
[0086]
Since drawing is performed at a higher speed than image output, a code 6506 obtained by compressing the image is accumulated on the memory 6010 and the HDD 6012 for a plurality of pages.
[0087]
When the MCS 5008 is ready for output, the MCS 5008 decompresses the code 6506 as an output image 6509 in the memory 6010 using the compression / decompression device 2 (6119) in the printing order.
[0088]
The MCS 5008 sets the DMAC of Vout 6311 for output and starts up.
[0089]
The MCS 5008 instructs the ECS 5007 to output an image.
[0090]
The ECS 5007 requests the general-purpose OS 5014 to issue an image output command. The general-purpose OS 5014 calls a device driver and issues a command to the engine 6015 via the engine command I / F 5015. When the engine CPU 6323 receives the above-described command via the communication buffer of the ASIC 6322 of the engine 6015, the engine CPU 6323 controls the plotter 6327 so as to convey the sheet of the specified size from the sheet tray, and at the timing on the engine 6015 side, Vout Image data 6509 is read from the 6311 FIFO and plotted on paper.
[0091]
(4) Scanner operation
FIG. 10 is a diagram for explaining the data flow and processing in the scanner operation. Next, this will be explained. The configuration necessary for the operation is the same as that shown in FIG.
[0092]
The user can move from the default copy menu screen of the operation unit 6003 to the scanner menu screen by pressing a scanner function selection button.
[0093]
When the SCS 5010 detects that the scanner function is selected on the operation unit 6003, the SCS 5010 notifies the scanner application 5004 of the fact.
[0094]
The scanner application 5004 instructs the OCS 5009 to display a menu screen on the operation unit 6003.
[0095]
-The user places the document on the automatic document feeder, sets the reading mode, and presses the start key.
[0096]
When the SCS 5010 detects that the start key has been pressed, the SCS 5010 notifies the scanner application 5004 that the start key has been pressed.
[0097]
The scanner application 5004 instructs the MCS 5008 to scan the document using the currently selected mode.
[0098]
The MCS 5008 requests the SCS 5010 for resources necessary for scanning the document.
[0099]
When the requested resource becomes available, the SCS 5010 notifies the MCS 5008 of that.
[0100]
The MCS 5008 issues a request to the ECS 5007 to read one document. As a result, the ECS 5007 requests the general-purpose OS 5014 to issue a command. The general-purpose OS 5014 calls a device driver and issues a command to the engine 6015 via the engine command I / F 5015. When the engine CPU 6323 receives the above command via the communication buffer of the ASIC 6322 of the engine 6015, the engine CPU 6323 controls the scanner 6328 to read the document on the automatic document feeder.
[0101]
Prior to reading, the MCS 5008 sets the Vin6310 DMAC and starts up.
[0102]
The engine 6015 controls the scanner 6328 to read an image of the input document 6601 and sends the image to the engine ASIC 6322 via an image processing unit 6329 that performs image processing necessary for image input.
[0103]
-The basic operation described above is the same as the image input during the copy operation.
[0104]
The image data 6603 is stored in the memory 6010 through the flow (6602) of the input image from the scanner 6328 to the memory 6010.
[0105]
The data format of the image data 6603 handled by the scanner operation is 8-bit multi-value or 1-bit binary for black and white, and RGB 8-bit multi-value data for color.
[0106]
The image data 6603 is converted by the CPU 6001 by software processing in order to convert it into an image format suitable for the external host PC. The converted code data 6605 is stored in the memory 6010. In some cases, code conversion may not be performed.
[0107]
Depending on the mode of the scanner application 5004, the code data 6605 is stored in the HDD 6012 (6606) or transferred to the host PC via the host I / F (6607).
[0108]
(5) Network application operation (remote document access)
FIG. 11 is a diagram for explaining the data flow and processing in the network application operation. Next, this will be explained. The configuration necessary for the operation is the same as that shown in FIG.
[0109]
-A network application is an application that handles documents stored on the HDD from the network. In response to a request from the host, a thumbnail is created, transferred to the host, printed, or transferred to another multifunction device. Or transfer it to the server.
[0110]
When a list request for documents stored in the HDD 6012 is transmitted from a host connected to the network, the SCS 5010 notifies the network application 5005 that there is a list request.
[0111]
The network application 5005 requests the necessary resources from the SCS 5010.
[0112]
When the requested resource becomes available, the SCS 5010 notifies the network application 5005 of this, and the network application 5005 requests the thumbnail of the document stored in the HDD 6012 from the MCS 5008.
[0113]
The MCS 5008 processes the document stored in the HDD 6012 according to the data format, creates thumbnail data, and passes it to the network application 5005.
[0114]
The document stored in the HDD 6012 is read into the memory 6010 (6701), and the image data 6702 that has not been compressed or converted is created in the thumbnail 6704 by the CPU 6001 (6706), and the code that has been compressed or converted. The data 6703 is once restored to the original image by the CPU 6001, and then a thumbnail 6704 is created (6705) and transferred to the host (6709).
[0115]
The network application 5005 converts the document thumbnail in the HDD 6012 into a file format that can be interpreted by the host. For example, if the host is browsing with a browser, the network application 5005 is browsing with the dedicated application. If there is, convert it to a dedicated format and transfer it to the host.
[0116]
When the host receives a thumbnail, it waits for the user to process.For example, when the user selects a document and requests to transfer it to the host, the browser or dedicated application hosts the specified document. Instructs the MFP to forward to
[0117]
Upon receiving a transfer request from the host, the SCS 5010 notifies the network application 5005 that a document transfer request has been received.
[0118]
The network application 5005 requests the necessary resources from the SCS 5010.
[0119]
When the requested resource becomes available, the SCS 5010 notifies the network application 5005 of this, and the network application 5005 thereby requests the MCS 5008 for document data 6702 stored in the HDD 6012.
[0120]
The MCS 5008 passes the document data 6702 stored in the HDD 6012 to the network application 5005.
[0121]
The net application 5005 transfers the document data 6702 to the host (6708).
[0122]
After that, when the user browsing with the host browser selects a document and gives an instruction to print, the browser or the dedicated application issues an instruction to the multi-function peripheral to print the specified document.
[0123]
Upon receiving a print request from the host, the SCS 5010 notifies the network application 5005 that there has been a document print request.
[0124]
The network application 5005 requests the necessary resources from the SCS 5010.
[0125]
The SCS 5010 notifies the network application 5005 when the requested resource becomes available, and the network application 5005 requests the MCS 5008 to print the document data 6702 stored in the HDD 6012.
[0126]
The MCS 5008 requests the SCS 5010 for resources necessary for printing.
[0127]
-The subsequent operation is the same as that of the copy application, and the document is printed.
[0128]
(6) Facsimile and Internet facsimile
FIG. 12 is a diagram for explaining the flow and processing of data in facsimile and Internet facsimile operations, FIG. 13 is a block diagram showing the internal configuration of a facsimile machine (FAX), and FIG. 14 is a diagram showing an example of a network configuration to be connected. Next, the facsimile operation will be described with reference to these drawings. The configuration necessary for the operation is the same as that shown in FIG.
[0129]
As shown in FIG. 13, the FAX 6014 includes an ASIC 3002, a CCU 3003, an NCU 3004, and a RAM 3010. The FAX 6014 is connected to the PCI bus 6017 by the ASIC 3002 and can be connected to a public line via the NCU 3004.
[0130]
As shown in FIG. 14, a network connected in the case of the Internet facsimile operation includes a plurality of FAX 3106 and 3107 connected to the Internet 3103 via a public line 3105 and a FAX gateway 3108, a PC 3104, and a MFP 3101. 3102 are connected.
[0131]
As for Internet facsimile operation, there is a function that can be operated only by being connected to the network even if the FAX 6014 is not installed. There are a plurality of operation modes, and some of them have a combination operation.
[0132]
・ Fax direct delivery path (6901)
A user stands in front of the operation panel of the MFP, sets a document on the scanner 6328, and inputs a FAX number of a destination (receiver) from the operation panel. After that, the MFP makes a call, waits for the destination FAX to respond, and starts reading the document. The FAX 6014 includes an image storage memory. The image is temporarily stored in the storage memory, and an image for one page is transmitted according to a facsimile protocol. When transmission of one page is completed, it is confirmed whether or not there is a next document. If an original is placed on the scanner, the next original is read and faxed. A feature of this transmission mode is that the next document is not read until one transmission is completed. If the transmission is not completed, the scanned original is not discharged. That is, the time of completion of reading and transmission is the same. The difference from the memory transmission described later is that in the case of the memory transmission, the document is pre-read, and in this case, it cannot be immediately confirmed whether or not the transmission is completed.
[0133]
・ Fax direct output path (6902)
The image received by FAX 6014 is immediately sent to the plotter and output on paper. This is an operation that considers operation compatibility with a facsimile that is not a conventional MFP, and when it is received, paper comes out, which is easy to understand and forgets to output.
[0134]
・ Stored image FAX transmission (6903)
The image stored in the HDD 6012 is transmitted. There are a plurality of means for storing in the HDD 6012. These methods include the method of accumulating after scan reading by the scanner application, the print capture function interpreting the print command in the page description language sent from the host PC, creating an image, outputting it to the plotter, and simultaneously A method for unintentionally accumulating in the HDD 6012, a method for unintentionally accumulating in the HDD 6012 an image processed in parallel with a copy operation by a copy capture function, and a print command in a page description language intentionally from a PC To create an image and store it in the HDD 6012. If the document can be stored, FAX transmission is possible. At that time, processing such as image resolution conversion, color document conversion to black and white, image enhancement / interpolation, and the like are performed, converted into transmittable image data, and fax transmission is performed.
[0135]
・ Fax reception storage (6904)
The received image is temporarily transferred to the memory 6010 by the FAX 6014 without being output as paper, and is stored in the HDD 6012 by the processing of the controller 6016. Even if it is received, it is not known to the user, so that it can be notified by e-mail. In this case, since it is not known to whom the message is received, an e-mail is sent to the registered user in the name list associated with the sender. Alternatively, a mail can be sent to a specific user such as a person in charge of general affairs or an administrator. However, this FAX reception / storage should not be selected when not connected to the network.
[0136]
Read memory transmission (6905), memory transmission (6906)
Instead of reading one sheet and transmitting the one sheet, in order to improve the separation of the document anyway, all the documents set on the scanner 6328 are read into the memory, and then transmitted one by one. Since the reading speed of the scanner 6328 is much faster than the FAX transmission speed, the user is normally connected to the partner FAX even after leaving from the front of the operation panel of the MFP and continues transmission. Therefore, the user is not aware of the completion of transmission. Even if a transmission error occurs midway, the MFP cannot actively contact the user. In addition, since the scanner is opened in a short time, a reserved FAX function by a plurality of users can be used. The user only needs to read the document one after another and specify the FAX number. If the document at the top of the reservation queue (processed the earliest) has an error, an error has occurred because the originals of other users in the reservation queue will not be processed if you retry sending the same document many times. In this case, the process is transferred to the next user's document, and control is performed so that all documents are transmitted in the shortest possible time.
[0137]
・ Internet fax reception: I-FAX reception (6907)
An MFP connected to the Internet or an intranet receives from the network according to the Internet fax protocol. The physical form of connection to the Internet or Intranet may be Ethernet (registered trademark), or may be connected via an Internet service provider (ISP) via an xDSL modem.
[0138]
・ Internet fax transmission: I-FAX transmission (6908)
Documents stored in the HDD 6012, documents read from the scanner 6328, and the like can be transmitted according to the Internet fax protocol.
[0139]
(7) Transition to energy saving status
FIG. 15 is a diagram for explaining state transitions related to energy saving in the image processing apparatus. Next, this will be described.
[0140]
After the main power is turned on (6801), the controller goes through an initialization process including initialization of the CPU and initialization of the ASIC and waits for the engine to be ready.
[0141]
The engine communicates with the controller through an initialization process including initialization of the CPU and initialization of the ASIC to notify that the fixing unit is warming up (6802).
[0142]
-The engine tries to start up as fast as possible by using more power than usual until the fixing part reaches a certain temperature.
[0143]
-When the fixing unit reaches the target temperature, the engine changes the control to keep the fixing temperature constant using normal power.
[0144]
When the engine is ready, a copy operation is started in response to a user instruction (6803).
[0145]
During the copy operation (6804), a certain amount of power is consumed.
[0146]
-When the copy is completed (6805), the apparatus waits in a copy-ready state (6806), and if the user does not access the image forming apparatus for a certain period of time (6807), a timeout (6808) of the energy saving monitoring timer occurs. The image processing apparatus shifts to the energy saving mode (6809).
[0147]
-In the energy saving mode (6809), the power is turned off to keep power consumption low, except for the part that has the function of monitoring the return condition.
[0148]
-To make a copy, the user can operate the return key from the energy saving mode, insert a document into the automatic document feeder, lift the automatic document feeder, or instruct the return from the network. 6810), and the return operation (6811) is started.
[0149]
-During the recovery operation (6811), in order to raise the temperature of the fixing unit, the power is used more than usual to try to start up as fast as possible.
[0150]
The CPU goes through an initialization process including initialization of the CPU and initialization of the ASIC and waits for an engine ready.
[0151]
The engine communicates with the controller through an initialization process including initialization of the CPU and initialization of the ASIC to notify that the fixing unit is warming up (6802).
[0152]
-The engine tries to start up as fast as possible by using more power than usual until the fixing part reaches a certain temperature.
[0153]
・ When the fixing unit reaches the target temperature, the engine changes the control to keep the fixing temperature constant using normal power.
[0154]
When the engine is ready, a copy operation (6813) is started in response to a user instruction.
[0155]
-During the copy operation (6813), a certain amount of power is consumed.
[0156]
At the same time as the completion of copying (6814), the printer waits in a copy-ready state (6815). If the user does not access the image forming apparatus for a certain period of time, an energy saving monitoring timer timeout (6816) occurs, and the image The forming apparatus shifts to the energy saving mode (6817).
[0157]
Next, the initialization process of the controller will be described.
[0158]
The rise time of the application including the controller OS depends on the access time of the program ROM.
[0159]
In order to execute the program from the ROM, it is necessary to store the program in the ROM in an uncompressed state, and the program amount is several times that when the program is compressed.
[0160]
• The recovery time from the energy saving state must be shorter than the startup from the main power on.
[0161]
・ Both times should be shorter.
[0162]
The program ROM is connected to the ASIC, and in order to reduce the number of ASIC terminals, the data bus width for accessing the ROM is designed to be smaller than the data bus width of the CPU.
[0163]
-Normally, when the power is turned on, the command from the ROM is executed, the command is copied to the RAM in the middle, and if the RAM capacity is loosened, all ROM programs are copied to the RAM, and the RAM capacity is small. A method is employed in which a portion that must be executed at high speed is copied to the RAM and executed.
[0164]
Therefore, at boot time, it takes extra time to copy the ROM code to the RAM.
[0165]
FIG. 16 is a flowchart for explaining processing of a boot procedure when initialization is performed without developing the ROM code into the RAM, and FIG. 17 is a diagram showing time allocation until kernel boot in the flow shown in FIG. This will be described below.
[0166]
(1) When the power is turned on, first, monitor initialization and self-diagnosis initialization are sequentially executed (steps 7201 and 7202).
[0167]
(2) Next, a CPU test, an ASIC and MEM test, an engine and an interrupt test are sequentially executed (steps 7203 to 7205).
[0168]
(3) Thereafter, initialization processing of the operation unit is performed, key information is acquired, and diagnosis end processing is executed (steps 7206 to 7208).
[0169]
(4) After that, PCI configuration is executed, the OS kernel is booted, and the processing here is terminated (steps 7209 and 7210).
[0170]
The above-described boot procedure according to the flow is described up to the booting of the OS kernel. However, in order to enable copying by the MFP and printing by the printer, it is necessary to load the driver and load the application after the kernel boot. . FIG. 17 shows the time distribution until kernel boot when the ROM code described above is not expanded in the RAM. As can be seen from FIG. 17, even when the ROM code is not expanded in the RAM, the kernel boot is performed. The time required for this is about 1.3 seconds.
[0171]
FIG. 18 is a flowchart for explaining processing of a boot procedure when a compressed program is stored in the ROM and expanded in the RAM at the time of booting, and FIG. 19 is a diagram showing time distribution until kernel boot in the flow shown in FIG. Next, this will be described.
[0172]
The processing in the flow shown in FIG. 18 is the same as that described with reference to the flow in FIG. 72. The difference is that between step 7209 and step 7210 in FIG. This is the point where processing of expansion is added. It takes about 1 second to 4 seconds to decompress the main part of the kernel from the ROM to the RAM, and it takes time if it is expanded to the RAM. FIG. 19 shows the time distribution until kernel boot in this case. As can be seen from this figure, when the ROM code is expanded in the RAM, the time until the kernel boot is not expanded in the RAM. Therefore, it takes an extra 1 to 4 seconds.
[0173]
For this reason, it is preferable that the boot when power is turned on is developed in the RAM and the mode is shifted to the energy saving mode while the code developed on the RAM is stored. In this case, when returning from the energy saving mode, by executing the code stored in the RAM, the development time can be saved and the system can be started up in a short time. It is possible to shorten the time until the “copying possible” and “printing possible” states.
[0174]
The basic operation of the image forming apparatus according to the embodiment of the present invention has been described above. Next, when shifting to the energy saving mode, when recovering from the energy saving mode, when the entire system is turned on, when the power is turned off, etc. A configuration of an embodiment of the present invention for preventing the occurrence of power wraparound between semiconductor circuits by defining the order of turning on and off a plurality of power supply systems will be described.
[0175]
FIG. 20 is a block diagram illustrating a configuration example of an image forming apparatus in which power is divided into a plurality of power supply systems and supplied to each functional element. First, this will be described.
[0176]
The configuration example of the image forming apparatus illustrated in FIG. 20 is configured by connecting a controller 6016 and an engine 6015 via a PCI bus 6017 as in the case described above. FIG. 20 shows that the controller 6016 includes three ASICs 9015, 9018, and 9020, and the engine 6015 includes a fixing and other mechanism unit 9003 and an ASIC 9002. A power supply unit (PSU) 9004 that supplies power to the inside of the controller 6016 and the engine 6015 and a power supply IC 9010 that performs voltage conversion are provided. The example shown in FIG. 20 is an example in which an x86 system CPU is used, and there are four power supply control lines.
[0177]
In the above description, the PSU 9004 is a power supply unit called a power supply unit, and creates a DC power supply from an AC power supply. The PSU 9004 is provided with a mechanical switch called a main power switch, and is turned on first. The 5VE9009 is a power supply that is always supplied when the main power supply is on, and is converted into 3.3VE9014 by the voltage conversion power supply IC9010.
[0178]
A PONENG_N signal 9006 is a control signal for a switch 0 (9005) for turning on / off a power source of a mechanical control CPU and memory including fixing of the engine, and a PONPCI_N signal 9008 is an ASIC3 (9002) responsible for image transfer of the engine. ) Is a control signal of the switch 2 (9007) for turning on / off the power source.
[0179]
The PONPUP_N signal 9013 is a control signal for the switch 3 (9007) for turning on / off the power of the pull-up resistor of the PCI-BUS 6017 that connects the ASIC3 (9002) and the ASIC1 (9015) of the controller, and the PONCTL_N signal 9017. These are control signals for the controller ASIC1 (9015) and the switch 1 (9016), which is omitted in the figure but turns on and off the power of the CPU and the memory management ASIC.
[0180]
The ASIC 2 (9018) included in the controller 6016 is an ASIC that has a host I / F function of the controller 6016 and creates a power control signal for energy saving state transition. The power supply 3.3VE9014 is never cut off. The ASIC 9018 also monitors the trigger of energy saving state transition, for example, the “power key” factor of returning to standby mode when the power key is pressed when in the off mode, and generates a power control signal. ing.
[0181]
The power supply of the entire MFP / LP system using the image forming apparatus shown in FIG. 20 is controlled by the four signals described above. When an x86 system CPU is used, it is used in combination with a dedicated ASIC4 (9020) called a chipset. Therefore, the portion controlled by the switch 1 (9016) in the power supply is controlled by the dedicated ASIC4 (9020). The Therefore, the ASIC 2 (9018) outputs the PWR_B signal 9021 and the PWR_M signal 9022 as inputs to the ASIC 4 (9020). These two signals are not L level output signals but L pulses satisfying a width of 16 ms or more and less than 4S (normally H level, L level for a certain period of time, and then return to H level).
[0182]
FIG. 21 is a block diagram showing another configuration example of the image forming apparatus in which the power is divided into a plurality of power supply systems and supplied to each functional element. Next, this will be described.
[0183]
The configuration example of the image forming apparatus shown in FIG. 21 is a configuration when a MIPS CPU is used. The basic configuration is the same as that in FIG. 20 and is controlled by four power control lines. The difference is that ASIC 1 (9115) in FIG. 21 is dependent on the CPU, and thus is an ASIC different from ASIC 1 (9015) shown in FIG. 20.
[0184]
The ASIC 2 (9018) is the same as the ASIC 2 in FIG. 20, has an x86 mode and a MIPS mode, and the operation mode can be switched by setting an external terminal. In the MIPS mode, four power control lines are directly output from the ASIC 2 (9018).
[0185]
In FIG. 20 and FIG. 21 described above, the ASIC that generates the power control signal generates timings for four power control, and the timing generation unit for the ASIC generates a plurality of power supply systems. A timer that generates a sequence for cutting and a timer that generates a sequence for input are provided independently.
[0186]
FIG. 22 is a diagram for explaining energy saving state transition in the MFP / LP system using the image forming apparatus described above. Next, this will be described. In FIG. 22, the condition indicated on the arrow is a state transition condition, but the meaning of the condition described as “energy saving key” includes the following.
[0187]
That is, the meaning of the “energy saving key” is that when a key provided on the operation unit is pressed exclusively for shifting to or returning to the energy saving state, an original is fed to the automatic document feeder (ADF) in order to return from the energy saving state. When set, this is a case where the pressure plate for pressing the document is opened and closed in the case of a configuration without ADF. When an ADF document is extracted, it is not a return factor.
[0188]
Further, the meaning of the condition described as “data reception” on the arrow means that there is an access from a host I / F such as USB, IEEE1394, or network.
[0189]
Next, various states shown in FIG. 22 will be described.
[0190]
・ Shutdown
This state is a state in which the main power supply is switched off and nothing is operated as the system.
[0191]
・ Standby
This state is a state in which the main power source is switched on and the user can immediately operate if the user creates a trigger for the operation. The engine fixing unit is also ON, the engine ASIC is also ON, the PCI pull-up power supply is ON, and the controller power supply is also ON.
[0192]
・ LowPower
This state is a state in which the main power switch is turned on and the power supply of the fixing unit of the engine is OFF. When there is a host I / F option on the controller side, the PCI must be powered on at all times, so this state is an operable energy saving state.
[0193]
・ LowPower2
This state is a state in which the main power source is switched on, the power source of the engine fixing unit is OFF, and the power source of the pull-up resistor of the PCI is OFF. In this case, since there is no host I / F, the power consumption of the PCI pull-up resistor is reduced as compared with the case of LowPower.
[0194]
When the FAX is connected, it is different from the host I / F. The fax must always be in a standby state, otherwise it cannot answer calls from the telephone line. For this reason, apart from the normal PCI option, the main power supply is switched on and has a dedicated power supply supplied from the PSU that never cuts off.
[0195]
The internal state of the FAX in the low power 2 state will be described with reference to FIG. As already described with reference to FIG. 13, the FAX 6014 includes the NCU 3004, the CCU 3003, the ASIC 5 (3002), and the RAM 3010 backed up by a battery different from the power source from the PSU. In a state where the power supply for the pull-up resistor of the PCI is turned off, the ASIC 5 (3002) is partially turned off so that current does not flow into the PCI 6017 via the inside of the ASIC 5 (3002). All the signals on the PCI side are set to the HiZ state, and the state is shifted to the energy saving state as FAX. If there is an incoming call from the public line in this state, the incoming call is detected by the NCU 3004 and the CCU 3003, and is judged at the activated part of the ASIC 5 (3002), and the PME signal 3005 is asserted. The PME signal 3005 is connected to the ASIC 2 (3006) and is monitored as a return factor from the energy saving state. Here, ASIC2 (3006) in FIG. 13 is the same ASIC as ASIC2 (9018) in FIGS.
[0196]
・ OffMode
This state can be transferred only when the main power switch is turned on and all the host I / F options including FAX do not exist. In this state, only ASIC2 (9018) and ASIC4 (9020) shown in FIG. 20 and ASIC2 (9118) shown in FIG. 21 are energized, and only external factors as a return condition from the energy saving state to Standby. Is in a state of monitoring.
[0197]
Next, signal control timing when transitioning from each state described with reference to FIG. 22 to another state will be described with reference to the drawings. First, signals in the drawings referred to below will be described.
[0198]
5VE is a 5V power output output by the PSU when the main power switch is turned on.
[0199]
RESET_N is a signal generated by a reset IC mounted on the controller, and is a 5VE, 3.3VE reset signal.
[0200]
RESET_N is a reset signal generated from a power source controlled by a PONCTL_N signal by a reset IC mounted on the controller.
[0201]
PCIRST_N is a PCI reset signal output by ASIC1 (9015) and ASIC1 (9115), and is automatically output by ASIC1 in response to RESET_N. It can also be created by the CPU by controlling the register of the ASIC 1.
[0202]
Since PONENG_N, PONPCI_N, PONPUP_N, and PONCTL_N have already been described above, description thereof will be omitted.
[0203]
FIG. 23 is a diagram illustrating signal control timing at the time of transition from Shutdown to Standby.
[0204]
Since this transition is a transition performed when the main power switch is turned on, the CPU cannot participate at all. Therefore, each power supply control line is controlled by the timing according to the initial value of the register of ASIC2. In FIG. 23, t1 (9201) is a waiting time for starting counting of clocks after asserting RESETE_N and asserting PONENG_N. Further, t1 can be set by the register of ASIC2, and what is performed by ASIC2 in the state transition other than the main power supply ON is determined by the CPU according to the value set in the t1 register.
[0205]
Similarly, t2 (9202) is the waiting time of PONPCI_N, t3 (9203) is the waiting time of PONPUP_N, and t4 (9204) is the holding time of PONCTL_N.
[0206]
The default time relationship is desirably set as t1 = t2 <t4 <t3. As a result, at the time of transition from Shutdown to Standby, the fixing and other functional units and the engine ASIC are turned on almost simultaneously, then the ASIC 1 in the controller is turned on, and finally the PCI bus is turned on.
[0207]
In the above description, the control timing is determined by the value set in the register. However, as a method for determining the control timing, a method called a handshake mode can also be used. In this case, when the main power is turned on, PONENG_N and PONPCI_N are asserted, PONCTL_N is asserted after confirming that the power supply system controlled by PONPCI_N has been started by a signal from a monitoring unit (not shown), and PONCTL_N Control is performed such that PONPUP_N is asserted after confirming that the controlled power supply system has started up by a signal from a monitoring means (not shown). This method does not require time setting. Such a method can also be used for signal control at each transition described later.
[0208]
FIG. 24 is a diagram illustrating signal control timing at the time of transition from Standby to LowPower.
[0209]
This transition is performed by controlling PONENG_N by CPU register access. By the control by this register access, only the power supply system for fixing in the standby state and other functional units is turned off.
[0210]
FIG. 25 is a diagram showing signal control timing at the time of transition from Low Power to Standby.
[0211]
This transition is the reverse of the transition controlled by FIG. 24, and is similarly performed by controlling PONENG_N by the CPU register access. By the control by the register access, the power supply system for the fixing and other functional units that are turned off in the low power state is turned on.
[0212]
FIG. 26 is a diagram illustrating signal control timing at the time of transition from Standby to OffMode. In FIG. 26, there is a time in which two levels of Low and High are overlapped at the signal change point, but this part means that the signal change only needs to be performed within this time. This is the same in the case of diagrams showing other signal control timings to be described later.
[0213]
Basic signal control is performed by the CPU so that no current wraps between the semiconductor circuits. Finally, the transition is completed when the CPU turns off the CPU. In this case, in order to prevent the power supply control line from being asserted before the power supply is completely turned off, it is monitored by the VDET input signal that the power supply controlled by the switch 0 is completely at the L level. External factors are monitored after a period of time that does not monitor the external factors set in. The ASIC 2 ignores even if an external factor is asserted during the above-described non-monitoring time period.
[0214]
As can be seen from FIG. 26, at the time of transition from Standby to OffMode, the fixing and other functional units are turned off first, then the PCI bus is turned off, and finally, the engine ASIC and the ASIC1 in the controller are almost connected. At the same time, it turns off. FIG. 27 is a diagram illustrating signal control timing at the time of transition from OffMode to Standby.
[0215]
In the OffMode state, since the CPU is turned off, the return is performed by the control of the ASIC 2. ASIC2 initializes t1 to t4 and then sets them to t1 'to t4', respectively, so that ASIC2 that detects the factor starts counting clocks and asserts the power supply control lines in order according to the set value. Go. The time relationship is preferably t1 ′ = t2 ′ <t4 ′ <t3 ′. However, depending on the load of the controller and the capacity of the power supply, setting such as t1> t1 ′ may cause some rise. Time can be shortened.
[0216]
The transition in this case is performed so that the fixing and other functional units and the engine ASIC are turned on almost simultaneously, then the ASIC 1 in the controller is turned on, and finally the PCI bus is turned on.
[0217]
FIG. 28 is a diagram showing signal control timing at the time of transition from Standby to LowPower2.
[0218]
This transition is performed by controlling the power supply control line by CPU register access. In this case, the ASIC1 and the ASIC3 must have a function of setting the external terminal to HiZ when PCIRST_N is asserted so that current wraparound does not occur. The reason is that if PONPUP_N is asserted prior to turning on the power of ASIC1 and ASIC3, current flows to ASIC1 and ASIC3.
[0219]
The transition in this case is performed such that the fixing and other functional units are turned off first, then the PCI bus is turned off, and finally the engine ASIC is turned off, and the ASIC 1 in the controller is turned on. Continue state.
[0220]
FIG. 29 is a diagram illustrating signal control timing at the time of transition from Low Power 2 to Standby.
[0221]
Similarly to the case of FIG. 28, the transition in this case is also performed by controlling the power supply control line so that no current wraparound occurs due to the CPU register access. The transition in this case is performed so that the fixing and other functional units and the engine ASIC are turned on almost simultaneously, and then the PCI bus is turned on. Since the ASIC 1 in the controller is ON in the low power 2 state, it remains in the ON state.
[0222]
FIG. 30 is a diagram illustrating signal control timing at the time of transition from LowPower2 to OffMode.
[0223]
The transition in this case is also performed by CPU register access as in the case of FIGS. In this case, the transition is LowPower 2 and only the ASIC 1 in the controller is ON. Therefore, the ASIC 1 in the controller may be turned OFF.
[0224]
FIG. 31 is a diagram illustrating signal control timing at the time of transition from OffMode to Shutdown.
[0225]
This transition is a transition performed by turning off the mechanical switch of the main power supply. When the mechanical switch of the main power supply is turned off, the REMOFF_N signal that is effective only when the power supply unit PSU is operating becomes L level and the main power supply is cut off. As a result, all power to the system is lost, the voltage of 5VE from the PSU is lowered, and all the signals that have been at the H level so far shift to the L (0 volt) level.
[0226]
In the description of the signal control timing at the time of transition between the states described above, the signal control timing at the time of transition from Standby to Shutdown is not described, but in this case, the transition from Standby to LowPower 2 described in FIG. The timing may be controlled so as to sequentially perform the signal control in the transition from LowPower2 to OffMode described in FIG. 30 and the transition from OffMode to Shutdown described in FIG. 31, thereby directly shutting down from the Standby state. Even in such a case, the power supply can be shut off so that no current wraps around, and the lifetime of the semiconductors constituting the circuit elements of the system can be prevented from being shortened.
[0227]
The power control according to the embodiment of the present invention as described above is divided into four power supply systems, four power supply control lines are prepared, and the timing of ON and OFF of each of the power supply systems is controlled, The power can be turned on and off so that no current wraps around, and the life of the semiconductors constituting the system circuit elements can be prevented from being shortened.
[0228]
In the above-described embodiment of the present invention, the control of the power source has been described as dividing the power source system into four power source control lines and preparing four power source control lines, and controlling the ON / OFF timing of each power source system. According to the present invention, the power supply systems can be further divided into a large number, and the ON / OFF timing of each power supply system can be controlled, whereby the control in which the energy saving state is set more finely can be performed.
[0229]
In the above-described embodiment of the present invention, both the plotter and the scanner are provided in the engine unit, and the power supply system for them is described as one. However, the present invention controls the power supply system for the plotter and the scanner separately. In particular, when the scanner is provided as a separate device, it is possible to obtain a higher energy saving effect by controlling the power supply of the scanner separately.
[0230]
In the above-described embodiment of the present invention, the ON / OFF timing control of each power supply system at the time of transition between a plurality of energy saving states has been described as being performed without current wraparound. It can be applied not only to the transition between energy saving states but also to the control of each power supply system when the main power switch for the system is turned on and off, thereby the life of the semiconductors constituting the circuit elements of the system Can be prevented from becoming shorter.
[0231]
Summarizing the transition conditions for returning from the energy-saving state to the standby in the embodiment of the present invention described above,
(1) Opening / closing of pressure plate to hold down document ・ Detecting rising edge and falling edge for signal, (2) Setting document on ADF ・ Detecting falling edge for signal, (3) Pressing energy saving key ・ Signal Includes an L level detection of an external return signal and (4) data request / access from the host I / F.
[0232]
In addition, conditions such as toner replacement and tray pull-out can be added. Even if such physical conditions increase, the conditions can be summarized in the conditions (1) to (3). By simply having the above three conditions in the ASIC, the return factor of all machines can be made common. For this reason, the embodiment of the present invention can reduce the cost without increasing the number of external terminals of the ASIC, and can share software and controllers.
[0233]
In the embodiment of the present invention described above, the timing for turning on each power supply system can be determined by setting the time for each signal in order to set the control of the power supply control lines. After the MFP / LP is started up, the load state of the system can be estimated and the rising timing from the energy saving state can be corrected. Therefore, even if the capacity of the power supply changes, it is possible to cope with it only by modifying the register that sets the time of each signal that gives an order to the control of the power supply control line. Can be used in common with products.
[0234]
【The invention's effect】
As described above, according to the present invention, the wraparound of the power supply between the semiconductor circuits at the time of turning on and off the power supply to the entire system is prevented, thereby preventing the life of the semiconductor constituting the circuit from being shortened. be able to.
[0235]
In addition, according to the present invention, the order of turning on and off a plurality of power supply systems is defined at the time of transition between energy saving modes, recovery from the energy saving mode, etc. It is possible to prevent generation and shorten the life of the semiconductors constituting the circuit, and to stop power supply to unnecessary portions in the energy saving mode, thereby sufficiently reducing power consumption.
[0236]
Furthermore, according to the present invention, by combining recovery factors in the energy saving mode, software processing between products and ASIC can be shared, and an increase in system cost can be prevented.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a basic configuration of an image forming apparatus constituting a composite system.
FIG. 2 is a diagram for explaining the configuration of software installed in a controller 6016;
3 is a block diagram showing a functional configuration including an internal configuration of ASIC 6002. FIG.
4 is a diagram showing a memory map of an ASIC 6002. FIG.
FIG. 5 is a block diagram of an image forming apparatus including a configuration necessary for operation.
FIG. 6 is a diagram illustrating the flow of an image for simple copy (1 to N copy: when N = 1).
FIG. 7 is a diagram illustrating the timing of image input described above.
FIG. 8 is a diagram illustrating image transfer timing and operation.
FIG. 9 is a diagram illustrating a data flow and processing in a printer operation.
FIG. 10 is a diagram for explaining data flow and processing in a scanner operation.
FIG. 11 is a diagram for explaining data flow and processing in a network application operation;
FIG. 12 is a diagram for explaining data flow and processing in facsimile and Internet facsimile operations.
FIG. 13 is a block diagram showing an internal configuration of a facsimile machine (FAX).
FIG. 14 is a diagram illustrating an example of a network configuration to be connected.
FIG. 15 is a diagram illustrating state transition related to energy saving of the image processing apparatus.
FIG. 16 is a flowchart for explaining processing of a boot procedure when initialization is performed without developing ROM code into RAM;
FIG. 17 is a diagram showing time distribution until kernel boot in the flow shown in FIG. 16;
FIG. 18 is a flowchart for explaining processing of a boot procedure when a compressed program is stored in a ROM and expanded in a RAM at the time of booting.
FIG. 19 is a diagram showing time distribution until kernel boot in the flow shown in FIG. 18;
FIG. 20 is a block diagram illustrating a configuration example of an image forming apparatus in which power is divided into a plurality of power supply systems and supplied to each functional element.
FIG. 21 is a block diagram illustrating another configuration example of an image forming apparatus in which power is divided into a plurality of power supply systems and supplied to each functional element.
FIG. 22 is a diagram illustrating energy saving state transition in the MFP / LP system using the image forming apparatus.
FIG. 23 is a diagram illustrating signal control timing at the time of transition from Shutdown to Standby.
FIG. 24 is a diagram illustrating signal control timing at the time of transition from Standby to LowPower.
FIG. 25 is a diagram illustrating signal control timing at the time of transition from LowPower to Standby.
FIG. 26 is a diagram illustrating signal control timing at the time of transition from Standby to OffMode.
FIG. 27 is a diagram illustrating signal control timing at the time of transition from OffMode to Standby.
FIG. 28 is a diagram illustrating signal control timing at the time of transition from Standby to LowPower2.
FIG. 29 is a diagram illustrating signal control timing at the time of transition from LowPower2 to Standby.
FIG. 30 is a diagram illustrating signal control timing at the time of transition from LowPower2 to OffMode.
FIG. 31 is a diagram illustrating signal control timing at the time of transition from OffMode to Shutdown.
[Explanation of symbols]
6001 CPU
6002 ASIC
6003 Operation unit
6004 IEEE1284
6005 Network I / F
6006 ROM0
6007 ROM1
6008 ROM2
6009 NVRAM
6010 MEM0
6011 MEM1
6012 HDD
6013 Optional device
6014 FAX
6015 engine
6016 controller
6017 PCI bus
9002 ASIC3
9003 Fixation and others
9004 PSU
9005 SWITCH0
9007 SWITCH2
9010 REG (Power IC)
9012 SWITCH3
9015, 9115 ASIC1
9016 SWITCH1
9018 ASIC2
9020 ASIC4

Claims (13)

In an image forming apparatus configured to include an engine, a controller, and a PCI bus that connects the engine and the controller, the controller is provided with a timing generation unit that is supplied with power when the main switch is on, and has a plurality of energy saving states. Controllable mechanism units constituting the image forming apparatus, a power source for supplying power to the functional circuit, a mechanical circuit functional power source including the engine mechanical unit, a functional circuit power source responsible for engine image transfer, The power supply of the PCI bus pull-up resistor and the power supply of the controller are divided into four power supply systems. After the main switching is turned off and the power supply of the device is turned off, the mechanism unit and the functional circuit are configured. to prevent wraparound of power to the portions, the timing of cutting the respective power of the plurality of power supply systems, engine The power supply of the functional circuit for mechanical control including the mechanism part of the above, the disconnection of the pull-up power supply of the PCI bus, the power supply of the functional circuit responsible for image transfer of the engine, the power supply of the controller image forming apparatus characterized by cutting the power to the device. In an image forming apparatus configured to include an engine, a controller, and a PCI bus that connects the engine and the controller, the controller is provided with a timing generation unit that is supplied with power when the main switch is on, and has a plurality of energy saving states. Controllable mechanism units constituting the image forming apparatus, a power source for supplying power to the functional circuit, a mechanical circuit functional power source including the engine mechanical unit, a functional circuit power source responsible for engine image transfer, The power supply of the PCI bus pull-up resistor and the controller power supply are divided into four power supply systems. After the main switching is turned on and the apparatus is turned on, the mechanism unit and the functional circuit are configured. The timing of turning on each of the power supplies of the plurality of power supply systems to prevent the power supply from wrapping around the engine The power supply of the functional circuit for mechanical control including the mechanical part and the power supply of the functional circuit responsible for image transfer of the engine are first turned on, then the controller is turned on, and then the PCI bus pull-up resistor is turned on. An image forming apparatus characterized in that power is turned on in order according to an order in which power is turned on . In an image forming apparatus that includes an engine, a controller, and a PCI bus that connects the engine and the controller and is controlled so as to transition to a plurality of energy saving states, power is supplied to the controller when the main switch is on. And a timing control unit configured to control the plurality of energy-saving states, a mechanism unit that constitutes the image forming apparatus, a power source that supplies power to the function circuit, and a functional circuit for mechanical control including the engine mechanism unit. When the power supply, the power supply of the functional circuit responsible for image transfer of the engine, the power supply of the pull-up resistor of the PCI bus, and the power supply of the controller are divided into four power supply systems, and the transition between the energy saving states, Each of the power supplies of the plurality of power supply systems is set so as to prevent the power supply from wrapping around the circuit constituting part. When turning off or turning on the power, when turning off the power, turn off the power of the functional circuit for mechanical control including the engine mechanism, turn off the PCI bus pull-up power, turn off the power of the functional circuit responsible for engine image transfer In the order of the controller power-off, the power of the device is turned off in turn, and when the power is turned on, the power of the functional circuit for mechanical control including the engine mechanism and the function circuit responsible for image transfer of the engine The power is turned on first, then the controller is turned on, and then the PCI bus pull-up resistor is turned on, and the devices are turned on in order. Image forming apparatus. 4. The plurality of energy saving states are controlled to a Low Power state, a Low Power 2 state, and an Off Mode state in which the degree of energy saving is sequentially increased with respect to a Standby state that can be immediately operated. The image forming apparatus described . Factor for returning from the energy saving state to Standby state, the rising edge and falling edge detection signal by opening and closing of the pressure plate for pressing the original document, falling edge detection by that signal in the document feeder to ADF, depression of energy-saving key 5. The image forming apparatus according to claim 4 , wherein the image forming apparatus is any one of an L level detection of an external return signal, a data request from a host I / F, and an access . 6. The timing generation unit according to claim 1, wherein a timer for generating a sequence for disconnecting a plurality of power supply systems and a timer for generating a sequence for turning on are independently provided. Image forming apparatus. 5. The image forming apparatus according to claim 4, wherein at the time of transition from the standby state to the low power state, only a power source of a functional circuit for mechanical control including an engine mechanism is cut off . 5. The image forming apparatus according to claim 4, wherein a power source of a functional circuit for mechanical control including a mechanical unit of the engine is turned on at the time of transition from the low power state to the standby state . At the transition from the Standby state to OffMode state, the power of the functional circuit for mechanical control including a mechanism portion of the engine is first cut, then cut the power to the pull-up resistor of the PCI bus PCI bus, the last 5. The image forming apparatus according to claim 4, wherein the power source of the functional circuit responsible for image transfer of the engine and the power source of the controller are controlled in the order of being cut off almost simultaneously . At the transition from the OffMode state to Standby state, the power of the functional circuit responsible for power and engine image transfer function circuit for mechanical control including a mechanism portion of the engine is first turned on, then power up the controller 5. The image forming apparatus according to claim 4 , wherein the image forming apparatus is controlled in the order of powering on a pull-up resistor of the PCI bus . At the transition from the Standby state to the LowPower 2 state, the power supply for the mechanical control function circuit including the engine mechanism is turned off first, then the PCI bus pull-up resistor is turned off, and finally the engine. 5. The image forming apparatus according to claim 4 , wherein the image forming apparatus is controlled in the order of turning off the power of the functional circuit responsible for image transfer . At the time of transition from LowPower 2 state to Standby state, the power supply of the functional circuit for mechanical control including the engine mechanism and the power supply of the functional circuit responsible for image transfer of the engine are first turned on, and then the PCI bus is pulled up The image forming apparatus according to claim 4 , wherein the image forming apparatus is controlled in the order of turning on the power of the resistors . 5. The image forming apparatus according to claim 4, wherein the controller is powered off when transitioning from the LowPower 2 state to the OffMode state .

Images