JP4024602B2 - Sample rate converter and receiver using the same - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a sample rate converter that converts an input sample sequence into an output sample sequence having a different sample period, and a receiver using the sample rate converter.
[0002]
[Prior art]
Sample rate converters are used in various applications for handling digital signals. For example, a sample rate converter is used in a digital receiver.
[0003]
In digital receivers, generally, analog IF (intermediate frequency) signals are A / D converted at a certain sampling period, down-converted to generate discrete baseband signals, and then the base data is used as a base. Sample interpolation is performed using a sample rate converter in order to resynchronize to a rate that is an integral multiple (usually an exponential multiple of 2) of one or more carrier frequencies arranged in the band.
[0004]
In this case, when the sample rates are expressed in a relatively prime relationship, the conventional technique realizes rate conversion mainly using a signal processing method called a polynomial interpolation filter. The same applies to sample rate converters used in other devices as well as digital receivers.
[0005]
Here, FIG. 4 shows the relationship between the input sample and the output sample by the polynomial interpolation filter. FIG. 5 shows an example of a polynomial interpolation filter when the interpolation order N is 2. In FIG. 4, a _n-2 , A _n-1 , A _n , A _{n + 1} Is the input sample, X _n-2 , X _n-1 , X _n , X _{n + 1} Is the input sample a _n-2 , A _n-1 , A _n , A _{n + 1} , B is the output sample, X is the sampling timing of the output sample b, T is the input sample period, and μ is the offset time from the input sample immediately before the sampling timing of the output sample b. In FIG. 5, 1 to 3 are interpolation coefficients, 4 and 5 are adders, 6 and 7 are multipliers, and Δ is a value μ / T1 obtained by normalizing the offset time μ with an input sample period T1.
[0006]
The polynomial interpolation filter linearly obtains an intermediate amount at each interpolation point from an arbitrary and fixed (always constant) number of input samples.
[0007]
FIG. 6 shows the sampling timing of input samples when the order N of the interpolation equation is 3 and the conversion rate of the sample rate (= input sample period / output sample period) is 5/6 for the polynomial interpolation filter. It is a figure which shows the relationship between the sampling timing of an output sample, and the interpolation process range period of each output sample. Here, the interpolation processing range period of a certain output sample indicates that the data of the output sample is obtained by performing interpolation processing using the data of the input sample belonging to the period.
[0008]
FIG. 7 shows the sampling timing of input samples when the order N of the interpolation equation is 2 and the conversion rate of the sample rate (= input sample period / output sample period) is 5/6 for the polynomial interpolation filter; It is a figure which shows the relationship between the sampling timing of an output sample, and the interpolation process range period of each output sample.
[0009]
[Problems to be solved by the invention]
However, in the polynomial interpolation filter, when the temporal positional relationship between the input sample and the output sample is on the least common multiple period, if the order of the interpolation equation is odd, the number of input samples is redundant as shown in FIG. In addition, a bias appears in the time range of the input sample as viewed from the output sample position. On the other hand, if it is an even number, as shown in FIG. Artificial distortion due to phase-like aliasing noise is synthesized.
[0010]
In addition to the polynomial interpolation filter, interpolation by a polyphase filter bank is well known, but these also have fundamentally the same problems as the case of the polynomial interpolation filter.
[0011]
Also, in digital receivers, the rate conversion ratio is adaptively adjusted to successively correct the synchronization shift due to the relative source error between the transmitter and receiver (frequency error that occurs between the reference oscillator of the transmitter and the reference oscillator of the receiver). May be fine-tuned. In this case, depending on the correction timing as an adjustment amount at that time, there may be a scene where the above-described aliasing noise is instantaneously increased.
[0012]
The present invention has been made in view of such circumstances, and an object thereof is to provide a sample rate converter capable of suppressing the occurrence of phase-wise aliasing noise and a receiver using the sample rate converter.
[0013]
[Means for Solving the Problems]
In order to solve the above-described problem, a sample rate converter according to a first aspect of the present invention includes a first set value corresponding to an input sample period and a second set value corresponding to a sample rate conversion rate or an output sample period. A set value storage means for storing a third set value corresponding to a reference time width serving as a reference for determining a plurality of input samples to be used effectively for obtaining data of one output sample by interpolation processing; For each output sample, the sampling timing of the output sample Timing according to Is calculated based on the first set value and the second set value. Timing calculation means For each output sample, interpolation processing is performed using data of all input samples belonging to an interpolation processing range period having substantially the same time width as the reference time width with the sampling timing of the output sample being substantially centered. Data calculation means for obtaining the data of the output sample by performing, and for each output sample, the data of the output sample obtained by the data calculation means, Timing calculation means Obtained by According to timing The sampling timing of the output sample In Output.
[0014]
In this first aspect, interpolation processing is performed using data of all input samples belonging to an interpolation processing range period having a time width substantially the same as the reference time width with the sampling timing of the output samples as the center. . For this reason, for any output sample, there is less bias in the time range of the input sample used for interpolation of the output sample as seen from the output sample position. Therefore, according to the first aspect, it is possible to suppress the occurrence of topological aliasing noise.
[0015]
A sample rate converter according to a second aspect of the present invention is configured such that in the first aspect, at least one of the first to third setting values can be changed to a different value as needed.
[0016]
According to the second aspect, since at least one of the first to third set values can be changed to a different value at any time, versatility is improved by appropriately changing the set value according to the purpose of use or the like. be able to.
[0017]
The sample rate converter according to a third aspect of the present invention is configured such that, in the first or second aspect, the second set value is set to a value according to a command from the outside, and the conversion is performed. The rate can be adjusted.
[0018]
According to the third aspect, since the conversion rate of the sample rate can be adjusted, for example, in a digital receiver, adaptively to sequentially correct a synchronization shift due to a relative original vibration error between the transmitter and the receiver. The rate conversion ratio can be finely adjusted, which is preferable.
[0019]
The sample rate converter according to a fourth aspect of the present invention is the sample rate converter according to any one of the first to third aspects, wherein the number of input samples belonging to the interpolation processing range period or the order of the interpolation processing determined according to the number of input samples. A value according to any of these, and a value obtained by normalizing the offset time from the input sample immediately before the sampling timing of the output sample by the input sample period, or an approximate value thereof, or a value according to any of these The lookup table storage means for storing a lookup table that stores a set of interpolation coefficients indicating the contents of the interpolation processing according to the index value determined by, and the first to third settings for each output sample Based on the value, the input samples belonging to the output sample within the interpolation processing range period Or order or a value corresponding to one of these the interpolation process determined according to, comprising means for determining a first value, the said Timing calculation means For each of the output samples, a value obtained by normalizing an offset time from the input sample immediately before the sampling timing of the output sample with the input sample period, an approximate value thereof, or a value corresponding to any one of these values, The data calculation means refers to the look-up table for each output sample according to an index value determined by the first and second values determined according to the output sample. To obtain the output sample data by performing a product-sum operation between the interpolation coefficient set and the input sample data within the interpolation processing range period for the output sample. It is.
[0020]
According to the fourth aspect, since the interpolation process is performed using the lookup table, the cost of the apparatus can be reduced, and the processing burden associated with the interpolation process can be reduced.
[0021]
A sample rate converter according to a fifth aspect of the present invention includes a memory capable of reading and writing simultaneously in any one of the first to fourth aspects, wherein the data of each input sample is synchronized with an input sample clock. For each of the output samples, data of input samples belonging to the interpolation processing range period related to the output samples is read from the memory in synchronization with an output sample clock, and the data calculation unit Uses the read input sample data for the interpolation processing.
[0022]
According to the fifth aspect, since the memory that can be read and written at the same time is used, the configuration of the apparatus is simplified.
[0023]
According to a sixth aspect of the present invention, there is provided a receiver for receiving a signal modulated by a predetermined modulation method as a received signal, based on a discrete local oscillator that generates a complex local carrier signal, and the received signal. A multiplier for synthesizing a baseband signal by multiplying the obtained intermediate frequency signal A / D converted at an arbitrary sample rate and a complex local carrier signal generated by the discrete local oscillator, and the multiplier A sample rate converter for converting the baseband signal output in synchronization with the sample rate to a resynchronization with the baseband signal processing rate, and demodulating the resynchronized baseband signal for data Demodulating means for demodulating the signal, and sampling period error or sample rate error on the receiving side relative to the transmitting side A detecting means for detecting, and a control section, wherein the sample rate converter is the sample rate converter according to any one of the first to fifth aspects, and the control section is configured to detect an error detected by the detecting means. On the basis of the above, a value that decreases the error is commanded, and this value is stored in the set value storage means as the second set value of the sample rate converter.
[0024]
According to the sixth aspect, feedback control based on the sample period error or sample rate error on the reception side with respect to the transmission side is realized, so that the sample period error and the like can be suppressed, and consequently the bit error rate can be reduced. it can. At this time, when a conventional sample rate converter is used as the sample rate converter of the receiver, depending on the amount of adjustment of the conversion rate of the sample rate, the above-mentioned aliasing noise is instantaneously increased, and the error rate is increased. There may be enough scenes. On the other hand, in the sixth aspect, since the sample rate converter according to any one of the first to fifth aspects is used, phase-wise aliasing noise is always generated regardless of the adjustment amount at that time. The bit error rate can be stably reduced.
[0025]
The application of the sample rate converter according to the first to fifth aspects is not limited to the receiver, and can be applied to various applications.
[0026]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a sample rate converter according to the present invention and a receiver using the same will be described with reference to the drawings.
[0027]
[First Embodiment]
[0028]
FIG. 1 is a schematic block diagram showing a sample rate converter according to a first embodiment of the present invention. FIG. 2 is a diagram illustrating an example of the relationship between the sampling timing of the input sample, the sampling timing of the output sample, and the interpolation processing range period, which is realized by the sample rate converter illustrated in FIG.
[0029]
First, before explaining the configuration of the sample rate converter according to the present embodiment, the example shown in FIG. 2 will be explained.
[0030]
In the example shown in FIG. 2, the sample rate conversion rate (= input sample period T1 / output sample period T2) is 5/6. A reference time width ΔT serving as a reference for determining a plurality of input samples to be used effectively for obtaining data of one output sample by interpolation processing is set to the length shown in FIG. The interpolation processing range period of each output sample has the same time width as the reference time width ΔT, and the sampling timing of the output sample is determined to be the center of the interpolation processing range period. For example, the interpolation processing range period of the output sample D has the same time width as the reference time width ΔT, and the time point at the center of the interpolation processing range period of the output sample D is the sampling timing of the output sample D. In practice, in the present embodiment, the time resolution (resolution) is determined by an output clock signal, which will be described later, and therefore the time width of the interpolation processing range period is in a relationship closely matching the reference time width ΔT. I can not say.
[0031]
As already described, the interpolation processing range period of a certain output sample indicates that the data of the output sample is obtained using the data of the input sample belonging to the period. For example, in the example shown in FIG. 2, since four input samples a4, a5, a6, and a7 belong within the interpolation processing range period of the output sample D, the data of the output sample D is all of these input samples a4 and a5. , A6, a7 are used to perform interpolation processing. Therefore, the interpolation order N (= number of input samples−1) when obtaining the data of the output sample D is 3. On the other hand, since the three input samples a7, a8, a9 belong within the interpolation processing range period of the output sample A ′, the data of the output sample D is interpolated using the data of all these input samples a7, a8, a9. Obtained by processing. Accordingly, the interpolation order N (= number of input samples−1) when obtaining the data of the output sample A ′ is 2.
[0032]
As described above, in the present embodiment, the interpolation processing range period of each output sample has the same time width as the reference time width ΔT, and the sampling timing of the output sample is determined to be the center of the interpolation processing range period. Therefore, the order N when the output sample data is obtained by interpolation processing is different between the output sample A ′ and the output sample D. This is completely different from the cases of FIGS. 6 and 7 in which the interpolation order N is always the same for all output samples. In the example shown in FIG. 2, the conversion rate is 5/6, and the relationship of 4 × 4/5 + 3 × 1/5 = 3.8 is established. And, the output by the second order interpolation from the three inputs is executed at a rate of once, and the normalized reference time width ΔT / T1 is 3.8.
[0033]
According to the present embodiment, the interpolation processing is performed using the data of all the input samples belonging to the interpolation processing range period having the same time width as the reference time width ΔT centering on the sampling timing of the output samples. Therefore, for any output sample, the temporal positional deviation of the sampling timing of the output sample with respect to the sampling timing of the input sample used for interpolation of the output sample is reduced, and phase distortion does not concentrate. This is also clear from a comparison between FIG. 2 and FIGS. Therefore, according to the present embodiment, it is possible to suppress the occurrence of topological aliasing noise.
[0034]
Next, the configuration of the sample rate converter according to the present embodiment will be described with reference to FIG.
[0035]
The sample rate converter according to the present embodiment has a dual port RAM 11 as a simultaneously writable memory. When the RAM 11 is controlled to be written by the write control circuit 12 that operates in synchronization with the input clock signal, the input sample data is temporarily and sequentially stored in the RAM 11 from the write port of the RAM 11. The input sample data once stored in this manner is read out from the RAM 11 by the read control circuit 13 that operates in synchronization with the output clock signal independent of the input clock signal, and in synchronization with the output clock signal for each output sample. Sequential numbers are read out for each interpolation calculation. Note that elements surrounded by a dotted line in FIG. 1 operate in synchronization with the output clock signal.
[0036]
Register as set value storage 24 In the table, an input sample period T1, an output sample period T2, and a normalized reference time width ΔT / T1 obtained by normalizing the reference time width ΔT by the input sample period T1 are stored as setting values. In the present embodiment, these set values T1, T2, and ΔT / T1 can be changed to different values as needed by a processor or the like (not shown) operated by a program, and the output sample period T2 is external. Therefore, the conversion rate T1 / T2 can be adjusted. For example, instead of the output sample period T2, the conversion rate T1 / T2 is registered. 24 Needless to say, it may be stored in the.
[0037]
Based on the input sample period T1 and the output sample period T2, the normalized offset time calculation unit 14 calculates, for each output sample, the offset time μ from the input sample immediately before the sampling timing of the output sample in the input sample period T1. A normalized value (normalized offset time) Δ = μ / T1 is calculated. In the example illustrated in FIG. 2, the normalized offset time calculation unit 14, for example, for output sample C, Δ = μ _C / T1 is calculated. Since the offset time μ of each output sample is uniquely determined depending on the input / output sample periods T1 and T2, the normalized offset time Δ can be calculated from the input sample period T1 and the output sample period T2 for each output sample. . Note that the possible temporal positions of the sampling timings of the output samples are actually discrete positions determined by the resolution of the output clock signal, not continuous infinite positions. Therefore, the normalized offset time calculation unit 14 obtains a value (that is, an approximate value) rounded to an integral multiple of the minimum unit (or an integral multiple thereof) determined by the resolution as the normalized offset time Δ.
[0038]
The read timing determination unit 15 sequentially receives the normalized offset time Δ for each output sample from the normalized offset time calculation unit 14, further uses the input sample period T1, and counts the output clock signal to thereby output each output sample. A read timing signal is given to the read control circuit 13 at a timing corresponding to the sampling timing. As can be seen from the description to be described later, in this embodiment, a time point after a predetermined number of clocks from the time point of the read timing signal is output. sample This is the actual sampling timing. The read control signal 13 gives a signal synchronized with the read timing signal to the normalized offset time calculator 14. In response to this signal, the normalized offset time calculator 14 calculates a normalized offset time Δ for the next output sample.
[0039]
As can be seen from the above description, in this embodiment, the normalized offset time calculation unit 14 and the read timing determination unit 15 perform the sampling timing of the output sample for each output sample. Timing according to Is calculated based on the input sample period T1 and the output sample period T2. Timing calculator 16 is constituted.
[0040]
The interpolation order calculation unit 17 sequentially receives the normalized offset time Δ for each output sample from the normalized offset time calculation unit 14, and based on the normalized offset time Δ and the normalized reference time width ΔT / T1, The number of input samples belonging to the interpolation processing range period having the same (actually approximate) time width as the reference time width ΔT centering on the sampling timing of the output samples is obtained, and 1 is subtracted from the number of input samples. Thus, the order N of the interpolation process is obtained.
[0041]
The index generating unit 18 generates an index (pointer) determined by the normalized offset time Δ sequentially received from the normalized offset time calculating unit 14 and the order N sequentially received from the interpolation order calculating unit 17.
[0042]
A lookup table 20 is stored in the memory 19 in advance. In the look-up table 20, for each index, the interpolation processing when the output sample data corresponding to the normalized offset time Δ indicated by the index is obtained by the order N interpolation processing based on the input sample data. A set of interpolation coefficients (h _Δ (0), h _Δ (1), ..., h _Δ (N)) is stored. That is, the lookup table 20 includes a set of interpolation coefficients (h) indicating the contents of interpolation processing determined by a combination of the normalized offset time Δ and the interpolation order N as parameters through the index. _Δ (0), h _Δ (1), ..., h _Δ (N)) is stored. For example, in the example shown in FIG. 2, if the interpolation order is either the second order or the third order, and the normalized offset time Δ can take 128 values from the viewpoint of temporal resolution, 2 A set of x128 interpolation coefficients (h _Δ (0), h _Δ (1), ..., h _Δ (N)) is stored in advance.
[0043]
Then, a set of interpolation coefficients (h) designated by the index generated by the index generation unit 18 from the look-up table 20. _Δ (0), h _Δ (1), ..., h _Δ (N)) is read out and supplied to the data calculation unit 21. That is, a set of interpolation coefficients (h) corresponding to the normalized offset time Δ sequentially obtained from the normalized offset time calculating unit 14 and the order N sequentially obtained from the interpolation order calculating unit 17. _Δ (0), h _Δ (1), ..., h _Δ (N)) is sequentially supplied to the data calculation unit 21. Here, a set of interpolation coefficients supplied from the lookup table 20 to the data calculation unit 21 is represented by (C ₀ , C ₁ , ..., C _N ).
[0044]
On the other hand, the readout control circuit 13 sequentially receives the normalized offset time Δ for each output sample from the normalized offset time calculation unit 14 and samples the output sample based on the normalized offset time Δ and the interpolation order N. An address in the RAM 11 for the data of a plurality of input samples belonging to the interpolation processing range period having the same (actually approximate) time width as the reference time width ΔT centering on the timing is obtained, and a read timing determining unit In response to the read timing signal from 15, the data of the plurality of input samples is read from the address. Now, the data of a plurality of input samples read from the RAM 11 is (V ₀ , V ₁ , ..., V _N ). In the example shown in FIG. 2, for example, for the output sample D, the data of the input samples a4, a5, a6, and a7 are read from the RAM.
[0045]
As shown in FIG. 1, the data calculation unit 21 is read from the RAM 11 (V ₀ , V ₁ , ..., V _N ) And a set of interpolation coefficients (C ₀ , C ₁ , ..., C _N ) To perform interpolation processing, and output data of the output sample. That is, for each output sample, the data calculation unit 21 uses the data of all input samples belonging to the interpolation processing range period having the same time width as the reference time width ΔT centering on the sampling timing of the output sample. The data of the output sample is obtained by performing the interpolation process. In the present embodiment, the data calculation unit 21 realizes this interpolation processing by referring to the lookup table 20. For example, without using the lookup table 20, the calculation by the interpolation formula is executed as it is. It is also possible.
[0046]
In the present embodiment, the time interval from when the read timing determination unit 15 generates the read timing signal to when the corresponding output sample data is output is substantially the same for any output sample. It is comprised so that.
[0047]
Note that the normalized reference time width ΔT / T1 may be set to an appropriate value. For example, when a value similar to the example shown in FIG. 2 is derived, [ΔT / T1 = (A × low order) Side input sample number + B × higher order side input sample number) / input sample period T1]. However, in this equation, A + B = input sample period T1, and A and B are both positive integers.
[0048]
With the above configuration, according to the present embodiment, for example, the operation shown in FIG. 2 is realized, and as described above, it is possible to obtain the advantage that the occurrence of phase-wise aliasing noise can be suppressed.
[0049]
Moreover, according to this Embodiment, since the interpolation process is performed using the lookup table 20, the cost of an apparatus can be reduced and the processing burden accompanying an interpolation process can be reduced.
[0050]
Furthermore, according to the present embodiment, since the RAM 11 that can be read and written at the same time is used, the configuration of the apparatus is simplified.
[0051]
[Second Embodiment]
[0052]
FIG. 3 is a schematic block diagram showing a receiver according to the second embodiment of the present invention. The receiver according to the present embodiment is configured as a receiver that receives a signal modulated by the OFDM method.
[0053]
As shown in FIG. 1, the receiver according to the present embodiment includes an antenna 31, an RF tuner unit 32 that obtains an analog intermediate frequency signal by band-converting a signal received by the antenna 31, and an RF tuner unit 32. A / D converter 33 for A / D converting the intermediate frequency signal at an arbitrary sample rate, a discrete local oscillator 34 for generating a complex local carrier signal, and A / D converted by A / D converter 33 A multiplier 35 that synthesizes the baseband signal by multiplying the intermediate frequency signal and the complex local carrier signal generated by the discrete local oscillator 34, and a baseband output from the multiplier 35 in synchronization with the sample rate. A sample rate converter 36 that converts the signal to a sample rate and resynchronizes with the baseband signal processing rate; Accordingly, a symbol synchronization detection unit 37 for detecting the start position of the symbol effective period, a demodulation unit 38 for demodulating data by performing demodulation processing on the baseband signal subjected to the sample rate conversion, a frequency offset detection unit 39, and a sample period An error detection unit 40 and a host processor 41 made of, for example, a microcomputer are provided.
[0054]
The discrete local oscillator 34 and the multiplier 35 constitute band conversion means for performing band conversion (down conversion) of the received signal from the intermediate frequency to the baseband. In the present embodiment, the discrete local oscillator 34 is configured so that the oscillation frequency can be sequentially changed.
[0055]
The processing of the discrete local oscillator 34 and the multiplier 55 is performed in synchronization with the sample rate of the A / D converter 23. The sample rate converter 36 absorbs the relative difference between the sample rate of the A / D converter 33 and the baseband signal processing rate. In the present embodiment, the sample rate converter shown in FIG. 1 according to the first embodiment described above is used as the sample rate converter 36. In the present embodiment, the host processor 41 sets the input sample period T1 and the normalized reference time width ΔT / T1 in a programmable manner. Further, the host processor 41 obtains a value of the output sample period T2 that makes the error small based on the output sample period T2 error detected by the sample period error detection unit 40, and obtains this value of the sample rate converter 36. register 24 (See FIG. 1).
[0056]
The frequency offset detector 39 detects a frequency offset on the reception side with respect to the transmission side based on the baseband signal output from the sample rate converter 26. As the frequency offset detection part 39, what is disclosed by Unexamined-Japanese-Patent No. 2001-136143 can be used, for example.
[0057]
The discrete local oscillator 34 receives the frequency offset detection signal from the frequency offset detection unit 39 and adjusts the oscillation frequency so that the frequency offset becomes small.
[0058]
The demodulator 38 is separated from an FFT unit 42 that performs a fast Fourier transform on the baseband signal so as to individually separate a plurality of carriers included in the baseband signal using the synchronization detection signal from the symbol synchronization detection unit 37. And a decoding unit 43 that decodes each carrier signal and returns it to data.
[0059]
Based on the carrier signal separated by the FFT unit 42, the sample cycle error detection unit 40 detects a sample cycle error on the reception side with respect to the transmission side.
[0060]
According to the present embodiment, feedback control based on the sample period error on the reception side with respect to the transmission side is realized, the sample period error can be suppressed, and consequently the bit error rate can be reduced. At this time, when a conventional sample rate converter is used as the sample rate converter 36 of the receiver, depending on the amount of adjustment of the conversion rate of the sample rate, the above-mentioned aliasing noise is instantaneously increased, and the error rate is increased. There may be enough scenes to end up. On the other hand, in the present embodiment, since the sample rate converter shown in FIG. 1 is used as the sample rate converter 36, it is possible to always suppress the occurrence of phase-wise aliasing noise regardless of the adjustment amount at that time. The bit error rate can be reduced stably.
[0061]
Although the embodiments of the present invention have been described above, the present invention is not limited to these embodiments.
[0062]
For example, the sample rate converter according to the present invention can be used in various applications other than a receiver.
[0063]
【The invention's effect】
As described above, according to the present invention, it is possible to provide a sample rate converter capable of suppressing the occurrence of phase-wise aliasing noise, and a receiver using the sample rate converter.
[Brief description of the drawings]
FIG. 1 is a schematic block diagram showing a sample rate converter according to a first embodiment of the present invention.
2 is a diagram illustrating an example of a relationship between sampling timing of input samples, sampling timing of output samples, and an interpolation processing range period realized by the sample rate converter illustrated in FIG. 1;
FIG. 3 is a schematic block diagram showing a receiver according to a second embodiment of the present invention.
FIG. 4 is a diagram illustrating a relationship between an input sample and an output sample by a polynomial interpolation filter.
FIG. 5 is a diagram illustrating an example of a polynomial interpolation filter.
FIG. 6 shows the relationship between the sampling timing of input samples, the sampling timing of output samples, and the interpolation processing range period of each output sample when the degree is 3 and the conversion rate is 5/6 for a polynomial interpolation filter; FIG.
FIG. 7 shows the relationship between the sampling timing of input samples, the sampling timing of output samples, and the interpolation processing range period of each output sample when the order is 2 and the conversion rate is 5/6 for the polynomial interpolation filter. FIG.
[Explanation of symbols]
11 Dual port RAM
12 Write control circuit
13 Read control circuit
14 Normalized offset time calculator
15 Read timing determination unit
16 Sampling timing calculator
17 Interpolation order calculator
18 Index generator
19 Memory
20 Look-up table
21 Data operation part

Claims (6)

A first set value corresponding to the input sample period, a second set value corresponding to the conversion rate of the sample rate or the output sample period, and a plurality of values to be used effectively to obtain data of one output sample by interpolation processing A set value storage means for storing a third set value corresponding to a reference time width serving as a reference for determining the input sample of
For each output sample, timing calculation means for calculating a timing according to the sampling timing of the output sample based on the first set value and the second set value;
For each output sample, interpolation processing is performed using data of all input samples belonging to an interpolation processing range period having a time width substantially the same as the reference time width with the sampling timing of the output sample as a center. A data calculation means for obtaining data of the output sample;
With
Wherein for each output sample, the data of the output samples obtained by the data calculating means, and outputs at the sampling timings for the corresponding output samples corresponding to the obtained timing by the timing calculating means Sample rate converter.   2. The sample rate converter according to claim 1, wherein at least one of the first to third set values can be changed to a different value at any time.   3. The sample rate converter according to claim 1, wherein the second set value is set to a value according to a command from the outside, and the conversion rate can be adjusted. The number of input samples belonging to the interpolation processing range period, the order of the interpolation processing determined according to the number, or a value corresponding to any of these, and the offset time from the input sample immediately before the sampling timing of the output sample A lookup table storing a set of interpolation coefficients indicating the contents of the interpolation processing according to an index value determined by a value normalized by the input sample period or an approximate value thereof or a value according to any of these values A lookup table storage means for storing;
For each output sample, based on the first to third set values, the number of input samples belonging to the output sample within the interpolation processing range period or the order of the interpolation processing determined in accordance therewith, or any of these Means for obtaining a value according to the first value;
With
The timing calculation means , for each of the output samples, according to a value obtained by normalizing the offset time from the input sample immediately before the sampling timing of the output sample by the input sample period, an approximate value thereof, or any of these Means for determining the value as a second value;
The data calculation means obtains a set of interpolation coefficients for each output sample by referring to the lookup table according to an index value determined by the first and second values determined according to the output sample. 4. The data of the output sample is obtained by performing a product-sum operation between the set of interpolation coefficients and the data of the input sample belonging to the interpolation processing range period related to the output sample. A sample rate converter according to any of the above. It has memory that can be read and written at the same time,
The data of each input sample is temporarily held in the memory in synchronization with the input sample clock,
For each output sample, data of the input sample belonging to the interpolation processing range period related to the output sample is read from the memory in synchronization with an output sample clock,
5. The sample rate converter according to claim 1, wherein the data calculation unit uses the read input sample data for the interpolation processing. 6. In a receiver that receives a signal modulated by a predetermined modulation method as a received signal,
A discrete local oscillator that generates a complex local carrier signal;
Multiplication for synthesizing a baseband signal by multiplying an intermediate frequency signal obtained based on the received signal and A / D converted at an arbitrary sample rate by a complex local carrier signal generated by the discrete local oscillator And
A sample rate converter that converts the baseband signal output from the multiplier in synchronization with the sample rate and resynchronizes to the baseband signal processing rate;
Demodulation means for demodulating data by performing demodulation processing on the resynchronized baseband signal;
Detecting means for detecting a sample period error or sample rate error on the receiving side relative to the transmitting side;
A control unit;
With
The sample rate converter is the sample rate converter according to any one of claims 1 to 5,
Based on the error detected by the detection means, the control unit commands a value that reduces the error, and uses the value as the second set value of the sample rate converter as the set value storage means. A receiver characterized in that it is memorized.

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