JP4014316B2 - Programmable ROM and programmable ROM writer - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a programmable ROM and a programmable ROM writer, and more particularly to a programmable ROM that is a memory IC in which a microprocessor is mounted together with a nonvolatile semiconductor memory such as a flash memory, and a programmable ROM writer used for writing to the memory.
[0002]
[Prior art]
In order to write data to a general-purpose programmable ROM 10 equipped with a large-capacity flash memory or the like, a programmable ROM writer 20 suitable for its type and characteristics is used. The type of the programmable ROM 10 depends on the number of IC pins 11 and the like. It is subdivided into various groups based on differences in the shape of packages, etc., differences in memory array status such as memory capacity and data width, and differences in electrical characteristics such as drive voltage and write procedure optimal for memory elements. Therefore, diversification of the programmable ROM writer 20 is inevitable.
[0003]
The programmable ROM writer 20 (see FIG. 5A) includes an operation unit 21 including operation switches and a data input unit, a microprocessor 22 connected to the operation unit 21, an LED controlled by the microprocessor 22, and the like. The display unit 23, the RAM 24 accessed by the microprocessor 22, the customer board 25 that performs read access to the RAM 24 and the read / write access to the socket 26 under the control of the microprocessor 22, and the IC pin 11 of the programmable ROM 10 The socket 26 is provided.
[0004]
When writing to the programmable ROM 10 (see FIG. 5B), first, the operator operates the operation unit 21 to give a data preparation instruction to the programmable ROM writer 20 (step S51). When an instruction or data input from the operator is received via the operation unit 21, in response to this, in the programmable ROM writer 20, write data to the programmable ROM 10 is created in the RAM 24 by the microprocessor 22. Next, the operator attaches the programmable ROM 10 to the socket 26 (step S52), and further operates the operation unit 21 to give an instruction to write data to the programmable ROM writer 20 (step S53). Then, in the programmable ROM writer 20, data is sent from the RAM 24 to the programmable ROM 10 via the socket 26 and written by the customer board 25 that has received a write command via the microprocessor 22.
[0005]
The data written in the programmable ROM 10 is read into the microprocessor 22 via the customer board 25 and compared with the master data in the RAM 24. Then, since the result is displayed on the display unit 23 by the microprocessor 22, the worker sees the display and confirms the writing result (step S54). If there are a plurality of other programmable ROMs 10 to which the same data is to be written, the operations after the installation of the programmable ROM 10 are repeated (see the flow of broken lines in FIG. 5, steps S52 to S54).
[0006]
In this way, if the same type of programmable ROM 10 is used, data is written one after another. However, if the type of the programmable ROM 10 is different, the customer board 25 used so far is removed from the programmable ROM writer 20, and a new programmable A customer board 25 suitable for the ROM 10 is prepared, and is reinserted into the programmable ROM writer 20, and then the above-described writing operation is repeated. Note that the socket 26 can be used even if the number of terminals is larger than that of the IC pins 11 as long as the pitch is matched, and a socket having a large allowance for deviation of the pin position is usually used. Another programmable ROM writer is prepared.
[0007]
On the other hand, unlike the difference in shape, the difference in memory arrangement state and the difference in electrical characteristics cannot be easily absorbed by mechanical parts such as sockets. When writing to the programmable ROM 10 using the programmable ROM writer 20, the customer board 25 is often replaced depending on the type of the programmable ROM 10 or the like.
In addition to the simple ones described above, there are known programmable ROMs including a nonvolatile semiconductor memory and a microprocessor (see, for example, JP-A-6-259580). However, it is the same when initial data such as application program codes and parameters required prior to execution of the microprocessor is written.
[0008]
[Problems to be solved by the invention]
However, in such a conventional programmable ROM and programmable ROM writer, the programmable ROM writer becomes complicated and expensive in order to make the customer board replaceable. In addition, a separate customer board is required for each type of programmable ROM, and since the design and production of the customer board cannot be started unless the specifications of the programmable ROM are determined, an existing programmable ROM writer that can be used immediately is shared. In particular, the design of the programmable ROM is constrained.
[0009]
On the other hand, programmable ROMs are diversifying, and in particular, programmable ROMs equipped with a microprocessor are much more diverse than general-purpose ROMs. For this reason, the burden on the designer only increases if the design is still constrained.
Therefore, even if the programmable ROM for data writing is diversified, the programmable ROM writer is simplified while ensuring the design flexibility of the programmable ROM so as not to increase the burden on the designer and the cost of related devices. In addition, a new programmable ROM and programmable ROM writer that can improve the commonality becomes a problem.
[0010]
The present invention has been made to solve such a problem, and an object of the present invention is to realize a programmable ROM which is free from the restrictions of a programmable ROM writer and has a high degree of design freedom.
Another object of the present invention is to realize a programmable ROM writer that is simple and easy to share.
[0011]
[Means for Solving the Problems]
About the 1st thru | or 4th solution means invented in order to solve such a subject, the structure and effect are demonstrated below.
[0012]
[First Solution]
The programmable ROM of the first solving means (as described in claim 1 at the beginning of the application) is a programmable ROM incorporating a nonvolatile semiconductor memory, a microprocessor, and a parallel input / output circuit. Data is read from an external storage device via a parallel input / output circuit and written into the nonvolatile semiconductor memory.
[0013]
In such a programmable ROM of the first solving means, when data is written, data held in an external storage device is read by a built-in microprocessor via a parallel input / output circuit, It is written in the nonvolatile semiconductor memory. Therefore, data is written only by preparing an external storage device holding master data and establishing a connection between the external storage device and a programmable ROM to be written. In addition to the fact that the built-in microprocessor mainly works to perform writing processing to the nonvolatile semiconductor memory, a parallel input / output circuit intervening in connection with the external storage device is also built-in, so that the programmable ROM Differences in memory array status and electrical characteristics can be dealt with by a slight design change in the programmable ROM microprocessor and parallel input / output circuit, and have little effect on related devices such as external storage devices and ROM writers. .
[0014]
As a result, the characteristics on the programmable ROM side such as the type of the nonvolatile semiconductor memory are absorbed in the programmable ROM, and the programmable ROM writer can devote almost exclusively to signal transmission between the external storage device and the programmable ROM, so that the customer board is unnecessary. In addition, as long as it conforms in terms of shape, it can be applied to various types of programmable ROMs, and can be shared for writing a wide variety of programmable ROMs. As a result, the programmable ROM is not tightly bound to the programmable ROM writer, particularly the customer board, and the design constraints are locally reduced and alleviated.
Therefore, according to the present invention, it is possible to realize a programmable ROM that is free from the restrictions of the programmable ROM writer and has a high degree of design freedom. It is also useful for realizing a programmable ROM writer that is simple and easy to share.
[0015]
[Second Solution]
The programmable ROM of the second solution means (as described in claim 2 at the time of filing) is the programmable ROM of the first solution means described above, wherein the microprocessor provides a power supply ground line for the storage device. In-phase control is performed to confirm connection.
[0016]
Here, the above-described “in-phase control of the power supply ground line” means control that is performed in the same manner when the drive to the power supply line and the ground line is shaken high or low, that is, simultaneously changes and maintains the same state.
[0017]
In such a programmable ROM and programmable ROM writer of the second solving means, before and after the data is written, the quality of the connection between the programmable ROM and the external storage device is confirmed. Since the power supply ground line is controlled in the same phase, if there is a connection failure somewhere including the attaching / detaching portion of the programmable ROM and the attaching / detaching portion of the external storage device, this is detected. Moreover, the operation is automatically performed by the main function of the programmable ROM.
[0018]
As a result, erroneous writing due to poor connection can be prevented in advance, so that even if a plurality of attachment / detachment portions are interposed at the connection, data can be written reliably and work can be facilitated.
Therefore, according to the present invention, it is possible to realize a programmable ROM that is free from the restrictions of the programmable ROM writer and has a high degree of design freedom and has high data writing reliability.
[0019]
[Third Solution]
The programmable ROM writer of the third solving means (as described in claim 3 at the beginning of the application) includes a first socket to which the programmable ROM can be attached and detached, a second socket to which the external storage device can be attached and detached, and these sockets. A programmable ROM writer comprising a connection line for connecting the two in parallel, and a connection confirmation means, wherein the first socket or the second socket is a Kelvin type, and the connection confirmation means is the first socket or The connection confirmation is performed based on the coincidence / non-coincidence of the input / output values via a pair of contacts in the second socket.
[0020]
Here, the above-mentioned “Kelvin-shaped socket” includes a pair of contacts for each of the terminals of the mounted IC, and the pair of contacts are not electrically connected to each other and can transmit signals independently. It means a socket that can be driven.
The above-mentioned “input / output via a pair of contacts” means an input / output when a signal output to one contact is input not only through the contact but also through the other contact. Means.
[0021]
In such a programmable ROM writer of the third solving means, the programmable ROM of the first solving means is attached to the first socket, and an external storage device holding master data is attached to the second socket. Then, the connection between the two is established through the connection line, and as described above, the programmable ROM mainly works to write data into the nonvolatile semiconductor memory.
Thus, since the programmable ROM can be written without a customer board, the simplification and commonality of the programmable ROM writer is improved.
[0022]
In addition, prior to the writing of such data, the connection confirmation means confirms whether the programmable ROM and the first socket or the external storage device and the second socket are connected. If the contacts of a pair of contacts in a Kelvin-type socket are not securely connected together, the input / output values via both contacts will not match, so if there is a connection failure between the socket and the mounted IC Is detected.
[0023]
As a result, erroneous writing due to poor connection can be prevented, so that data can be reliably written even if a plurality of sockets are interposed in the connection line.
Therefore, according to the present invention, it is possible to realize a programmable ROM writer that is simple and easy to share and has high data writing reliability.
[0024]
[Fourth Solution]
The programmable ROM writer of the fourth solution means (as described in claim 4 at the time of filing) includes a first socket to which the programmable ROM can be attached and detached, a second socket to which the external storage device can be attached and detached, and these sockets. A programmable ROM writer having a connection line for connecting the two in parallel, and provided with switching means for switching the power supply ground line in the second socket in phase in response to a control signal via the first socket.
[0025]
Here, “switching the power supply ground line in the same phase” means switching so that the drive for the power supply line and the ground line is simultaneously swung in the same state such as high and low.
[0026]
In such a programmable ROM writer of the fourth solving means, the programmable ROM of the second solving means is attached to the first socket, and an external storage device holding master data is attached to the second socket. Then, the connection between the two is established through the connection line, and as described above with respect to the above solution, the programmable ROM mainly works to write data to the nonvolatile semiconductor memory.
Thus, since the programmable ROM can be written without a customer board, the simplification and commonality of the programmable ROM writer is improved.
[0027]
In addition, when writing such data, the main function of the programmable ROM that controls the switching means is used to check whether the connection with the external storage device is good or bad. Since the power supply ground line of the external storage device is switched in phase and the quality is confirmed by the programmable ROM installed in the first socket, there is a connection failure somewhere including both the first and second sockets. That is detected. Moreover, the operation is automatically performed by the main function of the programmable ROM.
[0028]
As a result, erroneous writing due to poor connection is prevented, so that even if a plurality of sockets are interposed in the connection line, data can be written reliably and work can be facilitated. Further, since the socket does not have to be a Kelvin type, the programmable ROM writer is further simplified.
Therefore, according to the present invention, it is possible to realize a programmable ROM writer that is simpler and easier to share and has high data writing reliability.
[0029]
DETAILED DESCRIPTION OF THE INVENTION
With respect to the programmable ROM and programmable ROM writer of the present invention achieved by such a solution, modes for carrying out this will be described with reference to first and second embodiments.
The first embodiment embodies the programmable ROM of the first solving means and the programmable ROM writer of the third solving means, and the second embodiment is the programmable ROM and the second solving means of the second solving means. This embodiment embodies a programmable ROM writer as a fourth solution.
[0030]
[First embodiment]
A specific configuration of the programmable ROM and the programmable ROM writer according to the first embodiment of the present invention will be described with reference to the drawings. FIG. 1A is an overall block diagram thereof, and FIGS. 1B and 1C are detailed views of socket contact portions.
[0031]
In the programmable ROM writer 50 (see FIG. 1A), a socket 55 adapted to the IC pin 34 of the programmable ROM 30 incorporating the flash memory 31 (nonvolatile semiconductor memory), and a ROM 40 (external storage) storing master data in advance. Socket 51 adapted to the IC pin 41 of the device), and if any of the sockets 51 and 55 has the same pin pitch and a sufficient number of pins, the IC pin 41 and the IC pin 34 can be connected. The IC can be easily attached and detached by inserting / removing and unlocking / unlocking. As a result, the programmable ROM writer 50 prepares data to be transferred to the nonvolatile semiconductor memory 31 in the storage device 40 that is detachable from the outside, not the RAM (24) installed therein. .
[0032]
Further, a Kelvin-type socket 55 is employed, and a pair of contacts 55a and 55b are brought into contact with the programmable ROM 30 being mounted for each IC pin 34. The contacts 55a and 55b are either in contact with the IC pin 34 sandwiched from both sides (see FIG. 1 (b)) or in contact with the same side (see FIG. 1 (c)). Also, two contacts are secured for one IC pin 34. The same applies to the socket 51 (see FIGS. 1B and 1C). Thus, the programmable ROM writer 50 includes a second socket 51 to which the external storage device 40 can be attached and detached in addition to the first socket 55 to which the programmable ROM 30 can be attached and detached. Two sockets 51 are of Kelvin type.
[0033]
Further, the sockets 51 and 55 are connected to each other in a one-to-one relationship via the parallel line 53. The parallel line 53 is embodied by a multi-core cable, a flat cable, a print pattern, or the like. In mounting, one of the contacts of the socket 51 (for example, the contact 51a) is connected to one of the contacts of the socket 55 (for example, the contact 55a). Thus, the programmable ROM writer 50 is provided with a connection line 53 for connecting the first socket 55 and the second socket 51 in parallel, omitting the customer board.
[0034]
The other of the contacts in the socket 51 (for example, the contact 51 b) is connected to a connection confirmation circuit 52, and a parallel line 53 is also connected to the connection confirmation circuit 52. The connection confirmation circuit 52 sends a predetermined output signal that changes from high to low toward each contact of the socket 51 (for example, toward the contact 51b) and from each contact of the socket 51 (for example, the contact) A comparison circuit that performs a comparison for each contactor whether the input signal returned (via 51a and the parallel line 53) is equal to the output signal, and a match when all comparison results are equal. And a coincidence detection circuit for outputting a mismatch signal if the signal is not output. When the switch 52a is pressed, these circuits are operated, and the lighting state of the indicator 52b is changed according to the coincidence or non-coincidence signal. As a result, the programmable ROM writer 50 also includes connection confirmation means (52, etc.) for confirming the connection based on the coincidence / mismatch of the input / output values via the contacts that make a pair in the second socket 51.
[0035]
Similarly, the other pair of contacts of the socket 55 (for example, the contact 55 b) is connected to the connection confirmation circuit 54, and the parallel line 53 is also connected to the connection confirmation circuit 54. The connection confirmation circuit 54 sends a predetermined output signal that changes from high to low toward each contact of the socket 55 (for example, toward the contact 55b) and from each contact of the socket 55 (for example, the contact) When the comparison is made for each contactor to compare whether the input signal returned (via 55a and the parallel line 53) is equal to the output signal, or when all the comparison results are equal And a coincidence detection circuit that outputs a mismatch signal otherwise. When the switch 54a is pressed, these circuits are operated, and the lighting state of the indicator 54b is changed according to the coincidence or non-coincidence signal. As a result, the programmable ROM writer 50 also includes connection confirmation means (54, etc.) for confirming the connection based on the coincidence / mismatch of the input / output values via the contacts that make a pair in the first socket 55.
[0036]
The programmable ROM writer 50 further includes a switch 56 connected to any one of the contacts of the socket 55 not connected to the parallel line 53, and an indicator connected to another similar contact. 57 is also provided to the programmable ROM 30 mounted in the socket 55 to operate the switch 56 to give an instruction to start copying, or to copy properly on behalf of the programmable ROM 30 having no display unit. It is also possible to display the result of whether or not.
[0037]
The programmable ROM 30 (see FIG. 1A) includes a flash memory 31 to which data is to be written, a microprocessor 32 including a program code holding ROM section, etc., and a number of input / output ports corresponding to the number of IC pins 34. And a parallel port 33 with a built-in port. The parallel port 33 (parallel input / output circuit) has the output port electrical characteristics such as output voltage and fan-out adapted to the driving conditions of the ROM 40, and the input port electrical characteristics such as threshold voltage and fan-in are the ROM 40. The one that meets the output conditions is adopted. Thereby, the programmable ROM 30 absorbs the difference in electrical characteristics between the built-in flash memory 31 and the external ROM 40 by the parallel port 33.
[0038]
Each input / output port of the parallel port 33 is connected to any one of the IC pins 34. Since the IC pin 34 is also connected to the address signal and data signal lines of the flash memory 31, the parallel port 33 and the like. The operation state is switched according to the control of the microprocessor 32. Specifically, for each IC pin 34, only one of the signal line of the flash memory 31 or the microprocessor 32, the output port of the parallel port 33, and the input port of the parallel port 33 is valid. Thus, the programmable ROM 30 includes a parallel input / output circuit 33 in addition to the nonvolatile semiconductor memory 31 and the microprocessor 32.
[0039]
A data copy routine 32 a is installed in advance in the microprocessor 32 of the programmable ROM 30, and the data copy routine 32 a is a program that is activated in response to the pressing operation of the switch 56. The main data copy is to read and write to the flash memory 31. At this time, the connection of the IC pin 34, which is normally enabled by the flash memory 31 or the like, is temporarily connected to the parallel port 33. Switch to. When the number of bits and address of the data are the same in the flash memory 31 and the ROM 40, the dead copy is directly copied from the ROM 40 to the flash memory 31, but when the data is different, the data input / output via the parallel port 33 is stored in the ROM 40. Appropriate adjustments such as data division / combination and address conversion are also performed as needed. Thereby, in the programmable ROM 30, the microprocessor 32 reads data from the external storage device 40 via the parallel input / output circuit 33 and writes it to the nonvolatile semiconductor memory 31. Further, the microprocessor 32 absorbs the difference in memory arrangement between the built-in flash memory 31 and the external ROM 40.
[0040]
Note that the ROM 40 may be a simple general-purpose ROM, and is generally widespread and preferably has a large capacity. In this case, master data is written using a conventional programmable ROM writer 20.
[0041]
The use mode and operation of the programmable ROM and programmable ROM writer of the first embodiment will be described with reference to the drawings. FIG. 2 is a flowchart showing the operation procedure.
[0042]
Prior to writing to the programmable ROM 30 (see FIG. 2), first, the operator prepares the ROM 40 (step S21). This operation is performed in substantially the same manner as in the conventional example. However, the ROM 40 is a general-purpose product, and the programmable ROM writer 20 including the customer board is ready for use with a ready-made product. In this way, the ROM 40 having master data is prepared.
[0043]
The worker attaches the ROM 40 to the socket 51 of the programmable ROM writer 50 (step S22) and presses the switch 52a to confirm the connection therewith. Then, the connection confirmation circuit 52 confirms the connection between each contact 51a, 51b of the socket 51 and each IC pin 41 of the ROM 40, and the result is displayed on the indicator 52b. Looking at this, the worker confirms that the ROM 40 is properly mounted in the socket 51 and the connection therewith has been established (step S23). If the connection is poor, the ROM 40 is mounted again and the next operation is performed after an appropriate connection is established. In this way, mistakes in mounting the ROM 40 are reliably prevented.
[0044]
Next, the operator attaches the programmable ROM 30 to the socket 55 (step S24) and presses the switch 54a to confirm the connection therewith. Then, the connection confirmation circuit 54 confirms the connection between the contacts 55a and 55b of the socket 55 and the IC pins 34 of the programmable ROM 30, and displays the result on the indicator 54b. Looking at this, the worker confirms that the programmable ROM 30 is properly mounted in the socket 55 and the connection therewith has been established (step S25). If the connection is poor, the programmable ROM 30 is mounted again and the next operation is performed after an appropriate connection is established. In this way, mistakes in mounting the programmable ROM 30 are reliably prevented.
[0045]
Then, the operator depresses the switch 56 and gives an instruction to start data copy to the programmable ROM 30 (step S26). Then, by the program processing of the microprocessor 32 of the programmable ROM 30, the master data of the ROM 40 is read one after another, sent to the programmable ROM 30, and written in the flash memory 31 there. In this way, desired data is written in the programmable ROM 30 even if the programmable ROM writer 50 without the customer board (25) and the microprocessor (22) is used.
[0046]
When the copy process is completed, the data copy routine 32a also performs a matching check between the data written in the flash memory 31 and the master data in the ROM 40, and the result is displayed on the indicator 57 by the microprocessor 32. . The operator confirms the copy result by looking at the display (step S27). Thus, the master data of the ROM 40 is copied to the flash memory 31 by the main function of the programmable ROM 30.
[0047]
Furthermore, if there is another programmable ROM 30 to which the same data is to be written, the operation after the installation of the programmable ROM 30 is repeated (see the flow of broken lines in FIG. 2, steps S24 to S27).
Thus, data writing is successively performed on the same type of programmable ROM 30.
[0048]
Moreover, even if the types of the programmable ROM 30 are different, if the data is the same, the data writing operation can be performed using the same ROM 40 and the programmable ROM writer 50.
Further, even if the type of programmable ROM 30 is different and the data is also different, it is necessary to prepare the same type of ROM 40 in which new master data is written, but the programmable ROM writer 50 uses the same data to Writing can be performed.
[0049]
[Second embodiment]
A specific configuration of the programmable ROM and the programmable ROM writer according to the second embodiment of the present invention will be described with reference to the drawings. 3A is an overall block diagram, FIG. 3B is a detailed view around a parallel connection line, and FIG. 3C is a detailed view of a switching circuit for a power supply ground line.
[0050]
The programmable ROM writer 70 is different from the above-described programmable ROM writer 50 (see FIG. 3A) in that the socket 71 instead of the socket 51 and the socket 74 instead of the socket 55 are not Kelvin type but similar to the conventional socket 26. A simple point of contact, a point where the connection confirmation circuit 52 and the connection confirmation circuit 54 are omitted and a switching circuit 72 is introduced instead, and a parallel line 53 instead of the parallel line 53 73 is provided. That is, the programmable ROM writer 70 includes a first socket 74 to which the programmable ROM 60 can be attached and detached, a second socket 71 to which the external storage device 40 can be attached and detached, and a connection line 73 that connects these sockets in parallel. is there.
[0051]
Each line of the parallel line 73 (see FIG. 3B) is connected to a power source Vdd via a predetermined pull-up resistor R1 in the programmable ROM writer 70 in order to adapt its signal level to the ROM 40, and a resistor. It is also connected to the ground GND via R2. Each IC pin 41 of the ROM 40 is also grounded to the power supply Vdd and the ground GND via protection diodes D1 and D2. The parallel lines 73 are clearly in either the power supply Vdd or ground GND state when the driving state of the parallel port 33 changes between high and low. Thereby, the programmable ROM writer 70 always drives the ROM 40 with a driving voltage suitable for the ROM 40 even if the output voltage of the programmable ROM 60 varies depending on the type thereof.
[0052]
The switching circuit 72 (see FIG. 3C) includes a switch SW1 connected to the power supply (Vdd) supply pin of the ROM 40 among the contacts of the socket 71, and the ground of the ROM 40 among the contacts of the socket 71 (see FIG. The switch SW1 is connected to the GND pin, and the switch SW1 conducts the power supply pin to either the power supply Vdd or the ground GND according to the control signal S1 sent from the programmable ROM 60, and the switch SW2 is programmable. In accordance with another control signal S2 sent from the ROM 60, the grounding pin is made to conduct to either the power supply Vdd or the ground GND.
[0053]
In a normal state where the control signals S1 and S2 are not significant, the switch SW1 is switched to the power supply Vdd side and the switch SW2 is switched to the ground GND side. However, the control signals S1 and S2 from the programmable ROM 60 are used. Both the switches SW1 and SW2 can be switched to the power supply Vdd side, can be switched to the reverse ground GND side, or can be simultaneously changed. Thus, the programmable ROM writer 70 includes switching means 72 that switches the power supply ground line in the second socket 71 in phase in response to the control signals S1 and S2 via the first socket 74.
[0054]
The programmable ROM 60 is different from the above-described programmable ROM 30 in that a connection confirmation routine 61 is added to the microprocessor 32. The connection confirmation routine 61 is executed prior to the execution of the data copy routine 32a, and sends control signals S1 and S2 that change as appropriate to the control signal switching circuit 72 to both the power supply pins and the ground pins of the ROM 40. The same power supply Vdd and ground GND are alternately applied. Then, all the lines of the parallel line 73 become the power supply Vdd when the power supply Vdd is applied, and depending on whether all the lines of the parallel line 73 become the ground GND when the ground GND is applied, the IC pin 34, the socket 74, and the parallel line 73, it is determined whether the connection between the socket 71 and the IC pin 41 is appropriate or not. Thus, the microprocessor 32 of the programmable ROM 30 performs connection confirmation by controlling the power supply ground line for the external storage device 40 in the same phase.
[0055]
The use mode and operation of the programmable ROM and programmable ROM writer of the second embodiment will be described with reference to the drawings. FIG. 4 is a flowchart showing the operation procedure.
[0056]
Also in this case, prior to writing to the programmable ROM 60 (see FIG. 4), the operator prepares the ROM 40 (step S41) and sockets the programmable ROM writer 70 in the same manner as in the first embodiment described above. 71 (step S42). However, it is not necessary to perform the connection confirmation work by pressing the switch 52a.
[0057]
Next, the operator attaches the programmable ROM 60 to the socket 74 (step S43), but here again, there is no need to perform the connection confirmation work by pressing the switch 54a, and the worker immediately presses the switch 56. Then, an instruction to start data copy is given to the programmable ROM 60 (step S44). Then, the connection confirmation process of the connection confirmation routine 61 is first performed by the program process of the microprocessor 32 of the programmable ROM 60. If there is a connection failure, a display to that effect is given by the indicator 57 (step S45), so the operator re-installs the programmable ROM 60 or ROM 40 and presses the switch 56 again. Thus, also in this case, mounting errors of the programmable ROM 60 and the ROM 40 are surely prevented.
[0058]
If the connection between the programmable ROM 60 and the ROM 40 is properly established, the process of the data copy routine 32a is automatically continued. Then, the master data of the ROM 40 is copied to the flash memory 31 of the programmable ROM 60, and the result of whether or not the writing is appropriate is displayed on the indicator 57 by the microprocessor 32. The operator confirms the copy result by looking at the display (step S45). Thus, also in this case, the master data of the ROM 40 is copied to the flash memory 31 by the main function of the programmable ROM 60. In addition, even if a cheaper programmable ROM writer 70 using a general socket that is not a Kelvin type is used, data writing can be performed reliably and the work can be facilitated.
[0059]
Further, if there is another programmable ROM 60 to which the same data is to be written, the work after the installation of the programmable ROM 60 is repeated (refer to the flow of the broken line in FIG. 4, steps S43 to S45), the type of the programmable ROM 60 is different. If the data is the same, data can be written using the same ROM 40 and programmable ROM writer 70, and the same type of ROM 40 in which new master data is written even if the data of the programmable ROM 70 is different and the data is different is prepared. It is necessary to do this, but the programmable ROM writer 70 can perform data writing using the same one in this example as well.
[0060]
[Comparative example]
In order to compare specific numerical values, a case will be described in which when a large number of programmable ROMs are used, 10 types of 10 types of programmable ROMs are simultaneously written for each type.
In this case, conventionally, 10 programmable ROM writers 20 and 200 customer boards 25 are required.
On the other hand, in the present invention, only one programmable ROM writer 20 for the ROM 40 and only ten programmable ROM writers 50 (or 70) for the programmable ROM 30 (or 60) are required.
Moreover, conventionally, writing to a new type of programmable ROM has been waited until the customer board 25 is completed. In the present invention, it is not necessary to produce or wait for such a board.
[0061]
【The invention's effect】
As is clear from the above description, in the programmable ROM of the first solving means of the present invention, the programmable ROM writer need not have a customer board because the characteristics on the programmable ROM side are absorbed there. Since the programmable ROM is released from the restrictions of the programmable ROM writer, the programmable ROM with a high degree of design freedom can be realized, and the advantageous effect that it can contribute to the realization of a simple and easy-to-use programmable ROM writer can be achieved. Yes.
[0062]
Further, in the programmable ROM of the second solving means of the present invention, since the power grounding line is controlled in the same phase so that erroneous writing due to connection failure is prevented in advance, a plurality of connection points are connected. Data can be written reliably and work can be done easily even if a detachable part is interposed. As a result, the programmable ROM is free from the restrictions of the programmable ROM writer and has a high degree of design freedom, and has high data writing reliability. There is an advantageous effect that can be realized.
[0063]
Furthermore, in the programmable ROM writer of the third solving means of the present invention, a plurality of sockets are connected to the connection line by using the multiple contacts to prevent erroneous writing due to connection failure. As a result, there is an advantageous effect that it is possible to realize a programmable ROM writer that is simple and easy to share and has high data writing reliability.
[0064]
In the programmable ROM writer of the fourth solving means of the present invention, the power supply ground line is switched in the same phase under the control of the programmable ROM so that erroneous writing due to poor connection is prevented in advance. Even if multiple sockets that do not have multiple contacts are connected to the connection line, data can be written reliably and work can be facilitated. As a result, it is a programmable ROM writer that is simpler and easier to share, and the reliability of data writing There is an advantageous effect that it was possible to realize a high one.
[Brief description of the drawings]
1A is a block diagram of the whole of a programmable ROM and a programmable ROM writer according to a first embodiment of the present invention, and FIGS. 1B and 1C are detailed views of a socket contact portion. .
FIG. 2 is a flowchart showing the operation procedure.
3A is a block diagram of the whole of a programmable ROM and a programmable ROM writer according to a second embodiment of the present invention, FIG. 3B is a detailed view around a parallel connection line, and FIG. ) Is a detailed view of the switching circuit for the power supply ground line.
FIG. 4 is a flowchart showing the operation procedure.
FIG. 5 is an overall block diagram and a flowchart of a conventional example.
[Explanation of symbols]
10 Programmable ROM
11 IC pin (lead, terminal)
20 Programmable ROM writer
21 Operation unit
22 Microprocessor (MPU)
23 Display
24 RAM (write data expansion memory)
25 Customer board (write drive circuit)
26 sockets (programmable ROM sockets)
30 Programmable ROM
31 Flash memory (nonvolatile semiconductor memory)
32 Microprocessor (MPU)
32a Data copy routine (read / write means, transfer means)
33 Parallel port (PI / O, parallel input / output circuit)
34 IC pin (lead, terminal)
40 ROM (master data, master set, external storage device)
41 IC pin (lead, terminal)
50 Programmable ROM writer
51 socket (second socket for attaching / detaching external storage device)
51a, 51b Contact (contact terminal, pair of contacts)
52 Connection confirmation circuit (matching / mismatch detection and discrimination, connection confirmation means)
52a switch (operation part for connection confirmation trigger)
52b Indicator (connection confirmation result display)
53 Parallel line (connection line)
54 Connection confirmation circuit (detection and discrimination of coincidence / mismatch, connection confirmation means)
54a switch (operation part for connection confirmation trigger)
54b Indicator (connection confirmation result display)
55 socket (first socket for detachable programmable ROM)
55a, 55b Contact (contact terminal, pair of contacts)
56 switch (operation unit for copy start instruction)
57 Indicator (Display section for checking copy results)
60 Programmable ROM
61 Connection confirmation routine (connection confirmation means)
70 Programmable ROM writer
71 socket (second socket for attaching / detaching external storage device)
51a, 51b Contact (contact terminal, pair of contacts)
72 switching circuit (switching means)
73 Parallel line (connection line)
74 socket (first socket for programmable ROM)

Claims (3)

A nonvolatile semiconductor memory, a parallel input / output circuit, reading data from an external storage device via the parallel input / output circuit, and performing at least one process of dividing and combining input data and changing an address; A programmable ROM comprising: a circuit for writing to the nonvolatile semiconductor memory, and a processing circuit for performing connection confirmation by controlling the power grounding line for the storage device in phase .   A programmable ROM including a nonvolatile semiconductor memory, a microprocessor, and a parallel input / output circuit, wherein the microprocessor reads data from an external storage device via the parallel input / output circuit and writes the data to the nonvolatile semiconductor memory A programmable ROM comprising: a power supply grounding line connected to the storage device for in-phase control to confirm connection.   A programmable ROM writer comprising a first socket to which a programmable ROM can be attached and detached, a second socket to which an external storage device can be attached and detached, and a connection line for connecting these sockets in parallel, and the control via the first socket A programmable ROM writer comprising switching means for switching the power supply ground line in the second socket in phase in response to a signal.

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