JP3997496B2 - Timing correction apparatus and timing correction method - Google Patents

Description

[0001]
【table of contents】
The present invention will be described in the following order.
[0002]
TECHNICAL FIELD OF THE INVENTION
Conventional technology (FIGS. 6 to 8)
Problems to be Solved by the Invention (FIGS. 6 to 8)
Means for Solving the Problems (FIGS. 1 to 5)
BEST MODE FOR CARRYING OUT THE INVENTION
(1) Configuration of timing correction apparatus according to this embodiment (FIG. 1)
(2) Reference timing signal timing correction processing (FIGS. 2 to 5)
(3) Operation and effect of the present embodiment (FIGS. 1 to 5)
(4) Other embodiments (FIGS. 1 to 5)
The invention's effect
[0003]
BACKGROUND OF THE INVENTION
The present invention relates to a timing correction device and a timing correction method, and is suitable for application to a timing correction device provided in, for example, a CDMA (Code Division Multiple Access) portable telephone.
[0004]
[Prior art]
Conventionally, in this type of mobile phone, in accordance with the rules stipulated in the CDMA IS95 standard, for example, a cycle of about 26.6 [msec] transmitted from a base station is used. ¹⁵ By receiving a pilot signal obtained by sequentially repeating bit spreading codes, for example, reception of a pilot signal for three periods (with a period of about 80 [msec]) (hereinafter referred to as a superframe signal). A reference timing having substantially the same period as this period (about 80 [msec]) is generated based on the timing, and a transmission process and a reception process corresponding to the operation timing of the base station are performed based on the generated reference timing. Has been made.
[0005]
Also, in this type of mobile phone, when the transmission distance of the pilot signal is changed by approaching or moving away from the base station in the transmission / reception mode for transmitting / receiving a predetermined signal, the cycle of the received pilot signal is shortened. (When approaching) or becomes longer (when moving away). As a result, there is a difference between the reference timing and the reception timing, making it difficult to perform the reception process according to the operation timing of the base station.
[0006]
For this reason, in this type of mobile phone, when the reference timing deviates from the reception timing, the reference timing is corrected so as to match the reception timing in accordance with the rules defined in the IS95 standard.
[0007]
Here, in practice, in a mobile phone, a reference timing is generated by a timing correction device provided inside, and the reference timing is corrected as necessary. As such a timing correction device, There is one configured as shown in FIG.
[0008]
That is, as shown in FIG. 6, in the timing correction apparatus 1, the pilot signal S <b> 1 received by a mobile phone (not shown) is given to the reception timing detection circuit 2.
[0009]
The reception timing detection circuit 2 detects the timing (namely, reception timing) at which a superframe signal corresponding to two periods (for example, a period of about 160 [msec]) is given based on the pilot signal S1, and the detected reception timing is detected. A reception timing signal S2 having a period of about 160 [msec] is generated and supplied to the comparison circuit 3.
[0010]
At this time, the reference timing generation circuit 4 sequentially repeats from “0” to a predetermined number by the internal counter based on the clock signal S3 having a predetermined frequency given from the clock generation circuit (VCXO) 5. A reference timing signal S4 representing a reference timing having a cycle of about 160 [msec] which is substantially the same as the cycle of the reception timing signal S2 is generated so as to be counted, and this is supplied to the comparison circuit 3.
[0011]
Thus, the comparison circuit 3 compares the reception timing signal S2 given from the reception timing detection circuit 2 with the reference timing signal S4 given from the reference timing generation circuit 4, and uses this comparison result as a comparison result signal S5 for timing correction control. This is given to the circuit 6.
[0012]
As shown in FIGS. 7A to 7C, the timing correction control circuit 6 determines the reference timing signal S4 based on the comparison result obtained based on the comparison result signal S5. _1N-1 , S4 _1N , S4 _{1N + 1} (FIG. 7A), the reception timing signal S2 _1N-1 , S2 _1N , S2 _{1N + 1} Is shifted from the logic “L” level to the logic “H” level by the time width of one bit of the spreading code (hereinafter referred to as one chip), and Reference timing signal S4 _1N-1 , S4 _1N , S4 _{1N + 1} The first correction control signal S6 designating to advance the phase of the reference timing signal is generated and applied to the reference timing generation circuit 4 only once while one period of the reference timing signal S4 is counted.
[0013]
In contrast, the timing correction control circuit 6 uses the reference timing signal S4 based on the comparison result obtained based on the comparison result signal S5. _1N-1 , S4 _1N , S4 _{1N + 1} (FIG. 7A), the reception timing signal S2 _1N-1 , S2 _1N , S2 _{1N + 1} Is shifted from the logic “L” level to the logic “H” level by a time width of one chip, and the reference timing signal S4. _1N-1 , S4 _1N , S4 _{1N + 1} The second correction control signal S7 that specifies that the phase of the reference timing signal is delayed is generated and applied to the reference timing generation circuit 4 only once while one period of the reference timing signal S4 is counted.
[0014]
In this case, as shown in FIGS. 8A to 8F, the reference timing generating circuit 4 uses the internal counter to generate the reference timing based on the clock signal S3 (FIG. 8A) provided from the clock generating circuit 5. While counting to generate the signal S4, for example, "0" to "3", which is a digit lower than the digit of the count, is a period having a time width of one chip (hereinafter referred to as a chip period). Are sequentially counted repeatedly (FIG. 8B).
[0015]
When the reference timing signal S2 is shifted so that the reception timing signal S2 advances with respect to the reference timing signal S4, the reference timing generation circuit 4 receives the first correction control signal S6 (FIG. 8C) provided from the timing correction control circuit 6. ), In a one-cycle period in which the first correction control signal S6 rises from the logic “L” level to the logic “H” level, “0” is set so that the lower digit is skipped by, for example, “2”. “1” and “3” are counted (FIG. 8D), and thus the timing of the reference timing signal S4 for one cycle is corrected to advance by one count at the lower digit level.
[0016]
On the other hand, the reference timing generation circuit 4 receives the second correction control signal S7 (FIG. 8 (FIG. 8)) provided from the timing correction control circuit 6 when the reception timing signal S2 is deviated from the reference timing signal S4. E)), the counter counts, for example, “2” twice for the lower digit by one counter in one chip period when the second correction control signal S7 rises from the logic “L” level to the logic “H” level. Are counted as “0”, “1”, “2”, “2”, “3” (FIG. 8F), and thus the timing of the reference timing signal S4 for one cycle is 1 at the lower digit level. Correct to delay by the count.
[0017]
In this way, the reference timing generating circuit 4 detects the difference in the timing of the reference timing signal S4 with respect to the reception timing signal S2 in the comparison circuit 3, and sets the timing of the reference timing signal S4 for one cycle to 4 in one chip. Correction is performed by advancing or delaying one phase.
[0018]
[Problems to be solved by the invention]
By the way, in the timing correction apparatus 1 having such a configuration, when the shift in the timing of the reference timing signal S4 is significantly corrected in a short time in the transmission / reception mode of the mobile phone, the reception side of the signal transmitted from the mobile phone Since the operation timing following this correction cannot be corrected and it is difficult to perform the reception process correctly, for example, 1 [μsec] with respect to the reference timing signal S4 corresponding to 80 [msec] in accordance with the provision of timing correction according to the IS95 standard. The timing of the reference timing signal S4 is corrected little by little so that the timing is corrected in the following range.
[0019]
However, the timing correction rule according to the IS95 standard is applied only in the transmission / reception mode. In the reception mode in which only a predetermined signal is received, the timing of the reference timing signal S4 is greatly corrected in a short time. However, there is no specific rule because it does not affect the outside of the mobile phone.
[0020]
However, in the timing correction apparatus 1, the timing of the reference timing signal S4 is corrected in accordance with the timing correction regulations according to the IS95 standard even in the reception mode. For this reason, in this reception mode, the mobile phone suddenly contacts the base station. If the timing of the reference timing signal S4 with respect to the reception timing signal S2 is greatly shifted due to approaching or suddenly moving away, a relatively long time is required to correct this timing. There was a problem that it was difficult to correctly receive and process the transmitted signal.
[0021]
The present invention has been made in consideration of the above points, and an object of the present invention is to propose a timing correction apparatus and a timing correction method capable of stably performing signal reception processing when a communication terminal apparatus is in a reception mode.
[0022]
[Means for Solving the Problems]
In order to solve such a problem, in the present invention, in a timing correction device provided in a communication terminal device having a transmitter and a receiver, the reception timing of a received signal having a predetermined period received by the receiver is detected. The reception timing detecting means, the reference timing generating means for generating a reference timing having substantially the same period as the period of the reception timing signal for operating the communication terminal apparatus based on the reception timing, and the reception timing and the reference timing are compared. A comparison means, a timing correction means for correcting a deviation of the reference timing with respect to the reception timing based on a comparison result obtained from the comparison means, and a communication terminal device of at least two types of correction speeds Communication mode consisting of transmission / reception mode and reception mode Control means for controlling the timing correction means is provided so as to correct the deviation of the reference timing with respect to the reception timing at a correction speed according to the state.
[0023]
As a result, when the communication terminal apparatus is in the reception mode, the deviation of the reference timing relative to the reception timing can be corrected at a higher speed than in the transmission / reception mode of the communication terminal apparatus, and the occurrence of errors in reception processing can be greatly reduced.
[0024]
According to the present invention, in a timing correction method for correcting a reference timing for operating a communication terminal apparatus having a transmitter and a receiver, the reception timing of a received signal having a predetermined period received by the receiver is set. A first step of detecting and generating a reference timing having substantially the same period as the period of the reception timing based on the detection result is compared with the reception timing and the reference timing, and at least 2 based on the comparison result Of the types of correction speeds, the communication terminal device Communication mode consisting of transmission / reception mode and reception mode A second step for correcting a deviation of the reference timing with respect to the reception timing at a correction speed according to the state is provided.
[0025]
As a result, the reference timing with respect to the reception timing when the communication terminal apparatus is in the reception mode. Of The error can be greatly reduced by correcting the shift at a higher speed than in the transmission / reception mode of the communication terminal device.
[0026]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.
[0027]
(1) Configuration of timing correction apparatus according to this embodiment
In FIG. 1, in which parts corresponding to those in FIG. 6 are assigned the same reference numerals, 10 denotes a timing correction apparatus according to the present invention as a whole, and a pilot signal S1 received by a portable telephone (not shown) is received. It is given to the timing detection circuit 2.
[0028]
The reception timing detection circuit 2 detects the timing (namely, reception timing) at which two periods of superframe signals are given based on the pilot signal S1, and has a period of about 160 [msec] representing the detected reception timing. A reception timing signal S2 is generated and given to the comparison circuit 3.
[0029]
At this time, the reference timing generation circuit 4 sequentially counts from “0” to a predetermined number by an internal counter based on the clock signal S3 having a predetermined frequency given from the clock generation circuit 5. Thus, a reference timing signal S4 representing a reference timing having a cycle of about 160 [msec], which is substantially the same as the cycle of the reception timing signal S2, is generated and supplied to the comparison circuit 3.
[0030]
The comparison circuit 3 compares the reception timing signal S2 provided from the reception timing detection circuit 2 with the reference timing signal S4 provided from the reference timing generation circuit 4, and uses the comparison result as a comparison result signal S5 as a timing correction control circuit 6. To give.
[0031]
When the reception timing signal S2 is shifted from the reference timing signal S4 based on the comparison result signal S5, the timing correction control circuit 6 shifts from the logic “L” level to the logic “H” level for one chip period. When the first correction control signal S6 is generated to specify that the phase of the reference timing signal S4 is advanced and the phase of the reference timing signal S4 is advanced, and when the reception timing signal S2 is shifted from the reference timing signal S4 so as to be delayed, A second correction control signal S7 is generated that rises from the logic “L” level to the logic “H” level for the period and designates the phase of the reference timing signal S4 to be delayed.
[0032]
At this time, the timing correction control circuit 6 receives from the correction speed control circuit 11 the first correction while the reference timing generation circuit 4 counts one cycle of the reference timing signal S4 if the mobile phone is in the transmission / reception mode. A first correction timing having a cycle substantially the same as the cycle of the reference timing signal S4 is given as the first correction timing signal S10 so that the control signal S6 or the second correction control signal S7 is output only once.
[0033]
On the other hand, the timing correction control circuit 6 determines that the correction speed control circuit 11 outputs the first while the reference timing generation circuit 4 counts one cycle of the reference timing signal S4 if the mobile phone is in the reception mode. So that the second correction control signal S6 or the second correction control signal S7 is output twice, the second correction timing that is approximately one-half of the period of the reference timing signal S4 is the second correction timing signal S11. Given.
[0034]
Thus, the timing correction control circuit 6 generates the first correction control signal S6 or the second correction control signal S7 at the first correction timing obtained based on the first correction timing signal S10 in the transmission / reception mode. In contrast to this, in the reception mode, the first correction control signal S6 or the second correction control signal S7 is used as the reference timing at the second correction timing obtained based on the second correction timing signal S11. This is applied to the generation circuit 4.
[0035]
In this case, the reference timing generation circuit 4 counts to generate a reference timing signal S4 by an internal counter based on the clock signal S3 provided from the clock generation circuit 5, and sets a digit lower than the digit of this count. For example, “0” to “3” are sequentially repeated in a chip cycle and counted.
[0036]
The reference timing generation circuit 4 performs the first correction given from the timing correction control circuit 6 at the first correction timing when the reception timing signal S2 is shifted from the reference timing signal S4 in the transmission / reception mode. Based on the control signal S6, in a one-cycle period when the first correction control signal S6 rises from the logic “L” level to the logic “H” level, “0” is set so that the lower digit is skipped by, for example, “2”. ”,“ 1 ”, and“ 3 ”, and thus the timing of the reference timing signal S4 for one cycle is corrected so as to advance by one count at the level of the lower digit.
[0037]
On the other hand, the reference timing generation circuit 4 receives the second correction timing given from the timing correction control circuit 6 at the first correction timing when the reception timing signal S2 deviates from the reference timing signal S4 in the transmission / reception mode. On the basis of the correction control signal S7, the counter counts, for example, "2" twice by the counter in one chip period when the second correction control signal S7 rises from the logic "L" level to the logic "H" level. In this way, “0”, “1”, “2”, “2”, “3” are counted, and thus the timing of the reference timing signal S4 for one cycle is delayed by one count at the lower digit level. to correct.
[0038]
Further, the reference timing generation circuit 4 performs the first correction given from the timing correction control circuit 6 at the second correction timing when the reception timing signal S2 is shifted from the reference timing signal S4 in the reception mode. Based on the control signal S6, in a one-cycle period when the first correction control signal S6 rises from the logic “L” level to the logic “H” level, “0” is set so that the lower digit is skipped by, for example, “2”. ”,“ 1 ”, and“ 3 ”, and thus, the timing of the reference timing signal S4 for one cycle is corrected so as to be advanced by 2 counts at the lower digit level.
[0039]
On the other hand, when the reception timing signal S2 is shifted so as to be delayed with respect to the reference timing signal S4 in the reception mode, the reference timing generation circuit 4 receives the second correction timing given from the timing correction control circuit 6 at the second correction timing. On the basis of the correction control signal S7, the counter counts, for example, "2" twice by the counter in one chip period when the second correction control signal S7 rises from the logic "L" level to the logic "H" level. Thus, it is counted as “0”, “1”, “2”, “2”, “3”, and thus the timing of the reference timing signal S4 for one cycle is corrected to be delayed by 2 counts at the lower digit level. To do.
[0040]
In this manner, when the comparator 3 detects a shift in the timing of the reference timing signal S4 with respect to the reception timing signal S2, the reference timing generation circuit 4 sets the timing of the reference timing signal S4 for one cycle once in the transmission / reception mode. The correction is made by advancing or delaying one phase by a quarter of one chip, and the timing of the reference timing signal S4 for one cycle is advanced or delayed by one quarter of a chip twice in the reception mode. It is made to do.
[0041]
(2) Timing correction processing of reference timing signal
Here, in practice, in the timing correction device 10, the reference timing generation circuit 4 is configured so that the reference timing signal S4 is in the transmission / reception mode as shown in FIGS. _N2-1 , S4 _N2 , S4 _{N2 + 1} The reception timing signal S2 with respect to (FIG. 2B) _N2-1 , S2 _N2 , S2 _{N2 + 1} (FIG. 2C) gives a first correction control signal S6 (FIG. 2D) from the timing correction control circuit 6 at the first correction timing (FIG. 2A) when the deviation is made. It is done.
[0042]
The reference timing generation circuit 4 generates a reference timing signal S4 for one cycle based on the first correction control signal S6 given at the first correction timing. _N2-1 , S4 _N2 , S4 _{N2 + 1} The timing of the reference timing signal S4 is corrected so as to match the timing of the reception timing signal S2 in accordance with the stipulation by the IS95 standard of the CDMA system.
[0043]
On the other hand, as shown in FIGS. 3A to 3D, the reference timing generation circuit 4 has a reference timing signal S4 in the transmission / reception mode. _N3-1 , S4 _N3 , S4 _{N3 + 1} (FIG. 3 (B)) with respect to the reception timing signal S2 _N3-1 , S2 _N3 , S2 _{N3 + 1} When (FIG. 3 (C)) is shifted so as to be delayed, the second correction control signal S7 (FIG. 3 (D)) is given from the timing correction control circuit 6 at the first correction timing (FIG. 3 (A)). It is done.
[0044]
The reference timing generation circuit 4 generates a reference timing signal S4 for one cycle based on the second correction control signal S7 given at the first correction timing. _N3-1 , S4 _N3 , S4 _{N3 + 1} The timing of the reference timing signal S4 is corrected so as to match the timing of the reception timing signal S2 in accordance with the CDMA IS95 standard.
[0045]
Further, as shown in FIGS. 4A to 4D, the reference timing generation circuit 4 is configured to generate a reference timing signal S4 in the reception mode. _N4-1 , S4 _N4 (FIG. 4B) with respect to the reception timing signal S2. _N4-1 , S2 _N4 In the case where the shift is made so that (FIG. 4C) advances, the reference timing signal S4 for one cycle is sent from the timing correction control circuit 6 at the second correction timing (FIG. 4A). _N4-1 , S4 _N4 The first correction control signal S6 (FIG. 4D) is given twice.
[0046]
The reference timing generation circuit 4 generates a reference timing signal S4 for one cycle based on the first correction control signal S6 given at the second correction timing. _N4-1 , S4 _N4 Is corrected so that the timing of the reference timing signal S4 matches the timing of the reception timing signal S2 at twice the speed in the transmission / reception mode.
[0047]
On the other hand, as shown in FIGS. 5A to 5D, the reference timing generation circuit 4 operates in the reception mode in the reference timing signal S4. _N5-1 , S4 _N5 (FIG. 5B) with respect to the reception timing signal S2. _N5-1 , S2 _N5 In the case where the shift is made so that (FIG. 5C) advances, the reference timing signal S4 for one cycle is sent from the timing correction control circuit 6 at the second correction timing (FIG. 5A). _N5-1 , S4 _N5 The second correction control signal S7 (FIG. 5D) is given twice.
[0048]
The reference timing generation circuit 4 generates a reference timing signal S4 for one cycle based on the second correction control signal S7 given at the second correction timing. _N5-1 , S4 _N5 Is corrected so that the timing of the reference timing signal S4 matches the timing of the reception timing signal S2 at twice the speed in the transmission / reception mode.
[0049]
In this manner, the reference timing generation circuit 4 can correct the timing shift of the reference timing signal S4 with respect to the reception timing signal S2 in accordance with the regulations of the IS95 standard in the transmission / reception mode.
[0050]
Further, the reference timing generation circuit 4 sequentially advances or delays one phase of the reference timing signal S4 for one cycle twice or one time in the reception mode in which the correction content is not defined by the IS95 standard. The shift of the timing of the reference timing signal S4 with respect to the reception timing signal S2 can be corrected faster than in the transmission / reception mode.
[0051]
(3) Operation and effect of the present embodiment
In the above configuration, in the timing correction apparatus 10, in the transmission / reception mode, when the timing of the reference timing signal S4 is deviated from the reception timing signal S2, the reference timing for one cycle is defined in accordance with the CDMA IS95 standard. The timing of the reference timing signal S4 is corrected by advancing or delaying the signal S4 by one quarter of a phase.
[0052]
Further, in the timing correction device 10, in the reception mode, when the timing of the reference timing signal S4 is deviated from the reception timing signal S2, the regulation for phase correction based on the IS95 standard of the CDMA system is not defined in the reception mode. For this reason, the timing of the reference timing signal S4 is corrected so that the reference timing signal S4 for one cycle is advanced or delayed by one quarter of a phase twice.
[0053]
In this case, in the timing correction device 10, the number of corrections of the timing of the reference timing signal S 4 for one cycle is increased in the reception mode as compared with that in the transmission / reception mode. The deviation can be corrected in a short time.
[0054]
Therefore, in this timing correction apparatus 10, when the mobile phone performs intermittent reception in which the reception pause period and the relatively short reception period are alternately repeated, the mobile phone suddenly makes contact with the base station. Even if a relatively large deviation occurs in the timing of the reference timing signal S4 due to approaching or suddenly moving away, the timing deviation of the reference timing signal S4 relative to the reception timing signal S2 is corrected at a relatively high speed in each reception period. Thus, even in such intermittent reception, the occurrence of errors in reception processing in the mobile phone can be greatly reduced.
[0055]
In this timing correction device 10, the correction speed control circuit 11 controls the output speed of the first correction control signal S 6 or the second correction control signal S 7 output from the timing correction control circuit 6. While all the circuits except the control circuit 11 operate in substantially the same manner as in the case of the conventional timing correction apparatus 1 (FIG. 6), correction processing corresponding to each of the transmission / reception mode and the reception mode can be performed. It is possible to prevent the need for complicated correction processing for performing high-speed correction processing.
[0056]
Further, the timing correction device 10 has a simple circuit configuration in which the correction speed control circuit 11 is added to the circuit configuration of the conventional timing correction device 1 (FIG. 6), and the timing deviation of the reference timing signal S4 in the reception mode. Therefore, for example, a clock generation circuit for generating a relatively high-accuracy clock signal S3 is provided in order to prevent the timing deviation of the reference timing signal S4 from occurring. Thus, it is possible to prevent the entire apparatus from becoming expensive.
[0057]
According to the above configuration, in the transmission / reception mode, the reference timing signal S4 for one cycle is advanced or delayed by one quarter of the phase by one cycle according to the CDMA IS95 standard. The timing deviation of S4 is corrected, and in the reception mode, the timing deviation of the reference timing signal S4 is corrected so that the reference timing signal S4 for one cycle is advanced or delayed by one quarter of the phase twice. As a result, the timing shift of the reference timing signal S4 with respect to the reception timing signal S2 in the reception mode can be corrected at a higher speed than in the transmission / reception mode, and the occurrence of errors in reception processing can be greatly reduced. Timing correction device capable of stably performing signal reception processing in telephone reception mode It is possible to realize a fine timing correction method.
[0058]
(4) Other embodiments
In the above-described embodiment, the case where the present invention is applied to the timing correction device 10 provided in the mobile phone has been described. However, the present invention is not limited thereto, and a predetermined transmission transmitted from the transmission side is described. Any other communication terminal device that generates a reference timing according to the reception timing of the signal and performs transmission processing and reception processing based on the reference timing is applied to other timing correction devices provided in various communication terminal devices. You may do it.
[0059]
In the above-described embodiment, in the reception mode, the correction speed control circuit 11 performs the first correction control signal S6 of the timing correction control circuit 6 so that the timing of the reference timing signal S4 for one cycle is corrected twice. Alternatively, the case where the output timing of the second correction control signal S7 is controlled has been described, but the present invention is not limited to this, and the timing of the reference timing signal S4 for one cycle is corrected twice in the reception mode. As described above, the output speed of the first correction control signal S6 or the second correction control signal S7 of the timing correction control circuit 6 may be controlled by the correction speed control circuit 11, so that in the reception mode, The timing of the timing signal S4 can be corrected at a higher speed.
[0060]
Further, in the above-described embodiment, in the reception mode, the correction speed control circuit 11 performs the first correction control signal S6 of the timing correction control circuit 6 so that the timing of the reference timing signal S4 for one cycle is corrected twice. Alternatively, the case where the output timing of the second correction control signal S7 is controlled has been described, but the present invention is not limited to this, and the reception timing obtained based on the comparison result obtained from the comparison circuit 3 in the reception mode. The first correction of the timing correction control circuit 6 is performed by the correction speed control circuit 11 so as to correct the timing of the reference timing signal S4 for one cycle at least once according to the amount of deviation of the timing of the reference timing signal S4 with respect to the signal S2. The output timing of the correction control signal S6 or the second correction control signal S7 may be controlled.
[0061]
Further, in the above-described embodiment, the reception timing detection circuit 2 detects the timing at which the superframe signal for two cycles is applied, and the reference timing generation circuit 4 has a cycle according to the superframe signal for two cycles. Although the case where the reference timing signal S4 is generated has been described, the present invention is not limited to this. The reception timing detection circuit 2 detects a superframe signal for a predetermined period, and the reference timing generation circuit 4 detects the predetermined period. Alternatively, a reference timing signal corresponding to the minute superframe signal may be generated.
[0062]
Further, in the above-described embodiment, the reference timing generation circuit 4, the clock is used as the reference timing generation means for generating the reference timing having substantially the same period as the reception timing period for operating the communication terminal device based on the reception timing. Although the case where the generation circuit 5 is applied has been described, the present invention is not limited to this, and a reference timing having substantially the same period as the reception timing period for operating the communication terminal apparatus is generated based on the reception timing. If possible, reference timing generation means having other various configurations may be applied.
[0063]
Further, in the above-described embodiment, the reference timing generation circuit 4, the clock generation circuit 5, and the timing correction control circuit 6 are used as timing correction means for correcting the deviation of the reference timing with respect to the reception timing based on the comparison result obtained from the comparison means. However, the present invention is not limited to this, and various other configurations can be used as long as the deviation of the reference timing from the reception timing can be corrected based on the comparison result obtained from the comparison means. The timing correction means may be applied.
[0064]
Further, in the above-described embodiment, the control means for controlling the timing correction means so as to correct the deviation of the reference timing with respect to the reception timing at a correction speed according to the communication state of the communication terminal device among at least two types of correction speeds. As described above, the case where the correction speed control circuit 11 is applied has been described. However, the present invention is not limited to this, and the reception timing is set at a correction speed corresponding to the communication state of the communication terminal device among at least two correction speeds. As long as the timing correction unit can be controlled so as to correct the deviation of the reference timing with respect to the above, other control units having various configurations may be applied.
[0065]
Further, in the above-described embodiment, the timing correction control circuit 6 is applied as a correction signal output unit that outputs a correction signal for correcting a deviation of the reference timing with respect to the reception timing based on the comparison result. As described above, the present invention is not limited to this. As long as the correction signal for correcting the deviation of the reference timing with respect to the reception timing can be output based on the comparison result, correction signal output means having various other configurations can be provided. You may make it apply.
[0066]
Further, in the above-described embodiment, the case where the reference timing generation circuit 4 and the clock generation circuit 5 are applied as correction means for correcting the deviation of the reference timing with respect to the reception timing based on the correction signal has been described. The present invention is not limited to this, and correction means having other various configurations may be applied as long as the deviation of the reference timing with respect to the reception timing can be corrected based on the correction signal.
[0067]
【The invention's effect】
As described above, according to the present invention, in the timing correction device provided in the communication terminal device having the transmitter and the receiver, the reception for detecting the reception timing of the received signal having the predetermined period received by the receiver. A timing detection means, a reference timing generation means for generating a reference timing having substantially the same period as the period of the reception timing signal for operating the communication terminal device based on the reception timing, and a comparison for comparing the reception timing and the reference timing Means, a timing correction means for correcting a deviation of the reference timing with respect to the reception timing based on the comparison result obtained from the comparison means, and a communication terminal device of at least two types of correction speeds Communication mode consisting of transmission / reception mode and reception mode By providing a control means for controlling the timing correction means so as to correct the deviation of the reference timing with respect to the reception timing at a correction speed according to the state, the reference timing for the reception timing in the reception mode of the communication terminal device is provided. Of The deviation can be corrected at a higher speed than in the transmission / reception mode of the communication terminal apparatus, and the occurrence of errors in the reception process can be greatly reduced, and thus the signal reception process can be stably performed in the reception mode of the communication terminal apparatus. An obtained timing correction device can be realized.
[0068]
Further, in a timing correction method for correcting a reference timing for operating a communication terminal apparatus having a transmitter and a receiver, the reception timing of a received signal having a predetermined period received by the receiver is detected, and Based on the detection result, the first step for generating the reference timing having substantially the same period as the reception timing is compared with the reception timing and the reference timing. Based on the comparison result, at least two types of correction speeds are compared. Of which, communication terminal devices Communication mode consisting of transmission / reception mode and reception mode By providing a second step of correcting a deviation of the reference timing with respect to the reception timing at a correction speed according to the state, a reference timing for the reception timing in the reception mode of the communication terminal apparatus Of The deviation can be corrected at a higher speed than in the transmission / reception mode of the communication terminal apparatus, and the occurrence of errors in the reception process can be greatly reduced, and thus the signal reception process can be stably performed in the reception mode of the communication terminal apparatus. The obtained timing correction method can be realized.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a timing correction apparatus according to the present embodiment.
FIG. 2 is a timing chart for explaining timing correction of a reference timing signal in a transmission / reception mode.
FIG. 3 is a timing chart for explaining timing correction of a reference timing signal in a transmission / reception mode.
FIG. 4 is a timing chart for explaining timing correction of a reference timing signal in the reception mode.
FIG. 5 is a timing chart for explaining timing correction of a reference timing signal in the reception mode.
FIG. 6 is a block diagram showing a configuration of a conventional timing correction device.
FIG. 7 is a timing chart used to explain a difference between a reference timing signal and a reception timing signal.
FIG. 8 is a timing chart for explaining timing correction of a reference timing signal.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... Timing correction device, 2 ... Reception timing detection circuit, 3 ... Comparison circuit, 4 ... Reference timing generation circuit, 5 ... Clock generation circuit, 6 ... Timing correction control circuit, 11 ... Correction speed control Circuit, S1 ... Pilot signal, S2 ... Reception timing signal, S3 ... Clock signal, S4 ... Reference timing signal, S5 ... Comparison result signal, S6 ... First correction control signal, S7 ... Second Correction control signal, S10... First correction timing signal, S11... Second correction timing signal.

Claims (7)

In a timing correction device provided in a communication terminal device having a transmitter and a receiver,
A reception timing detection means for detecting a reception timing of a reception signal having a predetermined period received by the receiver;
Reference timing generation means for generating a reference timing having substantially the same period as the period of the reception timing signal for operating the communication terminal device based on the reception timing;
A comparison means for comparing the reception timing with the reference timing;
Timing correction means for correcting a deviation of the reference timing with respect to the reception timing based on a comparison result obtained from the comparison means;
Of the at least two types of correction speeds, the timing correction means corrects the deviation of the reference timing with respect to the reception timing at the correction speed according to the state of the communication mode consisting of the transmission / reception mode and the reception mode of the communication terminal apparatus. A timing correction apparatus comprising: control means for controlling The control means includes
The reception mode of the communication terminal device, among the above correction speed, controls the timing correction means to correct the deviation of the reference timing for the reception timing at a predetermined first correction speed, the communication the reception mode of the terminal device, and the control means controls the timing correction means to correct the deviation of the reference timing for the reception timing in the first predetermined faster than the correction rate second correction speed The timing correction device according to claim 1. The control means includes
When the communication terminal device is in the reception mode, one of the correction speeds is selected based on the comparison result obtained from the comparison means, and the reference timing is deviated from the reception timing at the selected correction speed. The timing correction device according to claim 1, wherein the timing correction unit is controlled to correct the timing. The timing correction means is
Correction signal output means for outputting a correction signal for correcting a shift of the reference timing with respect to the reception timing based on the comparison result;
Correction means for correcting a deviation of the reference timing with respect to the reception timing based on the correction signal,
The control means includes
In the transmission / reception mode of the communication terminal device, the correction signal is output at a timing corresponding to the first correction speed, and the correction signal is output at a timing corresponding to the second correction speed in the reception mode. The timing correction apparatus according to claim 2, wherein the correction signal output means is controlled to cause the correction signal output means to control. In a timing correction method for correcting a reference timing for operating a communication terminal apparatus having a transmitter and a receiver,
A first timing for detecting a reception timing of a reception signal having a predetermined period received by the receiver and generating a reference timing having a period substantially the same as the period of the reception timing based on the detection result. And the steps
And comparing the reception timing and the reference timing, based on the comparison result, the at least two kinds of correction velocity, the correction corresponding to the state of the receive mode and receive mode Tona Ru communication mode of the communication terminal device And a second step of correcting a deviation of the reference timing with respect to the reception timing at a speed. In the second step,
The reception mode of the communication terminal device, among the above correction speed, a predetermined first correction speed while correcting the deviation of the reference timing with respect to the reception timing, the reception mode of the communication terminal device, the The timing correction method according to claim 5, wherein the deviation of the reference timing with respect to the reception timing is corrected at a predetermined second correction speed that is faster than the first correction speed. In the second step,
In the reception mode of the communication terminal device, one of the correction speeds is selected based on the comparison result, and the deviation of the reference timing from the reception timing is corrected at the selected correction speed. The timing correction method according to claim 5.

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