JP3992710B2 - Display device - Google Patents

Description

  The present invention relates to a thin film electron source, a manufacturing method thereof, and a thin film electron source application device, and more particularly to a technique effective when applied to a flat display device or an electron beam drawing apparatus.

As a flat display device, one using a thin film electron source has been proposed.
This thin film type electron source basically has a three-layer thin film structure of an upper electrode, an insulating layer, and a lower electrode. A voltage is applied between the upper electrode and the lower electrode, and electrons are transferred from the surface of the upper electrode to the vacuum. It is what is released.
For example, MIM (Metal-Insulator-Metal) type in which metal-insulator-metal is laminated, MIS (Metal-Insulator-Semiconductor) type in which metal-insulator and semiconductor electrode are laminated, metal-insulator-semiconductor laminated film -Stacks of metals or semiconductors are known.
The MIM type thin film electron source is disclosed in, for example, Patent Document 1 below.

FIG. 15 is a diagram for explaining the operating principle of the thin-film electron source.
When a driving voltage (Vd) is applied between the upper electrode 13 and the lower electrode 11 from the driving voltage source so that the electric field in the tunnel insulating layer 12 is about 1 to 10 MV / cm, the Fermi level in the lower electrode 11 is increased. The electrons in the vicinity pass through the barrier due to the tunnel phenomenon, and are injected into the conduction band of the tunnel insulating layer 12 and the upper electrode 13 to become hot electrons.
Among these hot electrons, those having energy equal to or higher than the work function (φ) of the upper electrode 13 are emitted into the vacuum 20.
Here, as shown in FIG. 16, a plurality of upper electrodes 13 and a plurality of lower electrodes 11 are provided, and the plurality of upper electrodes 13 and the plurality of lower electrodes 11 are orthogonally crossed to form a thin-film electron source in a matrix form. When formed in this manner, an electron beam can be generated from an arbitrary place, so that it can be used as an electron source for a display device or an electron beam drawing device.
Until now, electron emission has been observed from a MIM (Metal-Insulator-Metal) structure of a gold (Au) -aluminum oxide (Al ₂ O ₃ ) -aluminum (Al) structure.

FIG. 16 is a perspective view showing a schematic configuration of an example of a thin film electron source array in which thin film electron sources are arranged in a matrix.
A thin film type electron source array shown in FIG. 16 includes a striped lower electrode 11 extending in the X direction formed on a substrate 10 such as soda glass, a protective insulating layer 14 and a tunnel insulating layer formed on the lower electrode 11. 12, a striped upper electrode bus line (upper bus electrode of the present invention) 18 formed on the protective insulating layer 14 and the tunnel insulating layer 12 and extending in the Y direction, and an upper portion formed on the upper electrode bus line 18 And the electrode 13.
Here, the lower electrode 11 and the upper electrode bus line 18 are formed so as to be substantially orthogonal to each other, and the electron emission portion 1 is formed in a part of a region where the lower electrode 11 and the upper electrode bus line 18 overlap, The electron emission portion 1 is formed in a matrix.
In this electron emission portion 1, the upper electrode bus line 18 is removed, and the upper electrode 13 faces the lower electrode 11 through the tunnel insulating layer 12, that is, the electron emission portion is a thin film having an MIM type tunnel diode structure. Construct a type electron source.

As prior art documents related to the invention of the present application, there are the following.
JP-A-7-65710

As described above, the thin-film electron source emits hot electrons accelerated in the insulating layer (tunnel insulating layer 12) or the laminated film of the insulating layer and the semiconductor layer through the upper electrode 13 into the vacuum 20. It is something to be made.
Accordingly, the film film of the upper electrode 13 is formed very thin as about several nm in order to reduce the scattering of hot electrons.
In such a thin film type electron source, when the surface of the upper electrode 13 is contaminated with an organic substance or the like, hot electrons are scattered and the electron emission efficiency is lowered.
Incidentally, in the conventional thin film type electron source, when the upper electrode 13 is processed by the photo process, the surface of the upper electrode 13 is contaminated with the resist, and the electron emission efficiency is reduced by about one digit.
In order to recover the electron emission efficiency, a cleaning process by ashing is necessary.
However, this cleaning process requires the utmost care so as not to damage the tunnel insulating layer 12 of the thin film type electron source due to charge-up or the like, and has a problem that it easily affects the yield in manufacturing. .
The present invention has been made to solve the problems of the prior art, and an object of the present invention is to enable an upper electrode film to be processed without using a photo process in a thin film type electron source. An object of the present invention is to provide a technique capable of improving the yield without reducing the emission efficiency.
Another object of the present invention is to provide a technique capable of reducing manufacturing cost, improving luminance, and reducing power consumption in a display device.
Another object of the present invention is to provide a technique capable of drawing a two-dimensional drawing pattern having an arbitrary shape at high speed in an electron beam drawing apparatus.
The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.
That is, according to the present invention, a plurality of lower electrodes provided in a row (or column) direction, a first bus electrode, and the first bus electrode provided on each lower electrode in a column (or row) direction. A plurality of upper bus electrodes made of a laminated film with a thicker second bus electrode, a first insulating film provided on the second bus electrode of each upper bus electrode, and on each first insulating film A thin-film electron source having an upper electrode provided on the upper electrode and an electron emission portion provided at an intersection of each lower electrode and each upper bus electrode, wherein each first insulating film is formed on each upper A step portion extending outward from the side surfaces of the first and second bus electrodes of the bus electrode is provided, and each upper electrode is electrically connected to each upper bus electrode by the step portion of each first insulating film. It is characterized by being separated.
The present invention also provides a plurality of lower electrodes provided in a row (or column) direction, a first bus electrode provided on the lower electrode in a column (or row) direction, and the first bus electrode. A plurality of upper bus electrodes made of a laminated film with a thicker second bus electrode, a first insulating film provided on the second bus electrode of each upper bus electrode, and on each first insulating film A thin film type electron source having an upper electrode provided on each of the electrodes and an electron emission portion provided at an intersection of each lower electrode and each upper bus electrode, wherein each electron emission portion is provided in the first bus. A first opening provided in an electrode; a second opening provided in the first insulating film; having a larger area than the first opening; and provided in the second bus electrode; A third opening having a larger area than the two openings, and the upper electrode of each of the electron emission portions So as to cover the first opening, characterized in that provided on the first bus electrode.

The present invention also provides a plurality of lower electrodes provided in a row (or column) direction, a first bus electrode provided on the lower electrode in a column (or row) direction, and the first bus electrode. A plurality of upper bus electrodes made of a laminated film with a thicker second bus electrode, and provided on the second bus electrode of each upper bus electrode, outside the side surfaces of the first and second bus electrodes A first insulating film having an extended step portion, and an upper portion provided on each first insulating film and electrically separated for each upper bus electrode by the step portion of each first insulating film An electrode and an electron emission portion provided at an intersection of each lower electrode and each upper bus electrode, and each electron emission portion includes a first opening provided in the first bus electrode A second opening provided in the first insulating film and having a larger area than the first opening. A third opening having a larger area than the second opening, and the upper electrode of each electron emission portion covers the first opening. A method of manufacturing a thin film type electron source provided on the first bus electrode, the step of forming a first conductive film on each of the lower electrodes formed on a substrate, and the first conductive A step of forming a second conductive film on the film; and the second and the present invention include a first substrate having an electron source array, a frame member, and a second substrate having a phosphor pattern. A display device in which a space surrounded by the first substrate, the frame member, and the second substrate is in a vacuum atmosphere, wherein the electron source array of the first substrate is any one of the thin films It is characterized by comprising a type electron source.
According to another aspect of the present invention, there is provided an electron beam drawing apparatus comprising any one of the thin film electron sources and an electron lens system.

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.
(1) According to the thin film type electron source of the present invention, since the upper electrode film can be processed without using a photo process, the yield can be improved without reducing the electron emission efficiency.
(2) According to the display device of the present invention, it is possible to reduce manufacturing cost, improve luminance, and reduce power consumption.
(3) According to the electron beam drawing apparatus of the present invention, a two-dimensional drawing pattern having an arbitrary shape can be drawn at high speed.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.
[Embodiment 1]
FIG. 1 is a diagram showing a schematic configuration of a thin film type electron source matrix array according to Embodiment 1 of the present invention, where FIG. 1 (c) is a plan view and FIG. 1 (b) is a diagram B shown in FIG. 1 (c). The principal part sectional drawing which shows the cross-sectional structure along -B 'cutting line, (a) is principal part sectional drawing which shows the cross-sectional structure along the AA' cutting line shown in the figure (c).
As shown in the figure, the thin film type electron source matrix of the present embodiment includes an upper bus line 18, a thin bus electrode lower layer (first bus electrode of the present invention) 15, and a thick bus electrode upper layer (first of the present invention). 2 bus electrode) 16 and further, by forming an insulating film 17 on the bus electrode upper layer 16, an upper electrode film formed thereon is formed as an insulating film 17 and a bus electrode. It is cut by a step structure formed with the upper layer 16 and processed as the upper electrode 13.
Thus, in this embodiment, a photo process for processing the upper electrode and an ashing process for cleaning the upper electrode surface are not required, and a thin-film electron source with high electron emission efficiency is manufactured at a low cost and with a high yield. be able to.

Hereinafter, the manufacturing method of the thin film type electron source matrix array according to the first embodiment will be described with reference to FIGS.
2 to 5, FIG. 2C is a plan view, and FIG. 2B is a cross-sectional view of the main part showing a cross-sectional structure taken along the line BB ′ shown in FIG. (A) is principal part sectional drawing which shows the cross-sectional structure along the AA 'cutting line shown to the figure (c).

First, an insulating substrate 10 such as soda glass is prepared, and a metal film for a lower electrode is formed on the substrate 10.
As the material for the lower electrode, aluminum (Al; hereinafter simply referred to as Al) or aluminum alloy (hereinafter simply referred to as Al alloy) is used.
Here, an Al-neodymium (Nd; hereinafter simply referred to as Nd) alloy was used.
For forming the metal film, for example, a sputtering method was used, and the film thickness was set to 300 nm.
After forming the metal film, as shown in FIG. 2, a stripe-shaped lower electrode 11 is formed by etching.
Next, as shown in FIG. 3, a portion that becomes the electron emission portion 1 on the lower electrode 11 is masked with a resist film 19, and the electron emission portion 1 on the lower electrode 11 is formed using the lower electrode 11 as an anode in the chemical conversion solution. The protective insulating layer 14 is formed by selectively anodizing a portion other than the portion to be thick selectively.
At this time, if the formation voltage is 100 V, the protective insulating layer 14 having a thickness of about 136 nm is formed.
Next, after forming the protective insulating layer 14, the resist film 19 is removed, and anodization is performed again using the lower electrode 11 as an anode in the chemical conversion liquid. As shown in FIG. 4, tunnel insulation is formed on the lower electrode 11. Layer 12 is formed.
For example, when the formation voltage is 6 V, the tunnel insulating layer 12 having a thickness of about 10 nm is formed on the lower electrode 11.

Next, as shown in FIG. 5, a laminated film of the bus electrode lower layer 15 and the bus electrode upper layer 16 for the upper electrode bus line, which becomes a power supply line to the upper electrode 13, is formed by sputtering.
Here, for example, tungsten (W) is used as the material of the bus electrode lower layer 15, and, for example, an Al—Nd alloy is used as the material of the bus electrode upper layer 16.
Further, the thickness of the bus electrode lower layer 15 is reduced to several nanometers to several tens of nanometers so that the upper electrode 13 to be formed later is not disconnected at the level difference of the bus electrode lower layer 15, and the bus electrode upper layer 16 sufficiently supplies power. Therefore, it is formed as thick as several tens to several hundreds nm.
Thereafter, the surface of the bus electrode upper layer 16 is anodized to form an insulating film 17 on the bus electrode upper layer 16 as shown in FIG.
As a method for forming the insulating film 17, the insulating film 17 such as aluminum oxide (Al ₂ O ₃ ) may be formed by sputtering in succession to the previous sputtering formation of the bus electrode upper layer 16.
Next, the insulating film 17 and the bus electrode upper layer 16 are collectively etched.
In this etching, the insulating film 17 is etched at a low speed, the bus electrode upper layer 16 is etched at a high speed, and the bus electrode lower layer 15 is hardly etched, such as a wet etching method using a mixed solution of phosphoric acid, nitric acid, acetic acid and water. Can be used.
By this etching, as shown in FIG. 7, an insulating film 17 on the bus electrode upper layer 16 is formed in a bowl shape.

Next, the bus electrode lower layer 15 is processed by etching.
As shown in FIG. 8, this shape is on the inner side of the insulating film 17 on the bus electrode upper layer 16 in order to make electrical contact with the upper electrode 13 to be formed later on the tunnel insulating layer 12 side that becomes the electron emission portion. The bus electrodes are formed so as to extend and are processed so as to overlap the bus electrode upper layer 16 or to recede inward on the bus electrode outer side where insulation between the bus electrodes is necessary.
Further, after removing the resist after the main etching step, the exposed side surfaces of the bus electrode lower layer 15 and the bus electrode upper layer 16 are anodized using the resist as a mask to further improve the reliability of insulation between the bus electrodes. can do.
Finally, a metal film of the upper electrode 13 is formed by sputtering.
As the upper electrode 13, for example, a laminated film of iridium (Ir), platinum (Pt), and gold (Au) is used, and the film thickness is several nm (3 nm in this embodiment).
In this case, as shown in FIG. 1, the upper electrode 13 has electrical contact with the thin bus electrode lower layer 15 on the electron emission region side.

In other words, in the present embodiment, the electron emission portion is provided in the first opening portion provided in the bus electrode lower layer 15 and the second opening portion provided in the insulating film 17 and having a larger area than the first opening portion. , Provided on the bus electrode upper layer 16 and having a third opening having a larger area than the second opening, and the upper electrode 13 of the electron emission portion covers the first opening so as to cover the first opening. It is provided on the bus electrode lower layer 15.
On the other hand, between the bus electrodes, the very thin upper electrode 13 of several nm is disconnected at the stepped portion of the insulating film 17 on the upper layer of the bus electrode and is automatically processed as the upper electrode 13.
Therefore, in the present embodiment, a photo process for processing the upper electrode 13 is not required, and the contamination by the resist is eliminated.
Thereby, in the thin film type electron source of the present embodiment, the number of masks can be reduced and the ashing process can be eliminated.
In the present embodiment, a MIS (Metal-Insulator-Semiconductor) type or the like has not been specifically described, but the principle of the present invention can be applied as long as the thin upper electrode 13 of several nm to several tens nm is used. Is obvious.

[Embodiment 2]
FIG. 9 is a diagram showing a schematic configuration of the thin film type electron source array substrate of the display device according to the second embodiment of the present invention.
FIG. 9A is a plan view of the thin film electron source array substrate of the present embodiment, and FIG. 9B is a cross-sectional structure taken along line AA ′ shown in FIG. FIG. 6C is a main part sectional view showing a sectional structure along the line BB ′ shown in FIG.
The thin film electron source array substrate of the present embodiment is configured by forming thin film electron sources in a matrix on the substrate 10 in accordance with the procedure described above.
FIG. 9 shows a (3 × 3) dot thin film electron source matrix composed of three lower electrodes 11 and three upper bus lines 18, but actually corresponds to the number of display dots. The thin film type electron source matrix of the same number is formed.
Actually, the upper electrode film covers the entire surface, but in FIG. 9, only the portion functioning as the upper electrode 13 is displayed for the sake of simplicity.
Further, in the present invention, the upper bus line 18 has a laminated structure of the bus electrode lower layer 15, the bus electrode upper layer 16 and the insulating film 17, but is illustrated collectively as the upper bus line 18.

FIG. 10 is a diagram showing a schematic configuration of the fluorescent display plate of the display device according to the embodiment of the present invention.
FIG. 10A is a plan view of the fluorescent display panel of the present embodiment, and FIG. 10B is a cross-sectional structure taken along line AA ′ shown in FIG. (c) is principal part sectional drawing which shows the cross-section along the BB 'line shown to the figure (a).
The fluorescent display panel of this embodiment includes a black matrix 120 formed on a substrate 110 such as soda glass, and red (R), green (G), and blue (B) formed in a groove of the black matrix 120. Phosphors (111 to 113) and a metal back film 114 formed thereon.
Hereinafter, a method for producing the fluorescent display panel of the present embodiment will be described.
First, the black matrix 120 is formed on the substrate 110 for the purpose of increasing the contrast of the display device.
The black matrix 120 is formed by applying a mixed solution of polyvinyl alcohol (PVA; hereinafter, simply referred to as PVA) and ammonium dichromate to the substrate 110 and irradiating ultraviolet light on portions other than the portion where the black matrix 120 is to be formed. After exposure, the unexposed portion is removed, a solution in which graphite powder is dissolved is applied thereto, and the PVA is lifted off.
Next, the red phosphor 111 is formed by the following method.
After an aqueous solution in which PVA and ammonium dichromate are mixed with red phosphor particles is applied onto the substrate 110, the phosphor-forming portion is exposed to ultraviolet rays to be exposed, and then the unexposed portion is removed with running water. .
In this way, the red phosphor 111 is patterned.
The phosphor pattern is a stripe pattern shown in FIG. 10, but this stripe pattern is only an example. In addition to this, depending on the design of the display, for example, one pixel is formed by four adjacent dots. Of course, the configured “RGBG” pattern is also acceptable.
A green phosphor 112 and a blue phosphor 113 are formed by the same method.
Here, as the phosphor, for example, the red phosphor 111 is Y ₂ O ₂ S: Eu (P22-R), the green phosphor 112 is ZnS: Cu, Al (P22-G), and the blue phosphor 113 is ZnS: Ag (P22-B) may be used.
Next, after filming with a film such as nitrocellulose, aluminum (Al) is vapor-deposited to a thickness of about 75 nm on the entire substrate 110 to form a metal back film 114.
This metal back film 114 serves as an acceleration electrode.
Thereafter, the substrate 110 is heated to about 400 ° C. in the atmosphere to thermally decompose organic substances such as a filming film and PVA.
In this way, the fluorescent display panel is completed.

FIG. 11 is a cross-sectional view showing a schematic overall configuration of a display device according to Embodiment 2 of the present invention.
9A is a cross-sectional structure taken along the line CC ′ shown in FIG. 9A, and FIG. 5B is taken along the line AA ′ shown in FIG. 9A. It is principal part sectional drawing which shows a cross-section.
As shown in FIG. 11, the thin film electron source array substrate, the fluorescent display plate, and the frame member 116 manufactured by the above procedure are assembled through the spacers 30, and the frame member 116 is then used using the frit glass 115. Seal.
The height of the spacer 30 is set so that the distance between the thin film type electron source array substrate and the fluorescent display plate is about 1 to 3 mm.
In FIG. 11, the support column of the spacer 30 is provided for each dot emitting light in red (R), green (G), and blue (B), that is, every three rows of the lower electrode. The number (density) of the support columns may be reduced.
Here, the spacer 30 is formed by processing a hole having a desired shape on an insulating plate such as glass or ceramic having a thickness of about 1 to 3 mm, for example, by a sandblast method.
Alternatively, plate-like or columnar glass (or ceramic) columns may be arranged side by side to form the spacer 30.

The sealed panel is evacuated to a vacuum of about 10 ⁻⁷ Torr and sealed.
After sealing, the getter is activated and a vacuum is maintained in the display device.
For example, in the case of a getter material mainly composed of barium (Ba), a getter film can be formed by high frequency induction heating.
In this way, the display device of this embodiment is completed.
In the display device of the present embodiment, the distance between the thin film type electron source array substrate and the fluorescent display plate is as long as about 1 to 3 mm, so that the acceleration voltage applied to the metal back film 114 is as high as 3 to 6 KV. Can be.
Therefore, as described above, a phosphor for a cathode ray tube (CRT) can be used as the phosphor.
In this embodiment, the thin film electron source matrix structure of Embodiment 1 is used, so that the number of masks is small, an ashing process is not required, and the electron emission efficiency is high. Therefore, low cost, high luminance, and low power consumption are achieved. A display device can be provided.

FIG. 12 is a schematic diagram illustrating a state where a driving circuit is connected to the display device of the present embodiment.
The lower electrode 11 is driven by the lower electrode drive circuit 40, and the upper electrode bus line 18 is driven by the upper electrode drive circuit 50.
An acceleration voltage of about 3 to 6 KV is constantly applied to the metal back film 114 from the acceleration voltage source 60.
FIG. 13 is a timing chart showing an example of the waveform of the drive voltage output from each drive circuit shown in FIG.
Here, the mth lower electrode 11 is represented by Km, the nth upper electrode bus line 18 is represented by Cn, and the intersection of the mth lower electrode 11 and the nth upper electrode bus line 18 is represented by (m, n). I will decide.
At time t0, since no driving voltage is applied to any electrode, no electrons are emitted, and the phosphor does not emit light.
At time t1, a drive voltage (−V1) from the lower electrode drive circuit 40 is applied to the lower electrode 11 of K1, and a drive (+ V2) is applied from the upper electrode drive circuit 50 to the upper electrode bus line 18 of (C1, C2). Apply voltage.
Since a voltage of (V1 + V2) is applied between the lower electrode 11 and the upper electrode 13 at the intersections (1, 1) and (1, 2), the voltage of (V1 + V2) is set to be equal to or higher than the electron emission start voltage. If so, electrons are emitted from the thin-film electron source at these two intersections into the vacuum.
The emitted electrons are accelerated by the acceleration voltage from the acceleration voltage source 60 applied to the metal back film 114, and then enter the phosphors (111 to 113) to emit light.
At time t2, a drive voltage (−V1) from the lower electrode drive circuit 40 is applied to the lower electrode 11 of K2, and a drive voltage (+ V2) from the upper electrode drive circuit 50 is applied to the upper electrode bus line 18 of C1. When applied, the intersection (2, 1) is similarly turned on.
In this manner, a desired image or information can be displayed by changing a signal applied to the upper electrode bus line 18.
Further, an image with gradation can be displayed by appropriately changing the magnitude of the drive voltage (+ V2) applied to the upper electrode bus line 18.
The inversion voltage for releasing the charge accumulated in the tunnel insulating layer 12 is applied here after applying the drive voltage of (−V1) from the lower electrode drive circuit 40 to all of the lower electrodes 11. The driving voltage of (+ V3) was applied to all the lower electrodes 11 from the lower electrode driving circuit 40, and the driving voltage of (−V3 ′) was applied to all the upper electrode bus lines 15 from the upper electrode driving circuit 50.
In this case, the voltage of (V3 + V3 ′) is set to be approximately the same as the voltage of (V1 + V2).

[Embodiment 3]
FIG. 14 is a diagram showing a schematic configuration of an electron beam lithography apparatus according to Embodiment 3 of the present invention.
A multi-beam electron source 200 shown in the figure is constituted by the thin film type electron source matrix of the first embodiment.
The multi-beam electron source 200 is driven by the driving method described in the second embodiment, and emits an electron beam having the shape of an integrated circuit pattern to be drawn.
After passing through the blanker 210, the electron beam is reduced to about 1/100 by the electron lens 220, deflected by the deflector 230, and transferred onto the wafer 240.
Thus, in this embodiment, since the thin film type electron source matrix of Embodiment 1 is used, electron emission efficiency is high and high-speed electron beam drawing is possible.
In addition, since the electron beam drawing apparatus of the present embodiment can generate an electron beam having an arbitrary two-dimensional shape and batch drawing is possible, not only can the throughput be greatly improved, but also the reliability is high. Long-term stable operation is possible.
Although the invention made by the present inventor has been specifically described based on the above-described embodiment, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the invention. Of course.

It is a figure which shows schematic structure of the thin film type electron source matrix array of Embodiment 1 of this invention. It is a figure for demonstrating the manufacturing method of the thin film type electron source matrix array of Embodiment 1 of this invention. It is a figure for demonstrating the manufacturing method of the thin film type electron source matrix array of Embodiment 1 of this invention. It is a figure for demonstrating the manufacturing method of the thin film type electron source matrix array of Embodiment 1 of this invention. It is a figure for demonstrating the manufacturing method of the thin film type electron source matrix array of Embodiment 1 of this invention. It is a figure for demonstrating the manufacturing method of the thin film type electron source matrix array of Embodiment 1 of this invention. It is a figure for demonstrating the manufacturing method of the thin film type electron source matrix array of Embodiment 1 of this invention. It is a figure for demonstrating the manufacturing method of the thin film type electron source matrix array of Embodiment 1 of this invention. It is a figure which shows schematic structure of the thin film type electron source array board | substrate of the display apparatus of Embodiment 2 of this invention. It is a figure which shows schematic structure of the fluorescence display board of the display apparatus of Embodiment 2 of this invention. It is sectional drawing which shows the schematic whole structure of the display apparatus of Embodiment 2 of this invention. It is a schematic diagram which shows the state which connected the drive circuit to the display apparatus of Embodiment 2 of this invention. 13 is a timing chart showing an example of a waveform of a drive voltage output from each drive circuit shown in FIG. It is a figure which shows schematic structure of the electron beam drawing apparatus of Embodiment 3 of this invention. It is a figure which shows the principle of operation of a thin film type electron source. It is a perspective view which shows schematic structure of an example of the thin film type electron source array which arranged the thin film type electron source in the array form.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Electron emission part 10,110 Board | substrate 11 Lower electrode 12 Tunnel insulating layer 13 Upper electrode 14 Protective insulating layer 15 Bus electrode lower layer 16 Bus electrode upper layer 17 Insulating film 18 Upper bus line 19 Resist film 20 Vacuum 30 Spacer 40 Lower electrode drive circuit 50 Upper electrode driving circuit 60 Acceleration voltage source 111 Red phosphor 112 Green phosphor 113 Blue phosphor 114 Metal back film 115 Frit glass 116 Frame member 120 Black matrix 210 Blanker 220 Electron lens 230 Deflector 240 Wafer.

Claims (1)

A plurality of lower electrodes provided in the row (or column) direction, a protective insulating layer that covers the portions other than the electron emitting portions on the lower electrodes, an insulating layer that forms the electron emitting portions, and columns (or rows) on the protective insulating layers ) And a plurality of upper bus electrodes that are open in the electron emission portion, and upper electrodes provided on each of the upper bus electrodes and on the electron emission portion. The upper bus electrode lower layer outside the upper bus electrode has a stepped portion that recedes inward from the upper bus electrode upper layer , and each upper electrode is disconnected from the stepped portion of the ridge formed on the upper bus electrode upper layer. A first substrate being processed for each upper bus electrode;
A frame member;
A second substrate having a phosphor pattern,
A display device characterized in that a space surrounded by the first substrate, the frame member, and the second substrate is a vacuum atmosphere.

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