JP3986608B2 - Mounting structure of ball grid array package type semiconductor parts - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a mounting structure for a ball grid array package type semiconductor component in which the structure for mounting a ball grid array package type semiconductor component on a multilayer wiring board having a plurality of pads for bump connection on the surface is improved.
[0002]
[Problems to be solved by the invention]
A ball grid array package type semiconductor component 1 (hereinafter abbreviated as BGA component 1) has a large number of ball-shaped components on the mounting surface (lower surface) of the package 2, as shown in part in FIG. The solder bumps 3 are configured in a grid shape. Although not shown, a multilayer wiring board having a large number of pads corresponding to the solder bumps 3 on the surface is used for mounting the BGA component 1, and conventionally, the outer one of the pads is the surface. It was connected to the conductor pattern, and the inner one was connected to the inner layer conductor pattern through a through hole.
[0003]
However, in such a multilayer wiring board using through-holes, the area occupied by the through-holes is large, so the clearance between conductors is reduced, causing problems in insulation and increasing the mounting density (high-density wiring) ). Therefore, in recent years, for example, as disclosed in JP-A-8-162767, a concave via hole has been adopted as an inner pad for bump connection instead of a conventional through hole.
[0004]
That is, as shown in FIG. 6 and FIG. 7E, the multilayer wiring board 4 connects the pads 5 located in the outer two rows as so-called solid pads directly to the surface conductor pattern 6 (only a part is shown). The pad 7 located at the center is connected to the inner layer conductor pattern 9 via a so-called concave via hole 8 having a U-shaped cross section. In mounting the BGA component 1, as shown in FIG. 6, after the cream solder 10 is printed on the pads 5 and 7, the BGA component 1 is mounted, and then the cream solder 10 is passed through a reflow oven. In addition, the solder bumps 3 are melted and cured to make electrical and physical connections.
[0005]
In this case, the multilayer wiring board 4 is manufactured by a built-up method as shown in FIG. First, the inner layer conductor patterns 9 and 12 are formed on the upper and lower surfaces of the base substrate 11 (see FIG. 7A), and the photosensitive insulating resins 13 and 13 are laminated on both surfaces, and necessary portions (later via holes 8 are later described). The hole 13a is formed by a photolithography method (see FIG. 7B). Next, copper plating is performed on both surfaces, and the surface conductor pattern 6 and the pads 5 and 7 and the conductor pattern 14 on the back surface side are formed by etching (see FIG. 7C). Then, the conductor portion on the surface is plated with nickel and gold (see FIG. 7D), and finally the solder resist 15 is formed (see FIG. 7E).
[0006]
According to this, since the concave via hole 8 is formed by the photo method, the inner diameter can be reduced to about 0.1 mm, and the diameter of the pad 7 itself can be reduced to the same extent as the pad 5. . Therefore, even if the arrangement pitch of the pads 5 and 7 is reduced, the minimum clearance between the conductors can be set to about 0.15 mm, for example, and sufficient insulation can be ensured.
[0007]
However, in the mounting structure using the concave via hole 8 as described above, there is a problem that when the BGA component 1 is mounted (see FIG. 6), the void B is included in the solder connection portion 16 of the pad 7 portion. It was. Thus, when void B arises in the solder connection part 16, the intensity | strength with respect to stress will fall and the malfunction that the reliability of connection will fall will be caused. The cause of the void B in the solder connection portion 16 is considered to be due to the following mechanism.
[0008]
That is, FIG. 6A shows a state when the cream solder 10 is printed. The metal mask 17 is in close contact with the multilayer wiring board 4 and the squeegee 18 moves in the direction of arrow A on the upper surface of the metal mask 17. As a result, the cream solder 10 supplied onto the metal mask 17 is applied onto the substrate 4 (pads 5 and 7) through the through holes 17a. However, when the cream solder 10 is applied through the through hole 17a of the metal mask 17, the cream solder 10 is supplied while closing the entire opening of the concave via hole 8 (see FIG. 6). (Refer to (a)), in a state in which air (bubbles) is confined in the via hole 8, the cream solder 10 is covered.
[0009]
Then, as shown in FIGS. 6B, 6C, and 6D, when the BGA component 1 is mounted from that state, the cream solder 10 and the solder bump 3 are integrally melted and cured. When the solder connection portion 16 is formed, the air remaining in the via hole 8 moves to rise in the solder connection portion 16 in the subsequent reflow process and becomes a void B.
[0010]
The present invention has been made in view of the above circumstances, and an object thereof is to provide a mounting structure of a ball grid array package type semiconductor component that can prevent the formation of voids in a solder connection portion and improve the connection reliability. There is.
[0011]
[Means for Solving the Problems]
The mounting structure of the ball grid array package type semiconductor component according to claim 1 of the present invention is such that the ball grid array package type semiconductor component is arranged on the surface of the multilayer wiring board having a plurality of pads for bump connection. In the structure to be mounted via the solder printed on the pad, the pad is disposed on the same plane as the first pad connected only to the surface conductor of the multilayer wiring board. A second pad connected to the inner layer conductor of the multilayer wiring board, and the second pad is formed in a concave via hole formed in the vicinity of the second pad. by connecting the connecting portion provided on a surface portion of, via their connection portions and the concave via hole configured to connect to the inner layer conductor, further wherein the connecting portion The entire surface portion of the fine concave via hole is covered by the solder resist, and even peripheral portion which is not connected to the connecting portion of the second pad so as to expose the second pad circular covering by the solder resist However, it has characteristics.
[0012]
According to this, since the second pad is connected to the inner layer conductor via the via hole spaced from the second pad, the surface of the second pad can be made flat without unevenness. Of course, the surface of the first pad connected to the surface conductor is flat. Accordingly, the solder is printed on the surfaces of the first and second pads which are both flat, and no air remains.
[0013]
As a result, according to the present invention, it is possible to obtain an excellent effect that the generation of voids in the solder connection portion can be prevented and the connection reliability can be improved. In addition, at this time, the second pad can be made as small as the first pad, and the via hole can be formed by a photo method to reduce the occupied area. Therefore, even when the mounting density is high, it was confirmed that a sufficient clearance for insulation between conductors can be ensured. In addition, in the surface portion of the multilayer wiring board, the conductor is not exposed except for necessary parts such as pads, which is effective in terms of insulation.
[0014]
In this case, the via hole can be provided at an angle of 45 degrees with respect to the second pad and located in the center between the pads (invention of claim 2). According to this, the via hole can be efficiently arranged in the region between the pads without providing an extra region for providing the via hole on the multilayer wiring board, and the via hole and other pads can be arranged. The insulation distance between them can be maximized, and the insulation is sufficiently excellent.
[0015]
The mounting structure of the ball grid array package type semiconductor component according to claim 3 of the present invention is such that the ball grid array package type semiconductor component is disposed on the multilayer wiring board having a plurality of pads for bump connection on the surface portion. In the structure to be mounted via the solder printed on the pad, the pad is connected to the first pad connected only to the surface conductor of the multilayer wiring board and the first pad connected to the inner layer conductor of the multilayer wiring board. The first pads are formed in the two outer rows of the surface portion of the multilayer wiring board and connected to the surface conductor pattern extending outward, and the second pads are formed. contact, thereby forming located inside of said first pad, the concave via hole formed in the vicinity of the second pad, by said multi-layer wiring connection portion provided on a surface of the substrate By, characterized in was configured to connect to the inner conductor via their connection portions and the concave via hole.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
An embodiment of the present invention will be described below with reference to FIGS. First, FIGS. 1 and 2 show a state in which a ball grid array package type semiconductor component 21 (hereinafter abbreviated as BGA component 21) is mounted on a multilayer wiring board 22. FIG.
[0017]
As shown in FIG. 5B, the BGA component 21 has a plurality of ball-shaped solder bumps 24 (which will later become solder connection portions 25) on the mounting surface (the lower surface in the figure) of the rectangular package 23. In a grid shape (lattice shape). In this case, as can be understood from FIG. 2, the solder bumps 24 are formed in four rows in the inner and outer directions in the frame-like region of the lower surface of the package 23 excluding the rectangular region at the center. In addition, the formation pitch of solder bumps 24 in the vertical and horizontal directions (and hence the arrangement pitch of pads described later) is 1.0 mm or less, and in this case, 0.8 mm, which is as narrow as possible.
[0018]
On the other hand, the multilayer wiring board 22 is manufactured by a built-up method as will be described later. In this case, as shown in FIGS. 1, 3, and 5, the multilayer wiring board 22 has a front-side insulating layer 27 and a back-side insulating layer 28 on the front and back (upper and lower sides) of the intermediate insulating layer 26, respectively. Along with this, a surface conductor pattern 29 located on the surface portion of the front surface side insulating layer 27, an inner layer conductor pattern 30 located between the front surface side insulating layer 27 and the intermediate insulating layer 26, and the back surface side insulation. The back surface conductor pattern 31 is located on the back surface portion of the layer 28, and the back surface side inner layer conductor pattern 32 is located between the back surface side insulating layer 28 and the intermediate insulating layer 26.
[0019]
As shown in FIGS. 2 and 4, a plurality of parts corresponding to the solder bumps 24 are provided on the surface of the multilayer wiring board 22 (surface-side insulating layer 27) where the BGA component 21 is mounted. Pads 33 and 34 for connecting bumps are provided. Of these, the outer (left side in FIGS. 1 and 5) two rows are the first pads 33, and the inner two rows are the second pads 34.
[0020]
In this case, the first and second pads 33 and 34 are so-called surface solid pads formed integrally with the surface conductor pattern 29. In the present embodiment, the first and second pads 33 and 34 are all formed in a circular shape having a diameter of, for example, 0.3 mm, and the formation pitch thereof is, for example, 0.8 mm in both vertical and horizontal directions. Of these, the first pad 33 is connected to the surface conductor pattern 29 extending outward.
[0021]
Recessed via holes 35 are provided in the vicinity of the second pads 34, and the second pads 34 and the via holes 35 are formed on the surface portion of the multilayer wiring board 22. They are connected by a connecting portion 36 made of a narrow conductor. In the present embodiment, as shown in FIGS. 2 and 4, the via hole 35 is provided at an angle of 45 degrees with respect to the second pad 34 and at the center between the pads 33 and 34. Yes.
[0022]
The via hole 35 is formed as described later, and as shown in FIG. 1 and the like, the bottom of a circular hole 27a (see FIG. 3B) provided so as to penetrate the surface-side insulating layer 27, A conductor is provided in a form continuous to the inner peripheral surface portion and the ring-shaped portion around the upper surface opening. A bottom portion of the via hole 35 is connected to the inner layer conductor pattern 30, and a ring-shaped portion around the upper surface is connected to the second pad 34 via the connection portion 36.
[0023]
As a result, the second pad 34 is connected to the inner layer conductor pattern 30 via the connecting portion 36 and the via hole 35. In the present embodiment, the via hole 35 has a hole diameter of, for example, 100 μm, a depth of, for example, 70 μm, and a ring-shaped portion around the upper surface having a diameter of, for example, 250 μm. As a result, the minimum clearance between the via hole 35 and the other pads 33 and 34 is 0.1 mm or more, and in this case, 0.14 mm is secured.
[0024]
As shown in FIGS. 1 and 4, the front and back double-side portions of the multilayer wiring board 22 are covered with a solder resist 37 except for necessary portions (pads 33, 34, etc.). Accordingly, the surface portions of the connecting portion 36 and the via hole 35 are also covered with the solder resist 37, and the solder resist 37 is filled in the via hole 35 at this time. The first and second pads 33 and 34 are printed with paste-like cream solder 38 (see FIG. 5) as will be described later, and the BGA component 21 is mounted thereon. .
[0025]
Here, a manufacturing method (built-up method) of the multilayer wiring board 22 will be briefly described. FIG. 3 shows the steps of manufacturing the multilayer wiring board 22 in order. First, as shown in FIG. 3A, an inner layer conductor pattern 30 and a back side inner layer conductor pattern 32 made of copper foil are formed on both upper and lower surfaces of a base substrate 39 to be the intermediate insulating layer 26. Further, as shown in (b), photosensitive insulating resins 40 and 41 to be the front-side insulating layer 27 and the back-side insulating layer 28 are laminated on the upper and lower surfaces of the base substrate 39, and a mask (not shown) is adhered. After the exposure, development is performed to cure the photosensitive insulating resins 40 and 41 to form the surface-side insulating layer 27 and the back-side insulating layer 28, and the via-hole 35 is later formed in the surface-side insulating layer 27. A hole 27a is formed at the position.
[0026]
Next, as shown in (c), the surface conductor pattern 29 is formed on the surface of the surface-side insulating layer 27 by performing copper plating on the upper surface of the surface-side insulating layer 27 and the lower surface of the back-side insulating layer 28 and etching them. The first and second pads 33 and 34 and the conductor portions of the via holes 35 and the connection portions 36 are formed, and the back conductor pattern 31 is formed. Then, as a finishing process, nickel and gold are plated in order on both the front and back conductor portions (see FIG. 3 (d)), and finally a solder resist 37 is applied, exposed and developed to complete the multilayer wiring board 22. (See FIG. 3E).
[0027]
At this time, as shown in FIG. 4, the solder resist 37 is provided so as to expose the first and second pads 33 and 34, and is provided so as to cover the surface portions of the connection part 36 and the via hole 35. It is done. Since the solder resist 37 is hardened after applying a liquid one, the solder resist 37 is also filled in the via hole 35. In FIG. 4, the solder resist 37 is hatched for convenience.
[0028]
Now, a procedure for mounting the BGA component 21 on the multilayer wiring board 22 configured as described above will be described with reference to FIG. FIG. 5 shows a procedure for mounting the BGA component 21 on the multilayer wiring board 22. First, as shown in FIG. 5A, a step of printing and applying cream solder 38 on the upper surface of the multilayer wiring board 22 (first and second pads 33 and 34) is performed.
[0029]
In this printing process, a metal mask 42 having through holes 42a corresponding to the pads 33 and 34 is used, the metal mask 42 is brought into close contact with the upper surface of the multilayer wiring board 22, and cream solder is applied on the metal mask 42. When the squeegee 43 is slid in the direction of the arrow A in the state where 38 is supplied, the cream solder 38 is filled in the through hole 42a. Thereafter, when the metal mask 42 is raised, the cream solder 38 is printed on the upper surfaces of the pads 33 and 34 through the through holes 42a.
[0030]
Thereafter, as shown in FIG. 5B, the BGA component 21 is mounted on the multilayer wiring board 22 with the pads 33 and 34 and the solder bumps 24 being aligned. And by passing through a reflow furnace (not shown) and heating to, for example, 183 ° C. or higher, the solder bumps 24 and the cream solder 37 are melted and integrated as shown in FIG. As a result, as shown in (d), the solder is hardened to form the solder connection portion 25, and thus the BGA component 21 is electrically and physically connected to the multilayer wiring board 22.
[0031]
At this time, as described in the conventional example, in the case where the pad 7 and the inner conductor pattern 9 are connected using the concave via hole 8, the air is confined in the concave via hole 8. Therefore, there is a possibility that the cream solder 10 is printed and the void B is generated in the solder connection portion 16. However, in the present embodiment, since the surface of the first pad 33 is flat, the second pad 34 is also connected to the inner layer conductor pattern 30 via the connection portion 36 and the via hole 35. The surface can be made flat without unevenness.
[0032]
Therefore, according to the present embodiment, the cream solder 38 is printed on the surfaces of the first and second pads 33 and 34 which are both flat without air remaining, and the solder connection portion 25 has voids. Can be prevented. As a result, unlike the conventional mounting structure, it is possible to obtain an excellent effect that the connection reliability can be greatly improved.
[0033]
In addition, at this time, the second pad 34 can be made to have the same diameter as that of the first pad 33, and the via hole 35 is formed by a photo method to reduce the exclusive area. As a result, the clearance required for insulation between the conductors, in this embodiment, at least 0.14 mm could be ensured even when the mounting density was high (high-density wiring). In this case, in particular, in the present embodiment, the via hole 35 is provided at an angle of 45 degrees with respect to the second pad 34 and positioned at the center between the pads 33 and 34. The insulating distance between the via hole 35 and the other pads 33 and 34 can be maximized while being efficiently arranged in the region between the 34.
[0034]
Further, in the present embodiment, the surface portions of the connection portion 36 and the via hole 35 are covered with the solder resist 37, so that the necessary portions such as the pads 33 and 34 are excluded from the surface portion of the multilayer wiring board 22. As a result, since the conductor is not exposed, the advantage of being more effective in terms of insulation can be obtained.
[0035]
The present invention is not limited to the above-described embodiments. For example, the first pad and the second pad may be mixed in the same row, and the via hole may be provided in the first row. You may make it provide in the position spaced apart inward from the formation area of 2 pads. Furthermore, the dimensions and manufacturing methods of the respective parts described above are merely examples, and various modifications can be made. For example, various modifications can be made without departing from the scope of the invention.
[Brief description of the drawings]
FIG. 1 shows an embodiment of the present invention, and is an enlarged longitudinal front view showing a structure for mounting a BGA component on a substrate. FIG. 2 is a plan view of a main part showing a structure for mounting a BGA component on a substrate. 3] Diagram showing the manufacturing process of the multilayer wiring board. [Fig. 4] Plan view of the main part of the multilayer wiring board. [Fig. 5] Diagram showing the mounting process of the BGA parts. [Fig. 7] Diagram equivalent to Fig. 3 [Explanation of symbols]
In the drawing, 21 is a ball grid array package type semiconductor component, 22 is a multilayer wiring board, 24 is a solder bump, 25 is a solder connection part, 27 is a surface side insulating layer, 27a is a hole, 29 is a surface conductor pattern, 30 is an inner layer The conductor pattern, 33 is a first pad, 34 is a second pad, 35 is a via hole, 36 is a connection portion, 37 is a solder resist, and 38 is cream solder (solder).

Claims (3)

A ball grid array package-type semiconductor component is mounted on a multilayer wiring board having a plurality of pads for bump connection on the surface portion via solder printed on the pads,
The pad includes a first pad connected only to the surface conductor of the multilayer wiring board, and a second pad arranged on the same plane as the first pad and connected to the inner layer conductor of the multilayer wiring board. And comprising
The second pad is connected to a concave via hole formed in the vicinity of the second pad through a connecting portion provided on a surface portion of the multilayer wiring board, so that the connecting portion and the concave via hole are connected. Is connected to the inner layer conductor via
Further, the connection portion and the surface portion of the concave via hole are entirely covered with the solder resist, and the peripheral portion not connected to the connection portion of the second pad is also covered with the solder resist. A mounting structure of a ball grid array package type semiconductor component, wherein pads are exposed in a circular shape. 2. The ball grid array packaged semiconductor component according to claim 1, wherein the concave via hole is provided at an angle of 45 degrees with respect to the second pad and located at the center between the pads. Implementation structure. A ball grid array package-type semiconductor component is mounted on a multilayer wiring board having a plurality of pads for bump connection on the surface portion via solder printed on the pads,
The pad includes a first pad connected only to a surface conductor of the multilayer wiring board and a second pad connected to an inner layer conductor of the multilayer wiring board,
The first pads are formed in two outer rows of the surface portion of the multilayer wiring board and connected to a surface conductor pattern extending outwardly,
The second pad is formed on the inner side of the first pad, and is provided on a surface of the multilayer wiring board in a concave via hole formed in the vicinity of the second pad. A mounting structure of a ball grid array package type semiconductor component, wherein the mounting structure is connected to the inner layer conductor through the connecting portion and the concave via hole.

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