JP3976114B2 - Device manufacturing method and element substrate manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention is used in a display such as a computer or a television receiver, for example, and is a transmissive or reflective liquid crystal display device provided with a switching element such as a thin film transistor (hereinafter referred to as “TFT”) as an address element. Includes a gate line, a source line, and a switching element provided in the vicinity of the intersection of the gate line and the source line, the switching element including a gate electrode connected to the gate line, and the source line A liquid crystal display device having a source electrode connected to the drain electrode and a drain electrode connected to a pixel electrode for applying a voltage to the liquid crystal layer, and a repetitive pattern such as a large number of wirings, switching elements, and sensor parts. A semiconductor device having a plurality of film patterns and a display device other than liquid crystal (for example, DMD) In order to drive and control active and passive devices such as image sensors, and active devices and passive devices, various devices including resistors, capacitors, semiconductor devices, integrated circuits, etc. The present invention relates to a method for arranging the microchip.
[0002]
[Prior art]
A TFT type liquid crystal display device will be described as an example.
FIG. 4 is a circuit diagram showing a general configuration of a transmissive liquid crystal display device including an active matrix substrate. As shown in FIG. 4, the active matrix substrate 101 has a plurality of pixel electrodes 102 formed in a matrix shape, such as several tens of thousands to several hundred thousand or more, and the pixel electrodes 102 are switching elements. The TFT 103 is connected and provided. A gate wiring 104 for supplying a scanning signal is connected to the gate electrode of the TFT 103, and the TFT 103 is driven and controlled by the gate signal input to the gate electrode. A source wiring 105 for supplying a display signal (data signal) is connected to the source electrode of the TFT 103, and a data (display) signal is input to the pixel electrode 102 via the TFT 103 when the TFT 103 is driven. The gate wirings 104 and the source wirings 105 are provided so as to pass through the periphery of the pixel electrodes 102 arranged in a matrix and to be orthogonal to each other with an insulating film interposed therebetween. Further, the drain electrode of the TFT 103 is connected to the pixel electrode 102 and the additional capacitor 106, and the counter electrode of the additional capacitor 106 is connected to the common wiring 107.
[0003]
FIG. 5 is a cross-sectional view of a TFT portion of an active matrix substrate in a conventional liquid crystal display device. As shown in FIG. 5, a gate electrode 108 connected to the gate wiring 104 of FIG. 4 is formed on a transparent insulating substrate 107, and a gate insulating film 109 is formed covering the gate electrode 108. Further thereon, a semiconductor layer 110 is formed so as to overlap with the gate electrode 108, and a channel protective layer 111 is formed on the central portion thereof. An n ⁺ Si layer that covers both ends of the channel protective layer 111 and a part of the semiconductor layer 110 and is divided on the channel protective layer 111 is formed as the source electrode 112a and the drain electrode 112b. The on one ⁿ + Si layer in which the source electrode 112a is formed a metal layer 113a in the same film and a source wiring 105 in FIG. 4, on the drain electrode 112b as the other ⁿ + Si layer, the drain electrode 112b A metal layer 113b that connects the pixel electrode 114 and the TFT 115 serving as a switching element and its peripheral structure are formed. Further, an interlayer insulating film 116 is formed so as to cover the TFT 115, the gate wiring, and the source wiring.
[0004]
A transparent conductive film to be the pixel electrode 114 is formed on the interlayer insulating film 116, and this transparent conductive film is a metal connected to the drain electrode 112b of the TFT 111 through a contact hole 116a that penetrates the interlayer insulating film 116. It is connected to the layer 113b. As described above, since the interlayer insulating film 116 is formed between the gate wiring and the source wiring and the transparent conductive film 114 serving as the pixel electrode 1, the pixel electrode 114 is overlapped with the gate wiring and the source wiring. be able to.
[0005]
Such a structure is disclosed in, for example, Japanese Patent Application Laid-Open No. 58-172585, thereby improving the aperture ratio of the liquid crystal display device and shielding the electric field caused by the gate wiring and the source wiring. Therefore, it is possible to suppress the disclination in which the alignment of the liquid crystal molecules is broken.
[0006]
As the insulating film 109 or the interlayer insulating film 116, an inorganic film such as silicon nitride (SiN) has been conventionally formed to a film thickness of about 300 to 500 nm by using a CVD method (plasma enhanced chemical vapor deposition). The reason why a film thickness larger than this is not formed is that deposition takes time and production efficiency deteriorates, and the substrate is warped due to residual stress, and defects such as cracks increase. Alternatively, only the interlayer insulating film 116 may form an organic film with a thickness of about 1 to 5 μm. Alternatively, the aperture ratio falls there is also a case of not forming an interlayer insulating film 116. That is, a gate wiring, a source wiring, a pixel electrode, and a TFT transistor are deposited on the entire surface of the substrate 101, and the entire surface of the substrate is exposed, the entire surface of the substrate is etched, and the process is performed. The TFT substrates shown in FIGS. 4 and 5 were collectively formed by repeating the above and laminating the patterns.
[0007]
[Problems to be solved by the invention]
In the case of the above-described liquid crystal display device, a relatively small area such as 0 to 2 semiconductor layers or conductive film layers, for example, a pixel area, and a relatively large area such as 2 to 5 layers, such as a TFT element area, are repeatedly patterned In other words, regions having different production tacts and different defect rates are formed on the same substrate at the same time and through the same process, and production is basically inefficient. In addition, since some of the TFT elements are defective because they are collectively formed, the entire substrate is treated as defective, and the profitability is very poor. In particular, the TFT element portion having a large number of laminations has a smaller pattern size than that of other regions and a large number of laminations, so that the frequency of occurrence of defects is relatively high. In the case of FIG. 5, when the insulating film 109 or the interlayer insulating film 116 is formed on the TFT element 115 by CVD or sputtering using SiN _x , SiO ₂ , TaO _x (Ta: tantalum) or the like. The formed insulating film 109 or interlayer insulating film 116 reflects unevenness due to the thickness of the base film. Cracks A and B are more likely to enter due to the effects of residual stress (larger substrates have more in-plane variations), such as multi-layer TFTs and uneven portions such as cross sections of source wiring and gate wiring. Etching liquid permeates and short-circuiting and disconnection defects are likely to occur, and the larger the substrate, the lower the defect rate due to increased variations in residual stress, temperature, etching liquid or impurity concentration distribution, etc. For this reason, it becomes necessary to strictly control the apparatus and conditions, and the processing time is increased, and a special apparatus improvement is required.
[0008]
On the other hand, in liquid crystal display devices and the like, the number of parts to be taken increases to improve overall production efficiency, and there is a movement to adopt increasingly larger board dimensions, but for example, the line does not rise at the speed as expected at the start of mass production However, there are many cases where profits are not sufficiently secured or goods cannot be delivered to users in a timely manner due to the balance of supply and demand. Or reliability may fall by the same factor.
[0009]
Or, if the manufacturing equipment becomes larger due to the larger substrate size and it is difficult to assemble and transport (the transportation means, route and time are limited), the whole factory becomes large, and it is difficult to secure the site, It becomes difficult to uniformly control the cleanliness of the inner line.
[0010]
In addition, the variation in the external dimensions of each device increases, making line design difficult.
[0011]
Therefore, these parts and devices have limitations in high-density mounting, thinning, miniaturization, and weight reduction.
[0012]
An object of the present invention is to provide a highly reliable and efficient production method and parts for various parts including those other than liquid crystal display devices, particularly in parts such as equipment and semiconductor devices in which the dimensions of the original substrate for production are large. An object of the present invention is to provide a component manufacturing method and a component which can improve the above-described problems, reduce the size of the apparatus, and reduce the above problems.
[0013]
[Means for Solving the Problems]
From the viewpoint of production efficiency, it is also a problem to form TFTs on the entire surface at once by tilting to a large substrate.
[0014]
In view of this, there has been proposed means for forming only a TFT element portion having a large number of laminations, a large number of processes, and a low yield on another substrate, and transferring the TFT element to form a TFT substrate.
[0015]
In US Pat. No. 5,904,545, the TFT element is formed on a separate substrate, separated into individual elements (chips), and transferred (stacked) onto a substrate that has been cut out in advance (formed with a recess). A manufacturing method, structure and apparatus for completing a TFT substrate are disclosed.
[0016]
That is, as described in FIG. 1 and FIG. 2, a region to be the TFT element portion 7 is previously formed with a recess in the substrate and an electrical connection terminal 8 is formed. This is a method for completing a substrate.
[0017]
The transfer process is described in FIG.
[0018]
That is, a TFT element block formed on a separate substrate in advance has a TFT element formed thereon, and the TFT block is transferred to a recess in which a terminal 10 is formed in advance.
[0019]
However, in this method, before the TFT element blocks are transferred to the concave portions of the substrate regularly arranged in the matrix, the TFT element blocks are separated, and as a result, the direction of the microchip at the time of insertion is left-right or front-back direction. It may be inserted in reverse.
[0020]
When inserted in different directions, the connection between terminals is different from the design, resulting in a malfunction of the TFT element.
[0021]
Therefore, this time, the separated microchips arranged on a separate substrate are gripped by the gripping tool for each row or column, and then the arrangement pitch is expanded, as in the prior patent, without being separated once. A method is proposed in which a predetermined large substrate is inserted into the recesses arranged in a matrix at a predetermined pitch.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below.
[0023]
(Embodiment)
A book in which microchips 13 created on a separate substrate 14 and separated into a matrix are lifted at an intermittent pitch every several rows or several columns with a gripping tool , and transferred in rows or columns to predetermined recesses enlarged on the large substrate side. Embodiments of the invention are described below.
[0024]
Specifically, the gripping tool, the thread, the shape of the gripping tool, and the transfer method using them will be described with reference to the drawings. The principle of gripping using surface tension is shown in FIG.
[0025]
A thread 12 is pinned to an arcuate frame 11, water 15 is attached to the surface of the thread, a wet thread is pressed onto the separated microchip 13 formed on a separate substrate, and surface tension is used. The microchip is lifted away from the base 14 of another substrate.
[0026]
6 (b) and 6 (c) are enlarged views thereof. FIG. 6B shows the microchip and the thread as viewed from the side.
[0027]
The microchip is pulled up by a water meniscus. FIG. 6C shows a cross section.
[0028]
Next, the tip can be detached by controlling the amount of water contained in the yarn.
[0029]
That is, if the water is evaporated from the surface, the force of gradual suction is reduced, and the microchip is detached when there is no water.
[0030]
One method for controlling the amount of water is to apply hot air. It can also be controlled by reducing the ambient pressure and promoting evaporation.
[0031]
It is also possible to evaporate the water by energizing and heating the water contained in the porous material by using a wire in which the yarn is a conductor 16 and the periphery is covered with a porous material 17 that easily contains water.
[0032]
In addition, it is also possible by irradiating the whole with infrared rays and heating. Regardless of which method is used, since the yarn is thin and taut with a thickness of several tens of μm, it is cooled immediately even if it is heated once.
[0033]
Therefore, the cycle time can be considerably shortened and is practical in the manufacturing process. The simplest shape of a thread is just a straight bar.
[0034]
Various rods are possible, such as those with fuzzy surfaces or porous surfaces, but are not shown here. A positive structure is shown in FIG.
[0035]
It is thought that the tip is sucked more accurately than using a simple straight bar.
[0036]
FIG. 7A shows a thick line and a thin part alternately formed on a single line.
[0037]
Assuming that the thick part is 40 μm pitch and the size is 20-30 μm, it is considered that the secondary effect that the microchip is sucked to the proper position using the surface tension in the longitudinal direction of the line is expected. .
[0038]
Further, as shown in FIG. 7B, it is possible to use a twisted yarn . In this case, we thought to beat in Article 2, but it may be in Article 3 or 4.
[0039]
As the number of strips increases, the moisture content tends to increase. Moreover, as shown in FIG.7 (c), what wound the material 17 which can impregnate porous or water around the conducting wire 16 can also be used.
[0040]
The twisted yarn shown in FIG. 7 (b) is one-dimensional, but if it is made two-dimensional, it becomes a cloth as shown in FIG. 7 (d). FIG. 7D is a plan view, and FIG. 7E is a cross-sectional shape.
[0041]
In this case, the portions corresponding to the lattice points protrude in a zigzag pattern.
[0042]
Since this part is different from the other parts and has a high water content, there is a strong tendency to selectively suck chips there.
[0043]
Next, consider the gripping tool.
[0044]
FIG. 8 shows a model of the gripping tool. As shown in the figure, if the separation chips are placed at a pitch of 40 μm, the bow shape for gripping the thread has a thickness of 40 μm.
[0045]
Actually, such a thin foil is cramped and cannot be gripped, but the prototype is like this.
[0046]
The board is too thin and impossible. Further, if the contact state between the surfaces is considered microscopically, positioning in the thickness direction becomes inaccurate.
[0047]
Thus, the following holding device of the present invention was invented. Therefore, the intermittent gripping tool shown in FIG. 8 (b) is obtained by increasing the thickness of the gripping tool by intermittent gripping.
[0048]
As shown here, the thickness of the plate constituting the bow of the gripping tool can be increased if the microtips are captured every several rows or several columns, that is, at an integer multiple pitch. A grip 20 shown in FIG. 8B is a block 20 in which all the individual bow plates are combined into a block shape.
[0049]
If transfer is performed at a predetermined pitch on the large substrate side using the above-mentioned holding tool, enlargement transfer can be performed at a desired matrix pitch.
[0050]
Therefore, it is possible to efficiently transfer the microchip to the large substrate.
[0051]
Next, as shown in FIG. 8C, a gripping tool in which a thread is attached to the gripping tool 21 with an integrated bow can be used. Even in this case, it is natural that the thread pitch of the gripping tool is set to an integral multiple of the arrangement pitch of the separation chips.
[0052]
If this holding tool is used to transfer to the large substrate side at a predetermined pitch, enlargement transfer can be performed at a desired matrix pitch.
[0053]
Therefore, it is possible to efficiently transfer the microchip to the large substrate.
[0054]
【The invention's effect】
Conventional microchips are formed on separate substrates, and after separating each chip, the microchips are once separated and inserted before being inserted into predetermined recesses in the matrix arrangement of the large substrate.
[0055]
However, as in the present invention, a microchip on a separate substrate is lifted with a thread with water and is simply gripped using surface tension, and the pitch of the thread to be gripped is set on the large substrate. Since the pitch is adjusted to the recess pitch, the arrangement pitch is automatically expanded by the reciprocation of the gripping tool, so that the transfer efficiency is improved and the time is also efficient.
[0056]
Further, since the insertion directions of the chips are aligned, they are not inserted in the reverse direction, and the electrodes of the recesses and the electrodes of the microchip are reliably contacted, and the contact failure is eliminated.
[Brief description of the drawings]
FIGS. 1A and 1B are a plan view and a cross-sectional view showing a configuration in the vicinity of a pixel of an active matrix side substrate in a liquid crystal display device according to an embodiment of a trapezoidal chip.
FIG. 2 is a cross-sectional view showing a mounting structure and a mounting method in the vicinity of a trapezoidal chip 7;
FIG. 3 is a diagram showing a form of insertion when a trapezoidal chip is used.
FIG. 4 is a circuit diagram illustrating a general configuration of a transmissive liquid crystal display device including an active matrix substrate.
FIG. 5 is a cross-sectional view of a TFT portion of an active matrix substrate in a liquid crystal display device when formed by a conventional batch formation technique.
FIG. 6 is a diagram showing the relationship of surface tension between a wet thread stretched on a bow-shaped frame and a microchip according to the present invention.
(A) is a diagram showing an embodiment in which microchips are attached to a wet thread stretched on an arcuate frame according to the present invention in a row.
(B) is the front view which showed the surface tension state of the water between the wet thread | yarn of this invention, and a microchip.
FIG. 7C is a cross-sectional view showing the surface tension state of water between the wet yarn and the microchip of the present invention. FIG. 7 is a diagram showing various yarn shapes.
(A) is the figure which showed the thread | yarn which formed the thick part and the thin part alternately.
(B) is the figure which showed the strand .
(C) is the figure which wound the porous or the material which can impregnate water around the conducting wire.
(D) is a figure of cloth.
(E) is sectional drawing of cloth.
FIG. 8 is a view showing a gripping tool of the present invention.
(A) is a gripping tool that combines frames per one pitch.
(B) is an intermittent gripping tool .
(C) is an integral gripping tool using multiple yarns .
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Active matrix substrate 2 Pixel electrode 3 Gate wiring 4 Source wiring 5 Crossing part of gate wiring and source wiring 6 TFT
7 Trapezoidal chip 8 Terminal for electrical connection 9 Recess for trapezoidal chip 10 Terminal of hole in first substrate 1 11 Bow-shaped frame 12 Thread 13 Microchip 14 Base 15 Water 16 Conductor 17 Porous material 18 Cloth 19 Grasping thread An arcuate plate 20 A blocked arcuate plate 21 that holds a thread 21 An integrated arcuate plate 101 that holds a thread 101 An active matrix substrate 102 A pixel electrode 103 A TFT
104 Gate wiring 105 Source wiring 106 Additional capacitance 107 Common wiring 108 Gate electrode 109 Gate insulating film 110 Semiconductor layer 111 Channel protective layer 112a Source electrode 112b Drain electrode 113a Metal layer 113b Metal layer 114 Pixel electrode 115 TFT
116 Interlayer insulating film 116a Contact hole

Claims (8)

By transferring placing microchips on a substrate, a process for the preparation of devices, using a gripping tool which stretched yarn or cloth arcuate frame, with a liquid to the surface of the yarn or fabric, separate microchip pressing the yarn or fabric from above, gripping and lifting the microchip from the base, and wherein the transfer arranging the microchip by disengaging the microchip from the yarn or fabric Device manufacturing method. The method of manufacturing a device according to claim 1, a manufacturing method of an apparatus which is characterized in that the separation of the by evaporating the liquid with the fiber or fabric to the yarn or fabric were electrically heated as a conductor . 2. The apparatus manufacturing method according to claim 1 , wherein the detachment is performed by removing any liquid of the yarn or cloth by performing any one of vacuum evaporation, hot air drying, and infrared irradiation heating. Manufacturing method. 2. The method of manufacturing an apparatus according to claim 1, wherein the yarn attached to the gripping tool is a yarn in which thick portions and thin portions are alternately arranged, or a twisted yarn. 2. The method of manufacturing an apparatus according to claim 1, wherein the gripping tool is an intermittent gripping tool that lifts the microchips arranged in a matrix at an intermittent pitch. 2. The method of manufacturing an apparatus according to claim 1, wherein the gripping tool is a gripping tool in which a plurality of threads are stretched on the frame in order to lift the microchips arranged in a plurality of rows at a time. A method for manufacturing the device. The device manufacturing method according to claim 1, wherein the device is a liquid crystal display device. A method of manufacturing an element substrate by transferring and arranging microchips formed side by side on a substrate different from the substrate,
Using a gripping tool on which a thread or cloth is stretched, a liquid is applied to the thread or cloth, and the thread or cloth with the liquid is pressed against the microchip formed on the other substrate. Lifting the microchip from the other substrate;
Transferring the microchip onto the substrate by separating the lifted macrochip from the yarn or cloth; and
A process for producing an element substrate, comprising:

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