JP3971104B2 - Development method of semiconductor integrated circuit device - Google Patents

Description

Technical field
The present invention relates to a design of a semiconductor integrated circuit device and a test design technique, and more particularly to a technique that allows test design to be started from the upstream side of a design process of a semiconductor integrated circuit device.
Background art
When developing a semiconductor integrated circuit device, the target specification (the target specification may mean the final specification of the product depending on the product manufactured using the present invention) is determined, and the logic design and circuit design are determined. We will proceed with the layout design. At this time, if there is a past design asset, it is used. In the design process, logic simulation or circuit simulation is performed to verify whether or not the design target specification is satisfied. Once the circuit design of the semiconductor integrated circuit device is completed, the semiconductor integrated circuit device is prototyped, and the prototyped semiconductor integrated circuit device is actually verified using a tester. The device and the tester are connected via a test board according to the terminal arrangement and the number of terminals of the semiconductor integrated circuit device. If the design target specification is not achieved in the device test, the circuit design of the semiconductor integrated circuit device is modified to achieve the target specification. Thereafter, mass production of the semiconductor integrated circuit device is started.
When developing a semiconductor integrated circuit device, not only a design of the device itself but also a test design for a device test must be performed. In the test design, it is necessary to design the test board and design a test program for operating the tester.
In general, a test process for test design is started after a device designer creates a test specification. Conventionally, the test process has not been performed in parallel with the design process of the semiconductor integrated circuit device. Usually, after completing the circuit design of the device, a test specification is created, and based on this, the design of a test board and a test program is started. In this way, the mainstream method is to proceed with serial design work, in which test design is started after circuit design is completed, so in the test design process, the test specifications determined by the designer for the mass production tester are tested. It is common for an engineer to create a test program and software debug it, create a test board, and debug the test program on the tester, including the prototype device and test board (also referred to as a fixture board). It was a technique. That is, along with the evaluation of the prototype device, the test program and the evaluation of the test board are also performed using the tester.
However, if the prototype device, test program, and test board were evaluated together using a tester, if there was a malfunction, the malfunction was caused by either the prototype device, the test program, or the test board. In some cases, it is difficult to specify whether or not the development period of the semiconductor integrated circuit device including the test design cannot be shortened.
When trying to shorten the development period of a semiconductor integrated circuit device from the viewpoint of test design, if you try to shorten the period and increase the efficiency by focusing only on the test process, you cannot expect a big effect on partial improvement.
The present inventor has found a novel idea that the development period of the semiconductor integrated circuit device is shortened as a whole and the development efficiency is improved by parallelizing the test design and the device design.
An object of the present invention is to provide a method for developing a semiconductor integrated circuit device that can shorten the development period of the semiconductor integrated circuit device as a whole and improve the development efficiency by parallelizing test design and device design. is there.
Another object of the present invention is to provide a semiconductor integrated circuit device development system capable of shortening the development period of a semiconductor integrated circuit device as a whole from the viewpoint of a test design process.
The above and other objects and novel features of the present invention will become apparent from the following description of the present specification and the accompanying drawings.
Disclosure of the invention
A semiconductor integrated circuit device development method according to the present invention is based on a first process for generating a device model in which functions of a semiconductor integrated circuit device are modeled in a function description language so as to satisfy a target specification, and based on the device model. A second process for designing a circuit of a semiconductor integrated circuit device, and a test design by simulating a device model together with a tester model in which test items corresponding to the target specifications are modeled in parallel with the second process. Processing. The functionally described device model satisfies the target specification of the semiconductor integrated circuit device to be developed. This device model is simulated together with the tester model, and it is determined from the simulation result whether the device model satisfies the target specification. Thus, for example, the validity of the tester model, that is, the design of the test program or the test board for connecting the tester and the semiconductor device can be verified, and the test design can be performed before the circuit design is completed. It becomes possible to proceed.
The first processing includes a first step of defining an input / output state of each external terminal corresponding to each external terminal of the semiconductor integrated circuit device so as to satisfy a target specification of the semiconductor integrated circuit device, and a semiconductor integrated circuit A second step of dividing the device into a plurality of functional modules, defining internal terminals of the individual functional modules, and defining input / output states of the respective internal terminals so that each functional module satisfies a target specification; When the input / output state of the external terminal defined in the first step is given, the coupling state of the internal terminals between the respective functional modules is defined so as to satisfy the target specification of the semiconductor integrated circuit device, and the device model is defined. Generating a third step.
The definition of such a device model satisfies the target specification of the semiconductor integrated circuit device in terms of the input / output states related to the external terminal and the internal terminal. Will give the item. Therefore, as described above, by simulating this device model together with the tester model and determining whether the device model satisfies the target specification from the simulation result, for example, the design of the test program and the test board can be performed as described above. Validity can be verified from the functional design stage.
The size of the division of the functional module is related to the simulation time when verifying whether the divided functional module satisfies the target specification. The larger the functional module is, the shorter the time required for the verification is. The smaller the functional module is, the more detailed the function can be defined. . Which one is adopted can be determined according to whether the semiconductor integrated circuit device is a digital circuit, an analog circuit, a digital / analog mixed circuit, or the like, or can be determined according to the degree of attention.
The first process of a more detailed aspect includes a first step of defining an input / output state of each external terminal corresponding to each external terminal of the semiconductor integrated circuit device so as to satisfy a target specification of the semiconductor integrated circuit device. The semiconductor integrated circuit device is defined by dividing it into a plurality of functional modules, and the input / output state defined in the second step is used to define the input / output state of the internal terminal of each functional module. A third step of performing functional simulation of the functional module to verify whether the functional module satisfies the target specification, adjustment of the target specification for the functional module that does not satisfy the target specification in the third step, and the third step Step 4 is repeated until the target specification is satisfied, and the internal terminals are connected between the functional modules that satisfy the target specification. And the simulation is performed by giving the input / output state of the external terminal defined in step 1 to verify whether or not the target specification of the semiconductor integrated circuit device is satisfied, and the target specification is determined in the fifth step. If not satisfied, the target specification for the desired functional module may be adjusted and the fifth step may be repeated until the target specification of the entire semiconductor integrated circuit device is satisfied. In the fifth step, the target specification may be included. Is satisfied or when the sixth step is passed, the device model can be generated based on the definition of the functional module, the definition of the input / output state of the external terminal and the internal terminal, and the definition of the coupling between the internal terminals. .
The device model includes chip function description data relating to functions to be realized on a chip of a semiconductor integrated circuit device, and package function description data relating to electrical characteristics of a package that accommodates the chip and forms an electrical connection with the chip. And both or the former. For example, when an inductance component or a capacitance component parasitic on a bonding wire of a package is considered as a problem in advance, a device model is formed by both the chip function description data and the package function description data.
The tester model realizes connection between tester function description data in which tester hardware is specified by function description, a test program for determining tester operation for each test item, and the tester and the semiconductor integrated circuit device. And the test board design data for specifying the circuit configuration of the test board. At this time, as described above, in the test design, the test program and the test board are designed by reflecting the simulation result in the tester model.
The method for developing a semiconductor integrated circuit device further includes a fourth process for generating layout data for specifying a layout of the semiconductor integrated circuit device based on the circuit description data, and a semiconductor integrated circuit manufactured based on the layout data A fifth process in which a device is mounted on the tester via the test board, and the tester is operated using the test program to perform an actual test.
A semiconductor integrated circuit device development system according to the present invention generates a device model in which functions of a semiconductor integrated circuit device are modeled in a function description language so as to satisfy a target specification, and the semiconductor integrated circuit device based on the device model. Device design means for performing circuit design, and test design means for performing test design for testing the semiconductor integrated circuit device. The test design means inputs the device model, and specifies the first data processing means for supporting the circuit design of the test board for connecting the tester and the semiconductor integrated circuit device, and the hardware specific to the tester by the function description. Second data processing means for supporting design of a test program for verifying necessary test items based on the tester function description data and the device model, the tester function description data, the test program, and the test board And a third data processing unit that configures a tester model in which test items corresponding to the target specifications are modeled based on the design data, and integrates the tester model and the device model to perform a simulation. Based on the simulation results before circuit design by It is one which allows verifying the design data and test program of the test board by the device model to verify whether satisfies the target specification Te.
BEST MODE FOR CARRYING OUT THE INVENTION
First, a method for developing a semiconductor integrated circuit device according to the present invention will be schematically described with reference to FIG.
A computer system such as a workstation is used for development of a semiconductor integrated circuit device. This computer system constitutes device design means 1 and test design means 2 by the operation program. Of course, the device design means 1 and the test design means 2 can be configured by separate computer systems.
The device design means 1 performs system design, function design, circuit design, and layout design of a semiconductor integrated circuit device based on the target specification. In system design, a semiconductor integrated circuit device is divided into functional modules with an appropriate size. In functional design, a device model is generated in which the functions of a semiconductor integrated circuit device are modeled in a function description language (for example, HDL (Hardware Description Language): hardware description language) as a set of functional modules. After the layout design, a wafer is prototyped by a wafer process. After a probe inspection (P inspection) for the wafer, an assembly process (package) of the prototype device is performed through an assembly process. This prototype device is subjected to product debugging (final inspection), the result of debugging is fed back to the device design, and finally, the production is shifted to mass production of semiconductor integrated circuit devices. The mass-produced semiconductor integrated circuit device is tested by a mass production tester 3 and shipped.
The test design means 2 performs test design for testing the semiconductor integrated circuit device. For example, it supports the design of test programs for debugging for P-test and final test, and test programs for mass-production test for mass-production testers, and also for the design of test boards that connect testers and semiconductor integrated circuit devices. Used.
As is apparent from FIG. 1, the test design means 2 is given the result of the functional design of the semiconductor integrated circuit device. That is, function description data of a semiconductor integrated circuit device represented by the device model is given. Based on this, the test design means 2 generates a tester model in which test items corresponding to the target specifications are modeled, and performs a test design by simulating a device model together with the tester model. The functionally described device model satisfies the target specification of the semiconductor integrated circuit device to be developed. This device model is simulated together with the tester model, and it is determined from the simulation result whether the device model satisfies the target specification. Thus, it is possible to verify the validity of the tester model, for example, whether the design of the test program or the test board is valid, and the test design can proceed from the functional design stage. As shown in FIG. 1, the test design can be completed once by the P detection stage. Therefore, the development period of the semiconductor integrated circuit device can be shortened as a whole and the development efficiency can be improved.
Furthermore, the function description data of the semiconductor integrated circuit device represented by the device model as a result of the function design can be provided to the user of the semiconductor integrated circuit device. As described above, the device model is obtained by modeling the function of the semiconductor integrated circuit device as a set of the function modules in the function description language, and satisfies the target specification. The user can advance the design of a system board or a circuit board (referred to as a user board) using the semiconductor integrated circuit device using the device model before the device is completed. For example, as in the case of the test design described above, a device model that satisfies the target specification is simulated together with a model of a required user board, and it is verified whether the device model satisfies the target specification. If the target specification is not satisfied, the user board model is inconvenient, and the user board can be designed from an early stage while evaluating the user board in this way. Further, as will be described later with reference to FIG. 13, the user can request a design change for the semiconductor device at an early stage so that the user board can be optimized.
FIG. 2 is a flowchart showing an example of a semiconductor integrated circuit device development method. In FIG. 2, steps S1 to S5 are first processing for generating a device model in which the function of the semiconductor integrated circuit device is modeled with a function description language so as to satisfy the target specification. Steps S6 to S8 are a second process for designing a circuit of the semiconductor integrated circuit device based on the device model. Steps S20 to S23 are third processes for performing test design by simulating a device model together with a tester model in which test items corresponding to the target specifications are modeled in parallel with the second process. Steps S30 to S37 are board design processing by the user.
Steps S1 and S2 are not particularly limited, but belong to the category of system design. In step S1, a target specification of a semiconductor integrated circuit device (hereinafter simply referred to as IC) is determined. Although not particularly limited, the input / output state of each external terminal is defined in correspondence with each external terminal of the semiconductor integrated circuit device so as to satisfy the target specification of the semiconductor integrated circuit device. In step S2, the semiconductor integrated circuit device is divided into a plurality of functional modules. The size of the division of the functional module is related to the simulation time when verifying whether the divided functional module satisfies the target specification. The larger the functional module is, the shorter the time required for the verification is. The smaller the functional module is, the more detailed the function can be defined. Which one is adopted can be determined according to whether the semiconductor integrated circuit device is a digital circuit, an analog circuit, a digital / analog mixed circuit, or the like, or can be determined according to the degree of attention.
In steps S3 and S4, the internal terminals of the individual functional modules are defined, the input / output states of the respective internal terminals are defined so that each functional module satisfies the target specification, and the external terminals defined in step S2 are defined. When the input / output state is given, the connection state of the internal terminals between the respective functional modules is defined so as to satisfy the target specification of the semiconductor integrated circuit device, and the device model is generated.
The device model generation process will be described in more detail. In step S2, the input / output state of each external terminal is defined in correspondence with each external terminal of the semiconductor integrated circuit device so as to satisfy the target specification of the semiconductor integrated circuit device. At the same time, the semiconductor integrated circuit device is defined by being divided into a plurality of functional modules. Next, the input / output state of the internal terminal of each functional module is defined, and a functional simulation of the functional module is performed using the defined input / output state to verify whether the functional module satisfies the target specification (S4). For the functional module that does not satisfy the target specification in step S4, the target specification of the functional module is adjusted until each functional module satisfies the target specification (S3), and further simulation is performed (S4). After the target specifications of the individual functional modules are satisfied, a simulation is performed by defining the coupling of the internal terminals between the functional modules and giving the input / output states of the external terminals defined in step S2, and this time the semiconductor integrated circuit It is verified whether or not the target specification of the device is satisfied (S4). If the target specification of the semiconductor integrated circuit device is not satisfied, the simulation is repeated by adjusting the target specification of the desired functional module until the target specification of the semiconductor integrated circuit device is satisfied (S4). When the target specification of the semiconductor integrated circuit device is satisfied, a device model is generated based on the definition of the functional module, the definition for the input / output state of the external terminal and the internal terminal, and the definition of the coupling between the internal terminals.
The device model includes chip function description data relating to functions to be realized on a chip of a semiconductor integrated circuit device, and package function description data relating to electrical characteristics of a package that accommodates the chip and forms an electrical connection with the chip. And both or the former. For example, when an inductance component or a capacitance component parasitic on a bonding wire of a package is considered as a problem in advance, a device model is formed by both the chip function description data and the package function description data.
The definition of such a device model satisfies the target specification of the semiconductor integrated circuit device in terms of the input / output states related to the external terminal and the internal terminal, and this does not recapture the test specification or test for the semiconductor integrated circuit device. Will give the item. Such a device model is given to the test design means 2, and design of a test board and a test program is started based on the description of the device model (S21). Note that the number of terminals and the terminal function are specified from the target specifications of the semiconductor integrated circuit device, and they often do not depend on the simulation result of step S4. Therefore, in this description, these basic target specifications are Preliminarily given to the test design means 2, the element constants of the test board, that is, the number of used terminals and their terminal functions are extracted from the given target specifications (S20), and the extracted data is used as test board design basic data. It is given to the processing of S21.
The test design means 2 can proceed with the test design in parallel with the circuit design after step S5. In the test design, as described above, the device model is simulated together with the tester model, and the validity of the tester model, for example, a test program or Whether the test board design is valid can be verified from the functional design stage.
The tester model includes tester function description data for specifying tester hardware by function description, a test program for determining tester operation for each test item, and test board design data for specifying a circuit configuration of the test board. And can be formed based on. At this time, as described above, the test design means 2 advances the design of the test program and the test board by reflecting the simulation result in the tester model.
In circuit design, circuit design / correction (S6) and circuit simulation (S7) are repeated to satisfy the design target specifications at the circuit level.
When the circuit design is completed (S8), the result is reflected in the test design (S22). For example, if the driving capability of the external output buffer circuit of the semiconductor integrated circuit device is changed to be smaller than the original, it is necessary to change the driving capability of the relay amplifier for driving a relatively long wiring on the test board. Because it becomes. In some cases, it is necessary to eliminate dynamic characteristic changes such as voltage reflection.
When the design of the test board and the test program is completed (S22), the test board is prototyped (S23). During this time, the layout design of the semiconductor integrated circuit device is performed, and the semiconductor integrated circuit device is prototyped (S9). The prototyped semiconductor integrated circuit device is connected to the tester via the created test board, the tester is operated using the test program generated by the test design, and the prototyped semiconductor integrated circuit device is actually manufactured. Verification is performed by operating (S10). At this stage, the test board and the test program are in a highly complete state because the virtual test in step S21 and the correction in step S22 are performed. Therefore, in the device test stage of step S10, if the test result is inconvenient, the failure of the device can be pointed out as the cause first, and the reliability of the test is improved. For the test board, it is most effective to verify the dynamic characteristics such as voltage reflection in step S10, which is the final verification for the test design.
The device model is also provided to the user. The user can design the board of the user's actual system based on the description of the device model (S31). Note that the number of terminals and the terminal function are specified from the target specification of the semiconductor integrated circuit device, and they often do not depend on the simulation result of step S4. Therefore, in this description, these basic target specifications are also included. The number of terminals used for mounting the semiconductor integrated circuit device on the user board and their terminal functions are extracted from the given target specifications given to the user (S30), and the extracted data is used as user board design basic data. It is given to the process of step S31.
As is apparent from FIG. 2, the user can proceed with the design of the user board in parallel with the circuit design by the semiconductor manufacturer. In user board design, as described above, the device model is simulated together with the user board model, and the validity of the user board model is functioned by determining whether the device model satisfies the target specification from the simulation result. It can be verified from the design stage. Therefore, the user can proceed with the design of the user board reflecting the verification result from the functional design stage of the semiconductor integrated circuit device by the manufacturer.
When the circuit design is completed (S8), the result is also provided to the user. The user can reflect the circuit design result in the design of the user board (S32). For example, when the driving capability of the external output buffer circuit of the semiconductor integrated circuit device is changed to be smaller than the initial level, it is possible to make corrections by inserting a relay amplifier or the like in the middle of signal wiring on the user board. In some cases, it is necessary to eliminate dynamic characteristic changes such as voltage reflection.
Thus, the user can start designing the user board prior to providing a prototype of the semiconductor integrated circuit device. After the user board design is completed, the user board is prototyped. As is apparent from FIG. 2, the trial production of the user board can be completed almost simultaneously with the acquisition of the prototype of the semiconductor integrated circuit device. Therefore, the user can obtain a prototype of the semiconductor integrated circuit device immediately after producing the prototype of the user board, and incorporate it into the user board to verify whether the semiconductor integrated circuit device achieves the target specification of the user system. (S35). With reference to the verification result, if necessary, tuning such as adjustment of circuit elements of the user board can be performed (S36). At this stage, since the user board has been subjected to the virtual test in step S31 and the correction in step S32, the user board is in a highly complete state. Therefore, the verification of step S35 can be performed efficiently, and the period until mass production of user boards (S37) can be shortened.
As shown in the comparative example of FIG. 3, the test design cannot be performed from the upstream side of the circuit design by the method of starting the test design such as the test board and the test program after the circuit design of the semiconductor integrated circuit device is completed. Therefore, when verifying the achievement of the target specifications using a prototype semiconductor integrated circuit device, there is not enough time to complete the design of the test board and test program, and thus using the prototype device, the test program and The test board cannot be verified. If mass production is started and the test board or test program is used for testing a mass production device, it will not be possible to determine unambiguously whether the cause is in the device or the test board or test program when a problem occurs. This will interfere with mass production. Moreover, if the test board and the test program are verified using the prototype device, the time for shifting to mass production will be delayed. Similarly, in the method of FIG. 3, user board design can be started only after circuit design is completed.
FIG. 4 shows an example of the functional module divided in step S2 and an example of hardware functional description by HDL for the functional module. A functional module typically shown in FIG.
FIG. 5 is a conceptual diagram showing a state in which a semiconductor integrated circuit device is mounted on a test board. In FIG. 5, 5 is a test board, and 6 is a semiconductor integrated circuit device. A connection terminal with a tester is disposed at the peripheral portion of the test board 5, and the terminal of the semiconductor integrated circuit device 6 is coupled to a corresponding terminal of the tester via a wiring or a circuit element according to its input / output function. The circuit elements are a relay amplifier for driving the wiring load of the test board, a capacitor element for preventing oscillation, a resistor element for preventing voltage reflection, and the like.
FIG. 6 shows a virtual tester (referred to as a virtual tester 2) which is an example of the test design means 2. The virtual tester 2 is configured on a computer system such as a workstation, and includes a simulator 14, a design environment tool 13, a virtual test environment tool 11, a test board design environment tool 10, and a test pattern processing / conversion tool 15. If this example is followed, each tool will comprise a data processing means with the hardware of a computer system, and an application program. The virtual tester 2 inputs the test specifications selected in system design, the device function description data obtained by the device design means 1, and the like.
The test board design environment tool 10 supports circuit design of a test board for connecting a tester and a semiconductor integrated circuit device based on the device model and the like.
The virtual test environment tool 11 is inserted with a plurality of modules 12 for generating tester-specific hardware function description codes such as device power supply, DC measurement system, pin electronics, arbitrary waveform generation, frequency measurement and the like. The virtual test environment tool 11 supports the design of a test program based on the information generated by the module 12, the device model, test specifications, and the like. That is, it supports the design of a test program for verifying necessary test items based on tester function description data for specifying tester-specific hardware by function description and the device model.
The design environment tool 13 is a tool for realizing the tester in software, and is a test board specified from the device specified by the device model and the circuit design data of the test board obtained by the test board design environment tool 10. And the tester are integrated by function description, in other words, by software integration, and a test environment is constructed. That is, a tester model in which test items corresponding to target specifications are modeled based on the tester function description data, the test program, and the design data of the test board, and the tester model and the device model are integrated.
The simulator 14 simulates test items in the built test environment. As a result, the validity of the test program, the validity of the physical connection between the device and the tester by the test board, the wiring load of the test board, etc. are evaluated. If the evaluation result is inconvenient, the test program and test board are corrected.
The test pattern processing / conversion tool 15 is a tool for converting or correcting the test pattern data in the event format on the simulation into a pattern on the time axis that can be used by the tester.
The virtual tester 2 generates a test program, test board circuit design data, and a test pattern.
In this way, the virtual tester 2 can complete the test board design data, the test program, and the test pattern to some extent in parallel with the circuit design, in other words, before the trial manufacture of the device is completed.
FIG. 7 shows an example of data flow in system design and function design. In FIG. 7, reference numeral 20 denotes a functional design and circuit design tool that is operated on a computer system such as a workstation. By drawing a combination of symbols on the screen, the functional design of the semiconductor integrated circuit device Enable circuit design. A large number of symbols are stored in the symbol library 21, and a graphic predefined using the symbols is stored in the graphic library 22. The net list 23 stores connection information of each figure. The function design and circuit design tool 20 is given a package element constant such as the number of external terminals of the package of the semiconductor integrated circuit device, a target specification of the semiconductor integrated circuit device, and the like. Utilizing them, division of function modules, assignment of terminals, and the like are performed, and the function simulation described in steps S3 and S4 is repeated. As a result, the function model (device model) 24 of the entire semiconductor integrated circuit device can be generated as a set of function modules.
FIG. 8 shows an example of a data flow in circuit design. The functional design and circuit design tool 20 receives the device model 24 and the target specification, performs circuit design and simulation based on the device model 24 and the target specification, and repeats the operation until the target specification is satisfied. As a result, circuit design data 25 is obtained.
FIG. 9 shows an example of a data flow when designing a test program and a test board while performing a virtual test using the virtual tester 2. The test board design environment tool, the virtual test environment tool, and the like of the virtual tester 2 enable test design by drawing a diagram in which symbols are combined on the screen. A large number of symbols are stored in the symbol library 21, and a graphic predefined using the symbols is stored in the graphic library 22. The net list 23 stores connection information of each figure. The virtual tester 2 inputs element constants of the test board, device model 24, target specifications, and the like, and basic design data of the test board is generated based on the input. Based on the basic design data of the test board, the device model, and the tester function description data, a tester model 27 in which test items corresponding to the target specifications are modeled is formed, and the tester model and the device model are integrated. Build the environment. Test programs and test boards are evaluated by simulation using this test environment. The evaluation result is reflected in the design data of the test program and test board, and the test program and test board design data 28 in which bugs are corrected are obtained.
FIG. 10 shows an example of the data flow accompanying the design of the user board. A design tool 30 is used for designing the user board. The design tool 30 enables functional design, circuit design, and the like by drawing on the screen a combination of symbols. A large number of symbols are stored in the symbol library 31, and a graphic predefined using the symbols is stored in the graphic library 32. The net list 33 stores connection information of each figure. The design tool 30 inputs element constants of the user board, device model, target specification of the user board, etc., constructs a test environment in which the user board model and the device model are integrated, and evaluates the device and the test board by simulation. .
FIG. 11 shows an example of a test board design method using the virtual tester 2. In order to simulate an actual device test, not only a semiconductor integrated circuit device as a device under test (DUT), but also circuit element constants (inductance, circuit) of an input / output interface circuit of a test board between the tester and the semiconductor integrated circuit device. Capacity etc.) must be taken into account. The element constant is also assumed in a test using a virtual tester. With such an assumption, for the test board input interface circuit coupled to the input of the semiconductor integrated circuit device as the DUT and the output interface circuit of the test board coupled to the output of the semiconductor integrated circuit device as the DUT Performs a circuit simulation and performs a function simulation for a semiconductor integrated circuit device as a DUT. At this time, if the input waveform or output waveform observed in the tester model is greatly deviated from the ideal waveform, the element constant is corrected, and the design of the input / output interface circuit on the test board is changed.
FIG. 12 shows an example of a user board design method using a device model. In designing the user board, circuit element constants (inductance, capacitance, etc.) of peripheral circuits connected to the semiconductor integrated circuit device specified by the device model must be taken into consideration. In designing the user board, the circuit element constant is assumed. With this assumption, circuit simulation is performed on the input peripheral circuit coupled to the input of the semiconductor integrated circuit device and the output peripheral circuit coupled to the output of the semiconductor integrated circuit device. Perform functional simulation. At this time, if the input waveform or output waveform observed in the simulation is greatly deviated from the ideal waveform, the element constant is corrected, and the design of the input peripheral circuit and the output peripheral circuit on the user board is changed.
FIG. 13 shows an example of a semiconductor integrated circuit device verification method in which a part of the semiconductor integrated circuit device on the user board is subjected to circuit simulation. Referring to FIG. 12, the input and output circuits of a semiconductor integrated circuit device are subject to circuit simulation, and the other parts of the semiconductor integrated circuit device are subject to functional simulation. When the simulation waveforms of the input circuit and the output circuit of the semiconductor integrated circuit device are greatly deviated from the ideal waveform, it is necessary to change the element constants of the transistors constituting the input circuit in the semiconductor integrated circuit device. Since such a simulation can be clarified at the circuit design stage by the device manufacturer, the design change inside the semiconductor integrated circuit device is facilitated in order to obtain good compatibility with the user system.
Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited thereto, and various modifications can be made without departing from the scope of the invention.
For example, the tools constituting the virtual tester are not limited to the above description and can be changed as appropriate. In addition, when the circuit scale of the semiconductor integrated circuit device is small or the circuit configuration is simple, it is possible to generate a device model without dividing into a plurality of functional modules. In addition, the semiconductor integrated circuit device development method of the present invention can be applied not only to the development of new devices, but also to the improvement or expansion of functions of existing devices. In this case, it goes without saying that the method of the present invention can be applied by diverting design assets accumulated in the past.
Industrial applicability
The present invention is not limited to a semiconductor integrated circuit device design method such as an ASIC (Application Specific Integrated Circuits) method, a standard cell method, or a custom method, and also includes a logic LSI such as a memory and a microcomputer, an analog LSI, and an analog / digital mixed LSI. The invention can be widely applied to the development of various effective semiconductor integrated circuit devices by reducing the development period of the semiconductor integrated circuit device as a whole and improving the development efficiency.
[Brief description of the drawings]
FIG. 1 is a schematic diagram illustrating a method for developing a semiconductor integrated circuit device according to the present invention.
FIG. 2 is a flowchart showing an example of a method for developing a semiconductor integrated circuit device.
FIG. 3 is a flowchart showing a comparative example in which design of a test board and a test program is started after circuit design of a semiconductor integrated circuit device is completed.
FIG. 4 is an explanatory diagram showing an example of divided functional modules and an example of hardware description by HDL for the functional modules.
FIG. 5 is a conceptual diagram showing a state in which a semiconductor integrated circuit device is mounted on a test board.
FIG. 6 is an explanatory diagram showing a virtual tester which is an example of test design means.
FIG. 7 is an explanatory diagram showing an example of a data flow in system design and function design.
FIG. 8 is an explanatory diagram of an example of a data flow in circuit design.
FIG. 9 is an explanatory diagram showing an example of a data flow when designing a test program and a test board while performing a virtual test using a virtual tester.
FIG. 10 is an explanatory diagram showing an example of a data flow associated with user board design.
FIG. 11 is an explanatory diagram showing an example of a test board design method using a virtual tester.
FIG. 12 is an explanatory diagram showing an example of a user board design method using a device model.
FIG. 13 is a diagram for explaining an example of a method for verifying a semiconductor integrated circuit device in which a part of the semiconductor integrated circuit device on the user board is subjected to circuit simulation.

Claims (7)

A first process for generating a device model in which functions of a semiconductor integrated circuit device are modeled in a function description language so as to satisfy a target specification; a second process for designing a circuit of the semiconductor integrated circuit device based on the device model; In parallel with the second process, a third process for performing test design by simulating a device model together with a tester model that models a test item corresponding to the target specification is executed by a computer,
A first step of defining an input / output state of each external terminal corresponding to each external terminal of the semiconductor integrated circuit device so as to satisfy a target specification of the semiconductor integrated circuit device in the first processing; A second step of dividing the device into a plurality of functional modules, defining internal terminals of the individual functional modules, and defining input / output states of the respective internal terminals so that each functional module satisfies a target specification; When the input / output state of the external terminal defined in the first step is given, the coupling state of the internal terminals between the respective functional modules is defined so as to satisfy the target specification of the semiconductor integrated circuit device, and the device model is defined. the third semi-conductor integrated circuit device the method of development you and executes the steps, with the computer to generate. A first process for generating a device model in which functions of a semiconductor integrated circuit device are modeled in a function description language so as to satisfy a target specification; a second process for designing a circuit of the semiconductor integrated circuit device based on the device model; In parallel with the second process, a third process for performing test design by simulating a device model together with a tester model that models a test item corresponding to the target specification is executed by a computer,
A first step of defining an input / output state of each external terminal corresponding to each external terminal of the semiconductor integrated circuit device so as to satisfy a target specification of the semiconductor integrated circuit device in the first processing; The second step of defining the device by dividing it into a plurality of functional modules and defining the input / output state of the internal terminal of each functional module, and the function of the functional module using the input / output state defined in the second step A third step is performed to verify whether the functional module satisfies the target specification by performing simulation, and the target specification is adjusted and the third step is satisfied for the functional module that does not satisfy the target specification in the third step. The fourth step is repeated until it is done, and the internal terminal coupling between the functional modules satisfying the target specification is defined and When the input / output state of the external terminal defined in Step 1 is given and simulation is performed to verify whether or not the target specification of the semiconductor integrated circuit device is satisfied, and when the target specification is not satisfied in the fifth step A sixth step of adjusting the target specification for the desired functional module and repeating the fifth step until the target specification of the entire semiconductor integrated circuit device is satisfied is executed by a computer ;
When the target specification is satisfied in the fifth step or when the sixth step is passed, the device is defined based on the definition of the functional module, the definition for the input / output state of the external terminal and the internal terminal, and the definition of the coupling between the internal terminals. semiconductors integrated circuit device the method of development you and generates a model in computer. The device model includes chip function description data relating to functions to be realized on a chip of a semiconductor integrated circuit device, and package function description data relating to electrical characteristics of a package that accommodates the chip and forms an electrical connection with the chip. 3. The method of developing a semiconductor integrated circuit device according to claim 1 , wherein the semiconductor integrated circuit device is formed by both or the former. The tester model realizes connection between tester function description data in which tester hardware is specified by function description, a test program for determining tester operation for each test item, and the tester and the semiconductor integrated circuit device. 3. The method of developing a semiconductor integrated circuit device according to claim 1 , wherein the development method is formed based on test board design data for specifying a circuit configuration of the test board for testing. 5. The method of developing a semiconductor integrated circuit device according to claim 4 , wherein the test design is a process of designing the test program and a test board by reflecting the simulation result in the tester model. A fourth process for generating layout data for specifying a layout of the semiconductor integrated circuit device based on the circuit description data; and a semiconductor integrated circuit device manufactured based on the layout data via the test board. 6. The method of developing a semiconductor integrated circuit device according to claim 5 , wherein the fifth process of performing an actual test is further executed by a computer by operating the tester using the test program. Device design means for generating a device model in which functions of a semiconductor integrated circuit device are modeled by a function description language so as to satisfy a target specification, and for designing a semiconductor integrated circuit device based on the device model, and the semiconductor integrated circuit A test design means for performing a test design for testing a circuit device;
The test design means inputs the device model, and first data processing means for supporting circuit design of a test board for connecting a tester and a semiconductor integrated circuit device;
Second data processing means for supporting design of a test program for verifying necessary test items based on tester function description data for specifying tester-specific hardware by function description and the device model;
A tester model in which test items corresponding to the target specifications are modeled based on the tester function description data, the test program, and the design data of the test board is configured, and the tester model and the device model are integrated and simulated Third data processing means for performing
Before the circuit design by the test design means is completed, the design data and test program of the test board can be verified by verifying whether the device model satisfies a target specification based on the simulation result A development system for a semiconductor integrated circuit device, characterized in that

Images