JP3966437B2 - AD converter - Google Patents

AD converter Download PDF

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Publication number
JP3966437B2
JP3966437B2 JP33327298A JP33327298A JP3966437B2 JP 3966437 B2 JP3966437 B2 JP 3966437B2 JP 33327298 A JP33327298 A JP 33327298A JP 33327298 A JP33327298 A JP 33327298A JP 3966437 B2 JP3966437 B2 JP 3966437B2
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JP
Japan
Prior art keywords
converter
signal
input signal
output
analog input
Prior art date
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Expired - Fee Related
Application number
JP33327298A
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Japanese (ja)
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JP2000165239A (en
Inventor
功 菱刈
幸言 細矢
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Chino Corp
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Chino Corp
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Priority to JP33327298A priority Critical patent/JP3966437B2/en
Publication of JP2000165239A publication Critical patent/JP2000165239A/en
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Publication of JP3966437B2 publication Critical patent/JP3966437B2/en
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Description

【発明の属する技術分野】
この発明は、アナログ入力信号をデジタル信号に変換するＡＤ変換装置に関するものである。
【従来の技術】
従来、温度等の各種計測においてアナログ入力信号をデジタル信号に変換し、μＣＰＵで様々な演算処理を実施している。
【発明が解決しようとする課題】
しかしながら、安価に計測装置を構成しようとすると、安価で分解能の低いＡＤ変換器、μＣＰＵを用いることになる。
この発明の目的は、以上の点に鑑み、簡易な構成で、分解能の向上させたＡＤ変換装置を提供することである。
【課題を解決するための手段】
この発明は、アナログ入力信号をデジタル信号に変換するＡＤ変換器と、このＡＤ変換器の出力値に変化があったときなどのデジタル値を格納するメモリと、このときなどのアナログ入力信号を保持する保持手段と、到来するアナログ入力信号と保持手段の出力信号との差を増幅する増幅器と、この増幅器の出力をＡＤ変換器でデジタル信号に変換したデジタル値を前記メモリに格納したデジタル値に加える処理手段とを備えるようにしたＡＤ変換装置である。
【発明の実施の形態】
図１は、この発明の一実施例を示す構成説明図である。図１（ａ）において、１は、温度等のアナログ入力信号が入力される入力端子で、この信号ｅ１はバッファ増幅器Ａ０、スイッチＳ１を介しＡＤ変換器２でデジタル信号ｅｄとされ、μＣＰＵ等の処理手段３に入力され、温度に換算する等の所定の演算処理に用いられるとともにメモリ４に格納される。また、バッファ増幅器Ａ０の出力をサンプルホールドするスイッチＳ０、コンデンサＣ等よりなる保持手段５、この保持手段５の出力ｅｈと引き続き到来する入力信号ｅ１が入力され、これらの差を増幅する作動の増幅器Ａ１を設け、この増幅器Ａ１の出力ｅ２をスイッチＳ２を介しＡＤ変換器２でデジタル信号とされるよう構成されている。通常、スイッチＳ１は閉、スイッチＳ２は開で、入力端子１、バッファ増幅器Ａ０からの入力信号ｅ１は、ＡＤ変換器２でデジタル信号ｅ１ｄに変換され、処理手段３に入力され、メモリ４に格納される。また、通常、保持手段５のスイッチＳ０は、閉で、入力信号ｅ１に追従してコンデンサＣに信号が保持されている。そして、図１（ｂ）で示すように、ある時点ｔ１で、入力信号ｅ１をＡＤ変換器２でデジタル信号として出力したｅ１ｄにビット変換等があったとき、処理手段３はこのデジタル信号ｅ１ｄをメモリ４に格納するとともに、保持手段５のスイッチＳ０を閉から開とし、コンデンサＣにそのときの入力値ｅｈをサンプルホールドして保持する。そして、引き続き到来するアナログ信号ｅ１と保持手段５の出力信号ｅｈとの差を増幅器Ａ１で例えば１０倍に増幅する。このとき、保持手段５のスイッチＳ０の開と連動してスイッチＳ１が開、スイッチＳ２が閉とされ、増幅器Ａ１の出力ｅ２をＡＤ変換器２でデジタル信号ｅ２ｄに変換して分解能を１０倍向上させ、この変換したデジタル値ｅ２ｄを前記メモリ４に格納したデジタル値ｅ１ｄに加えることで、例えば１桁分、分解能を向上させることができる。この動作が順次繰り返され測定が実施される。また、図２に他の実施例を示し、図１と同一符号は同等の構成要素を示す。図２では、常時、抵抗Ｒ、コンデンサＣよりなる保持手段５に入力信号ｅ１の所定量を保持し、差動の増幅器Ａ１で保持手段５の保持信号と入力信号ｅ１の差をとり所定倍し分解能を向上させ、スイッチＳ１、Ｓ２を交互に動作させ、入力信号と差信号をＡＤ変換器２でデジタル信号とし、これらを加算させるようにし、常時データに修正を加え、分解能を向上している。
【発明の効果】
以上述べたように、この発明は、アナログ入力信号をデジタル信号に変換するＡＤ変換器と、このＡＤ変換器の出力値に変化があったときなどのデジタル値を格納するメモリと、このときなどのアナログ入力信号を保持する保持手段と、到来するアナログ入力信号と保持手段の出力信号との差を増幅する増幅器と、この増幅器の出力をＡＤ変換器でデジタル信号に変換したデジタル値を前記メモリに格納したデジタル値に加える処理手段とを備えるようにしたＡＤ変換装置である。このため、分解能の少ないＡＤ変換器を用いたとしても、入力信号の部分、変化分などを所定倍して、基本の信号に加算しているので、分解能を大きく向上させることができ、簡易な構成で、小形、安価に高分解能のＡＤ変換が出来る。特に、ＡＤ変換器、μＣＰＵ一体型のＩＣなどに好適である。
【図面の簡単な説明】
【図１】この発明の一実施例を示す構成説明図である。
【図２】この発明の一実施例を示す構成説明図である。
【符号の説明】
１ 入力端子
２ ＡＤ変換器
３ 処理手段
４ メモリ
５ 保持手段
Ａ０、Ａ１ 増幅器BACKGROUND OF THE INVENTION
The present invention relates to an AD converter for converting an analog input signal into a digital signal.
[Prior art]
Conventionally, an analog input signal is converted into a digital signal in various measurements such as temperature, and various arithmetic processes are performed by the μCPU.
[Problems to be solved by the invention]
However, if an attempt is made to configure a measurement device at a low cost, an inexpensive AD converter with low resolution and a μCPU are used.
In view of the above points, an object of the present invention is to provide an AD converter with a simple configuration and improved resolution.
[Means for Solving the Problems]
The present invention includes an AD converter that converts an analog input signal into a digital signal, a memory that stores a digital value when the output value of the AD converter changes, and an analog input signal that is stored at this time. Holding means, an amplifier for amplifying the difference between the incoming analog input signal and the output signal of the holding means, and a digital value obtained by converting the output of the amplifier into a digital signal by an AD converter into a digital value stored in the memory And an AD conversion device including processing means to be added.
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is an explanatory diagram showing the construction of an embodiment of the present invention. In FIG. 1A, reference numeral 1 denotes an input terminal to which an analog input signal such as temperature is input. This signal e1 is converted into a digital signal ed by the AD converter 2 via the buffer amplifier A0 and the switch S1, and the like such as μCPU. The data is input to the processing means 3 and used for a predetermined calculation process such as conversion into temperature and stored in the memory 4. Further, a holding means 5 comprising a switch S0 for sampling and holding the output of the buffer amplifier A0, a capacitor C and the like, an output eh of the holding means 5 and an incoming input signal e1 are inputted, and an operation amplifier for amplifying the difference between them. A1 is provided, and the output e2 of the amplifier A1 is converted into a digital signal by the AD converter 2 via the switch S2. Normally, the switch S1 is closed, the switch S2 is open, and the input signal e1 from the input terminal 1 and the buffer amplifier A0 is converted into a digital signal e1d by the AD converter 2, input to the processing means 3, and stored in the memory 4 Is done. Normally, the switch S0 of the holding means 5 is closed and the signal is held in the capacitor C following the input signal e1. As shown in FIG. 1B, when bit conversion or the like is performed on e1d output from the input signal e1 as a digital signal by the AD converter 2 at a certain time t1, the processing means 3 converts the digital signal e1d into the digital signal e1d. While being stored in the memory 4, the switch S0 of the holding means 5 is opened from the closed state, and the input value eh at that time is sampled and held in the capacitor C and held. Then, the difference between the analog signal e1 that subsequently arrives and the output signal eh of the holding means 5 is amplified by, for example, 10 times by the amplifier A1. At this time, the switch S1 is opened and the switch S2 is closed in conjunction with the opening of the switch S0 of the holding means 5, and the output e2 of the amplifier A1 is converted into the digital signal e2d by the AD converter 2 to improve the resolution 10 times. By adding the converted digital value e2d to the digital value e1d stored in the memory 4, the resolution can be improved, for example, by one digit. This operation is sequentially repeated to perform measurement. FIG. 2 shows another embodiment, and the same reference numerals as those in FIG. 1 denote equivalent components. In FIG. 2, a predetermined amount of the input signal e1 is always held in the holding means 5 consisting of the resistor R and the capacitor C, and the difference between the holding signal of the holding means 5 and the input signal e1 is obtained by a differential amplifier A1 and multiplied by a predetermined amount. The resolution is improved, the switches S1 and S2 are operated alternately, the input signal and the difference signal are converted into digital signals by the AD converter 2, and these are added, and the data is constantly corrected to improve the resolution. .
【The invention's effect】
As described above, the present invention includes an AD converter that converts an analog input signal into a digital signal, a memory that stores a digital value such as when the output value of the AD converter changes, and at this time Holding means for holding the analog input signal, an amplifier for amplifying the difference between the incoming analog input signal and the output signal of the holding means, and a digital value obtained by converting the output of the amplifier into a digital signal by the AD converter And an AD conversion apparatus including processing means for adding to the digital value stored in the digital value. For this reason, even if an A / D converter with a low resolution is used, the input signal portion, the change, etc. are multiplied by a predetermined amount and added to the basic signal, so that the resolution can be greatly improved and simplified. With the configuration, AD conversion with high resolution can be performed in a small size and at low cost. It is particularly suitable for AD converters, μCPU integrated ICs, and the like.
[Brief description of the drawings]
FIG. 1 is a configuration explanatory view showing an embodiment of the present invention.
FIG. 2 is a configuration explanatory view showing an embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Input terminal 2 AD converter 3 Processing means 4 Memory 5 Holding means A0, A1 Amplifier

Claims (2)

アナログ入力信号をデジタル信号に変換するＡＤ変換器を備え、このＡＤ変換器の出力値に変化がなかったときは、到来するアナログ入力信号をＡＤ変換器でデジタル信号に変換してデジタル値を格納するメモリと、このＡＤ変換器の出力値に変化があったときは、その変化した出力値を前記メモリに格納し、このＡＤ変換器の出力値の変化があったときのアナログ入力信号を保持する保持手段と、引き続き到来するアナログ入力信号と保持手段の出力信号との差を増幅する増幅器と、この増幅器の出力をＡＤ変換器でデジタル信号に変換したデジタル値を前記メモリに格納したデジタル値に加える処理手段とを備えたことを特徴とするＡＤ変換装置。An AD converter that converts an analog input signal into a digital signal is provided. When there is no change in the output value of the AD converter, the incoming analog input signal is converted into a digital signal by the AD converter and the digital value is stored. When the output value of the AD converter is changed, the changed output value is stored in the memory, and the analog input signal when the output value of the AD converter is changed is held. Holding means, an amplifier for amplifying the difference between the incoming analog input signal and the output signal of the holding means, and a digital value obtained by converting the output of the amplifier into a digital signal by an AD converter and stored in the memory An AD conversion apparatus comprising processing means for adding to the AD converter. アナログ入力信号をデジタル信号に変換するＡＤ変換器と、このＡＤ変換器の出力を格納するメモリと、前記アナログ入力信号の所定量をを保持する保持手段と、到来するアナログ入力信号と保持手段の出力信号との差を増幅する増幅器と、到来するアナログ入力信号と前記増幅器の出力を交互にＡＤ変換器でデジタル信号に変換し、前記増幅器の出力をＡＤ変換器でデジタル信号に変換したデジタル値を、前記メモリに格納したアナログ入力信号をＡＤ変換器でデジタル信号に変換したデジタル値に加える処理手段とを備えたことを特徴とするＡＤ変換装置。An AD converter that converts an analog input signal into a digital signal, a memory that stores an output of the AD converter, a holding unit that holds a predetermined amount of the analog input signal, an incoming analog input signal, and a holding unit An amplifier that amplifies the difference from the output signal, an incoming analog input signal and the output of the amplifier are alternately converted into a digital signal by an AD converter, and a digital value obtained by converting the output of the amplifier into a digital signal by an AD converter And a processing means for adding the analog input signal stored in the memory to a digital value converted into a digital signal by the AD converter.
JP33327298A 1998-11-24 1998-11-24 AD converter Expired - Fee Related JP3966437B2 (en)

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Application Number Priority Date Filing Date Title
JP33327298A JP3966437B2 (en) 1998-11-24 1998-11-24 AD converter

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Application Number Priority Date Filing Date Title
JP33327298A JP3966437B2 (en) 1998-11-24 1998-11-24 AD converter

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JP2000165239A JP2000165239A (en) 2000-06-16
JP3966437B2 true JP3966437B2 (en) 2007-08-29

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JP33327298A Expired - Fee Related JP3966437B2 (en) 1998-11-24 1998-11-24 AD converter

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